Hi Marcin,
As promised, I started working on your performance problem.
Le 29/12/2011 02:38, Marcin Slusarz a écrit :
I tried to implement xfers runtime switching, but couldn't figure out
how to change ctxprog behaviour without rebuilding and reuploading
whole thing. Reading host-writable memory from ctxprog would be enough.
Well, I did that for you (see the patch enclosed). The patch uses the
4th ctxprog flag register's bit 0 to store the wanted behaviour.
Mwk suggested me to do so and it worked perfectly.
You have all the instructions in the commit message, please report on
the actual results!
By the mean time, I'll plug it to a PM brain so as it would switch back
and forth between the two modes according to the load or the perflvl.
Take care,
Martin
>From 8e6667c87074b1b519fef0946083d46d01dfe8a0 Mon Sep 17 00:00:00 2001
From: Martin Peres <martin.pe...@labri.fr>
Date: Fri, 13 Jan 2012 22:05:28 +0100
Subject: [PATCH] drm/nv50/gr: make ctxprog decide at run time to disable or
not xfer
This commit is a follow-up on "drm/nv50/gr: enable ctxprog xfer only when we need it to save power".
The current situation is that some cards (nv92) have an hw regression that lower performance that
has been reported to about 15%.
This commit is the initial work to get the best of both world, that is to say:
- Performance when it is actually needed
- Power consumption when current performance is enough for the current needs
How-to:
- To go for performance : nvapoke 400830 1
- To go for power consumption: nvapoke 400830 0
Then, force the card to do a context switch (switch to a TTY for instance).
Make sure it worked by peeking 400824. Bit 0x4000 is the XFER_ENABLE.
Reported-by: Marcin Slusarz <marcin.slus...@gmail.com>
Signed-off-by: Martin Peres <martin.pe...@labri.fr>
---
drivers/gpu/drm/nouveau/nv50_grctx.c | 14 ++++++++++++--
1 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c
index 4b46d69..b2fdb7d 100644
--- a/drivers/gpu/drm/nouveau/nv50_grctx.c
+++ b/drivers/gpu/drm/nouveau/nv50_grctx.c
@@ -74,6 +74,11 @@
#define CP_FLAG_INTR_NOT_PENDING 0
#define CP_FLAG_INTR_PENDING 1
+/* CTXCTL_FLAGS_3: should only be written by host ! */
+#define CP_FLAG_PM_XFER ((3 * 32) + 0)
+#define CP_FLAG_PM_XFER_ENABLE 0
+#define CP_FLAG_PM_XFER_DISABLE 1
+
#define CP_CTX 0x00100000
#define CP_CTX_COUNT 0x000f0000
#define CP_CTX_COUNT_SHIFT 16
@@ -163,6 +168,7 @@ enum cp_label {
cp_setup_save,
cp_swap_state,
cp_prepare_exit,
+ cp_xfer,
cp_exit,
};
@@ -263,13 +269,17 @@ nv50_grctx_init(struct nouveau_grctx *ctx)
cp_set (ctx, UNK03, CLEAR);
cp_set (ctx, UNK1D, CLEAR);
- cp_bra (ctx, USER_SAVE, PENDING, cp_exit);
+ cp_bra (ctx, USER_SAVE, PENDING, cp_xfer);
cp_out (ctx, CP_NEXT_TO_CURRENT);
+ /* disable xfer unless we are told otherwise by the host */
+ cp_name(ctx, cp_xfer);
+ cp_bra (ctx, PM_XFER, DISABLE, cp_exit);
+ cp_set (ctx, XFER_SWITCH, DISABLE);
+
cp_name(ctx, cp_exit);
cp_set (ctx, USER_SAVE, NOT_PENDING);
cp_set (ctx, USER_LOAD, NOT_PENDING);
- cp_set (ctx, XFER_SWITCH, DISABLE);
cp_set (ctx, STATE, STOPPED);
cp_out (ctx, CP_END);
ctx->ctxvals_pos += 0x400; /* padding... no idea why you need it */
--
1.7.8.3
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