Re: [Nouveau] [PATCH] drm/nouveau: restore hw accelerated buffer copies

2012-08-20 Thread Ben Skeggs
On Fri, Aug 17, 2012 at 11:47:44PM +0200, Marcin Slusarz wrote:
 Regression from drm/nve0: use async copy engine for ttm buffer moves
 if available.
Oops, my bad.  Applied, thanks!

 
 Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
 ---
  drivers/gpu/drm/nouveau/nouveau_bo.c |4 ++--
  1 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c 
 b/drivers/gpu/drm/nouveau/nouveau_bo.c
 index 325b8cb..dc04395 100644
 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c
 +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
 @@ -1037,9 +1037,9 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
   u32 handle = (mthd-engine  16) | mthd-oclass;
  
   if (mthd-init == nve0_bo_move_init)
 - chan = drm-channel;
 - else
   chan = drm-cechan;
 + else
 + chan = drm-channel;
   if (chan == NULL)
   continue;
  
 -- 
 1.7.8.6
 
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Re: [Nouveau] [PATCH 01/10] drm/nv50: decode PGRAPH status registers on TLB flush fail

2012-08-20 Thread Ben Skeggs
On Sun, Aug 19, 2012 at 10:59:56PM +0200, Marcin Slusarz wrote:
 Now it outputs:
 nouveau E[  PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail
 nouveau E[  PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH 
 CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX 
 TPRAST TPROP ROP (0x011fde03)
 nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_0: CCACHE (0x00145b4d)
 nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_1: (0x002d)
 nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_2: ENG2D ROP (0x0034db40)
 
 instead of:
 [drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03 
 0x00145b4d 0x002d 0x0034db40

I didn't push these first few patches yet as I have a couple of thoughts on it.

Mostly I was thinking we should probably have a:

nv_printf(obj, lvl, fmt, args...)

to replace the printk's which just does a continued print while still obeying
the debug level?

 
 Based on envytools docs.
 
 Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
 ---
  drivers/gpu/drm/nouveau/core/engine/graph/nv50.c |   78 -
  1 files changed, 74 insertions(+), 4 deletions(-)
 
 diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c 
 b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
 index c93b525..f60aec9 100644
 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
 +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
 @@ -184,6 +184,62 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine)
   return 0;
  }
  
 +static struct nouveau_bitfield nv50_pgraph_status[] = {
 + { 10, BUSY }, /* set when any bit is set */
 + { 11, DISPATCH },
 + { 12, UNK2 },
 + { 13, UNK3 },
 + { 14, UNK4 },
 + { 15, UNK5 },
 + { 16, M2MF },
 + { 17, UNK7 },
 + { 18, CTXPROG },
 + { 19, VFETCH },
 + { 110, CCACHE_UNK4 },
 + { 111, STRMOUT_GSCHED_UNK5 },
 + { 112, UNK14XX },
 + { 113, UNK24XX_CSCHED },
 + { 114, UNK1CXX },
 + { 115, CLIPID },
 + { 116, ZCULL },
 + { 117, ENG2D },
 + { 118, UNK34XX },
 + { 119, TPRAST },
 + { 120, TPROP },
 + { 121, TEX },
 + { 122, TPVP },
 + { 123, MP },
 + { 124, ROP },
 + {}
 +};
hex bitfields please :)

 +
 +static const char *const nv50_pgraph_vstatus_0[] = {
 + VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL
 +};
 +
 +static const char *const nv50_pgraph_vstatus_1[] = {
 + TPRAST, TPROP, TEXTURE, TPVP, MP, NULL
 +};
 +
 +static const char *const nv50_pgraph_vstatus_2[] = {
 + UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX,
 + ROP, NULL
 +};
 +
 +static void nouveau_pgraph_vstatus_print(const char *const units[], u32 
 status)
 +{
 + int i;
 + u32 tmp = status;
 + for (i = 0; units[i]  tmp; i++) {
 + if ((tmp  7) == 1)
 + pr_cont(%s , units[i]);
 + tmp = 3;
 + }
 + if (tmp)
 + pr_cont(invalid: %x , tmp);
 + pr_cont((0x%08x)\n, status);
 +}
 +
  static int
  nv84_graph_tlb_flush(struct nouveau_engine *engine)
  {
 @@ -219,10 +275,24 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine)
!(timeout = ptimer-read(ptimer) - start  20));
  
   if (timeout) {
 - nv_error(priv, PGRAPH TLB flush idle timeout fail: 
 -   0x%08x 0x%08x 0x%08x 0x%08x\n,
 -  nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380),
 -  nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388));
 + nv_error(priv, PGRAPH TLB flush idle timeout fail\n);
 +
 + nv_error(priv, PGRAPH_STATUS: );
 + tmp = nv_rd32(priv, 0x400700);
 + nouveau_bitfield_print(nv50_pgraph_status, tmp);
 + pr_cont( (0x%08x)\n, tmp);
 +
 + nv_error(priv, PGRAPH_VSTATUS_0: );
 + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_0,
 + nv_rd32(priv, 0x400380));
 +
 + nv_error(priv, PGRAPH_VSTATUS_1: );
 + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_1,
 + nv_rd32(priv, 0x400384));
 +
 + nv_error(priv, PGRAPH_VSTATUS_2: );
 + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_2,
 + nv_rd32(priv, 0x400388));
   }
  
   nv50_vm_flush_engine(engine-base, 0x00);
 -- 
 1.7.8.6
 
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Re: [Nouveau] [PATCH 06/10] drm/nouveau: sparse fixes

2012-08-20 Thread Ben Skeggs
On Sun, Aug 19, 2012 at 11:00:01PM +0200, Marcin Slusarz wrote:
 drivers/gpu/drm/nouveau/core/core/object.c:452:22: warning: non-ANSI function 
 declaration of function 'nouveau_object_debug'
 
 drivers/gpu/drm/nouveau/core/subdev/device/base.c:64:10: warning: Initializer 
 entry defined twice
 drivers/gpu/drm/nouveau/core/subdev/device/base.c:73:10:   also defined here
Applied the first hunk, the second I'd already fixed in my tree.

 
 (harmless, second init had the same value)
 
 Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
 ---
  drivers/gpu/drm/nouveau/core/core/object.c|2 +-
  drivers/gpu/drm/nouveau/core/subdev/device/base.c |1 -
  2 files changed, 1 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/gpu/drm/nouveau/core/core/object.c 
 b/drivers/gpu/drm/nouveau/core/core/object.c
 index d94cb66..0daab62 100644
 --- a/drivers/gpu/drm/nouveau/core/core/object.c
 +++ b/drivers/gpu/drm/nouveau/core/core/object.c
 @@ -449,7 +449,7 @@ nouveau_object_dec(struct nouveau_object *object, bool 
 suspend)
  }
  
  void
 -nouveau_object_debug()
 +nouveau_object_debug(void)
  {
  #ifdef NOUVEAU_OBJECT_MAGIC
   struct nouveau_object *object;
 diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/base.c 
 b/drivers/gpu/drm/nouveau/core/subdev/device/base.c
 index d4abca7..afc6be0 100644
 --- a/drivers/gpu/drm/nouveau/core/subdev/device/base.c
 +++ b/drivers/gpu/drm/nouveau/core/subdev/device/base.c
 @@ -70,7 +70,6 @@ static const u64 disable_map[] = {
   [NVDEV_SUBDEV_VM]   = NV_DEVICE_DISABLE_CORE,
   [NVDEV_SUBDEV_INSTMEM]  = NV_DEVICE_DISABLE_CORE,
   [NVDEV_SUBDEV_BAR]  = NV_DEVICE_DISABLE_CORE,
 - [NVDEV_SUBDEV_GPIO] = NV_DEVICE_DISABLE_CORE,
   [NVDEV_SUBDEV_VOLT] = NV_DEVICE_DISABLE_CORE,
   [NVDEV_SUBDEV_FAN0] = NV_DEVICE_DISABLE_CORE,
   [NVDEV_SUBDEV_CLOCK]= NV_DEVICE_DISABLE_CORE,
 -- 
 1.7.8.6
 
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Re: [Nouveau] [PATCH 08/10] drm/nouveau: use ioread32_native/iowrite32_native for fifo control registers

2012-08-20 Thread Ben Skeggs
On Sun, Aug 19, 2012 at 11:00:03PM +0200, Marcin Slusarz wrote:
 Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
 ---
 Do I miss something important why was it written this way?
Nope, you didn't.  It's a left-over from a *really* early revision of
the userspace version of the kernel module.

Thanks!

 ---
  drivers/gpu/drm/nouveau/core/engine/fifo/base.c |4 ++--
  1 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/base.c 
 b/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
 index 543fcaf..bbb43c6 100644
 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
 +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
 @@ -122,14 +122,14 @@ u32
  _nouveau_fifo_channel_rd32(struct nouveau_object *object, u32 addr)
  {
   struct nouveau_fifo_chan *chan = (void *)object;
 - return ((volatile u32 *)chan-user)[addr / 4];
 + return ioread32_native(chan-user + addr);
  }
  
  void
  _nouveau_fifo_channel_wr32(struct nouveau_object *object, u32 addr, u32 data)
  {
   struct nouveau_fifo_chan *chan = (void *)object;
 - ((volatile u32 *)chan-user)[addr / 4] = data;
 + iowrite32_native(data, chan-user + addr);
  }
  
  static int
 -- 
 1.7.8.6
 
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Re: [Nouveau] [PATCH 09/10] drm/nv50/evo: store iomem pointer in properly typed field

2012-08-20 Thread Ben Skeggs
On Sun, Aug 19, 2012 at 11:00:04PM +0200, Marcin Slusarz wrote:
 Abuse of function pointer was noticed by sparse.
I'm aware of this horror, however I didn't apply the patch.  I have work in
progress that'll get rid of this nasty stuff before the tree goes upstream,
doing it this way was a quick hack to keep things working and be able to
push the tree until it's ready.

 
 Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
 ---
  drivers/gpu/drm/nouveau/nv50_evo.c |   18 --
  1 files changed, 12 insertions(+), 6 deletions(-)
 
 diff --git a/drivers/gpu/drm/nouveau/nv50_evo.c 
 b/drivers/gpu/drm/nouveau/nv50_evo.c
 index 0f53416..0483cbd 100644
 --- a/drivers/gpu/drm/nouveau/nv50_evo.c
 +++ b/drivers/gpu/drm/nouveau/nv50_evo.c
 @@ -33,17 +33,22 @@
  #include subdev/timer.h
  #include subdev/fb.h
  
 +struct evo_object {
 + struct nouveau_object parent;
 + void __iomem *iomem;
 +};
 +
  static u32
  nv50_evo_rd32(struct nouveau_object *object, u32 addr)
  {
 - void __iomem *iomem = object-oclass-ofuncs-rd08;
 + void __iomem *iomem = ((struct evo_object *)object)-iomem;
   return ioread32_native(iomem + addr);
  }
  
  static void
  nv50_evo_wr32(struct nouveau_object *object, u32 addr, u32 data)
  {
 - void __iomem *iomem = object-oclass-ofuncs-rd08;
 + void __iomem *iomem = ((struct evo_object *)object)-iomem;
   iowrite32_native(data, iomem + addr);
  }
  
 @@ -60,7 +65,7 @@ nv50_evo_channel_del(struct nouveau_channel **pevo)
   nouveau_bo_ref(NULL, evo-push.buffer);
  
   if (evo-object)
 - iounmap(evo-object-oclass-ofuncs);
 + iounmap(((struct evo_object *)evo-object)-iomem);
  
   kfree(evo);
  }
 @@ -112,6 +117,7 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,
   struct nouveau_drm *drm = nouveau_drm(dev);
   struct nv50_display *disp = nv50_display(dev);
   struct nouveau_channel *evo;
 + struct evo_object *evo_object;
   int ret;
  
   evo = kzalloc(sizeof(struct nouveau_channel), GFP_KERNEL);
 @@ -142,7 +148,8 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,
   return ret;
   }
  
 - evo-object = kzalloc(sizeof(*evo-object), GFP_KERNEL);
 + evo_object = kzalloc(sizeof(*evo_object), GFP_KERNEL);
 + evo-object = evo_object-parent;
  #ifdef NOUVEAU_OBJECT_MAGIC
   evo-object-_magic = NOUVEAU_OBJECT_MAGIC;
  #endif
 @@ -154,8 +161,7 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,
   kzalloc(sizeof(*evo-object-oclass-ofuncs), GFP_KERNEL);
   evo-object-oclass-ofuncs-rd32 = nv50_evo_rd32;
   evo-object-oclass-ofuncs-wr32 = nv50_evo_wr32;
 - evo-object-oclass-ofuncs-rd08 =
 - ioremap(pci_resource_start(dev-pdev, 0) +
 + evo_object-iomem = ioremap(pci_resource_start(dev-pdev, 0) +
   NV50_PDISPLAY_USER(evo-handle), PAGE_SIZE);
   return 0;
  }
 -- 
 1.7.8.6
 
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Re: [Nouveau] [PATCH 10/10] drm/nouveau: fix off-by-one bugs related to command submission in IB mode

2012-08-20 Thread Ben Skeggs
On Sun, Aug 19, 2012 at 11:02:00PM +0200, Marcin Slusarz wrote:
 Commit drm/nouveau: port all engines to new engine module format changed
 IB size calculation to be less wasteful, but didn't take into account already
 existing off-by-one bugs :).
 
 So:
 - ib_max is the last entry, so we need to +1 when calculating number of
   free entries
 - nv50_dma_wait already does +1 (for FIRE_RING), so we don't need another +1
   on nouveau_gem_ioctl_pushbuf side
 - there are 512 allocated IB entries (and it needs to be round number), so we
   can accept at most 511 entries from userspace (we need one for FIRE_RING) -
   fortunately userspace already flushes at 511, so nr_push check change won't
   have any impact
Also skipped this patch for now as I have work in progress that will improve 
this and
related code.  I should have it in the tree soon.

 
 Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
 ---
  drivers/gpu/drm/nouveau/nouveau_chan.c |2 +-
  drivers/gpu/drm/nouveau/nouveau_dma.c  |2 +-
  drivers/gpu/drm/nouveau/nouveau_gem.c  |4 ++--
  3 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c 
 b/drivers/gpu/drm/nouveau/nouveau_chan.c
 index fd15ebf..d0c0271 100644
 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c
 +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
 @@ -318,7 +318,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 
 vram, u32 gart)
   chan-dma.ib_base =  0x1 / 4;
   chan-dma.ib_max  = (0x01000 / 8) - 1;
   chan-dma.ib_put  = 0;
 - chan-dma.ib_free = chan-dma.ib_max - chan-dma.ib_put;
 + chan-dma.ib_free = chan-dma.ib_max - chan-dma.ib_put + 1;
   chan-dma.max = chan-dma.ib_base;
   break;
   }
 diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c 
 b/drivers/gpu/drm/nouveau/nouveau_dma.c
 index 40f91e1..e814fab 100644
 --- a/drivers/gpu/drm/nouveau/nouveau_dma.c
 +++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
 @@ -128,7 +128,7 @@ nv50_dma_push_wait(struct nouveau_channel *chan, int 
 count)
  
   chan-dma.ib_free = get - chan-dma.ib_put;
   if (chan-dma.ib_free = 0)
 - chan-dma.ib_free += chan-dma.ib_max;
 + chan-dma.ib_free += chan-dma.ib_max + 1;
   }
  
   return 0;
 diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c 
 b/drivers/gpu/drm/nouveau/nouveau_gem.c
 index 6454370..d19c7aa 100644
 --- a/drivers/gpu/drm/nouveau/nouveau_gem.c
 +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
 @@ -662,7 +662,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void 
 *data,
   if (unlikely(req-nr_push == 0))
   goto out_next;
  
 - if (unlikely(req-nr_push  NOUVEAU_GEM_MAX_PUSH)) {
 + if (unlikely(req-nr_push = NOUVEAU_GEM_MAX_PUSH)) {
   NV_ERROR(drm, pushbuf push count exceeds limit: %d max %d\n,
req-nr_push, NOUVEAU_GEM_MAX_PUSH);
   return nouveau_abi16_put(abi16, -EINVAL);
 @@ -718,7 +718,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void 
 *data,
   }
  
   if (chan-dma.ib_max) {
 - ret = nouveau_dma_wait(chan, req-nr_push + 1, 16);
 + ret = nouveau_dma_wait(chan, req-nr_push, 16);
   if (ret) {
   NV_ERROR(drm, nv50cal_space: %d\n, ret);
   goto out;
 -- 
 1.7.8.6
 
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[Nouveau] did you needr freezes on GeForce 9400M (MacBookPro) ?

2012-08-20 Thread Samuel Dorsaz
Hi,

I just want to know if you are interested by report for freeze issue on
a MacBook Pro (5,1 if I remember) with a GeForce 9400M card using nv50.

I imagine how many MacBook user have reported and just want to know
if my contribution can be useful or absolutely not.

Sincerly,

Samuel


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[Nouveau] [Bug 53842] New: Nouveau fails to read EDID, but X succeeds.

2012-08-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=53842

 Bug #: 53842
   Summary: Nouveau fails to read EDID, but X succeeds.
Classification: Unclassified
   Product: xorg
   Version: unspecified
  Platform: x86-64 (AMD64)
OS/Version: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: Driver/nouveau
AssignedTo: nouveau@lists.freedesktop.org
ReportedBy: james.dut...@gmail.com
 QAContact: xorg-t...@lists.x.org


Created attachment 65829
  -- https://bugs.freedesktop.org/attachment.cgi?id=65829
dmesg showing the problem with EDID

Nouveau fails to read EDID, but X succeeds

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[Nouveau] [Bug 53842] Nouveau fails to read EDID, but X succeeds.

2012-08-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=53842

--- Comment #1 from james.dut...@gmail.com 2012-08-20 12:23:20 UTC ---
Created attachment 65830
  -- https://bugs.freedesktop.org/attachment.cgi?id=65830
Xorg.0.log showing X reading EDID OK.

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Re: [Nouveau] [PATCH 01/10] drm/nv50: decode PGRAPH status registers on TLB flush fail

2012-08-20 Thread Marcin Slusarz
On Mon, Aug 20, 2012 at 04:27:18PM +1000, Ben Skeggs wrote:
 On Sun, Aug 19, 2012 at 10:59:56PM +0200, Marcin Slusarz wrote:
  Now it outputs:
  nouveau E[  PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail
  nouveau E[  PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH 
  CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX 
  TPRAST TPROP ROP (0x011fde03)
  nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_0: CCACHE (0x00145b4d)
  nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_1: (0x002d)
  nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_2: ENG2D ROP (0x0034db40)
  
  instead of:
  [drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03 
  0x00145b4d 0x002d 0x0034db40
 
 I didn't push these first few patches yet as I have a couple of thoughts on 
 it.
 
 Mostly I was thinking we should probably have a:
 
 nv_printf(obj, lvl, fmt, args...)
 
 to replace the printk's which just does a continued print while still obeying
 the debug level?

Well, this patch does not use nv_printk_enabled, so these concerns should
not apply to it, right? I'll fix up bitfield list and resend it.

Speaking of nv_printf, I have a couple of problems with it:
- it would repeatedly recheck whether to print something or not
- it would always evaluate its arguments
- nouveau_enum_print / nouveau_bitfield_print would need object/level arguments
- you still would need nv_printk_enabled for levels = DEBUG (like in mxms.c)

It's a lot of wasted CPU time...

  
  Based on envytools docs.
  
  Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
  ---
   drivers/gpu/drm/nouveau/core/engine/graph/nv50.c |   78 
  -
   1 files changed, 74 insertions(+), 4 deletions(-)
  
  diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c 
  b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
  index c93b525..f60aec9 100644
  --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
  +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
  @@ -184,6 +184,62 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine)
  return 0;
   }
   
  +static struct nouveau_bitfield nv50_pgraph_status[] = {
  +   { 10, BUSY }, /* set when any bit is set */
  +   { 11, DISPATCH },
  +   { 12, UNK2 },
  +   { 13, UNK3 },
  +   { 14, UNK4 },
  +   { 15, UNK5 },
  +   { 16, M2MF },
  +   { 17, UNK7 },
  +   { 18, CTXPROG },
  +   { 19, VFETCH },
  +   { 110, CCACHE_UNK4 },
  +   { 111, STRMOUT_GSCHED_UNK5 },
  +   { 112, UNK14XX },
  +   { 113, UNK24XX_CSCHED },
  +   { 114, UNK1CXX },
  +   { 115, CLIPID },
  +   { 116, ZCULL },
  +   { 117, ENG2D },
  +   { 118, UNK34XX },
  +   { 119, TPRAST },
  +   { 120, TPROP },
  +   { 121, TEX },
  +   { 122, TPVP },
  +   { 123, MP },
  +   { 124, ROP },
  +   {}
  +};
 hex bitfields please :)

Sure. I thought it would be easier to read.

  +
  +static const char *const nv50_pgraph_vstatus_0[] = {
  +   VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL
  +};
  +
  +static const char *const nv50_pgraph_vstatus_1[] = {
  +   TPRAST, TPROP, TEXTURE, TPVP, MP, NULL
  +};
  +
  +static const char *const nv50_pgraph_vstatus_2[] = {
  +   UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX,
  +   ROP, NULL
  +};
  +
  +static void nouveau_pgraph_vstatus_print(const char *const units[], u32 
  status)
  +{
  +   int i;
  +   u32 tmp = status;
  +   for (i = 0; units[i]  tmp; i++) {
  +   if ((tmp  7) == 1)
  +   pr_cont(%s , units[i]);
  +   tmp = 3;
  +   }
  +   if (tmp)
  +   pr_cont(invalid: %x , tmp);
  +   pr_cont((0x%08x)\n, status);
  +}
  +
   static int
   nv84_graph_tlb_flush(struct nouveau_engine *engine)
   {
  @@ -219,10 +275,24 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine)
   !(timeout = ptimer-read(ptimer) - start  20));
   
  if (timeout) {
  -   nv_error(priv, PGRAPH TLB flush idle timeout fail: 
  - 0x%08x 0x%08x 0x%08x 0x%08x\n,
  -nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380),
  -nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388));
  +   nv_error(priv, PGRAPH TLB flush idle timeout fail\n);
  +
  +   nv_error(priv, PGRAPH_STATUS: );
  +   tmp = nv_rd32(priv, 0x400700);
  +   nouveau_bitfield_print(nv50_pgraph_status, tmp);
  +   pr_cont( (0x%08x)\n, tmp);
  +
  +   nv_error(priv, PGRAPH_VSTATUS_0: );
  +   nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_0,
  +   nv_rd32(priv, 0x400380));
  +
  +   nv_error(priv, PGRAPH_VSTATUS_1: );
  +   nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_1,
  +   nv_rd32(priv, 0x400384));
  +
  +   nv_error(priv, PGRAPH_VSTATUS_2: );
  +   nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_2,
  +   nv_rd32(priv, 0x400388));
  }
   
  nv50_vm_flush_engine(engine-base, 

Re: [Nouveau] [PATCH 10/10] drm/nouveau: fix off-by-one bugs related to command submission in IB mode

2012-08-20 Thread Marcin Slusarz
On Mon, Aug 20, 2012 at 04:33:24PM +1000, Ben Skeggs wrote:
 On Sun, Aug 19, 2012 at 11:02:00PM +0200, Marcin Slusarz wrote:
  Commit drm/nouveau: port all engines to new engine module format changed
  IB size calculation to be less wasteful, but didn't take into account 
  already
  existing off-by-one bugs :).
  
  So:
  - ib_max is the last entry, so we need to +1 when calculating number of
free entries
  - nv50_dma_wait already does +1 (for FIRE_RING), so we don't need another +1
on nouveau_gem_ioctl_pushbuf side
  - there are 512 allocated IB entries (and it needs to be round number), so 
  we
can accept at most 511 entries from userspace (we need one for FIRE_RING) 
  -
fortunately userspace already flushes at 511, so nr_push check change 
  won't
have any impact
 Also skipped this patch for now as I have work in progress that will improve 
 this and
 related code.  I should have it in the tree soon.

Maybe I should have written this in the changelog, but this patch fixes total
mayhem seen in warsow and nexuiz (at least). It's better to integrate it sooner
than later.

Marcin
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[Nouveau] [Bug 53842] Nouveau fails to read EDID, but X succeeds.

2012-08-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=53842

Marcin Slusarz marcin.slus...@gmail.com changed:

   What|Removed |Added

  Attachment #65829|application/octet-stream|text/plain
  mime type||

-- 
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--- You are receiving this mail because: ---
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Re: [Nouveau] [PATCH 10/10] drm/nouveau: fix off-by-one bugs related to command submission in IB mode

2012-08-20 Thread Ben Skeggs
Am Dienstag, 21. August 2012 schrieb Marcin Slusarz :

 On Mon, Aug 20, 2012 at 04:33:24PM +1000, Ben Skeggs wrote:
  On Sun, Aug 19, 2012 at 11:02:00PM +0200, Marcin Slusarz wrote:
   Commit drm/nouveau: port all engines to new engine module format
 changed
   IB size calculation to be less wasteful, but didn't take into account
 already
   existing off-by-one bugs :).
  
   So:
   - ib_max is the last entry, so we need to +1 when calculating number of
 free entries
   - nv50_dma_wait already does +1 (for FIRE_RING), so we don't need
 another +1
 on nouveau_gem_ioctl_pushbuf side
   - there are 512 allocated IB entries (and it needs to be round
 number), so we
 can accept at most 511 entries from userspace (we need one for
 FIRE_RING) -
 fortunately userspace already flushes at 511, so nr_push check
 change won't
 have any impact
  Also skipped this patch for now as I have work in progress that will
 improve this and
  related code.  I should have it in the tree soon.

 Maybe I should have written this in the changelog, but this patch fixes
 total
 mayhem seen in warsow and nexuiz (at least). It's better to integrate it
 sooner
 than later.

I presume bumping the IB size to 8KiB also helps? I prefer this in the
meantime, and it's probably best to do anyway, I didn't take into account
what we allow userspace to do in one shot.  If this works too, i'll push
that change this morning.

I did try and reproduce on a couple of cards with warsow and wasn't able to.

Also, what happened to instmem being the culprit here?

Marcin

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Re: [Nouveau] [PATCH 10/10] drm/nouveau: fix off-by-one bugs related to command submission in IB mode

2012-08-20 Thread Marcin Slusarz
On Tue, Aug 21, 2012 at 07:13:23AM +1000, Ben Skeggs wrote:
Am Dienstag, 21. August 2012 schrieb Marcin Slusarz :
 
  On Mon, Aug 20, 2012 at 04:33:24PM +1000, Ben Skeggs wrote:
   On Sun, Aug 19, 2012 at 11:02:00PM +0200, Marcin Slusarz wrote:
Commit drm/nouveau: port all engines to new engine module
  format changed
IB size calculation to be less wasteful, but didn't take into
  account already
existing off-by-one bugs :).
   
So:
- ib_max is the last entry, so we need to +1 when calculating
  number of
  free entries
- nv50_dma_wait already does +1 (for FIRE_RING), so we don't
  need another +1
  on nouveau_gem_ioctl_pushbuf side
- there are 512 allocated IB entries (and it needs to be round
  number), so we
  can accept at most 511 entries from userspace (we need one for
  FIRE_RING) -
  fortunately userspace already flushes at 511, so nr_push check
  change won't
  have any impact
   Also skipped this patch for now as I have work in progress that
  will improve this and
   related code.  I should have it in the tree soon.
  Maybe I should have written this in the changelog, but this patch
  fixes total
  mayhem seen in warsow and nexuiz (at least). It's better to
  integrate it sooner
  than later.
 
I presume bumping the IB size to 8KiB also helps? 

Yes, my first patch did exactly this and it worked.

However, Maarten can still reproduce this bug, so my patch is not completely
correct. I discovered that RING_SPACE calls nouveau_dma_wait with slots=1 and
nv50_dma_wait increases it again, so we need to move +1 from nv50_dma_wait
to nouveau_gem_ioctl_pushbuf. But once I do this everything explodes, because
we do 2 FIRE_RING's (one from fence_emit, and one from nv50_dma_wait), so...

I prefer this in the
meantime, and it's probably best to do anyway, I didn't take into
account what we allow userspace to do in one shot.  If this works too,
i'll push that change this morning.

... it's probably a good idea to do this and forget about the problem.

I did try and reproduce on a couple of cards with warsow and wasn't
able to.

Nexuiz is even better. It draws artifacts immediately after demo start.

Also, what happened to instmem being the culprit here?

It was bad bisection. Once I knew what is the problem, I verified
drm/nouveau: port all engines to new engine module format is the first
bad commit.

Marcin
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[Nouveau] [Bug 48464] Crash when GLXVBlank set to true

2012-08-20 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=48464

--- Comment #3 from Jānis Džeriņš jo...@latnet.lv 2012-08-20 21:44:13 UTC ---
I can reliably reproduce this with a twitch.tv video player (Flash): watching a
video in browser window and in fullscreen works, but as soon the player leaves
fullscreen (by any means, for instance when screensaver kicks in), X
immediately segfaults.

$ uname -a
Linux archux 3.4.9-1-ARCH #1 SMP PREEMPT Wed Aug 15 18:59:31 CEST 2012 x86_64
GNU/Linux

$ cat /var/log/Xorg.0.log.old
[ 6.711] 
This is a pre-release version of the X server from The X.Org Foundation.
It is not supported in any way.
Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
Select the xorg product for bugs you find in this release.
Before reporting bugs in pre-release versions please check the
latest version in the X.Org Foundation git repository.
See http://wiki.x.org/wiki/GitPage for git access instructions.
[ 6.711] 
X.Org X Server 1.12.3.901 (1.12.4 RC 1)
Release Date: 2012-08-03
[ 6.711] X Protocol Version 11, Revision 0
[ 6.711] Build Operating System: Linux 3.4.4-2-ARCH x86_64 
[ 6.711] Current Operating System: Linux archux 3.4.9-1-ARCH #1 SMP PREEMPT
Wed Aug 15 18:59:31 CEST 2012 x86_64
[ 6.711] Kernel command line: BOOT_IMAGE=/vmlinuz-linux
root=/dev/mapper/LVM_VG-lv_root ro init=/bin/systemd
[ 6.711] Build Date: 09 August 2012  10:04:44AM
[ 6.711]  
[ 6.711] Current version of pixman: 0.26.2
[ 6.711] Before reporting problems, check http://wiki.x.org
to make sure that you have the latest version.
[ 6.711] Markers: (--) probed, (**) from config file, (==) default setting,
(++) from command line, (!!) notice, (II) informational,
(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
[ 6.711] (==) Log file: /var/log/Xorg.0.log, Time: Tue Aug 21 00:19:11
2012
[ 6.744] (==) Using config directory: /etc/X11/xorg.conf.d
[ 6.760] (==) No Layout section.  Using the first Screen section.
[ 6.760] (==) No screen section available. Using defaults.
[ 6.760] (**) |--Screen Default Screen Section (0)
[ 6.760] (**) |   |--Monitor default monitor
[ 6.767] (==) No device specified for screen Default Screen Section.
Using the first device section listed.
[ 6.767] (**) |   |--Device GeForce GTX 560
[ 6.767] (==) No monitor specified for screen Default Screen Section.
Using a default monitor configuration.
[ 6.767] (==) Automatically adding devices
[ 6.767] (==) Automatically enabling devices
[ 6.792] (WW) The directory /usr/share/fonts/OTF/ does not exist.
[ 6.792] Entry deleted from font path.
[ 6.793] (WW) `fonts.dir' not found (or not valid) in
/usr/share/fonts/100dpi/.
[ 6.793] Entry deleted from font path.
[ 6.793] (Run 'mkfontdir' on /usr/share/fonts/100dpi/).
[ 6.793] (WW) `fonts.dir' not found (or not valid) in
/usr/share/fonts/75dpi/.
[ 6.793] Entry deleted from font path.
[ 6.793] (Run 'mkfontdir' on /usr/share/fonts/75dpi/).
[ 6.793] (==) FontPath set to:
/usr/share/fonts/misc/,
/usr/share/fonts/TTF/,
/usr/share/fonts/Type1/
[ 6.793] (==) ModulePath set to /usr/lib/xorg/modules
[ 6.793] (II) The server relies on udev to provide the list of input
devices.
If no devices become available, reconfigure udev or disable AutoAddDevices.
[ 6.793] (II) Loader magic: 0x7c8b00
[ 6.793] (II) Module ABI versions:
[ 6.793] X.Org ANSI C Emulation: 0.4
[ 6.793] X.Org Video Driver: 12.1
[ 6.793] X.Org XInput driver : 16.0
[ 6.793] X.Org Server Extension : 6.0
[ 6.793] (--) PCI:*(0:1:0:0) 10de:1201:1043:83b4 rev 161, Mem @
0xf400/33554432, 0xe000/134217728, 0xe800/67108864, I/O @
0xe000/128, BIOS @ 0x/524288
[ 6.793] (WW) Open ACPI failed (/var/run/acpid.socket) (No such file or
directory)
[ 6.793] (II) LoadModule: extmod
[ 6.794] (II) Loading /usr/lib/xorg/modules/extensions/libextmod.so
[ 6.801] (II) Module extmod: vendor=X.Org Foundation
[ 6.801] compiled for 1.12.3.901, module version = 1.0.0
[ 6.801] Module class: X.Org Server Extension
[ 6.801] ABI class: X.Org Server Extension, version 6.0
[ 6.801] (II) Loading extension MIT-SCREEN-SAVER
[ 6.801] (II) Loading extension XFree86-VidModeExtension
[ 6.801] (II) Loading extension XFree86-DGA
[ 6.801] (II) Loading extension DPMS
[ 6.801] (II) Loading extension XVideo
[ 6.801] (II) Loading extension XVideo-MotionCompensation
[ 6.801] (II) Loading extension X-Resource
[ 6.801] (II) LoadModule: dbe
[ 6.801] (II) Loading /usr/lib/xorg/modules/extensions/libdbe.so
[ 6.802] (II) Module dbe: vendor=X.Org Foundation
[ 6.802] compiled for 1.12.3.901, module version = 1.0.0
[ 6.802] Module class: X.Org Server Extension
[ 6.802] ABI class: X.Org Server Extension, version 6.0
[ 6.802] (II) Loading 

Re: [Nouveau] [PATCH 10/10] drm/nouveau: fix off-by-one bugs related to command submission in IB mode

2012-08-20 Thread Maarten Maathuis
On Mon, Aug 20, 2012 at 11:41 PM, Marcin Slusarz
marcin.slus...@gmail.com wrote:
 On Tue, Aug 21, 2012 at 07:13:23AM +1000, Ben Skeggs wrote:
Am Dienstag, 21. August 2012 schrieb Marcin Slusarz :

  On Mon, Aug 20, 2012 at 04:33:24PM +1000, Ben Skeggs wrote:
   On Sun, Aug 19, 2012 at 11:02:00PM +0200, Marcin Slusarz wrote:
Commit drm/nouveau: port all engines to new engine module
  format changed
IB size calculation to be less wasteful, but didn't take into
  account already
existing off-by-one bugs :).
   
So:
- ib_max is the last entry, so we need to +1 when calculating
  number of
  free entries
- nv50_dma_wait already does +1 (for FIRE_RING), so we don't
  need another +1
  on nouveau_gem_ioctl_pushbuf side
- there are 512 allocated IB entries (and it needs to be round
  number), so we
  can accept at most 511 entries from userspace (we need one for
  FIRE_RING) -
  fortunately userspace already flushes at 511, so nr_push check
  change won't
  have any impact
   Also skipped this patch for now as I have work in progress that
  will improve this and
   related code.  I should have it in the tree soon.
  Maybe I should have written this in the changelog, but this patch
  fixes total
  mayhem seen in warsow and nexuiz (at least). It's better to
  integrate it sooner
  than later.

I presume bumping the IB size to 8KiB also helps?

 Yes, my first patch did exactly this and it worked.

 However, Maarten can still reproduce this bug, so my patch is not completely
 correct. I discovered that RING_SPACE calls nouveau_dma_wait with slots=1 and
 nv50_dma_wait increases it again, so we need to move +1 from nv50_dma_wait
 to nouveau_gem_ioctl_pushbuf. But once I do this everything explodes, because
 we do 2 FIRE_RING's (one from fence_emit, and one from nv50_dma_wait), so...

I prefer this in the
meantime, and it's probably best to do anyway, I didn't take into
account what we allow userspace to do in one shot.  If this works too,
i'll push that change this morning.

 ... it's probably a good idea to do this and forget about the problem.

I did try and reproduce on a couple of cards with warsow and wasn't
able to.

 Nexuiz is even better. It draws artifacts immediately after demo start.

Also, what happened to instmem being the culprit here?

 It was bad bisection. Once I knew what is the problem, I verified
 drm/nouveau: port all engines to new engine module format is the first
 bad commit.

 Marcin
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One thing, i think FIRE_RING should check for available ib slots,
currently it doesn't and that seems a bit dangerous. Just a thought
for Ben :-)

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Re: [Nouveau] [PATCH 01/10] drm/nv50: decode PGRAPH status registers on TLB flush fail

2012-08-20 Thread Marcin Slusarz
On Mon, Aug 20, 2012 at 07:02:46PM +0200, Marcin Slusarz wrote:
 On Mon, Aug 20, 2012 at 04:27:18PM +1000, Ben Skeggs wrote:
  On Sun, Aug 19, 2012 at 10:59:56PM +0200, Marcin Slusarz wrote:
   Now it outputs:
   nouveau E[  PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail
   nouveau E[  PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH 
   CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D 
   UNK34XX TPRAST TPROP ROP (0x011fde03)
   nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_0: CCACHE (0x00145b4d)
   nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_1: (0x002d)
   nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_2: ENG2D ROP (0x0034db40)
   
   instead of:
   [drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 
   0x011fde03 0x00145b4d 0x002d 0x0034db40
  
  I didn't push these first few patches yet as I have a couple of thoughts on 
  it.
  
  Mostly I was thinking we should probably have a:
  
  nv_printf(obj, lvl, fmt, args...)
  
  to replace the printk's which just does a continued print while still 
  obeying
  the debug level?
 
 Well, this patch does not use nv_printk_enabled, so these concerns should
 not apply to it, right? I'll fix up bitfield list and resend it.

---
From: Marcin Slusarz marcin.slus...@gmail.com
Subject: [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail

Now it outputs:
nouveau E[  PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail
nouveau E[  PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH 
CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX 
TPRAST TPROP ROP (0x011fde03)
nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_0: CCACHE (0x00145b4d)
nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_1: (0x002d)
nouveau E[  PGRAPH][:02:00.0] PGRAPH_VSTATUS_2: ENG2D ROP (0x0034db40)

instead of:
[drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03 
0x00145b4d 0x002d 0x0034db40

Based on envytools docs.

Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
 drivers/gpu/drm/nouveau/core/engine/graph/nv50.c |   78 -
 1 files changed, 74 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c 
b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
index c93b525..3789bd2 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
@@ -184,6 +184,62 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine)
return 0;
 }
 
+static const struct nouveau_bitfield nv50_pgraph_status[] = {
+   { 0x0001, BUSY }, /* set when any bit is set */
+   { 0x0002, DISPATCH },
+   { 0x0004, UNK2 },
+   { 0x0008, UNK3 },
+   { 0x0010, UNK4 },
+   { 0x0020, UNK5 },
+   { 0x0040, M2MF },
+   { 0x0080, UNK7 },
+   { 0x0100, CTXPROG },
+   { 0x0200, VFETCH },
+   { 0x0400, CCACHE_UNK4 },
+   { 0x0800, STRMOUT_GSCHED_UNK5 },
+   { 0x1000, UNK14XX },
+   { 0x2000, UNK24XX_CSCHED },
+   { 0x4000, UNK1CXX },
+   { 0x8000, CLIPID },
+   { 0x0001, ZCULL },
+   { 0x0002, ENG2D },
+   { 0x0004, UNK34XX },
+   { 0x0008, TPRAST },
+   { 0x0010, TPROP },
+   { 0x0020, TEX },
+   { 0x0040, TPVP },
+   { 0x0080, MP },
+   { 0x0100, ROP },
+   {}
+};
+
+static const char *const nv50_pgraph_vstatus_0[] = {
+   VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL
+};
+
+static const char *const nv50_pgraph_vstatus_1[] = {
+   TPRAST, TPROP, TEXTURE, TPVP, MP, NULL
+};
+
+static const char *const nv50_pgraph_vstatus_2[] = {
+   UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX,
+   ROP, NULL
+};
+
+static void nouveau_pgraph_vstatus_print(const char *const units[], u32 status)
+{
+   int i;
+   u32 tmp = status;
+   for (i = 0; units[i]  tmp; i++) {
+   if ((tmp  7) == 1)
+   pr_cont(%s , units[i]);
+   tmp = 3;
+   }
+   if (tmp)
+   pr_cont(invalid: %x , tmp);
+   pr_cont((0x%08x)\n, status);
+}
+
 static int
 nv84_graph_tlb_flush(struct nouveau_engine *engine)
 {
@@ -219,10 +275,24 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine)
 !(timeout = ptimer-read(ptimer) - start  20));
 
if (timeout) {
-   nv_error(priv, PGRAPH TLB flush idle timeout fail: 
- 0x%08x 0x%08x 0x%08x 0x%08x\n,
-nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380),
-nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388));
+   nv_error(priv, PGRAPH TLB flush idle timeout fail\n);
+
+   nv_error(priv, PGRAPH_STATUS: );
+   tmp = nv_rd32(priv, 0x400700);
+   nouveau_bitfield_print(nv50_pgraph_status, tmp);
+   pr_cont(