[Nouveau] [Bug 47846] Nouveau - overscan using HDMI
https://bugs.freedesktop.org/show_bug.cgi?id=47846 --- Comment #13 from lameventa...@gmail.com --- Hi again, I just noticed that the nvidia-settings program has an option to export the EDID file. Would the EDID file help in any way to fix this issue? -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 Ronald ronald...@gmail.com changed: What|Removed |Added Attachment #61858|0 |1 is obsolete|| Attachment #61860|0 |1 is obsolete|| --- Comment #19 from Ronald ronald...@gmail.com --- Created attachment 69606 -- https://bugs.freedesktop.org/attachment.cgi?id=69606action=edit Dmesg of boot -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 Ronald ronald...@gmail.com changed: What|Removed |Added Attachment #61852|0 |1 is obsolete|| Attachment #61861|0 |1 is obsolete|| --- Comment #20 from Ronald ronald...@gmail.com --- Created attachment 69607 -- https://bugs.freedesktop.org/attachment.cgi?id=69607action=edit Dmesg of succesful first resume -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 Ronald ronald...@gmail.com changed: What|Removed |Added Attachment #61851|0 |1 is obsolete|| Attachment #61859|0 |1 is obsolete|| --- Comment #21 from Ronald ronald...@gmail.com --- Created attachment 69608 -- https://bugs.freedesktop.org/attachment.cgi?id=69608action=edit Dmesg of failed second resume -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 --- Comment #22 from Ronald ronald...@gmail.com --- Created attachment 69609 -- https://bugs.freedesktop.org/attachment.cgi?id=69609action=edit v3.7-rc4 + nouveau patchlist -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 --- Comment #23 from Ronald ronald...@gmail.com --- I'm also attaching a diff of both logs. I filtered them using sed to get rid of the timestamps. One thing stands out (to me): The logs of the correct resume mention this: -ACPI: Invalid Power Resource to register! -agpgart-via :00:00.0: Refused to change power state, currently in D0 The rest of the diff contains errors from the bad resume and subsequent trace thereof. -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 --- Comment #24 from Ronald ronald...@gmail.com --- Created attachment 69612 -- https://bugs.freedesktop.org/attachment.cgi?id=69612action=edit Diff of both resume sessions -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 --- Comment #25 from Emil Velikov emil.l.veli...@gmail.com --- Created attachment 69616 -- https://bugs.freedesktop.org/attachment.cgi?id=69616action=edit Reset agp.stat to unknown during suspend Something to test :P -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 50121] [Regression] NV34 Fx5200 NVC3/Quadro 2000M both fail to resume with commit 'convert to exec engine, and improve channel sync'
https://bugs.freedesktop.org/show_bug.cgi?id=50121 --- Comment #26 from Ronald ronald...@gmail.com --- No dice =) Even hangs at suspend sometimes. Besides, this bug is not slot specific. Someone else with a 'NVC3/Quadro 2000M' (PCI-E) also has these problems since the mentioned commit: 'drm/nouveau/fence: convert to exec engine, and improve channel sync'. -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH] nouveau: Fix crash after D3
In 3.7-rc4, when starting X with the integrated GPU and suspending the discrete
GPU,
after one or more 32-bit applications are used (eg Skype) and X is stopped,
we hit a panic.
Prevent this by testing if the fini function is valid.
Full panic bootlog is at: http://quora.org/2012/nouveau/dmesg-crash.txt
Xorg.log is at: http://quora.org/2012/nouveau/Xorg.0.log-crash.txt
Kernel log after fix is at: http://quora.org/2012/nouveau/dmesg-fix.txt
Signed-off-by: Daniel J Blueman dan...@quora.org
---
drivers/gpu/drm/nouveau/core/core/object.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/core/object.c
b/drivers/gpu/drm/nouveau/core/core/object.c
index 0daab62..3da3525 100644
--- a/drivers/gpu/drm/nouveau/core/core/object.c
+++ b/drivers/gpu/drm/nouveau/core/core/object.c
@@ -354,12 +354,16 @@ static int
nouveau_object_decf(struct nouveau_object *object)
{
int ret;
+ struct nouveau_ofuncs *pfuncs;
nv_trace(object, stopping...\n);
- ret = nv_ofuncs(object)-fini(object, false);
- if (ret)
- nv_warn(object, failed fini, %d\n, ret);
+ pfuncs = nv_ofuncs(object);
+ if (pfuncs-fini) {
+ ret = nv_ofuncs(object)-fini(object, false);
+ if (ret)
+ nv_warn(object, failed fini, %d\n, ret);
+ }
if (object-engine) {
mutex_lock(nv_subdev(object-engine)-mutex);
--
1.7.10.4
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[Nouveau] [Bug 56692] Xorg freezes with vblank enabled on nouveau nvc8
https://bugs.freedesktop.org/show_bug.cgi?id=56692 --- Comment #5 from Kelly Doran kel.p.do...@gmail.com --- Well someone on IRC suggested there was an issue with the nv50_disp_intr_vblank function, so I replaced the contents of it with the nvd0_disp_intr_vblank function and it fixed the freeze! Perhaps nvc8 cards should just use the nvd0 disp class instead? Anyway I'll leave it to you guys to come up with an elegant solution, hopefully this helped. -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] Fix for vblank on nvc0
Op 06-11-12 15:48, Kelly Doran schreef: The vblank on nvc0 was not working correctly and would freeze X, I managed to track it down and fix it with some help from m.b.lankhorst, see https://bugs.freedesktop.org/show_bug.cgi?id=56692 for details. Reviewed-by: Maarten Lankhorst maarten.lankho...@canonical.com I recommended the bar flush since nvd0 does as well, and there might be a small race otherwise. Can this still get in before final 3.7 release? ~Maarten ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 48090] Spam of system log with EDID messages
https://bugs.freedesktop.org/show_bug.cgi?id=48090 --- Comment #5 from mies...@mieszczak.com.pl --- Created attachment 69635 -- https://bugs.freedesktop.org/attachment.cgi?id=69635action=edit Edid File retreived using nvidia settings from blob driver -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 48090] Spam of system log with EDID messages
https://bugs.freedesktop.org/show_bug.cgi?id=48090 mies...@mieszczak.com.pl changed: What|Removed |Added Attachment #59272|0 |1 is obsolete|| --- Comment #6 from mies...@mieszczak.com.pl --- Created attachment 69636 -- https://bugs.freedesktop.org/attachment.cgi?id=69636action=edit Edid file from nouveau retreived from /sys/class/drm/card0-DVI-I-1 -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 48090] Spam of system log with EDID messages
https://bugs.freedesktop.org/show_bug.cgi?id=48090 --- Comment #7 from mies...@mieszczak.com.pl --- OK. Now I understand. Attached file was from nouveau. Now I attached both: from blob, and from nouveau with right description. If necessary, I could retreive and send bios from the video card, but I need to know how to find it. Right now I switched off polling, and the system works well. I tried to make it with external edid file, but system don't use it. I put file 1920x1080.bin in /lib/firmware, but without success. Thanks Mirek -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH v2] drm/nv41/vm: fix typo in type name
It's a miracle it compiles at all - nv04_vm_priv does not exist
anywhere in the tree.
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
v2: rebased on top of nouveau/master
---
drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c
b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c
index 49050d9..9474cfc 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c
@@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt)
static void
nv41_vm_flush(struct nouveau_vm *vm)
{
- struct nv04_vm_priv *priv = (void *)vm-vmm;
+ struct nv04_vmmgr_priv *priv = (void *)vm-vmm;
mutex_lock(nv_subdev(priv)-mutex);
nv_wr32(priv, 0x100810, 0x0022);
--
1.7.12
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[Nouveau] [PATCH] drm/nv40/graph: fix typo in type names
nv04_graph_priv / nv04_graph_chan are not defined in this context...
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/engine/graph/nv40.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
index b076678..a3742db 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
@@ -156,8 +156,8 @@ nv40_graph_context_ctor(struct nouveau_object *parent,
static int
nv40_graph_context_fini(struct nouveau_object *object, bool suspend)
{
- struct nv04_graph_priv *priv = (void *)object-engine;
- struct nv04_graph_chan *chan = (void *)object;
+ struct nv40_graph_priv *priv = (void *)object-engine;
+ struct nv40_graph_chan *chan = (void *)object;
u32 inst = 0x0100 | nv_gpuobj(chan)-addr 4;
int ret = 0;
--
1.7.12
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[Nouveau] [PATCH] drm/nv40/mpeg: fix context handling
It slipped in thanks to typeless API.
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c
b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c
index 1241857..f7c581a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c
@@ -38,7 +38,7 @@ struct nv40_mpeg_priv {
};
struct nv40_mpeg_chan {
- struct nouveau_mpeg base;
+ struct nouveau_mpeg_chan base;
};
/***
--
1.7.12
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[Nouveau] [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail
Now it outputs:
nouveau E[ PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail
nouveau E[ PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH
CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX
TPRAST TPROP ROP (0x011fde03)
nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS: CCACHE (0x00145b4d)
(0x002d) ENG2D ROP (0x0034db40)
instead of:
[drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03
0x00145b4d 0x002d 0x0034db40
Based on envytools docs.
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 75 ++--
1 file changed, 71 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
index ab3b9dc..5f1adca 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
@@ -184,6 +184,62 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine)
return 0;
}
+static const struct nouveau_bitfield nv50_pgraph_status[] = {
+ { 0x0001, BUSY }, /* set when any bit is set */
+ { 0x0002, DISPATCH },
+ { 0x0004, UNK2 },
+ { 0x0008, UNK3 },
+ { 0x0010, UNK4 },
+ { 0x0020, UNK5 },
+ { 0x0040, M2MF },
+ { 0x0080, UNK7 },
+ { 0x0100, CTXPROG },
+ { 0x0200, VFETCH },
+ { 0x0400, CCACHE_UNK4 },
+ { 0x0800, STRMOUT_GSCHED_UNK5 },
+ { 0x1000, UNK14XX },
+ { 0x2000, UNK24XX_CSCHED },
+ { 0x4000, UNK1CXX },
+ { 0x8000, CLIPID },
+ { 0x0001, ZCULL },
+ { 0x0002, ENG2D },
+ { 0x0004, UNK34XX },
+ { 0x0008, TPRAST },
+ { 0x0010, TPROP },
+ { 0x0020, TEX },
+ { 0x0040, TPVP },
+ { 0x0080, MP },
+ { 0x0100, ROP },
+ {}
+};
+
+static const char *const nv50_pgraph_vstatus_0[] = {
+ VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL
+};
+
+static const char *const nv50_pgraph_vstatus_1[] = {
+ TPRAST, TPROP, TEXTURE, TPVP, MP, NULL
+};
+
+static const char *const nv50_pgraph_vstatus_2[] = {
+ UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX,
+ ROP, NULL
+};
+
+static void nouveau_pgraph_vstatus_print(const char *const units[], u32 status)
+{
+ int i;
+ u32 tmp = status;
+ for (i = 0; units[i] tmp; i++) {
+ if ((tmp 7) == 1)
+ pr_cont(%s , units[i]);
+ tmp = 3;
+ }
+ if (tmp)
+ pr_cont(invalid: %x , tmp);
+ pr_cont((0x%08x) , status);
+}
+
static int
nv84_graph_tlb_flush(struct nouveau_engine *engine)
{
@@ -219,10 +275,21 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine)
!(timeout = ptimer-read(ptimer) - start 20));
if (timeout) {
- nv_error(priv, PGRAPH TLB flush idle timeout fail:
- 0x%08x 0x%08x 0x%08x 0x%08x\n,
-nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380),
-nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388));
+ nv_error(priv, PGRAPH TLB flush idle timeout fail\n);
+
+ nv_error(priv, PGRAPH_STATUS: );
+ tmp = nv_rd32(priv, 0x400700);
+ nouveau_bitfield_print(nv50_pgraph_status, tmp);
+ pr_cont( (0x%08x)\n, tmp);
+
+ nv_error(priv, PGRAPH_VSTATUS: );
+ nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_0,
+ nv_rd32(priv, 0x400380));
+ nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_1,
+ nv_rd32(priv, 0x400384));
+ nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_2,
+ nv_rd32(priv, 0x400388));
+ pr_cont(\n);
}
nv50_vm_flush_engine(engine-base, 0x00);
--
1.7.12
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[Nouveau] [PATCH] drm/nv50/evo: store iomem pointer in properly typed field
Abuse of function pointer was noticed by sparse.
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/nv50_evo.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_evo.c
b/drivers/gpu/drm/nouveau/nv50_evo.c
index 9f6f55c..ba497fb 100644
--- a/drivers/gpu/drm/nouveau/nv50_evo.c
+++ b/drivers/gpu/drm/nouveau/nv50_evo.c
@@ -33,17 +33,22 @@
#include subdev/timer.h
#include subdev/fb.h
+struct evo_object {
+ struct nouveau_object parent;
+ void __iomem *iomem;
+};
+
static u32
nv50_evo_rd32(struct nouveau_object *object, u32 addr)
{
- void __iomem *iomem = object-oclass-ofuncs-rd08;
+ void __iomem *iomem = ((struct evo_object *)object)-iomem;
return ioread32_native(iomem + addr);
}
static void
nv50_evo_wr32(struct nouveau_object *object, u32 addr, u32 data)
{
- void __iomem *iomem = object-oclass-ofuncs-rd08;
+ void __iomem *iomem = ((struct evo_object *)object)-iomem;
iowrite32_native(data, iomem + addr);
}
@@ -60,7 +65,7 @@ nv50_evo_channel_del(struct nouveau_channel **pevo)
nouveau_bo_ref(NULL, evo-push.buffer);
if (evo-object)
- iounmap(evo-object-oclass-ofuncs);
+ iounmap(((struct evo_object *)evo-object)-iomem);
kfree(evo);
}
@@ -112,6 +117,7 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,
struct nouveau_drm *drm = nouveau_drm(dev);
struct nv50_display *disp = nv50_display(dev);
struct nouveau_channel *evo;
+ struct evo_object *evo_object;
int ret;
evo = kzalloc(sizeof(struct nouveau_channel), GFP_KERNEL);
@@ -142,7 +148,8 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,
return ret;
}
- evo-object = kzalloc(sizeof(*evo-object), GFP_KERNEL);
+ evo_object = kzalloc(sizeof(*evo_object), GFP_KERNEL);
+ evo-object = evo_object-parent;
#ifdef NOUVEAU_OBJECT_MAGIC
evo-object-_magic = NOUVEAU_OBJECT_MAGIC;
#endif
@@ -154,8 +161,7 @@ nv50_evo_channel_new(struct drm_device *dev, int chid,
kzalloc(sizeof(*evo-object-oclass-ofuncs), GFP_KERNEL);
evo-object-oclass-ofuncs-rd32 = nv50_evo_rd32;
evo-object-oclass-ofuncs-wr32 = nv50_evo_wr32;
- evo-object-oclass-ofuncs-rd08 =
- ioremap(pci_resource_start(dev-pdev, 0) +
+ evo_object-iomem = ioremap(pci_resource_start(dev-pdev, 0) +
NV50_PDISPLAY_USER(evo-handle), PAGE_SIZE);
return 0;
}
--
1.7.12
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Re: [Nouveau] [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail
On Tue, Nov 06, 2012 at 10:48:52PM +0100, Marcin Slusarz wrote:
Now it outputs:
nouveau E[ PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail
nouveau E[ PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH
CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX
TPRAST TPROP ROP (0x011fde03)
nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS: CCACHE (0x00145b4d)
(0x002d) ENG2D ROP (0x0034db40)
How about this instead?
PGRAPH_STATUS : 0x011fde03 [BUSY DISPATCH VFETCH CCACHE_UNK4
STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP]
PGRAPH_VSTATUS0: 0x00145b4d [CCACHE]
PGRAPH_VSTATUS1: 0x002d []
PGRAPH_VSTATUS2: 0x0034db40 [ENG2D ROP]
instead of:
[drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03
0x00145b4d 0x002d 0x0034db40
Based on envytools docs.
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 75
++--
1 file changed, 71 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
index ab3b9dc..5f1adca 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
@@ -184,6 +184,62 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine)
return 0;
}
+static const struct nouveau_bitfield nv50_pgraph_status[] = {
+ { 0x0001, BUSY }, /* set when any bit is set */
+ { 0x0002, DISPATCH },
+ { 0x0004, UNK2 },
+ { 0x0008, UNK3 },
+ { 0x0010, UNK4 },
+ { 0x0020, UNK5 },
+ { 0x0040, M2MF },
+ { 0x0080, UNK7 },
+ { 0x0100, CTXPROG },
+ { 0x0200, VFETCH },
+ { 0x0400, CCACHE_UNK4 },
+ { 0x0800, STRMOUT_GSCHED_UNK5 },
+ { 0x1000, UNK14XX },
+ { 0x2000, UNK24XX_CSCHED },
+ { 0x4000, UNK1CXX },
+ { 0x8000, CLIPID },
+ { 0x0001, ZCULL },
+ { 0x0002, ENG2D },
+ { 0x0004, UNK34XX },
+ { 0x0008, TPRAST },
+ { 0x0010, TPROP },
+ { 0x0020, TEX },
+ { 0x0040, TPVP },
+ { 0x0080, MP },
+ { 0x0100, ROP },
+ {}
+};
+
+static const char *const nv50_pgraph_vstatus_0[] = {
+ VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL
+};
+
+static const char *const nv50_pgraph_vstatus_1[] = {
+ TPRAST, TPROP, TEXTURE, TPVP, MP, NULL
+};
+
+static const char *const nv50_pgraph_vstatus_2[] = {
+ UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX,
+ ROP, NULL
+};
+
+static void nouveau_pgraph_vstatus_print(const char *const units[], u32
status)
+{
+ int i;
+ u32 tmp = status;
+ for (i = 0; units[i] tmp; i++) {
+ if ((tmp 7) == 1)
+ pr_cont(%s , units[i]);
+ tmp = 3;
+ }
+ if (tmp)
+ pr_cont(invalid: %x , tmp);
+ pr_cont((0x%08x) , status);
+}
+
static int
nv84_graph_tlb_flush(struct nouveau_engine *engine)
{
@@ -219,10 +275,21 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine)
!(timeout = ptimer-read(ptimer) - start 20));
if (timeout) {
- nv_error(priv, PGRAPH TLB flush idle timeout fail:
- 0x%08x 0x%08x 0x%08x 0x%08x\n,
- nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380),
- nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388));
+ nv_error(priv, PGRAPH TLB flush idle timeout fail\n);
+
+ nv_error(priv, PGRAPH_STATUS: );
+ tmp = nv_rd32(priv, 0x400700);
+ nouveau_bitfield_print(nv50_pgraph_status, tmp);
+ pr_cont( (0x%08x)\n, tmp);
+
+ nv_error(priv, PGRAPH_VSTATUS: );
+ nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_0,
+ nv_rd32(priv, 0x400380));
+ nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_1,
+ nv_rd32(priv, 0x400384));
+ nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_2,
+ nv_rd32(priv, 0x400388));
+ pr_cont(\n);
}
nv50_vm_flush_engine(engine-base, 0x00);
--
1.7.12
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