Re: [Nouveau] [RFC PATCH] drm/nouveau: report channel owner in error messages
On Sun, Dec 09, 2012 at 02:48:49PM +1000, Ben Skeggs wrote:
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
index 487cb8c..d1120fc 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
@@ -22,8 +22,13 @@
* Authors: Ben Skeggs
*/
-#include core/object.h
+#include core/client.h
#include core/enum.h
+#include core/engctx.h
+#include core/object.h
+
+#include engine/fifo.h
+#include engine/graph.h
#include subdev/fb.h
#include subdev/bios.h
@@ -317,6 +322,19 @@ static const struct nouveau_enum vm_engine[] = {
{}
};
+static const struct nouveau_engine_map {
+ u32 value;
+ int engines[3];
+} nvdev_engine_for_vm_engine[] = {
+ { 0x, {NVDEV_ENGINE_GR, 0} },
+ { 0x0001, {NVDEV_ENGINE_VP, 0} },
+ { 0x0005, {NVDEV_ENGINE_FIFO, 0} },
+ { 0x0008, {NVDEV_ENGINE_PPP, NVDEV_ENGINE_MPEG, 0} },
I think it may actually be a good idea to go (in core/device.h):
NVDEV_ENGINE_MPEG,
+ NVDEV_ENGINE_PPP = NVDEV_ENGINE_MPEG,
NVDEV_ENGINE_ME,
PPP got introduced when MPEG disappeared. There's likely a few other
engines we can create as aliases for each other too. What do you think?
I'm not sure it's such a good idea. Suddenly
nouveau_engctx_get(NVDEV_ENGINE_PPP, chan)
can return nouveau_mpeg_chan and device-subdev[NVDEV_ENGINE_PPP] can point
to nouveau_mpeg, etc. So in generic code you can't rely on device-subdev[X]
being NULL on cards which don't have X engine...
This is true for non-engine subdevs, yes. But, the engines themselves
should *never* *ever* be accessed from anything other than the object
interface, from which it's impossible for a mix-up to happen.
what does this code (in this patch) do then? For me, it does exactly what you
want to be forbidden.
What are we going to do when we'll need to look up something in engine specific
data (e.g. nouveau_mpeg) to improve error reporting? We'll be screwed if
NVDEV_ENGINE_PPP == NVDEV_ENGINE_MPEG.
If we do the aliasing this point should probably be documented in the
enum list, and the nouveau_whatever() accessors removed.
But what's the point of all of this? Removal of one line from above list
is pretty weak upside when there are so many downsides. Maybe I'm missing
something obvious...
I can handle the aliasing if you like, but feel free :)
+ { 0x0009, {NVDEV_ENGINE_BSP, 0} },
+ { 0x000a, {NVDEV_ENGINE_CRYPT, 0} },
+ { 0x000d, {NVDEV_ENGINE_COPY0, NVDEV_ENGINE_COPY1, 0} },
COPY1 doesn't exist on NV50. NVC0 has its own VM engine for the
additional copy engines.
OK.
+};
+
static const struct nouveau_enum vm_fault[] = {
{ 0x, PT_NOT_PRESENT, NULL },
{ 0x0001, PT_TOO_SHORT, NULL },
@@ -334,8 +352,12 @@ static void
nv50_fb_intr(struct nouveau_subdev *subdev)
{
struct nouveau_device *device = nv_device(subdev);
+ struct nouveau_engine *engine = NULL;
struct nv50_fb_priv *priv = (void *)subdev;
const struct nouveau_enum *en, *cl;
+ struct nouveau_object *engctx = NULL;
+ const int *poss_engines = NULL;
+ const char *client_name = unk;
u32 trap[6], idx, chan;
u8 st0, st1, st2, st3;
int i;
@@ -366,9 +388,34 @@ nv50_fb_intr(struct nouveau_subdev *subdev)
}
chan = (trap[2] 16) | trap[1];
- nv_error(priv, trapped %s at 0x%02x%04x%04x on channel 0x%08x
,
+ for (i = 0; i ARRAY_SIZE(nvdev_engine_for_vm_engine); ++i) {
+ if (nvdev_engine_for_vm_engine[i].value == st0) {
+ poss_engines =
nvdev_engine_for_vm_engine[i].engines;
+ break;
+ }
+ }
+
+ for (i = 0; poss_engines poss_engines[i]; ++i) {
+ engine = nv_engine(device-subdev[poss_engines[i]]);
engine = nouveau_engine(device, poss_engines[i]);
OK.
Perhaps you can even append another field to nouveau_enum to store the
subdev index in too, rather than having to look it up?
Good idea. Thanks.
+ if (engine) {
+ engctx = nouveau_engctx_get(engine, chan);
+ if (engctx)
+ break;
+ }
+ }
+
+ if (engctx) {
+ struct nouveau_client *client = nouveau_client(engctx);
+ if (client)
+ client_name = client-name;
+ }
+
+ nv_error(priv, trapped %s at 0x%02x%04x%04x on channel 0x%08x
[%s] ,
[Nouveau] [PATCH 1/4] drm/nouveau: split fifo interrupt handler
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c | 174
1 file changed, 88 insertions(+), 86 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
index 2fe14da3..76944c4 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
@@ -398,6 +398,92 @@ out:
return handled;
}
+static void
+nv04_fifo_cache_error(struct nouveau_device *device,
+ struct nv04_fifo_priv *priv, u32 chid, u32 get)
+{
+ u32 mthd, data;
+ int ptr;
+
+ /* NV_PFIFO_CACHE1_GET actually goes to 0xffc before wrapping on my
+* G80 chips, but CACHE1 isn't big enough for this much data.. Tests
+* show that it wraps around to the start at GET=0x800.. No clue as to
+* why..
+*/
+ ptr = (get 0x7ff) 2;
+
+ if (device-card_type NV_40) {
+ mthd = nv_rd32(priv, NV04_PFIFO_CACHE1_METHOD(ptr));
+ data = nv_rd32(priv, NV04_PFIFO_CACHE1_DATA(ptr));
+ } else {
+ mthd = nv_rd32(priv, NV40_PFIFO_CACHE1_METHOD(ptr));
+ data = nv_rd32(priv, NV40_PFIFO_CACHE1_DATA(ptr));
+ }
+
+ if (!nv04_fifo_swmthd(priv, chid, mthd, data)) {
+ nv_error(priv,
+CACHE_ERROR - Ch %d/%d Mthd 0x%04x Data 0x%08x\n,
+chid, (mthd 13) 7, mthd 0x1ffc, data);
+ }
+
+ nv_wr32(priv, NV04_PFIFO_CACHE1_DMA_PUSH, 0);
+ nv_wr32(priv, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR);
+
+ nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0,
+ nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) ~1);
+ nv_wr32(priv, NV03_PFIFO_CACHE1_GET, get + 4);
+ nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0,
+ nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) | 1);
+ nv_wr32(priv, NV04_PFIFO_CACHE1_HASH, 0);
+
+ nv_wr32(priv, NV04_PFIFO_CACHE1_DMA_PUSH,
+ nv_rd32(priv, NV04_PFIFO_CACHE1_DMA_PUSH) | 1);
+ nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1);
+}
+
+static void
+nv04_fifo_dma_pusher(struct nouveau_device *device, struct nv04_fifo_priv
*priv,
+ u32 chid)
+{
+ u32 dma_get = nv_rd32(priv, 0x003244);
+ u32 dma_put = nv_rd32(priv, 0x003240);
+ u32 push = nv_rd32(priv, 0x003220);
+ u32 state = nv_rd32(priv, 0x003228);
+
+ if (device-card_type == NV_50) {
+ u32 ho_get = nv_rd32(priv, 0x003328);
+ u32 ho_put = nv_rd32(priv, 0x003320);
+ u32 ib_get = nv_rd32(priv, 0x003334);
+ u32 ib_put = nv_rd32(priv, 0x003330);
+
+ nv_error(priv,
+DMA_PUSHER - Ch %d Get 0x%02x%08x Put 0x%02x%08x
IbGet 0x%08x IbPut 0x%08x State 0x%08x (err: %s) Push 0x%08x\n,
+chid, ho_get, dma_get, ho_put, dma_put, ib_get, ib_put,
+state, nv_dma_state_err(state), push);
+
+ /* METHOD_COUNT, in DMA_STATE on earlier chipsets */
+ nv_wr32(priv, 0x003364, 0x);
+ if (dma_get != dma_put || ho_get != ho_put) {
+ nv_wr32(priv, 0x003244, dma_put);
+ nv_wr32(priv, 0x003328, ho_put);
+ } else
+ if (ib_get != ib_put)
+ nv_wr32(priv, 0x003334, ib_put);
+ } else {
+ nv_error(priv,
+DMA_PUSHER - Ch %d Get 0x%08x Put 0x%08x State 0x%08x
(err: %s) Push 0x%08x\n,
+chid, dma_get, dma_put, state, nv_dma_state_err(state),
+push);
+
+ if (dma_get != dma_put)
+ nv_wr32(priv, 0x003244, dma_put);
+ }
+
+ nv_wr32(priv, 0x003228, 0x);
+ nv_wr32(priv, 0x003220, 0x0001);
+ nv_wr32(priv, 0x002100, NV_PFIFO_INTR_DMA_PUSHER);
+}
+
void
nv04_fifo_intr(struct nouveau_subdev *subdev)
{
@@ -416,96 +502,12 @@ nv04_fifo_intr(struct nouveau_subdev *subdev)
get = nv_rd32(priv, NV03_PFIFO_CACHE1_GET);
if (status NV_PFIFO_INTR_CACHE_ERROR) {
- uint32_t mthd, data;
- int ptr;
-
- /* NV_PFIFO_CACHE1_GET actually goes to 0xffc before
-* wrapping on my G80 chips, but CACHE1 isn't big
-* enough for this much data.. Tests show that it
-* wraps around to the start at GET=0x800.. No clue
-* as to why..
-*/
- ptr = (get 0x7ff) 2;
-
- if (device-card_type NV_40) {
- mthd = nv_rd32(priv,
- NV04_PFIFO_CACHE1_METHOD(ptr));
- data = nv_rd32(priv,
-
[Nouveau] [PATCH 2/4] drm/nouveau: use pr_cont
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/core/enum.c | 8
drivers/gpu/drm/nouveau/core/engine/copy/nva3.c | 2 +-
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c | 2 +-
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c | 2 +-
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c | 10 +-
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | 10 +-
drivers/gpu/drm/nouveau/core/engine/graph/nv04.c | 6 +++---
drivers/gpu/drm/nouveau/core/engine/graph/nv10.c | 6 +++---
drivers/gpu/drm/nouveau/core/engine/graph/nv20.c | 6 +++---
drivers/gpu/drm/nouveau/core/engine/graph/nv40.c | 6 +++---
drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 14 +++---
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c | 2 +-
drivers/gpu/drm/nouveau/core/engine/graph/nve0.c | 2 +-
drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c| 18 +-
drivers/gpu/drm/nouveau/core/subdev/mxm/mxms.c | 8
drivers/gpu/drm/nouveau/nouveau_bios.c | 4 ++--
16 files changed, 53 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/core/enum.c
b/drivers/gpu/drm/nouveau/core/core/enum.c
index 7cc7133..148f91f 100644
--- a/drivers/gpu/drm/nouveau/core/core/enum.c
+++ b/drivers/gpu/drm/nouveau/core/core/enum.c
@@ -45,9 +45,9 @@ nouveau_enum_print(const struct nouveau_enum *en, u32 value)
{
en = nouveau_enum_find(en, value);
if (en)
- printk(%s, en-name);
+ pr_cont(%s, en-name);
else
- printk((unknown enum 0x%08x), value);
+ pr_cont((unknown enum 0x%08x), value);
}
void
@@ -55,7 +55,7 @@ nouveau_bitfield_print(const struct nouveau_bitfield *bf, u32
value)
{
while (bf-name) {
if (value bf-mask) {
- printk( %s, bf-name);
+ pr_cont( %s, bf-name);
value = ~bf-mask;
}
@@ -63,5 +63,5 @@ nouveau_bitfield_print(const struct nouveau_bitfield *bf, u32
value)
}
if (value)
- printk( (unknown bits 0x%08x), value);
+ pr_cont( (unknown bits 0x%08x), value);
}
diff --git a/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
b/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
index 283248c..6068f5f 100644
--- a/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
+++ b/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
@@ -100,7 +100,7 @@ nva3_copy_intr(struct nouveau_subdev *subdev)
if (stat 0x0040) {
nv_error(falcon, DISPATCH_ERROR [);
nouveau_enum_print(nva3_copy_isr_error_name, ssta);
- printk(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
+ pr_cont(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
chid, inst 12, subc, mthd, data);
nv_wo32(falcon, 0x004, 0x0040);
stat = ~0x0040;
diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
index b974905..8d0a440 100644
--- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
+++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
@@ -128,7 +128,7 @@ nv84_crypt_intr(struct nouveau_subdev *subdev)
if (stat) {
nv_error(priv, );
nouveau_bitfield_print(nv84_crypt_intr_mask, stat);
- printk( ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n,
+ pr_cont( ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n,
chid, (u64)inst 12, mthd, data);
}
diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
index 21986f3..1b33c20 100644
--- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
+++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
@@ -102,7 +102,7 @@ nv98_crypt_intr(struct nouveau_subdev *subdev)
if (stat 0x0040) {
nv_error(priv, DISPATCH_ERROR [);
nouveau_enum_print(nv98_crypt_isr_error_name, ssta);
- printk(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
+ pr_cont(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
chid, (u64)inst 12, subc, mthd, data);
nv_wr32(priv, 0x087004, 0x0040);
stat = ~0x0040;
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
b/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
index ec60bc1..151706b 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
@@ -421,16 +421,16 @@ nvc0_fifo_isr_vm_fault(struct nvc0_fifo_priv *priv, int
unit)
nv_error(priv, %s fault at 0x%010llx [, (stat 0x0080) ?
write : read, (u64)vahi 32 | valo);
nouveau_enum_print(nvc0_fifo_fault_reason, stat 0x000f);
- printk(] from );
+
[Nouveau] [PATCH 3/4] drm/nouveau: prepare for reporting channel owner
- record channel owner process name
- add some helpers for accessing this information
- let nouveau_enum hold additional value (will be needed in the next patch)
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/core/client.c | 10 ++
drivers/gpu/drm/nouveau/core/core/enum.c | 3 ++-
drivers/gpu/drm/nouveau/core/engine/fifo/base.c| 15 +++
drivers/gpu/drm/nouveau/core/include/core/client.h | 3 ++-
drivers/gpu/drm/nouveau/core/include/core/enum.h | 3 ++-
drivers/gpu/drm/nouveau/core/include/engine/fifo.h | 2 ++
drivers/gpu/drm/nouveau/nouveau_drm.c | 5 +++--
7 files changed, 36 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/core/client.c
b/drivers/gpu/drm/nouveau/core/core/client.c
index c617f04..0d15696 100644
--- a/drivers/gpu/drm/nouveau/core/core/client.c
+++ b/drivers/gpu/drm/nouveau/core/core/client.c
@@ -101,3 +101,13 @@ nouveau_client_fini(struct nouveau_client *client, bool
suspend)
nv_debug(client, %s completed with %d\n, name[suspend], ret);
return ret;
}
+
+const char *
+nouveau_client_name(void *obj)
+{
+ const char *client_name = unk;
+ struct nouveau_client *client = nouveau_client(obj);
+ if (client)
+ client_name = client-name;
+ return client_name;
+}
diff --git a/drivers/gpu/drm/nouveau/core/core/enum.c
b/drivers/gpu/drm/nouveau/core/core/enum.c
index 148f91f..dd43479 100644
--- a/drivers/gpu/drm/nouveau/core/core/enum.c
+++ b/drivers/gpu/drm/nouveau/core/core/enum.c
@@ -40,7 +40,7 @@ nouveau_enum_find(const struct nouveau_enum *en, u32 value)
return NULL;
}
-void
+const struct nouveau_enum *
nouveau_enum_print(const struct nouveau_enum *en, u32 value)
{
en = nouveau_enum_find(en, value);
@@ -48,6 +48,7 @@ nouveau_enum_print(const struct nouveau_enum *en, u32 value)
pr_cont(%s, en-name);
else
pr_cont((unknown enum 0x%08x), value);
+ return en;
}
void
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
b/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
index a7f41f8..6ea18e4 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
@@ -22,6 +22,7 @@
* Authors: Ben Skeggs
*/
+#include core/client.h
#include core/object.h
#include core/handle.h
#include core/class.h
@@ -146,6 +147,20 @@ nouveau_fifo_chid(struct nouveau_fifo *priv, struct
nouveau_object *object)
return -1;
}
+const char *
+nouveau_client_name_for_fifo_chid(struct nouveau_fifo *fifo, u32 chid)
+{
+ struct nouveau_fifo_chan *chan = NULL;
+ unsigned long flags;
+
+ spin_lock_irqsave(fifo-lock, flags);
+ if (chid = fifo-min chid = fifo-max)
+ chan = (void *)fifo-channel[chid];
+ spin_unlock_irqrestore(fifo-lock, flags);
+
+ return nouveau_client_name(chan);
+}
+
void
nouveau_fifo_destroy(struct nouveau_fifo *priv)
{
diff --git a/drivers/gpu/drm/nouveau/core/include/core/client.h
b/drivers/gpu/drm/nouveau/core/include/core/client.h
index 0193532..b8d0457 100644
--- a/drivers/gpu/drm/nouveau/core/include/core/client.h
+++ b/drivers/gpu/drm/nouveau/core/include/core/client.h
@@ -7,7 +7,7 @@ struct nouveau_client {
struct nouveau_namedb base;
struct nouveau_handle *root;
struct nouveau_object *device;
- char name[16];
+ char name[32];
u32 debug;
struct nouveau_vm *vm;
};
@@ -38,5 +38,6 @@ int nouveau_client_create_(const char *name, u64 device,
const char *cfg,
const char *dbg, int, void **);
int nouveau_client_init(struct nouveau_client *);
int nouveau_client_fini(struct nouveau_client *, bool suspend);
+const char *nouveau_client_name(void *obj);
#endif
diff --git a/drivers/gpu/drm/nouveau/core/include/core/enum.h
b/drivers/gpu/drm/nouveau/core/include/core/enum.h
index e7b1e18..4fc62bb 100644
--- a/drivers/gpu/drm/nouveau/core/include/core/enum.h
+++ b/drivers/gpu/drm/nouveau/core/include/core/enum.h
@@ -5,12 +5,13 @@ struct nouveau_enum {
u32 value;
const char *name;
const void *data;
+ u32 data2;
};
const struct nouveau_enum *
nouveau_enum_find(const struct nouveau_enum *, u32 value);
-void
+const struct nouveau_enum *
nouveau_enum_print(const struct nouveau_enum *en, u32 value);
struct nouveau_bitfield {
diff --git a/drivers/gpu/drm/nouveau/core/include/engine/fifo.h
b/drivers/gpu/drm/nouveau/core/include/engine/fifo.h
index 039bd19..f4f4149 100644
--- a/drivers/gpu/drm/nouveau/core/include/engine/fifo.h
+++ b/drivers/gpu/drm/nouveau/core/include/engine/fifo.h
@@ -92,6 +92,8 @@ int nouveau_fifo_create_(struct nouveau_object *, struct
nouveau_object *,
struct nouveau_oclass *, int min, int max,
int size, void **);
void nouveau_fifo_destroy(struct
[Nouveau] [PATCHv2 4/4] drm/nouveau: report channel owner in error messages
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
drivers/gpu/drm/nouveau/core/engine/copy/nva3.c | 6 ++--
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c | 6 ++--
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c | 6 ++--
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c | 22 +++-
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c | 3 +-
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c | 3 +-
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c | 42 +++---
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | 29 +++
drivers/gpu/drm/nouveau/core/engine/graph/nv04.c | 8 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nv10.c | 8 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nv20.c | 7 ++--
drivers/gpu/drm/nouveau/core/engine/graph/nv40.c | 8 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 34 +-
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c | 24 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nve0.c | 44 ---
drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c | 7 ++--
drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c| 45 ++--
drivers/gpu/drm/nouveau/nouveau_chan.c | 3 +-
18 files changed, 198 insertions(+), 107 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
b/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
index 6068f5f..d6dc2a6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
+++ b/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
@@ -22,6 +22,7 @@
* Authors: Ben Skeggs
*/
+#include core/client.h
#include core/falcon.h
#include core/class.h
#include core/enum.h
@@ -100,8 +101,9 @@ nva3_copy_intr(struct nouveau_subdev *subdev)
if (stat 0x0040) {
nv_error(falcon, DISPATCH_ERROR [);
nouveau_enum_print(nva3_copy_isr_error_name, ssta);
- pr_cont(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
- chid, inst 12, subc, mthd, data);
+ pr_cont(] ch %d [0x%010llx %s] subc %d mthd 0x%04x data
0x%08x\n,
+ chid, inst 12, nouveau_client_name(engctx), subc,
+ mthd, data);
nv_wo32(falcon, 0x004, 0x0040);
stat = ~0x0040;
}
diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
index 8d0a440..f431759 100644
--- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
+++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
@@ -22,6 +22,7 @@
* Authors: Ben Skeggs
*/
+#include core/client.h
#include core/os.h
#include core/enum.h
#include core/class.h
@@ -128,8 +129,9 @@ nv84_crypt_intr(struct nouveau_subdev *subdev)
if (stat) {
nv_error(priv, );
nouveau_bitfield_print(nv84_crypt_intr_mask, stat);
- pr_cont( ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n,
- chid, (u64)inst 12, mthd, data);
+ pr_cont( ch %d [0x%010llx %s] mthd 0x%04x data 0x%08x\n,
+ chid, (u64)inst 12, nouveau_client_name(engctx),
+ mthd, data);
}
nv_wr32(priv, 0x102130, stat);
diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
index 1b33c20..8bf8955 100644
--- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
+++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
@@ -22,6 +22,7 @@
* Authors: Ben Skeggs
*/
+#include core/client.h
#include core/os.h
#include core/enum.h
#include core/class.h
@@ -102,8 +103,9 @@ nv98_crypt_intr(struct nouveau_subdev *subdev)
if (stat 0x0040) {
nv_error(priv, DISPATCH_ERROR [);
nouveau_enum_print(nv98_crypt_isr_error_name, ssta);
- pr_cont(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
- chid, (u64)inst 12, subc, mthd, data);
+ pr_cont(] ch %d [0x%010llx %s] subc %d mthd 0x%04x data
0x%08x\n,
+ chid, (u64)inst 12, nouveau_client_name(engctx),
+ subc, mthd, data);
nv_wr32(priv, 0x087004, 0x0040);
stat = ~0x0040;
}
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
index 76944c4..874fa9a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
@@ -421,9 +421,12 @@ nv04_fifo_cache_error(struct nouveau_device *device,
}
if (!nv04_fifo_swmthd(priv, chid, mthd, data)) {
+ const char *client_name =
+ nouveau_client_name_for_fifo_chid(priv-base, chid);
nv_error(priv,
-CACHE_ERROR - Ch %d/%d Mthd 0x%04x Data 0x%08x\n,
-chid, (mthd 13) 7, mthd 0x1ffc,
[Nouveau] [PATCHv3 4/4] drm/nouveau: report channel owner in error messages
Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com
---
v2: finish, fixes after initial review
v3: fix reporting of vm_engine when client already went away
---
drivers/gpu/drm/nouveau/core/engine/copy/nva3.c | 6 ++--
drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c | 6 ++--
drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c | 6 ++--
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c | 22 +++-
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c | 3 +-
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c | 3 +-
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c | 42 +++---
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | 29 +++
drivers/gpu/drm/nouveau/core/engine/graph/nv04.c | 8 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nv10.c | 8 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nv20.c | 7 ++--
drivers/gpu/drm/nouveau/core/engine/graph/nv40.c | 8 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 34 +-
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c | 24 +++--
drivers/gpu/drm/nouveau/core/engine/graph/nve0.c | 44 ---
drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c | 7 ++--
drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c| 46 ++--
drivers/gpu/drm/nouveau/nouveau_chan.c | 3 +-
18 files changed, 199 insertions(+), 107 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
b/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
index 6068f5f..d6dc2a6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
+++ b/drivers/gpu/drm/nouveau/core/engine/copy/nva3.c
@@ -22,6 +22,7 @@
* Authors: Ben Skeggs
*/
+#include core/client.h
#include core/falcon.h
#include core/class.h
#include core/enum.h
@@ -100,8 +101,9 @@ nva3_copy_intr(struct nouveau_subdev *subdev)
if (stat 0x0040) {
nv_error(falcon, DISPATCH_ERROR [);
nouveau_enum_print(nva3_copy_isr_error_name, ssta);
- pr_cont(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
- chid, inst 12, subc, mthd, data);
+ pr_cont(] ch %d [0x%010llx %s] subc %d mthd 0x%04x data
0x%08x\n,
+ chid, inst 12, nouveau_client_name(engctx), subc,
+ mthd, data);
nv_wo32(falcon, 0x004, 0x0040);
stat = ~0x0040;
}
diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
index 8d0a440..f431759 100644
--- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
+++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv84.c
@@ -22,6 +22,7 @@
* Authors: Ben Skeggs
*/
+#include core/client.h
#include core/os.h
#include core/enum.h
#include core/class.h
@@ -128,8 +129,9 @@ nv84_crypt_intr(struct nouveau_subdev *subdev)
if (stat) {
nv_error(priv, );
nouveau_bitfield_print(nv84_crypt_intr_mask, stat);
- pr_cont( ch %d [0x%010llx] mthd 0x%04x data 0x%08x\n,
- chid, (u64)inst 12, mthd, data);
+ pr_cont( ch %d [0x%010llx %s] mthd 0x%04x data 0x%08x\n,
+ chid, (u64)inst 12, nouveau_client_name(engctx),
+ mthd, data);
}
nv_wr32(priv, 0x102130, stat);
diff --git a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
index 1b33c20..8bf8955 100644
--- a/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
+++ b/drivers/gpu/drm/nouveau/core/engine/crypt/nv98.c
@@ -22,6 +22,7 @@
* Authors: Ben Skeggs
*/
+#include core/client.h
#include core/os.h
#include core/enum.h
#include core/class.h
@@ -102,8 +103,9 @@ nv98_crypt_intr(struct nouveau_subdev *subdev)
if (stat 0x0040) {
nv_error(priv, DISPATCH_ERROR [);
nouveau_enum_print(nv98_crypt_isr_error_name, ssta);
- pr_cont(] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n,
- chid, (u64)inst 12, subc, mthd, data);
+ pr_cont(] ch %d [0x%010llx %s] subc %d mthd 0x%04x data
0x%08x\n,
+ chid, (u64)inst 12, nouveau_client_name(engctx),
+ subc, mthd, data);
nv_wr32(priv, 0x087004, 0x0040);
stat = ~0x0040;
}
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
index 76944c4..874fa9a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
@@ -421,9 +421,12 @@ nv04_fifo_cache_error(struct nouveau_device *device,
}
if (!nv04_fifo_swmthd(priv, chid, mthd, data)) {
+ const char *client_name =
+ nouveau_client_name_for_fifo_chid(priv-base, chid);
nv_error(priv,
-
[Nouveau] [Bug 56461] NV11 black screen kernel hang on loading nouveaufb
https://bugs.freedesktop.org/show_bug.cgi?id=56461 --- Comment #9 from Chris Paulson-Ellis ch...@edesix.com --- Hi, I only just realised that you sent me a second patch (I thought you were referring to the first patch, so I went and did the bisect as per my previous message). I've just tried the second patch against nouveau HEAD. Unfortunately it causes a NULL pointer dereference. I think this is because when this line in nv04_timer_init... n = nouveau_hw_get_clock(((struct nouveau_drm *)nouveau_client(priv))-dev, PLL_CORE); ...calls nouveau_client() it gets NULL, because the parent of nv04_timer_priv is a nouveau_device, not a nouveau_drm. I can't see any way to get a pointer to the drm_device from nv04_timer_init, so I don't think calling nouveau_hw_get_clock from here is possible. Chris. -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 56461] NV11 black screen kernel hang on loading nouveaufb
https://bugs.freedesktop.org/show_bug.cgi?id=56461 --- Comment #10 from Emil Velikov emil.l.veli...@gmail.com --- Created attachment 71248 -- https://bugs.freedesktop.org/attachment.cgi?id=71248action=edit timer fix, take two Sweet, can you the second version of the timer fix. Apply on top of the original patch 69969 -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [Bug 56461] NV11 black screen kernel hang on loading nouveaufb
https://bugs.freedesktop.org/show_bug.cgi?id=56461 --- Comment #11 from Emil Velikov emil.l.veli...@gmail.com --- * if using latest git, only the patch mentioned in commit 10 should be necessary -- You are receiving this mail because: You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
