The patches contain some tidy-up work, and refactoring that has arisen
as a by-product of my initial work on adding TV support to nv50.
Best Regards
Joel Holdsworth
>From 3bb0d2f6d3c08bdd5fbcf953f2b4d327e4624663 Mon Sep 17 00:00:00 2001
From: Joel Holdsworth
Date: Sat, 7 Jun 2014 13:10:59 +0100
Subject: [PATCH 1/4] drm/nouveau: Removed unneeded include in nvc0_fence.c
---
drivers/gpu/drm/nouveau/nvc0_fence.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c
index becf19a..c9fc6f7 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fence.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fence.c
@@ -26,8 +26,6 @@
#include "nouveau_dma.h"
#include "nouveau_fence.h"
-#include "nv50_display.h"
-
static int
nvc0_fence_emit32(struct nouveau_channel *chan, u64 virtual, u32 sequence)
{
--
1.9.1
>From b47ad53d2bb492d480b4d42b6229902dd4d9728e Mon Sep 17 00:00:00 2001
From: Joel Holdsworth
Date: Mon, 11 Aug 2014 18:42:54 +0100
Subject: [PATCH 2/4] drm/nouveau: Replaced magic numbers with defines from
nouveau_reg
---
drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c | 27 +-
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
index b36addf..61e29d6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
@@ -31,11 +31,12 @@
#include
#include "nv50.h"
+#include "nouveau_reg.h"
int
nv50_dac_power(NV50_DISP_MTHD_V1)
{
- const u32 doff = outp->or * 0x800;
+ const u32 dpms_ctrl = NV50_PDISPLAY_DAC_DPMS_CTRL(outp->or);
union {
struct nv50_disp_dac_pwr_v0 v0;
} *args = data;
@@ -55,19 +56,21 @@ nv50_dac_power(NV50_DISP_MTHD_V1)
} else
return ret;
- nv_wait(priv, 0x61a004 + doff, 0x8000, 0x);
- nv_mask(priv, 0x61a004 + doff, 0xc07f, 0x8000 | stat);
- nv_wait(priv, 0x61a004 + doff, 0x8000, 0x);
+ nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0);
+ nv_mask(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x407f,
+ NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | stat);
+ nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0);
return 0;
}
int
nv50_dac_sense(NV50_DISP_MTHD_V1)
{
+ const u32 dpms_ctrl = NV50_PDISPLAY_DAC_DPMS_CTRL(outp->or);
+ const u32 load_ctrl = NV50_PDISPLAY_DAC_LOAD_CTRL(outp->or);
union {
struct nv50_disp_dac_load_v0 v0;
} *args = data;
- const u32 doff = outp->or * 0x800;
u32 loadval;
int ret;
@@ -81,16 +84,18 @@ nv50_dac_sense(NV50_DISP_MTHD_V1)
} else
return ret;
- nv_mask(priv, 0x61a004 + doff, 0x807f, 0x8015);
- nv_wait(priv, 0x61a004 + doff, 0x8000, 0x);
+ nv_mask(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x007f,
+ NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x0015);
+ nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0);
- nv_wr32(priv, 0x61a00c + doff, 0x0010 | loadval);
+ nv_wr32(priv, load_ctrl, 0x0010 | loadval);
mdelay(9);
udelay(500);
- loadval = nv_mask(priv, 0x61a00c + doff, 0x, 0x);
+ loadval = nv_mask(priv, load_ctrl, 0x, 0x);
- nv_mask(priv, 0x61a004 + doff, 0x807f, 0x8055);
- nv_wait(priv, 0x61a004 + doff, 0x8000, 0x);
+ nv_mask(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x007f,
+ NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x0055);
+ nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0);
nv_debug(priv, "DAC%d sense: 0x%08x\n", outp->or, loadval);
if (!(loadval & 0x8000))
--
1.9.1
>From 643cb54bba1bf8b4ab994da1447f0e91fd682b9c Mon Sep 17 00:00:00 2001
From: Joel Holdsworth
Date: Mon, 11 Aug 2014 18:44:25 +0100
Subject: [PATCH 3/4] drm/nouveau: Replaced copy-pasted nv_wait with
nv50_wait_dpms_ctrl helper
---
drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
index 61e29d6..98bded6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
@@ -33,6 +33,12 @@
#include "nv50.h"
#include "nouveau_reg.h"
+static void
+nv50_wait_dpms_ctrl(struct nv50_disp_priv *priv, const u32 dpms_ctrl)
+{
+ nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0);
+}
+
int
nv50_dac_power(NV50_DISP_MTHD_V1)
{
@@ -56,10 +62,10 @@ nv50_dac_power(NV50_DISP_MTHD_V1)
} else
return ret;
- nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0);
+ nv50_wait_dpms_ctrl(priv, dpms_ctrl);
nv_mask(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x407f,
NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | stat);
- nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0);
+ nv50_wait_dpms_ctrl(priv, dpms_ctrl
