[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

--- Comment #6 from Pierre Moreau  ---
FYI, latest Mesa release is 11.0.3. 10.4 was branched out in December 2014
(though it did receive some additional fixes up to March 2015), so you might
want to try at least 10.6.x, or even better, 11.0.x.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

--- Comment #5 from Gabriele Svelto  ---
Still repros on mesa 10.4.6 and libdrm 2.4.65.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

--- Comment #4 from Gabriele Svelto  ---
I've started testing with different versions of mesa and libdrm. On my first
try I could still repro with mesa 10.4.6 and libdrm 2.4.59.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v2 5/9] pci: implement pcie speed change on Fermi

[Karol Herbst]

v2: rename functions and simplify code a little

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/pci/gf100.c | 59 +
 drm/nouveau/nvkm/subdev/pci/gf106.c |  5 
 drm/nouveau/nvkm/subdev/pci/gk104.c |  3 ++
 drm/nouveau/nvkm/subdev/pci/priv.h  |  7 +
 4 files changed, 74 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c 
b/drm/nouveau/nvkm/subdev/pci/gf100.c
index 1ee43ad..366c47b 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -29,6 +29,60 @@ gf100_pci_msi_rearm(struct nvkm_pci *pci)
nvkm_pci_wr08(pci, 0x0704, 0xff);
 }
 
+void
+gf100_pcie_set_version(struct nvkm_pci *pci, u8 ver)
+{
+   struct nvkm_device *device = pci->subdev.device;
+
+   if (ver > 1)
+   ver = 1;
+   else
+   ver = 0;
+
+   nvkm_mask(device, 0x02241c, 0x1, ver);
+}
+
+int
+gf100_pcie_version(struct nvkm_pci *pci)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   return (nvkm_rd32(device, 0x02241c) & 0x1) + 1;
+}
+
+void
+gf100_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   nvkm_mask(device, 0x02241c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+int
+gf100_pcie_cap_speed(struct nvkm_pci *pci)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   u8 punits_pci_cap_speed = nvkm_rd32(device, 0x02241c) & 0x80;
+   if (punits_pci_cap_speed == 0x80)
+   return 1;
+   return 0;
+}
+
+int
+gf100_pcie_init(struct nvkm_pci *pci)
+{
+   gf100_pcie_set_cap_speed(pci,
+   g84_pcie_cur_speed(pci) == NVKM_PCIE_SPEED_5_0);
+   return 0;
+}
+
+int
+gf100_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed,
+   u8 req_width)
+{
+   gf100_pcie_set_cap_speed(pci, req_speed == NVKM_PCIE_SPEED_5_0);
+   g84_pcie_set_link_speed(pci, req_speed);
+   return 0;
+}
+
 static const struct nvkm_pci_func
 gf100_pci_func = {
.init = g84_pci_init,
@@ -37,9 +91,14 @@ gf100_pci_func = {
.wr32 = nv40_pci_wr32,
.msi_rearm = gf100_pci_msi_rearm,
 
+   .pcie.init = gf100_pcie_init,
+   .pcie.set_link = gf100_pcie_set_link,
+
.pcie.max_speed = g84_pcie_max_speed,
.pcie.cur_speed = g84_pcie_cur_speed,
 
+   .pcie.set_version = gf100_pcie_set_version,
+   .pcie.version = gf100_pcie_version,
.pcie.version_supported = g84_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c 
b/drm/nouveau/nvkm/subdev/pci/gf106.c
index d72f850..612e195 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf106.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -30,9 +30,14 @@ gf106_pci_func = {
.wr32 = nv40_pci_wr32,
.msi_rearm = nv40_pci_msi_rearm,
 
+   .pcie.init = gf100_pcie_init,
+   .pcie.set_link = gf100_pcie_set_link,
+
.pcie.max_speed = g84_pcie_max_speed,
.pcie.cur_speed = g84_pcie_cur_speed,
 
+   .pcie.set_version = gf100_pcie_set_version,
+   .pcie.version = gf100_pcie_version,
.pcie.version_supported = g84_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c 
b/drm/nouveau/nvkm/subdev/pci/gk104.c
index af79d9b..458dd31 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -31,6 +31,9 @@ gk104_pci_func = {
.msi_rearm = nv40_pci_msi_rearm,
 
.pcie.cur_speed = g84_pcie_cur_speed,
+
+   .pcie.set_version = gf100_pcie_set_version,
+   .pcie.version = gf100_pcie_version,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h 
b/drm/nouveau/nvkm/subdev/pci/priv.h
index a504812..6265e2c 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -45,5 +45,12 @@ enum nvkm_pcie_speed g84_pcie_max_speed(struct nvkm_pci *);
 int g84_pcie_init(struct nvkm_pci *);
 int g84_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
 
+void gf100_pcie_set_version(struct nvkm_pci *, u8);
+int gf100_pcie_version(struct nvkm_pci *);
+void gf100_pcie_set_cap_speed(struct nvkm_pci *, bool);
+int gf100_pcie_cap_speed(struct nvkm_pci *);
+int gf100_pcie_init(struct nvkm_pci *);
+int gf100_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
+
 int nvkm_pcie_init(struct nvkm_pci *pci);
 #endif
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v2 1/9] pci: add gk104 variant

[Karol Herbst]

v2: change email used in header

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/pci.h |  1 +
 drm/nouveau/nvkm/engine/device/base.c | 20 +-
 drm/nouveau/nvkm/subdev/pci/Kbuild|  1 +
 drm/nouveau/nvkm/subdev/pci/gk104.c   | 38 +++
 4 files changed, 50 insertions(+), 10 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gk104.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h 
b/drm/nouveau/include/nvkm/subdev/pci.h
index fee0a97..1cf5f72 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -34,4 +34,5 @@ int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci 
**);
 int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 #endif
diff --git a/drm/nouveau/nvkm/engine/device/base.c 
b/drm/nouveau/nvkm/engine/device/base.c
index 439c003..9c10c84 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1669,7 +1669,7 @@ nve4_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1706,7 +1706,7 @@ nve6_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1743,7 +1743,7 @@ nve7_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1804,7 +1804,7 @@ nvf0_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk110_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1840,7 +1840,7 @@ nvf1_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk110_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1876,7 +1876,7 @@ nv106_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk208_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1912,7 +1912,7 @@ nv108_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk208_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1948,7 +1948,7 @@ nv117_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.therm = gm107_therm_new,
.timer = gk20a_timer_new,
@@ -1979,7 +1979,7 @@ nv124_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.timer = gk20a_timer_new,
.volt = gk104_volt_new,
@@ -2010,7 +2010,7 @@ nv126_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.timer = gk20a_timer_new,
.volt = gk104_volt_new,
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild 
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 4476ef7..1a29869 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -7,3 +7,4 @@ nvkm-y += nvkm/subdev/pci/nv4c.o
 nvkm-y += nvkm/subdev/pci/g84.o
 nvkm-y += nvkm/subdev/pci/g94.o
 nvkm-y += nvkm/subdev/pci/gf100.o
+nvkm-y += nvkm/subdev/pci/gk104.o
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c 
b/drm/nouveau/nvkm/subdev/pci/gk104.c
new file mode 100644
index 000..6119f89
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the 

[Nouveau] [PATCH v2 7/9] bios/perf: parse the pci speed from the bios for tesla and newer cards

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/bios/perf.h |  2 ++
 drm/nouveau/nvkm/subdev/bios/perf.c | 16 
 2 files changed, 18 insertions(+)

diff --git a/drm/nouveau/include/nvkm/subdev/bios/perf.h 
b/drm/nouveau/include/nvkm/subdev/bios/perf.h
index 7cc2bec..d3bd250 100644
--- a/drm/nouveau/include/nvkm/subdev/bios/perf.h
+++ b/drm/nouveau/include/nvkm/subdev/bios/perf.h
@@ -13,6 +13,8 @@ struct nvbios_perfE {
u32 vdec;
u32 disp;
u32 script;
+   u8  pcie_speed;
+   u8  pcie_width;
 };
 
 u16 nvbios_perf_entry(struct nvkm_bios *, int idx,
diff --git a/drm/nouveau/nvkm/subdev/bios/perf.c 
b/drm/nouveau/nvkm/subdev/bios/perf.c
index aa7e33b..636bfb6 100644
--- a/drm/nouveau/nvkm/subdev/bios/perf.c
+++ b/drm/nouveau/nvkm/subdev/bios/perf.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 
 u16
 nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
@@ -145,6 +146,21 @@ nvbios_perfEp(struct nvkm_bios *bios, int idx,
break;
case 0x40:
info->voltage  = nvbios_rd08(bios, perf + 0x02);
+   switch (nvbios_rd08(bios, perf + 0xb) & 0x3) {
+   case 0:
+   info->pcie_speed = NVKM_PCIE_SPEED_5_0;
+   break;
+   case 3:
+   case 1:
+   info->pcie_speed = NVKM_PCIE_SPEED_2_5;
+   break;
+   case 2:
+   info->pcie_speed = NVKM_PCIE_SPEED_8_0;
+   break;
+   default:
+   break;
+   }
+   info->pcie_width = 0xff;
break;
default:
return 0x;
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v2 8/9] perf: add fields for pci speed and width and use it for the pstates

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/clk.h | 3 +++
 drm/nouveau/nvkm/subdev/clk/base.c| 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drm/nouveau/include/nvkm/subdev/clk.h 
b/drm/nouveau/include/nvkm/subdev/clk.h
index 8708f0a..e9c4a81 100644
--- a/drm/nouveau/include/nvkm/subdev/clk.h
+++ b/drm/nouveau/include/nvkm/subdev/clk.h
@@ -2,6 +2,7 @@
 #define __NVKM_CLK_H__
 #include 
 #include 
+#include 
 struct nvbios_pll;
 struct nvkm_pll_vals;
 
@@ -59,6 +60,8 @@ struct nvkm_pstate {
struct nvkm_cstate base;
u8 pstate;
u8 fanspeed;
+   enum nvkm_pcie_speed pcie_speed;
+   u8 pcie_width;
 };
 
 struct nvkm_domain {
diff --git a/drm/nouveau/nvkm/subdev/clk/base.c 
b/drm/nouveau/nvkm/subdev/clk/base.c
index b7d82a4..7ae4f26 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -330,6 +330,8 @@ nvkm_pstate_new(struct nvkm_clk *clk, int idx)
 
pstate->pstate = perfE.pstate;
pstate->fanspeed = perfE.fanspeed;
+   pstate->pcie_speed = perfE.pcie_speed;
+   pstate->pcie_width = perfE.pcie_width;
cstate->voltage = perfE.voltage;
cstate->domain[nv_clk_src_core] = perfE.core;
cstate->domain[nv_clk_src_shader] = perfE.shader;
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v2 2/9] pci: add gf106 variant

[Karol Herbst]

v2: change email used in header

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/pci.h |  1 +
 drm/nouveau/nvkm/engine/device/base.c | 10 -
 drm/nouveau/nvkm/subdev/pci/Kbuild|  1 +
 drm/nouveau/nvkm/subdev/pci/gf106.c   | 38 +++
 4 files changed, 45 insertions(+), 5 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gf106.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h 
b/drm/nouveau/include/nvkm/subdev/pci.h
index 1cf5f72..17fe7b7 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -34,5 +34,6 @@ int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci 
**);
 int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 #endif
diff --git a/drm/nouveau/nvkm/engine/device/base.c 
b/drm/nouveau/nvkm/engine/device/base.c
index 9c10c84..653da48 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1388,7 +1388,7 @@ nvc1_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1423,7 +1423,7 @@ nvc3_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1566,7 +1566,7 @@ nvcf_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1601,7 +1601,7 @@ nvd7_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.ce[0] = gf100_ce_new,
@@ -1634,7 +1634,7 @@ nvd9_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf119_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild 
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 1a29869..724afd4 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -7,4 +7,5 @@ nvkm-y += nvkm/subdev/pci/nv4c.o
 nvkm-y += nvkm/subdev/pci/g84.o
 nvkm-y += nvkm/subdev/pci/g94.o
 nvkm-y += nvkm/subdev/pci/gf100.o
+nvkm-y += nvkm/subdev/pci/gf106.o
 nvkm-y += nvkm/subdev/pci/gk104.o
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c 
b/drm/nouveau/nvkm/subdev/pci/gf106.c
new file mode 100644
index 000..82d8c27
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Karol Herbst 
+ */
+#include "priv.h"
+
+static const struct nvkm_pci_func
+gf106_pci_func = {
+   .rd32 = nv40_pci_rd32,
+   .wr08 = nv40_pci_wr08,
+   .wr32 = nv40_pci_wr32,
+   .msi_rearm = nv40_pci_msi_rearm,
+};
+
+int
+gf106_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
+{
+   return nvkm_pci_new_(_pci_func, device, index, ppci);
+}
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org

[Nouveau] [PATCH v2 3/9] pci: implement generic code for PCIe speed change

[Karol Herbst]

v2: rename and group functions

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/pci.h |  14 +++
 drm/nouveau/nvkm/subdev/pci/Kbuild|   1 +
 drm/nouveau/nvkm/subdev/pci/base.c|   5 ++
 drm/nouveau/nvkm/subdev/pci/pcie.c| 165 ++
 drm/nouveau/nvkm/subdev/pci/priv.h|  15 
 5 files changed, 200 insertions(+)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/pcie.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h 
b/drm/nouveau/include/nvkm/subdev/pci.h
index 17fe7b7..ab9d5cc 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -2,6 +2,12 @@
 #define __NVKM_PCI_H__
 #include 
 
+enum nvkm_pcie_speed {
+   NVKM_PCIE_SPEED_2_5,
+   NVKM_PCIE_SPEED_5_0,
+   NVKM_PCIE_SPEED_8_0,
+};
+
 struct nvkm_pci {
const struct nvkm_pci_func *func;
struct nvkm_subdev subdev;
@@ -18,6 +24,11 @@ struct nvkm_pci {
bool acquired;
} agp;
 
+   struct {
+   enum nvkm_pcie_speed last_speed;
+   u8 last_width;
+   } pcie;
+
bool msi;
 };
 
@@ -36,4 +47,7 @@ int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci 
**);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+
+/* pcie functions */
+int nvkm_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8 width);
 #endif
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild 
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 724afd4..3c2519f 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -1,5 +1,6 @@
 nvkm-y += nvkm/subdev/pci/agp.o
 nvkm-y += nvkm/subdev/pci/base.o
+nvkm-y += nvkm/subdev/pci/pcie.o
 nvkm-y += nvkm/subdev/pci/nv04.o
 nvkm-y += nvkm/subdev/pci/nv40.o
 nvkm-y += nvkm/subdev/pci/nv46.o
diff --git a/drm/nouveau/nvkm/subdev/pci/base.c 
b/drm/nouveau/nvkm/subdev/pci/base.c
index d671dcf..95a8d05 100644
--- a/drm/nouveau/nvkm/subdev/pci/base.c
+++ b/drm/nouveau/nvkm/subdev/pci/base.c
@@ -117,6 +117,9 @@ nvkm_pci_init(struct nvkm_subdev *subdev)
ret = nvkm_agp_init(pci);
if (ret)
return ret;
+   } else {
+   if (pci_is_pcie(pci->pdev))
+   nvkm_pcie_init(pci);
}
 
if (pci->func->init)
@@ -160,6 +163,8 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct 
nvkm_device *device,
pci->func = func;
pci->pdev = device->func->pci(device)->pdev;
pci->irq = -1;
+   pci->pcie.last_speed = -1;
+   pci->pcie.last_width = -1;
 
if (device->type == NVKM_DEVICE_AGP)
nvkm_agp_ctor(pci);
diff --git a/drm/nouveau/nvkm/subdev/pci/pcie.c 
b/drm/nouveau/nvkm/subdev/pci/pcie.c
new file mode 100644
index 000..e60d0ba
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/pcie.c
@@ -0,0 +1,165 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Karol Herbst 
+ */
+#include "priv.h"
+
+static char *pcie_speed_strings[] = {
+   "2.5GT/s",
+   "5.0GT/s",
+   "8.0GT/s",
+};
+
+static enum nvkm_pcie_speed
+pci_bus_speed_to_nvkm_pcie_speed(enum pci_bus_speed speed)
+{
+   switch (speed) {
+   case PCIE_SPEED_2_5GT:
+   return NVKM_PCIE_SPEED_2_5;
+   case PCIE_SPEED_5_0GT:
+   return NVKM_PCIE_SPEED_5_0;
+   case PCIE_SPEED_8_0GT:
+   return NVKM_PCIE_SPEED_8_0;
+   default:
+   /* XXX 0x16 is 8_0, assume 0x17 will be 16_0 for now */
+   if (speed == 0x17)
+   return NVKM_PCIE_SPEED_8_0;
+   return -1;
+   }
+}
+
+static s8
+nvkm_pci_get_pcie_version(struct nvkm_pci *pci)
+{
+   if 

[Nouveau] [PATCH v2 0/9] PCIEs speed change

[Karol Herbst]

overall the same as the old stuff, but with better namings and tirivialy
improved code here and there

Karol Herbst (9):
  pci: add gk104 variant
  pci: add gf106 variant
  pci: implement generic code for PCIe speed change
  pci: implement pcie speed change for tesla
  pci: implement pcie speed change on Fermi
  pci: implement PCIe speed change for kepler+
  bios/perf: parse the pci speed from the bios for tesla and newer cards
  perf: add fields for pci speed and width and use it for the pstates
  perf: change pcie speed on pstate change

 drm/nouveau/include/nvkm/subdev/bios/perf.h |   2 +
 drm/nouveau/include/nvkm/subdev/clk.h   |   3 +
 drm/nouveau/include/nvkm/subdev/pci.h   |  16 ++
 drm/nouveau/nvkm/engine/device/base.c   |  30 ++--
 drm/nouveau/nvkm/subdev/bios/perf.c |  16 ++
 drm/nouveau/nvkm/subdev/clk/base.c  |   6 +
 drm/nouveau/nvkm/subdev/pci/Kbuild  |   3 +
 drm/nouveau/nvkm/subdev/pci/base.c  |   5 +
 drm/nouveau/nvkm/subdev/pci/g84.c   | 105 
 drm/nouveau/nvkm/subdev/pci/g94.c   |  10 ++
 drm/nouveau/nvkm/subdev/pci/gf100.c |  64 
 drm/nouveau/nvkm/subdev/pci/gf106.c |  48 ++
 drm/nouveau/nvkm/subdev/pci/gk104.c | 239 
 drm/nouveau/nvkm/subdev/pci/pcie.c  | 165 +++
 drm/nouveau/nvkm/subdev/pci/priv.h  |  31 
 15 files changed, 728 insertions(+), 15 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gf106.c
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gk104.c
 create mode 100644 drm/nouveau/nvkm/subdev/pci/pcie.c

-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v2 6/9] pci: implement PCIe speed change for kepler+

[Karol Herbst]

v2: rename functions

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/pci/gk104.c | 196 
 1 file changed, 196 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c 
b/drm/nouveau/nvkm/subdev/pci/gk104.c
index 458dd31..99b131c 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -23,6 +23,197 @@
  */
 #include "priv.h"
 
+static u32
+gk104_pci2_rd32(struct nvkm_pci *pci, u16 addr)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   return nvkm_rd32(device, 0x08c000 + addr);
+}
+
+static void
+gk104_pci2_mask(struct nvkm_pci *pci, u16 addr, u32 mask, u32 value)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   nvkm_mask(device, 0x08c000 + addr, mask, value);
+}
+
+static int
+gk104_pcie_version_supported(struct nvkm_pci *pci)
+{
+   return (gk104_pci2_rd32(pci, 0x1c0) & 0x4) == 0x4 ? 2 : 1;
+}
+
+static void
+gk104_pcie_set_cap_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   switch (speed) {
+   case NVKM_PCIE_SPEED_2_5:
+   gf100_pcie_set_cap_speed(pci, false);
+   gk104_pci2_mask(pci, 0x1c0, 0x3, 0x1);
+   break;
+   case NVKM_PCIE_SPEED_5_0:
+   gf100_pcie_set_cap_speed(pci, true);
+   gk104_pci2_mask(pci, 0x1c0, 0x3, 0x2);
+   break;
+   case NVKM_PCIE_SPEED_8_0:
+   gf100_pcie_set_cap_speed(pci, true);
+   gk104_pci2_mask(pci, 0x1c0, 0x3, 0x3);
+   break;
+   }
+}
+
+static enum nvkm_pcie_speed
+gk104_pcie_cap_speed(struct nvkm_pci *pci)
+{
+   int speed = gf100_pcie_cap_speed(pci);
+   if (speed < 0)
+   return speed;
+
+   if (speed == 0)
+   return NVKM_PCIE_SPEED_2_5;
+
+   if (speed >= 1) {
+   int speed2 = gk104_pci2_rd32(pci, 0x1c0) & 0x3;
+   switch (speed2) {
+   case 0x0:
+   case 0x1:
+   return NVKM_PCIE_SPEED_2_5;
+   case 0x2:
+   return NVKM_PCIE_SPEED_5_0;
+   case 0x3:
+   return NVKM_PCIE_SPEED_8_0;
+   }
+   }
+   return -EINVAL;
+}
+
+static void
+gk104_pcie_set_lnkctl_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   u8 reg_v = 0;
+   switch (speed) {
+   case NVKM_PCIE_SPEED_2_5:
+   reg_v = 1;
+   break;
+   case NVKM_PCIE_SPEED_5_0:
+   reg_v = 2;
+   break;
+   case NVKM_PCIE_SPEED_8_0:
+   reg_v = 3;
+   break;
+   }
+   nvkm_pci_mask(pci, 0xa8, 0x3, reg_v);
+}
+
+static enum nvkm_pcie_speed
+gk104_pcie_lnkctl_speed(struct nvkm_pci *pci)
+{
+   u8 reg_v = nvkm_pci_rd32(pci, 0xa8) & 0x3;
+   switch (reg_v) {
+   case 0:
+   case 1:
+   return NVKM_PCIE_SPEED_2_5;
+   case 2:
+   return NVKM_PCIE_SPEED_5_0;
+   case 3:
+   return NVKM_PCIE_SPEED_8_0;
+   }
+   return -1;
+}
+
+static enum nvkm_pcie_speed
+gk104_pcie_max_speed(struct nvkm_pci *pci)
+{
+   u32 max_speed = gk104_pci2_rd32(pci, 0x1c0) & 0x30;
+   switch (max_speed) {
+   case 0x00:
+   return NVKM_PCIE_SPEED_8_0;
+   case 0x10:
+   return NVKM_PCIE_SPEED_5_0;
+   case 0x20:
+   return NVKM_PCIE_SPEED_2_5;
+   }
+   return NVKM_PCIE_SPEED_2_5;
+}
+
+static void
+gk104_pcie_set_link_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   u32 mask_value;
+   switch (speed) {
+   default:
+   case NVKM_PCIE_SPEED_2_5:
+   mask_value = 0x8;
+   break;
+   case NVKM_PCIE_SPEED_5_0:
+   mask_value = 0x4;
+   break;
+   case NVKM_PCIE_SPEED_8_0:
+   mask_value = 0x0;
+   break;
+   }
+   gk104_pci2_mask(pci, 0x40, 0xc, mask_value);
+   gk104_pci2_mask(pci, 0x40, 0x1, 0x1);
+}
+
+static int
+gk104_pcie_init(struct nvkm_pci * pci)
+{
+   if (!pci_is_pcie(pci->pdev))
+   return -ENODEV;
+
+   if (gf100_pcie_version(pci) > 1) {
+   enum nvkm_pcie_speed
+   lnkctl_speed = gk104_pcie_lnkctl_speed(pci),
+   max_speed = gk104_pcie_max_speed(pci),
+   cap_speed = gk104_pcie_cap_speed(pci);
+
+   if (cap_speed != max_speed) {
+   nvkm_debug(>subdev, "adjusting cap speed to max 
speed\n");
+   gk104_pcie_set_cap_speed(pci, max_speed);
+   cap_speed = gk104_pcie_cap_speed(pci);
+   if (cap_speed != max_speed)
+   nvkm_error(>subdev, "couldn't adjust cap 
speed\n");
+   }
+
+   if 

[Nouveau] [PATCH v2 4/9] pci: implement pcie speed change for tesla

[Karol Herbst]

v2: rename functions and simplify init

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/pci/g84.c   | 105 
 drm/nouveau/nvkm/subdev/pci/g94.c   |  10 
 drm/nouveau/nvkm/subdev/pci/gf100.c |   5 ++
 drm/nouveau/nvkm/subdev/pci/gf106.c |   5 ++
 drm/nouveau/nvkm/subdev/pci/gk104.c |   2 +
 drm/nouveau/nvkm/subdev/pci/priv.h  |   9 
 6 files changed, 136 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c 
b/drm/nouveau/nvkm/subdev/pci/g84.c
index 3faa6bf..7a4e766 100644
--- a/drm/nouveau/nvkm/subdev/pci/g84.c
+++ b/drm/nouveau/nvkm/subdev/pci/g84.c
@@ -25,6 +25,94 @@
 
 #include 
 
+int
+g84_pcie_version_supported(struct nvkm_pci *pci)
+{
+   u32 chipset = pci->subdev.device->chipset, reg_v;
+
+   /* these cards report wrong information about what they support */
+   if (chipset == 0x84 || chipset == 0x86)
+   return 1;
+
+   reg_v = nvkm_pci_rd32(pci, 0x460) & 0x200;
+   if (reg_v == 0x200)
+   return 2;
+   return 1;
+}
+
+int
+g84_pcie_version(struct nvkm_pci *pci)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   return (nvkm_rd32(device, 0x00154c) & 0x1) + 1;
+}
+
+void
+g84_pcie_set_version(struct nvkm_pci *pci, u8 ver)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   nvkm_mask(device, 0x00154c, 0x1, (ver >= 2 ? 0x1 : 0x0));
+}
+
+static void
+g84_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   nvkm_mask(device, 0x00154c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+enum nvkm_pcie_speed
+g84_pcie_cur_speed(struct nvkm_pci *pci)
+{
+   u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x3;
+   switch (reg_v) {
+   case 0x3:
+   return NVKM_PCIE_SPEED_8_0;
+   case 0x2:
+   return NVKM_PCIE_SPEED_5_0;
+   case 0x1:
+   default:
+   return NVKM_PCIE_SPEED_2_5;
+   }
+}
+
+enum nvkm_pcie_speed
+g84_pcie_max_speed(struct nvkm_pci *pci)
+{
+   u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300;
+   if (reg_v == 0x2200)
+   return NVKM_PCIE_SPEED_5_0;
+   return NVKM_PCIE_SPEED_2_5;
+}
+
+void
+g84_pcie_set_link_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   u32 mask_value;
+
+   if (speed == NVKM_PCIE_SPEED_5_0)
+   mask_value = 0x20;
+   else
+   mask_value = 0x10;
+
+   nvkm_pci_mask(pci, 0x460, 0x30, mask_value);
+   nvkm_pci_mask(pci, 0x460, 0x1, 0x1);
+}
+
+int
+g84_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed,
+   u8 req_width)
+{
+   if (req_speed == NVKM_PCIE_SPEED_5_0)
+   g84_pcie_set_cap_speed(pci, true);
+   else
+   g84_pcie_set_cap_speed(pci, false);
+
+   g84_pcie_set_link_speed(pci, req_speed);
+
+   return 0;
+}
+
 void
 g84_pci_init(struct nvkm_pci *pci)
 {
@@ -48,6 +136,13 @@ g84_pci_init(struct nvkm_pci *pci)
nvkm_pci_mask(pci, 0x041c, 0x0060, 0x);
 }
 
+int
+g84_pcie_init(struct nvkm_pci *pci)
+{
+   g84_pcie_set_cap_speed(pci, g84_pcie_cur_speed(pci) == 
NVKM_PCIE_SPEED_5_0);
+   return 0;
+}
+
 static const struct nvkm_pci_func
 g84_pci_func = {
.init = g84_pci_init,
@@ -55,6 +150,16 @@ g84_pci_func = {
.wr08 = nv40_pci_wr08,
.wr32 = nv40_pci_wr32,
.msi_rearm = nv46_pci_msi_rearm,
+
+   .pcie.init = g84_pcie_init,
+   .pcie.set_link = g84_pcie_set_link,
+
+   .pcie.max_speed = g84_pcie_max_speed,
+   .pcie.cur_speed = g84_pcie_cur_speed,
+
+   .pcie.set_version = g84_pcie_set_version,
+   .pcie.version = g84_pcie_version,
+   .pcie.version_supported = g84_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/g94.c 
b/drm/nouveau/nvkm/subdev/pci/g94.c
index cd311ee..f2f96c1 100644
--- a/drm/nouveau/nvkm/subdev/pci/g94.c
+++ b/drm/nouveau/nvkm/subdev/pci/g94.c
@@ -30,6 +30,16 @@ g94_pci_func = {
.wr08 = nv40_pci_wr08,
.wr32 = nv40_pci_wr32,
.msi_rearm = nv40_pci_msi_rearm,
+
+   .pcie.init = g84_pcie_init,
+   .pcie.set_link = g84_pcie_set_link,
+
+   .pcie.max_speed = g84_pcie_max_speed,
+   .pcie.cur_speed = g84_pcie_cur_speed,
+
+   .pcie.set_version = g84_pcie_set_version,
+   .pcie.version = g84_pcie_version,
+   .pcie.version_supported = g84_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c 
b/drm/nouveau/nvkm/subdev/pci/gf100.c
index 25e1ae7..1ee43ad 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -36,6 +36,11 @@ gf100_pci_func = {
.wr08 = nv40_pci_wr08,
.wr32 = nv40_pci_wr32,
.msi_rearm = gf100_pci_msi_rearm,
+
+   .pcie.max_speed = g84_pcie_max_speed,
+   .pcie.cur_speed = g84_pcie_cur_speed,
+
+ 

[Nouveau] [PATCH v2 9/9] perf: change pcie speed on pstate change

[Karol Herbst]

v2: remove error and only set link for pcie devices

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/clk/base.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/clk/base.c 
b/drm/nouveau/nvkm/subdev/clk/base.c
index 7ae4f26..137e06f 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -176,6 +176,7 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
 {
struct nvkm_subdev *subdev = >subdev;
struct nvkm_ram *ram = subdev->device->fb->ram;
+   struct nvkm_pci *pci = subdev->device->pci;
struct nvkm_pstate *pstate;
int ret, idx = 0;
 
@@ -187,6 +188,9 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
nvkm_debug(subdev, "setting performance state %d\n", pstatei);
clk->pstate = pstatei;
 
+   if (pci && pci_is_pcie(pci->pdev))
+   nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width);
+
if (ram && ram->func->calc) {
int khz = pstate->base.domain[nv_clk_src_mem];
do {
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH 3/6] debugfs: we need a ctrl object for debugfs

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nouveau_debugfs.c | 30 ++
 drm/nouveau/nouveau_debugfs.h | 26 ++
 drm/nouveau/nouveau_drm.c |  2 ++
 drm/nouveau/nouveau_drm.h |  1 +
 4 files changed, 59 insertions(+)

diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
index 3736796..53d2233 100644
--- a/drm/nouveau/nouveau_debugfs.c
+++ b/drm/nouveau/nouveau_debugfs.c
@@ -29,6 +29,7 @@
  */
 
 #include 
+#include 
 #include "nouveau_debugfs.h"
 #include "nouveau_drm.h"
 
@@ -114,3 +115,32 @@ nouveau_drm_debugfs_cleanup(struct drm_minor *minor)
1, minor);
}
 }
+
+int
+nouveau_debugfs_init(struct nouveau_drm *drm)
+{
+   int ret;
+
+   drm->debugfs = kzalloc(sizeof(*drm->debugfs), GFP_KERNEL);
+   if (!drm->debugfs) {
+   return-ENOMEM;
+   }
+
+   ret = nvif_object_init(>device.object, NVDRM_CONTROL,
+   NVIF_IOCTL_NEW_V0_CONTROL, NULL, 0, 
>debugfs->ctrl);
+
+   if (ret)
+   return ret;
+
+   return 0;
+}
+
+void
+nouveau_debugfs_cleanup(struct nouveau_drm *drm)
+{
+   if (drm->debugfs && drm->debugfs->ctrl.priv)
+   nvif_object_fini(>debugfs->ctrl);
+
+   kfree(drm->debugfs);
+   drm->debugfs = NULL;
+}
diff --git a/drm/nouveau/nouveau_debugfs.h b/drm/nouveau/nouveau_debugfs.h
index 42d65c9..6b89fb1 100644
--- a/drm/nouveau/nouveau_debugfs.h
+++ b/drm/nouveau/nouveau_debugfs.h
@@ -4,8 +4,23 @@
 #include 
 
 #if defined(CONFIG_DEBUG_FS)
+
+#include "nouveau_drm.h"
+
+struct nouveau_debugfs {
+   struct nvif_object ctrl;
+};
+
+static inline struct nouveau_debugfs *
+nouveau_debugfs(struct drm_device *dev)
+{
+   return nouveau_drm(dev)->debugfs;
+}
+
 extern int  nouveau_drm_debugfs_init(struct drm_minor *);
 extern void nouveau_drm_debugfs_cleanup(struct drm_minor *);
+extern int  nouveau_debugfs_init(struct nouveau_drm *);
+extern void nouveau_debugfs_cleanup(struct nouveau_drm *);
 #else
 static inline int
 nouveau_drm_debugfs_init(struct drm_minor *minor)
@@ -18,6 +33,17 @@ nouveau_drm_debugfs_cleanup(struct drm_minor *minor)
 {
 }
 
+static inline int
+nouveau_debugfs_init(struct nouveau_drm *)
+{
+   return 0;
+}
+
+static inline void
+nouveau_debugfs_cleanup(struct nouveau_drm *)
+{
+}
+
 #endif
 
 #endif
diff --git a/drm/nouveau/nouveau_drm.c b/drm/nouveau/nouveau_drm.c
index 3044dde..17a0f31 100644
--- a/drm/nouveau/nouveau_drm.c
+++ b/drm/nouveau/nouveau_drm.c
@@ -450,6 +450,7 @@ nouveau_drm_load(struct drm_device *dev, unsigned long 
flags)
goto fail_dispinit;
}
 
+   nouveau_debugfs_init(drm);
nouveau_sysfs_init(dev);
nouveau_hwmon_init(dev);
nouveau_accel_init(drm);
@@ -489,6 +490,7 @@ nouveau_drm_unload(struct drm_device *dev)
nouveau_accel_fini(drm);
nouveau_hwmon_fini(dev);
nouveau_sysfs_fini(dev);
+   nouveau_debugfs_cleanup(drm);
 
if (dev->mode_config.num_crtc)
nouveau_display_fini(dev);
diff --git a/drm/nouveau/nouveau_drm.h b/drm/nouveau/nouveau_drm.h
index 3c902c2..a075d60 100644
--- a/drm/nouveau/nouveau_drm.h
+++ b/drm/nouveau/nouveau_drm.h
@@ -166,6 +166,7 @@ struct nouveau_drm {
/* power management */
struct nouveau_hwmon *hwmon;
struct nouveau_sysfs *sysfs;
+   struct nouveau_debugfs *debugfs;
 
/* display power reference */
bool have_disp_power_ref;
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH 6/6] sysfs: remove pstate options and remove files

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/Kbuild  |  1 -
 drm/nouveau/nouveau_drm.c   |  2 --
 drm/nouveau/nouveau_sysfs.c | 33 -
 drm/nouveau/nouveau_sysfs.h |  8 
 4 files changed, 44 deletions(-)
 delete mode 100644 drm/nouveau/nouveau_sysfs.c
 delete mode 100644 drm/nouveau/nouveau_sysfs.h

diff --git a/drm/nouveau/Kbuild b/drm/nouveau/Kbuild
index a34b437..2527bf4 100644
--- a/drm/nouveau/Kbuild
+++ b/drm/nouveau/Kbuild
@@ -24,7 +24,6 @@ nouveau-y += nouveau_hwmon.o
 nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o
 nouveau-y += nouveau_nvif.o
 nouveau-$(CONFIG_NOUVEAU_PLATFORM_DRIVER) += nouveau_platform.o
-nouveau-y += nouveau_sysfs.o
 nouveau-y += nouveau_usif.o # userspace <-> nvif
 nouveau-y += nouveau_vga.o
 
diff --git a/drm/nouveau/nouveau_drm.c b/drm/nouveau/nouveau_drm.c
index 01aa54a..45f8502 100644
--- a/drm/nouveau/nouveau_drm.c
+++ b/drm/nouveau/nouveau_drm.c
@@ -42,7 +42,6 @@
 #include "nouveau_ttm.h"
 #include "nouveau_gem.h"
 #include "nouveau_vga.h"
-#include "nouveau_sysfs.h"
 #include "nouveau_hwmon.h"
 #include "nouveau_acpi.h"
 #include "nouveau_bios.h"
@@ -1004,7 +1003,6 @@ static void nouveau_display_options(void)
DRM_DEBUG_DRIVER("... modeset  : %d\n", nouveau_modeset);
DRM_DEBUG_DRIVER("... runpm: %d\n", nouveau_runtime_pm);
DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
-   DRM_DEBUG_DRIVER("... pstate   : %d\n", nouveau_pstate);
 }
 
 static const struct dev_pm_ops nouveau_pm_ops = {
diff --git a/drm/nouveau/nouveau_sysfs.c b/drm/nouveau/nouveau_sysfs.c
deleted file mode 100644
index ba89713..000
--- a/drm/nouveau/nouveau_sysfs.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs 
- */
-
-#include 
-#include 
-#include 
-
-#include "nouveau_sysfs.h"
-
-MODULE_PARM_DESC(pstate, "enable sysfs pstate file, which will be moved in the 
future");
-int nouveau_pstate;
-module_param_named(pstate, nouveau_pstate, int, 0400);
diff --git a/drm/nouveau/nouveau_sysfs.h b/drm/nouveau/nouveau_sysfs.h
deleted file mode 100644
index 1da07a8..000
--- a/drm/nouveau/nouveau_sysfs.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef __NOUVEAU_SYSFS_H__
-#define __NOUVEAU_SYSFS_H__
-
-#include "nouveau_drm.h"
-
-extern int nouveau_pstate;
-
-#endif
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH 4/6] debugfs: add copy of sysfs pstate interface ported to debugfs

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nouveau_debugfs.c | 144 +-
 1 file changed, 142 insertions(+), 2 deletions(-)

diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
index 53d2233..d024ffa 100644
--- a/drm/nouveau/nouveau_debugfs.c
+++ b/drm/nouveau/nouveau_debugfs.c
@@ -45,6 +45,145 @@ nouveau_debugfs_vbios_image(struct seq_file *m, void *data)
return 0;
 }
 
+static int
+nouveau_debugfs_pstate_get(struct seq_file *m, void *data)
+{
+   struct nouveau_debugfs *debugfs = nouveau_debugfs(m->private);
+   struct nvif_object *ctrl;
+   struct nvif_control_pstate_info_v0 info = {};
+   int ret, i;
+
+   if (!debugfs)
+   return -ENODEV;
+
+   ctrl = >ctrl;
+
+   ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_INFO,
+   , sizeof(info));
+   if (ret)
+   return ret;
+
+   for (i = 0; i < info.count + 1; i++) {
+   const s32 state = i < info.count ? i :
+   NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT;
+   struct nvif_control_pstate_attr_v0 attr = {
+   .state = state,
+   .index = 0,
+   };
+
+   ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_ATTR,
+   , sizeof(attr));
+   if (ret)
+   return ret;
+
+   if (i < info.count)
+   seq_printf(m, "%02x:", attr.state);
+   else
+   seq_printf(m, "%s:", info.pwrsrc == 0 ? "DC" :
+  info.pwrsrc == 1 ? "AC" :
+  "--");
+
+   attr.index = 0;
+   do {
+   attr.state = state;
+   ret = nvif_mthd(ctrl,
+   NVIF_CONTROL_PSTATE_ATTR,
+   , sizeof(attr));
+   if (ret)
+   return ret;
+
+   seq_printf(m, " %s %d", attr.name, attr.min);
+   if (attr.min != attr.max)
+   seq_printf(m, "-%d", attr.max);
+   seq_printf(m, " %s", attr.unit);
+   } while (attr.index);
+
+   if (state >= 0) {
+   if (info.ustate_ac == state)
+   seq_printf(m, " AC");
+   if (info.ustate_dc == state)
+   seq_printf(m, " DC");
+   if (info.pstate == state)
+   seq_printf(m, " *");
+   } else {
+   if (info.ustate_ac < -1)
+   seq_printf(m, " AC");
+   if (info.ustate_dc < -1)
+   seq_printf(m, " DC");
+   }
+
+   seq_printf(m, "\n");
+   }
+
+   return 0;
+}
+
+static ssize_t
+nouveau_debugfs_pstate_set(struct file *file, const char __user *ubuf, size_t 
len, loff_t *offp)
+{
+   struct seq_file *m = file->private_data;
+   struct nouveau_debugfs *debugfs = nouveau_debugfs(m->private);
+   struct nvif_object *ctrl;
+   struct nvif_control_pstate_user_v0 args = { .pwrsrc = -EINVAL };
+   char buf[32] = {}, *tmp, *cur = buf;
+   long value, ret;
+
+   if (!debugfs)
+   return -ENODEV;
+
+   ctrl = >ctrl;
+
+   if (len >= sizeof(buf))
+   return -EINVAL;
+
+   if (copy_from_user(buf, ubuf, len))
+   return -EFAULT;
+
+   if ((tmp = strchr(buf, '\n')))
+   *tmp = '\0';
+
+   if (!strncasecmp(cur, "dc:", 3)) {
+   args.pwrsrc = 0;
+   cur += 3;
+   } else
+   if (!strncasecmp(cur, "ac:", 3)) {
+   args.pwrsrc = 1;
+   cur += 3;
+   }
+
+   if (!strcasecmp(cur, "none"))
+   args.ustate = NVIF_CONTROL_PSTATE_USER_V0_STATE_UNKNOWN;
+   else
+   if (!strcasecmp(cur, "auto"))
+   args.ustate = NVIF_CONTROL_PSTATE_USER_V0_STATE_PERFMON;
+   else {
+   ret = kstrtol(cur, 16, );
+   if (ret)
+   return ret;
+   args.ustate = value;
+   }
+
+   ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_USER,
+   , sizeof(args));
+   if (ret < 0)
+   return ret;
+
+   return len;
+}
+
+static int
+nouveau_debugfs_pstate_open(struct inode *inode, struct file *file)
+{
+   return single_open(file, nouveau_debugfs_pstate_get, inode->i_private);
+}
+
+static const struct file_operations nouveau_pstate_fops = {
+   .owner = THIS_MODULE,
+   .open = nouveau_debugfs_pstate_open,
+   .read = seq_read,
+   .write = nouveau_debugfs_pstate_set,
+};
+
 static struct 

[Nouveau] [PATCH 0/6] move pstate interface to debugfs

[Karol Herbst]

exposing the pstate interface through sysfs might make sense with no dynamic
reclocking, we shouldn't expose it as sysfs interface, because we actually want
to dynamic reclock the card later on.

Doing it in debugfs on the other hand should be fine, also we need something
like that later on, when we want to benchmark our dynamic reclocking
implementation (we need to disable it at runtime and manucally clock to
pstates).

I also have some debugfs cstate interface patches, but they actually add new
functionality and aren't as trivial as this one, so these have to wait.

In the end I wish we have a pstate, cstate and a disable_dyn_reclock
interface in debugfs exactly for those benchmarking.

Karol Herbst (6):
  debugfs: add infrastructure to add files with other fops than only
read
  debugfs: rename functions to indicate they are used inside drm
  debugfs: we need a ctrl object for debugfs
  debugfs: add copy of sysfs pstate interface ported to debugfs
  sysfs: remove sysfs interface
  sysfs: remove pstate options and remove files

 drm/nouveau/Kbuild|   1 -
 drm/nouveau/nouveau_debugfs.c | 230 +-
 drm/nouveau/nouveau_debugfs.h |  35 ++-
 drm/nouveau/nouveau_drm.c |  10 +-
 drm/nouveau/nouveau_drm.h |   2 +-
 drm/nouveau/nouveau_sysfs.c   | 198 
 drm/nouveau/nouveau_sysfs.h   |  21 
 7 files changed, 262 insertions(+), 235 deletions(-)
 delete mode 100644 drm/nouveau/nouveau_sysfs.c
 delete mode 100644 drm/nouveau/nouveau_sysfs.h

-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH 1/6] debugfs: add infrastructure to add files with other fops than only read

[Karol Herbst]

this is somehow copied from i915

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nouveau_debugfs.c | 56 +--
 1 file changed, 54 insertions(+), 2 deletions(-)

diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
index 5392e07..762441f 100644
--- a/drm/nouveau/nouveau_debugfs.c
+++ b/drm/nouveau/nouveau_debugfs.c
@@ -28,6 +28,7 @@
  *  Ben Skeggs 
  */
 
+#include 
 #include "nouveau_debugfs.h"
 #include "nouveau_drm.h"
 
@@ -48,17 +49,68 @@ static struct drm_info_list nouveau_debugfs_list[] = {
 };
 #define NOUVEAU_DEBUGFS_ENTRIES ARRAY_SIZE(nouveau_debugfs_list)
 
+static const struct nouveau_debugfs_files {
+   const char *name;
+   const struct file_operations *fops;
+} nouveau_debugfs_files[] = {};
+
+
+static int
+nouveau_debugfs_create_file(struct drm_minor *minor,
+   const struct nouveau_debugfs_files *ndf)
+{
+   struct dentry *ent;
+   struct drm_info_node *node;
+
+   ent = debugfs_create_file(ndf->name, S_IRUGO | S_IWUSR, 
minor->debugfs_root,
+   minor->dev, ndf->fops);
+
+   if (!ent)
+   return -ENOMEM;
+
+   node = kmalloc(sizeof(*node), GFP_KERNEL);
+   if (node == NULL) {
+   debugfs_remove(ent);
+   return -ENOMEM;
+   }
+
+   node->minor = minor;
+   node->dent = ent;
+   node->info_ent = (const void *)ndf->fops;
+
+   mutex_lock(>debugfs_lock);
+   list_add(>list, >debugfs_list);
+   mutex_unlock(>debugfs_lock);
+
+   return 0;
+}
+
 int
 nouveau_debugfs_init(struct drm_minor *minor)
 {
-   drm_debugfs_create_files(nouveau_debugfs_list, NOUVEAU_DEBUGFS_ENTRIES,
+   int i, ret;
+
+   for (i = 0; i < ARRAY_SIZE(nouveau_debugfs_files); i++) {
+   ret = nouveau_debugfs_create_file(minor, 
_debugfs_files[i]);
+
+   if (ret)
+   return ret;
+   }
+
+   return drm_debugfs_create_files(nouveau_debugfs_list, 
NOUVEAU_DEBUGFS_ENTRIES,
 minor->debugfs_root, minor);
-   return 0;
 }
 
 void
 nouveau_debugfs_takedown(struct drm_minor *minor)
 {
+   int i;
+
drm_debugfs_remove_files(nouveau_debugfs_list, NOUVEAU_DEBUGFS_ENTRIES,
 minor);
+
+   for (i = 0; i < ARRAY_SIZE(nouveau_debugfs_files); i++) {
+   drm_debugfs_remove_files((struct drm_info_list 
*)nouveau_debugfs_files[i].fops,
+   1, minor);
+   }
 }
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH 2/6] debugfs: rename functions to indicate they are used inside drm

[Karol Herbst]

we will need our own debugfs_init and cleanup functions, because nouveau_drm 
isn't ready while the drm ones are called by drm

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nouveau_debugfs.c | 4 ++--
 drm/nouveau/nouveau_debugfs.h | 9 +
 drm/nouveau/nouveau_drm.c | 4 ++--
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
index 762441f..3736796 100644
--- a/drm/nouveau/nouveau_debugfs.c
+++ b/drm/nouveau/nouveau_debugfs.c
@@ -86,7 +86,7 @@ nouveau_debugfs_create_file(struct drm_minor *minor,
 }
 
 int
-nouveau_debugfs_init(struct drm_minor *minor)
+nouveau_drm_debugfs_init(struct drm_minor *minor)
 {
int i, ret;
 
@@ -102,7 +102,7 @@ nouveau_debugfs_init(struct drm_minor *minor)
 }
 
 void
-nouveau_debugfs_takedown(struct drm_minor *minor)
+nouveau_drm_debugfs_cleanup(struct drm_minor *minor)
 {
int i;
 
diff --git a/drm/nouveau/nouveau_debugfs.h b/drm/nouveau/nouveau_debugfs.h
index a62af6f..42d65c9 100644
--- a/drm/nouveau/nouveau_debugfs.h
+++ b/drm/nouveau/nouveau_debugfs.h
@@ -4,16 +4,17 @@
 #include 
 
 #if defined(CONFIG_DEBUG_FS)
-extern int  nouveau_debugfs_init(struct drm_minor *);
-extern void nouveau_debugfs_takedown(struct drm_minor *);
+extern int  nouveau_drm_debugfs_init(struct drm_minor *);
+extern void nouveau_drm_debugfs_cleanup(struct drm_minor *);
 #else
 static inline int
-nouveau_debugfs_init(struct drm_minor *minor)
+nouveau_drm_debugfs_init(struct drm_minor *minor)
 {
return 0;
 }
 
-static inline void nouveau_debugfs_takedown(struct drm_minor *minor)
+static inline void
+nouveau_drm_debugfs_cleanup(struct drm_minor *minor)
 {
 }
 
diff --git a/drm/nouveau/nouveau_drm.c b/drm/nouveau/nouveau_drm.c
index 189e591..3044dde 100644
--- a/drm/nouveau/nouveau_drm.c
+++ b/drm/nouveau/nouveau_drm.c
@@ -929,8 +929,8 @@ driver_stub = {
.lastclose = nouveau_vga_lastclose,
 
 #if defined(CONFIG_DEBUG_FS)
-   .debugfs_init = nouveau_debugfs_init,
-   .debugfs_cleanup = nouveau_debugfs_takedown,
+   .debugfs_init = nouveau_drm_debugfs_init,
+   .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
 #endif
 
.get_vblank_counter = drm_vblank_count,
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

--- Comment #7 from Gabriele Svelto  ---
After some fiddling with the various dependency I'm now testing on mesa 11.0.3.
I haven't hit the bug just yet but I want to run the emulator for a while to be
sure it's not just luck on my part.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH 5/6] sysfs: remove sysfs interface

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nouveau_drm.c   |   2 -
 drm/nouveau/nouveau_drm.h   |   1 -
 drm/nouveau/nouveau_sysfs.c | 165 
 drm/nouveau/nouveau_sysfs.h |  13 
 4 files changed, 181 deletions(-)

diff --git a/drm/nouveau/nouveau_drm.c b/drm/nouveau/nouveau_drm.c
index 17a0f31..01aa54a 100644
--- a/drm/nouveau/nouveau_drm.c
+++ b/drm/nouveau/nouveau_drm.c
@@ -451,7 +451,6 @@ nouveau_drm_load(struct drm_device *dev, unsigned long 
flags)
}
 
nouveau_debugfs_init(drm);
-   nouveau_sysfs_init(dev);
nouveau_hwmon_init(dev);
nouveau_accel_init(drm);
nouveau_fbcon_init(dev);
@@ -489,7 +488,6 @@ nouveau_drm_unload(struct drm_device *dev)
nouveau_fbcon_fini(dev);
nouveau_accel_fini(drm);
nouveau_hwmon_fini(dev);
-   nouveau_sysfs_fini(dev);
nouveau_debugfs_cleanup(drm);
 
if (dev->mode_config.num_crtc)
diff --git a/drm/nouveau/nouveau_drm.h b/drm/nouveau/nouveau_drm.h
index a075d60..ff40499 100644
--- a/drm/nouveau/nouveau_drm.h
+++ b/drm/nouveau/nouveau_drm.h
@@ -165,7 +165,6 @@ struct nouveau_drm {
 
/* power management */
struct nouveau_hwmon *hwmon;
-   struct nouveau_sysfs *sysfs;
struct nouveau_debugfs *debugfs;
 
/* display power reference */
diff --git a/drm/nouveau/nouveau_sysfs.c b/drm/nouveau/nouveau_sysfs.c
index d12a5fa..ba89713 100644
--- a/drm/nouveau/nouveau_sysfs.c
+++ b/drm/nouveau/nouveau_sysfs.c
@@ -31,168 +31,3 @@
 MODULE_PARM_DESC(pstate, "enable sysfs pstate file, which will be moved in the 
future");
 int nouveau_pstate;
 module_param_named(pstate, nouveau_pstate, int, 0400);
-
-static inline struct drm_device *
-drm_device(struct device *d)
-{
-   return dev_get_drvdata(d);
-}
-
-#define snappendf(p,r,f,a...) do { 
\
-   snprintf(p, r, f, ##a);\
-   r -= strlen(p);\
-   p += strlen(p);\
-} while(0)
-
-static ssize_t
-nouveau_sysfs_pstate_get(struct device *d, struct device_attribute *a, char *b)
-{
-   struct nouveau_sysfs *sysfs = nouveau_sysfs(drm_device(d));
-   struct nvif_control_pstate_info_v0 info = {};
-   size_t cnt = PAGE_SIZE;
-   char *buf = b;
-   int ret, i;
-
-   ret = nvif_mthd(>ctrl, NVIF_CONTROL_PSTATE_INFO,
-   , sizeof(info));
-   if (ret)
-   return ret;
-
-   for (i = 0; i < info.count + 1; i++) {
-   const s32 state = i < info.count ? i :
-   NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT;
-   struct nvif_control_pstate_attr_v0 attr = {
-   .state = state,
-   .index = 0,
-   };
-
-   ret = nvif_mthd(>ctrl, NVIF_CONTROL_PSTATE_ATTR,
-   , sizeof(attr));
-   if (ret)
-   return ret;
-
-   if (i < info.count)
-   snappendf(buf, cnt, "%02x:", attr.state);
-   else
-   snappendf(buf, cnt, "%s:", info.pwrsrc == 0 ? "DC" :
-  info.pwrsrc == 1 ? "AC" :
-  "--");
-
-   attr.index = 0;
-   do {
-   attr.state = state;
-   ret = nvif_mthd(>ctrl,
-   NVIF_CONTROL_PSTATE_ATTR,
-   , sizeof(attr));
-   if (ret)
-   return ret;
-
-   snappendf(buf, cnt, " %s %d", attr.name, attr.min);
-   if (attr.min != attr.max)
-   snappendf(buf, cnt, "-%d", attr.max);
-   snappendf(buf, cnt, " %s", attr.unit);
-   } while (attr.index);
-
-   if (state >= 0) {
-   if (info.ustate_ac == state)
-   snappendf(buf, cnt, " AC");
-   if (info.ustate_dc == state)
-   snappendf(buf, cnt, " DC");
-   if (info.pstate == state)
-   snappendf(buf, cnt, " *");
-   } else {
-   if (info.ustate_ac < -1)
-   snappendf(buf, cnt, " AC");
-   if (info.ustate_dc < -1)
-   snappendf(buf, cnt, " DC");
-   }
-
-   snappendf(buf, cnt, "\n");
-   }
-
-   return strlen(b);
-}
-
-static ssize_t
-nouveau_sysfs_pstate_set(struct device *d, struct device_attribute *a,
-const char *buf, size_t count)
-{
-   struct 

[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

--- Comment #11 from Gabriele Svelto  ---
Created attachment 118860
  --> https://bugs.freedesktop.org/attachment.cgi?id=118860=edit
X log

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

--- Comment #9 from Gabriele Svelto  ---
I'm attaching a new dmesg/Xorg.0.log couple taken just after I hit the bug,
they'll be probably easier to parse than the previous one. Especially the dmesg
output has some nouveau-related error messages at the bottom.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

Gabriele Svelto  changed:

   What|Removed |Added

 Attachment #118838|0   |1
is obsolete||

--- Comment #10 from Gabriele Svelto  ---
Created attachment 118859
  --> https://bugs.freedesktop.org/attachment.cgi?id=118859=edit
kernel log

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92438] Segfault in pushbuf_kref when running the android emulator (qemu) on nv50

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92438

--- Comment #8 from Gabriele Svelto  ---
I can still reproduce on mesa 11.0.3 / libdrm 2.4.65 though it takes longer to
trigger the bug (a few minutes of usage). This is the backtrace when using
these versions of mesa and libdrm, it's somewhat different than the previous
one but the bottom frames look the same:

#0  0xf67fc403 in pushbuf_kref () from /usr/lib32/libdrm_nouveau.so.2
#1  0xf67fcc7f in pushbuf_validate () from /usr/lib32/libdrm_nouveau.so.2
#2  0xf6c80f9b in nv50_flush () from /usr/lib32/dri/nouveau_dri.so
#3  0xf69c93a4 in st_flush () from /usr/lib32/dri/nouveau_dri.so
#4  0xf69c93f4 in st_glFlush () from /usr/lib32/dri/nouveau_dri.so
#5  0xf6879b76 in _mesa_flush () from /usr/lib32/dri/nouveau_dri.so
#6  0xf6879f19 in _mesa_make_current () from /usr/lib32/dri/nouveau_dri.so
#7  0xf69fab96 in st_api_make_current () from /usr/lib32/dri/nouveau_dri.so
#8  0xf6ac28f6 in dri_unbind_context () from /usr/lib32/dri/nouveau_dri.so
#9  0xf6ac2337 in driUnbindContext () from /usr/lib32/dri/nouveau_dri.so
#10 0xf73ff3b6 in dri2_unbind_context () from /usr/lib32/libGL.so.1
#11 0xf73d89fb in glXMakeCurrentReadSGI () from /usr/lib32/libGL.so.1
#12 0xf747a89c in EglOS::makeCurrent (dpy=0x8c13608, read=0x0, draw=0x0,
ctx=0x0) at sdk/emulator/opengl/host/libs/Translator/EGL/EglX11Api.cpp:263
#13 0xf747eb11 in eglMakeCurrent (display=0x8c20e50, draw=0x0, read=0x0,
context=0x0) at sdk/emulator/opengl/host/libs/Translator/EGL/EglImp.cpp:684
#14 0xf74b0787 in FrameBuffer::unbind_locked (this=0x8c20d68) at
sdk/emulator/opengl/host/libs/libOpenglRender/FrameBuffer.cpp:790
#15 0xf74ad7f6 in ColorBuffer::create (p_width=320, p_height=266,
p_internalFormat=6408) at
sdk/emulator/opengl/host/libs/libOpenglRender/ColorBuffer.cpp:108
#16 0xf74b181f in FrameBuffer::createColorBuffer (this=0x8c20d68, p_width=320,
p_height=266, p_internalFormat=6408)
at sdk/emulator/opengl/host/libs/libOpenglRender/FrameBuffer.cpp:489
#17 0xf74b7c2d in rcCreateColorBuffer (width=320, height=266,
internalFormat=6408) at
sdk/emulator/opengl/host/libs/libOpenglRender/RenderControl.cpp:215
#18 0xf74b9754 in renderControl_decoder_context_t::decode (this=0xc6301d5c,
buf=0xacee6008, len=20, stream=0xc6300990)
at
out/host/linux-x86/obj/STATIC_LIBRARIES/lib_renderControl_dec_intermediates/renderControl_dec.cpp:245
#19 0xf74b8655 in RenderThread::Main (this=0xc6301d30) at
sdk/emulator/opengl/host/libs/libOpenglRender/RenderThread.cpp:138
#20 0xf74cfc3d in osUtils::Thread::thread_main (p_arg=0xc6301d30) at
sdk/emulator/opengl/shared/OpenglOsUtils/osThreadUnix.cpp:83
#21 0xf7f9811f in start_thread () from /lib32/libpthread.so.0
#22 0xf7d6079e in clone () from /lib32/libc.so.6

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v3 3/9] pci: implement generic code for PCIe speed change

[Karol Herbst]

v2: rename and group functions

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/pci.h |  14 +++
 drm/nouveau/nvkm/subdev/pci/Kbuild|   1 +
 drm/nouveau/nvkm/subdev/pci/base.c|   5 ++
 drm/nouveau/nvkm/subdev/pci/pcie.c| 165 ++
 drm/nouveau/nvkm/subdev/pci/priv.h|  15 
 5 files changed, 200 insertions(+)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/pcie.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h 
b/drm/nouveau/include/nvkm/subdev/pci.h
index 17fe7b7..ab9d5cc 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -2,6 +2,12 @@
 #define __NVKM_PCI_H__
 #include 
 
+enum nvkm_pcie_speed {
+   NVKM_PCIE_SPEED_2_5,
+   NVKM_PCIE_SPEED_5_0,
+   NVKM_PCIE_SPEED_8_0,
+};
+
 struct nvkm_pci {
const struct nvkm_pci_func *func;
struct nvkm_subdev subdev;
@@ -18,6 +24,11 @@ struct nvkm_pci {
bool acquired;
} agp;
 
+   struct {
+   enum nvkm_pcie_speed last_speed;
+   u8 last_width;
+   } pcie;
+
bool msi;
 };
 
@@ -36,4 +47,7 @@ int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci 
**);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+
+/* pcie functions */
+int nvkm_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8 width);
 #endif
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild 
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 724afd4..3c2519f 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -1,5 +1,6 @@
 nvkm-y += nvkm/subdev/pci/agp.o
 nvkm-y += nvkm/subdev/pci/base.o
+nvkm-y += nvkm/subdev/pci/pcie.o
 nvkm-y += nvkm/subdev/pci/nv04.o
 nvkm-y += nvkm/subdev/pci/nv40.o
 nvkm-y += nvkm/subdev/pci/nv46.o
diff --git a/drm/nouveau/nvkm/subdev/pci/base.c 
b/drm/nouveau/nvkm/subdev/pci/base.c
index d671dcf..95a8d05 100644
--- a/drm/nouveau/nvkm/subdev/pci/base.c
+++ b/drm/nouveau/nvkm/subdev/pci/base.c
@@ -117,6 +117,9 @@ nvkm_pci_init(struct nvkm_subdev *subdev)
ret = nvkm_agp_init(pci);
if (ret)
return ret;
+   } else {
+   if (pci_is_pcie(pci->pdev))
+   nvkm_pcie_init(pci);
}
 
if (pci->func->init)
@@ -160,6 +163,8 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct 
nvkm_device *device,
pci->func = func;
pci->pdev = device->func->pci(device)->pdev;
pci->irq = -1;
+   pci->pcie.last_speed = -1;
+   pci->pcie.last_width = -1;
 
if (device->type == NVKM_DEVICE_AGP)
nvkm_agp_ctor(pci);
diff --git a/drm/nouveau/nvkm/subdev/pci/pcie.c 
b/drm/nouveau/nvkm/subdev/pci/pcie.c
new file mode 100644
index 000..e60d0ba
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/pcie.c
@@ -0,0 +1,165 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Karol Herbst 
+ */
+#include "priv.h"
+
+static char *pcie_speed_strings[] = {
+   "2.5GT/s",
+   "5.0GT/s",
+   "8.0GT/s",
+};
+
+static enum nvkm_pcie_speed
+pci_bus_speed_to_nvkm_pcie_speed(enum pci_bus_speed speed)
+{
+   switch (speed) {
+   case PCIE_SPEED_2_5GT:
+   return NVKM_PCIE_SPEED_2_5;
+   case PCIE_SPEED_5_0GT:
+   return NVKM_PCIE_SPEED_5_0;
+   case PCIE_SPEED_8_0GT:
+   return NVKM_PCIE_SPEED_8_0;
+   default:
+   /* XXX 0x16 is 8_0, assume 0x17 will be 16_0 for now */
+   if (speed == 0x17)
+   return NVKM_PCIE_SPEED_8_0;
+   return -1;
+   }
+}
+
+static s8
+nvkm_pci_get_pcie_version(struct nvkm_pci *pci)
+{
+   if 

[Nouveau] [PATCH v3 7/9] bios/perf: parse the pci speed from the bios for tesla and newer cards

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/bios/perf.h |  2 ++
 drm/nouveau/nvkm/subdev/bios/perf.c | 16 
 2 files changed, 18 insertions(+)

diff --git a/drm/nouveau/include/nvkm/subdev/bios/perf.h 
b/drm/nouveau/include/nvkm/subdev/bios/perf.h
index 7cc2bec..d3bd250 100644
--- a/drm/nouveau/include/nvkm/subdev/bios/perf.h
+++ b/drm/nouveau/include/nvkm/subdev/bios/perf.h
@@ -13,6 +13,8 @@ struct nvbios_perfE {
u32 vdec;
u32 disp;
u32 script;
+   u8  pcie_speed;
+   u8  pcie_width;
 };
 
 u16 nvbios_perf_entry(struct nvkm_bios *, int idx,
diff --git a/drm/nouveau/nvkm/subdev/bios/perf.c 
b/drm/nouveau/nvkm/subdev/bios/perf.c
index aa7e33b..636bfb6 100644
--- a/drm/nouveau/nvkm/subdev/bios/perf.c
+++ b/drm/nouveau/nvkm/subdev/bios/perf.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 
 u16
 nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
@@ -145,6 +146,21 @@ nvbios_perfEp(struct nvkm_bios *bios, int idx,
break;
case 0x40:
info->voltage  = nvbios_rd08(bios, perf + 0x02);
+   switch (nvbios_rd08(bios, perf + 0xb) & 0x3) {
+   case 0:
+   info->pcie_speed = NVKM_PCIE_SPEED_5_0;
+   break;
+   case 3:
+   case 1:
+   info->pcie_speed = NVKM_PCIE_SPEED_2_5;
+   break;
+   case 2:
+   info->pcie_speed = NVKM_PCIE_SPEED_8_0;
+   break;
+   default:
+   break;
+   }
+   info->pcie_width = 0xff;
break;
default:
return 0x;
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v3 6/9] pci: implement PCIe speed change for kepler+

[Karol Herbst]

v2: rename functions
v3: remove pcie2 accessors

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/pci/gk104.c | 186 
 1 file changed, 186 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c 
b/drm/nouveau/nvkm/subdev/pci/gk104.c
index 458dd31..b752b6d 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -23,6 +23,187 @@
  */
 #include "priv.h"
 
+static int
+gk104_pcie_version_supported(struct nvkm_pci *pci)
+{
+   return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1;
+}
+
+static void
+gk104_pcie_set_cap_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   struct nvkm_device *device = pci->subdev.device;
+
+   switch (speed) {
+   case NVKM_PCIE_SPEED_2_5:
+   gf100_pcie_set_cap_speed(pci, false);
+   nvkm_mask(device, 0x8c1c0, 0x3, 0x1);
+   break;
+   case NVKM_PCIE_SPEED_5_0:
+   gf100_pcie_set_cap_speed(pci, true);
+   nvkm_mask(device, 0x8c1c0, 0x3, 0x2);
+   break;
+   case NVKM_PCIE_SPEED_8_0:
+   gf100_pcie_set_cap_speed(pci, true);
+   nvkm_mask(device, 0x8c1c0, 0x3, 0x3);
+   break;
+   }
+}
+
+static enum nvkm_pcie_speed
+gk104_pcie_cap_speed(struct nvkm_pci *pci)
+{
+   int speed = gf100_pcie_cap_speed(pci);
+   if (speed < 0)
+   return speed;
+
+   if (speed == 0)
+   return NVKM_PCIE_SPEED_2_5;
+
+   if (speed >= 1) {
+   int speed2 = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x3;
+   switch (speed2) {
+   case 0x0:
+   case 0x1:
+   return NVKM_PCIE_SPEED_2_5;
+   case 0x2:
+   return NVKM_PCIE_SPEED_5_0;
+   case 0x3:
+   return NVKM_PCIE_SPEED_8_0;
+   }
+   }
+   return -EINVAL;
+}
+
+static void
+gk104_pcie_set_lnkctl_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   u8 reg_v = 0;
+   switch (speed) {
+   case NVKM_PCIE_SPEED_2_5:
+   reg_v = 1;
+   break;
+   case NVKM_PCIE_SPEED_5_0:
+   reg_v = 2;
+   break;
+   case NVKM_PCIE_SPEED_8_0:
+   reg_v = 3;
+   break;
+   }
+   nvkm_pci_mask(pci, 0xa8, 0x3, reg_v);
+}
+
+static enum nvkm_pcie_speed
+gk104_pcie_lnkctl_speed(struct nvkm_pci *pci)
+{
+   u8 reg_v = nvkm_pci_rd32(pci, 0xa8) & 0x3;
+   switch (reg_v) {
+   case 0:
+   case 1:
+   return NVKM_PCIE_SPEED_2_5;
+   case 2:
+   return NVKM_PCIE_SPEED_5_0;
+   case 3:
+   return NVKM_PCIE_SPEED_8_0;
+   }
+   return -1;
+}
+
+static enum nvkm_pcie_speed
+gk104_pcie_max_speed(struct nvkm_pci *pci)
+{
+   u32 max_speed = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x30;
+   switch (max_speed) {
+   case 0x00:
+   return NVKM_PCIE_SPEED_8_0;
+   case 0x10:
+   return NVKM_PCIE_SPEED_5_0;
+   case 0x20:
+   return NVKM_PCIE_SPEED_2_5;
+   }
+   return NVKM_PCIE_SPEED_2_5;
+}
+
+static void
+gk104_pcie_set_link_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   u32 mask_value;
+
+   switch (speed) {
+   default:
+   case NVKM_PCIE_SPEED_2_5:
+   mask_value = 0x8;
+   break;
+   case NVKM_PCIE_SPEED_5_0:
+   mask_value = 0x4;
+   break;
+   case NVKM_PCIE_SPEED_8_0:
+   mask_value = 0x0;
+   break;
+   }
+   nvkm_mask(device, 0x8c040, 0xc, mask_value);
+   nvkm_mask(device, 0x8c040, 0x1, 0x1);
+}
+
+static int
+gk104_pcie_init(struct nvkm_pci * pci)
+{
+   if (!pci_is_pcie(pci->pdev))
+   return -ENODEV;
+
+   if (gf100_pcie_version(pci) > 1) {
+   enum nvkm_pcie_speed
+   lnkctl_speed = gk104_pcie_lnkctl_speed(pci),
+   max_speed = gk104_pcie_max_speed(pci),
+   cap_speed = gk104_pcie_cap_speed(pci);
+
+   if (cap_speed != max_speed) {
+   nvkm_debug(>subdev, "adjusting cap speed to max 
speed\n");
+   gk104_pcie_set_cap_speed(pci, max_speed);
+   cap_speed = gk104_pcie_cap_speed(pci);
+   if (cap_speed != max_speed)
+   nvkm_error(>subdev, "couldn't adjust cap 
speed\n");
+   }
+
+   if (lnkctl_speed != max_speed) {
+   nvkm_debug(>subdev,
+   "adjusting link control speed to max speed\n");
+   gk104_pcie_set_lnkctl_speed(pci, 

[Nouveau] [PATCH v3 8/9] perf: add fields for pci speed and width and use it for the pstates

[Karol Herbst]

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/clk.h | 3 +++
 drm/nouveau/nvkm/subdev/clk/base.c| 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drm/nouveau/include/nvkm/subdev/clk.h 
b/drm/nouveau/include/nvkm/subdev/clk.h
index 8708f0a..e9c4a81 100644
--- a/drm/nouveau/include/nvkm/subdev/clk.h
+++ b/drm/nouveau/include/nvkm/subdev/clk.h
@@ -2,6 +2,7 @@
 #define __NVKM_CLK_H__
 #include 
 #include 
+#include 
 struct nvbios_pll;
 struct nvkm_pll_vals;
 
@@ -59,6 +60,8 @@ struct nvkm_pstate {
struct nvkm_cstate base;
u8 pstate;
u8 fanspeed;
+   enum nvkm_pcie_speed pcie_speed;
+   u8 pcie_width;
 };
 
 struct nvkm_domain {
diff --git a/drm/nouveau/nvkm/subdev/clk/base.c 
b/drm/nouveau/nvkm/subdev/clk/base.c
index b7d82a4..7ae4f26 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -330,6 +330,8 @@ nvkm_pstate_new(struct nvkm_clk *clk, int idx)
 
pstate->pstate = perfE.pstate;
pstate->fanspeed = perfE.fanspeed;
+   pstate->pcie_speed = perfE.pcie_speed;
+   pstate->pcie_width = perfE.pcie_width;
cstate->voltage = perfE.voltage;
cstate->domain[nv_clk_src_core] = perfE.core;
cstate->domain[nv_clk_src_shader] = perfE.shader;
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v3 4/9] pci: implement pcie speed change for tesla

[Karol Herbst]

v2: rename functions and simplify init
v3: give g84/6 their own implementation

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/pci/g84.c   | 97 +
 drm/nouveau/nvkm/subdev/pci/g94.c   | 18 +++
 drm/nouveau/nvkm/subdev/pci/gf100.c |  5 ++
 drm/nouveau/nvkm/subdev/pci/gf106.c |  5 ++
 drm/nouveau/nvkm/subdev/pci/gk104.c |  2 +
 drm/nouveau/nvkm/subdev/pci/priv.h  | 10 
 6 files changed, 137 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c 
b/drm/nouveau/nvkm/subdev/pci/g84.c
index 3faa6bf..521f9c2 100644
--- a/drm/nouveau/nvkm/subdev/pci/g84.c
+++ b/drm/nouveau/nvkm/subdev/pci/g84.c
@@ -25,6 +25,86 @@
 
 #include 
 
+static int
+g84_pcie_version_supported(struct nvkm_pci *pci)
+{
+   /* g84 and g86 report wrong information about what they support */
+   return 1;
+}
+
+int
+g84_pcie_version(struct nvkm_pci *pci)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   return (nvkm_rd32(device, 0x00154c) & 0x1) + 1;
+}
+
+void
+g84_pcie_set_version(struct nvkm_pci *pci, u8 ver)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   nvkm_mask(device, 0x00154c, 0x1, (ver >= 2 ? 0x1 : 0x0));
+}
+
+static void
+g84_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   nvkm_mask(device, 0x00154c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+enum nvkm_pcie_speed
+g84_pcie_cur_speed(struct nvkm_pci *pci)
+{
+   u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x3;
+   switch (reg_v) {
+   case 0x3:
+   return NVKM_PCIE_SPEED_8_0;
+   case 0x2:
+   return NVKM_PCIE_SPEED_5_0;
+   case 0x1:
+   default:
+   return NVKM_PCIE_SPEED_2_5;
+   }
+}
+
+enum nvkm_pcie_speed
+g84_pcie_max_speed(struct nvkm_pci *pci)
+{
+   u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300;
+   if (reg_v == 0x2200)
+   return NVKM_PCIE_SPEED_5_0;
+   return NVKM_PCIE_SPEED_2_5;
+}
+
+void
+g84_pcie_set_link_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+   u32 mask_value;
+
+   if (speed == NVKM_PCIE_SPEED_5_0)
+   mask_value = 0x20;
+   else
+   mask_value = 0x10;
+
+   nvkm_pci_mask(pci, 0x460, 0x30, mask_value);
+   nvkm_pci_mask(pci, 0x460, 0x1, 0x1);
+}
+
+int
+g84_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed,
+   u8 req_width)
+{
+   if (req_speed == NVKM_PCIE_SPEED_5_0)
+   g84_pcie_set_cap_speed(pci, true);
+   else
+   g84_pcie_set_cap_speed(pci, false);
+
+   g84_pcie_set_link_speed(pci, req_speed);
+
+   return 0;
+}
+
 void
 g84_pci_init(struct nvkm_pci *pci)
 {
@@ -48,6 +128,13 @@ g84_pci_init(struct nvkm_pci *pci)
nvkm_pci_mask(pci, 0x041c, 0x0060, 0x);
 }
 
+int
+g84_pcie_init(struct nvkm_pci *pci)
+{
+   g84_pcie_set_cap_speed(pci, g84_pcie_cur_speed(pci) == 
NVKM_PCIE_SPEED_5_0);
+   return 0;
+}
+
 static const struct nvkm_pci_func
 g84_pci_func = {
.init = g84_pci_init,
@@ -55,6 +142,16 @@ g84_pci_func = {
.wr08 = nv40_pci_wr08,
.wr32 = nv40_pci_wr32,
.msi_rearm = nv46_pci_msi_rearm,
+
+   .pcie.init = g84_pcie_init,
+   .pcie.set_link = g84_pcie_set_link,
+
+   .pcie.max_speed = g84_pcie_max_speed,
+   .pcie.cur_speed = g84_pcie_cur_speed,
+
+   .pcie.set_version = g84_pcie_set_version,
+   .pcie.version = g84_pcie_version,
+   .pcie.version_supported = g84_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/g94.c 
b/drm/nouveau/nvkm/subdev/pci/g94.c
index cd311ee..4344412 100644
--- a/drm/nouveau/nvkm/subdev/pci/g94.c
+++ b/drm/nouveau/nvkm/subdev/pci/g94.c
@@ -23,6 +23,14 @@
  */
 #include "priv.h"
 
+int
+g94_pcie_version_supported(struct nvkm_pci *pci)
+{
+   if ((nvkm_pci_rd32(pci, 0x460) & 0x200) == 0x200)
+   return 2;
+   return 1;
+}
+
 static const struct nvkm_pci_func
 g94_pci_func = {
.init = g84_pci_init,
@@ -30,6 +38,16 @@ g94_pci_func = {
.wr08 = nv40_pci_wr08,
.wr32 = nv40_pci_wr32,
.msi_rearm = nv40_pci_msi_rearm,
+
+   .pcie.init = g84_pcie_init,
+   .pcie.set_link = g84_pcie_set_link,
+
+   .pcie.max_speed = g84_pcie_max_speed,
+   .pcie.cur_speed = g84_pcie_cur_speed,
+
+   .pcie.set_version = g84_pcie_set_version,
+   .pcie.version = g84_pcie_version,
+   .pcie.version_supported = g94_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c 
b/drm/nouveau/nvkm/subdev/pci/gf100.c
index 25e1ae7..5e57c0b 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -36,6 +36,11 @@ gf100_pci_func = {
.wr08 = nv40_pci_wr08,
.wr32 = nv40_pci_wr32,
.msi_rearm = gf100_pci_msi_rearm,

[Nouveau] [PATCH v3 1/9] pci: add gk104 variant

[Karol Herbst]

v2: change email used in header

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/pci.h |  1 +
 drm/nouveau/nvkm/engine/device/base.c | 20 +-
 drm/nouveau/nvkm/subdev/pci/Kbuild|  1 +
 drm/nouveau/nvkm/subdev/pci/gk104.c   | 38 +++
 4 files changed, 50 insertions(+), 10 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gk104.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h 
b/drm/nouveau/include/nvkm/subdev/pci.h
index fee0a97..1cf5f72 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -34,4 +34,5 @@ int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci 
**);
 int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 #endif
diff --git a/drm/nouveau/nvkm/engine/device/base.c 
b/drm/nouveau/nvkm/engine/device/base.c
index 439c003..9c10c84 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1669,7 +1669,7 @@ nve4_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1706,7 +1706,7 @@ nve6_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1743,7 +1743,7 @@ nve7_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk104_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1804,7 +1804,7 @@ nvf0_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk110_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1840,7 +1840,7 @@ nvf1_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk110_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1876,7 +1876,7 @@ nv106_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk208_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1912,7 +1912,7 @@ nv108_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gk208_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
@@ -1948,7 +1948,7 @@ nv117_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.therm = gm107_therm_new,
.timer = gk20a_timer_new,
@@ -1979,7 +1979,7 @@ nv124_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.timer = gk20a_timer_new,
.volt = gk104_volt_new,
@@ -2010,7 +2010,7 @@ nv126_chipset = {
.mc = gk20a_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gk104_pci_new,
.pmu = gm107_pmu_new,
.timer = gk20a_timer_new,
.volt = gk104_volt_new,
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild 
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 4476ef7..1a29869 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -7,3 +7,4 @@ nvkm-y += nvkm/subdev/pci/nv4c.o
 nvkm-y += nvkm/subdev/pci/g84.o
 nvkm-y += nvkm/subdev/pci/g94.o
 nvkm-y += nvkm/subdev/pci/gf100.o
+nvkm-y += nvkm/subdev/pci/gk104.o
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c 
b/drm/nouveau/nvkm/subdev/pci/gk104.c
new file mode 100644
index 000..6119f89
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the 

[Nouveau] [PATCH v3 5/9] pci: implement pcie speed change on Fermi

[Karol Herbst]

v2: rename functions and simplify code a little

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/pci/gf100.c | 59 +
 drm/nouveau/nvkm/subdev/pci/gf106.c |  5 
 drm/nouveau/nvkm/subdev/pci/gk104.c |  3 ++
 drm/nouveau/nvkm/subdev/pci/priv.h  |  7 +
 4 files changed, 74 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c 
b/drm/nouveau/nvkm/subdev/pci/gf100.c
index 5e57c0b..cfc866e 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -29,6 +29,60 @@ gf100_pci_msi_rearm(struct nvkm_pci *pci)
nvkm_pci_wr08(pci, 0x0704, 0xff);
 }
 
+void
+gf100_pcie_set_version(struct nvkm_pci *pci, u8 ver)
+{
+   struct nvkm_device *device = pci->subdev.device;
+
+   if (ver > 1)
+   ver = 1;
+   else
+   ver = 0;
+
+   nvkm_mask(device, 0x02241c, 0x1, ver);
+}
+
+int
+gf100_pcie_version(struct nvkm_pci *pci)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   return (nvkm_rd32(device, 0x02241c) & 0x1) + 1;
+}
+
+void
+gf100_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   nvkm_mask(device, 0x02241c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+int
+gf100_pcie_cap_speed(struct nvkm_pci *pci)
+{
+   struct nvkm_device *device = pci->subdev.device;
+   u8 punits_pci_cap_speed = nvkm_rd32(device, 0x02241c) & 0x80;
+   if (punits_pci_cap_speed == 0x80)
+   return 1;
+   return 0;
+}
+
+int
+gf100_pcie_init(struct nvkm_pci *pci)
+{
+   gf100_pcie_set_cap_speed(pci,
+   g84_pcie_cur_speed(pci) == NVKM_PCIE_SPEED_5_0);
+   return 0;
+}
+
+int
+gf100_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed,
+   u8 req_width)
+{
+   gf100_pcie_set_cap_speed(pci, req_speed == NVKM_PCIE_SPEED_5_0);
+   g84_pcie_set_link_speed(pci, req_speed);
+   return 0;
+}
+
 static const struct nvkm_pci_func
 gf100_pci_func = {
.init = g84_pci_init,
@@ -37,9 +91,14 @@ gf100_pci_func = {
.wr32 = nv40_pci_wr32,
.msi_rearm = gf100_pci_msi_rearm,
 
+   .pcie.init = gf100_pcie_init,
+   .pcie.set_link = gf100_pcie_set_link,
+
.pcie.max_speed = g84_pcie_max_speed,
.pcie.cur_speed = g84_pcie_cur_speed,
 
+   .pcie.set_version = gf100_pcie_set_version,
+   .pcie.version = gf100_pcie_version,
.pcie.version_supported = g94_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c 
b/drm/nouveau/nvkm/subdev/pci/gf106.c
index 994cdfd..440d81b 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf106.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -30,9 +30,14 @@ gf106_pci_func = {
.wr32 = nv40_pci_wr32,
.msi_rearm = nv40_pci_msi_rearm,
 
+   .pcie.init = gf100_pcie_init,
+   .pcie.set_link = gf100_pcie_set_link,
+
.pcie.max_speed = g84_pcie_max_speed,
.pcie.cur_speed = g84_pcie_cur_speed,
 
+   .pcie.set_version = gf100_pcie_set_version,
+   .pcie.version = gf100_pcie_version,
.pcie.version_supported = g94_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c 
b/drm/nouveau/nvkm/subdev/pci/gk104.c
index af79d9b..458dd31 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -31,6 +31,9 @@ gk104_pci_func = {
.msi_rearm = nv40_pci_msi_rearm,
 
.pcie.cur_speed = g84_pcie_cur_speed,
+
+   .pcie.set_version = gf100_pcie_set_version,
+   .pcie.version = gf100_pcie_version,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h 
b/drm/nouveau/nvkm/subdev/pci/priv.h
index ea496aa..cac279a 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -46,5 +46,12 @@ int g84_pcie_set_link(struct nvkm_pci *, enum 
nvkm_pcie_speed, u8);
 
 int g94_pcie_version_supported(struct nvkm_pci *);
 
+void gf100_pcie_set_version(struct nvkm_pci *, u8);
+int gf100_pcie_version(struct nvkm_pci *);
+void gf100_pcie_set_cap_speed(struct nvkm_pci *, bool);
+int gf100_pcie_cap_speed(struct nvkm_pci *);
+int gf100_pcie_init(struct nvkm_pci *);
+int gf100_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
+
 int nvkm_pcie_init(struct nvkm_pci *pci);
 #endif
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v3 2/9] pci: add gf106 variant

[Karol Herbst]

v2: change email used in header

Signed-off-by: Karol Herbst 
---
 drm/nouveau/include/nvkm/subdev/pci.h |  1 +
 drm/nouveau/nvkm/engine/device/base.c | 10 -
 drm/nouveau/nvkm/subdev/pci/Kbuild|  1 +
 drm/nouveau/nvkm/subdev/pci/gf106.c   | 38 +++
 4 files changed, 45 insertions(+), 5 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gf106.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h 
b/drm/nouveau/include/nvkm/subdev/pci.h
index 1cf5f72..17fe7b7 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -34,5 +34,6 @@ int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci 
**);
 int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 #endif
diff --git a/drm/nouveau/nvkm/engine/device/base.c 
b/drm/nouveau/nvkm/engine/device/base.c
index 9c10c84..653da48 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1388,7 +1388,7 @@ nvc1_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1423,7 +1423,7 @@ nvc3_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1566,7 +1566,7 @@ nvcf_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf100_pmu_new,
.therm = gt215_therm_new,
.timer = nv41_timer_new,
@@ -1601,7 +1601,7 @@ nvd7_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.ce[0] = gf100_ce_new,
@@ -1634,7 +1634,7 @@ nvd9_chipset = {
.mc = gf100_mc_new,
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
-   .pci = g94_pci_new,
+   .pci = gf106_pci_new,
.pmu = gf119_pmu_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild 
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 1a29869..724afd4 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -7,4 +7,5 @@ nvkm-y += nvkm/subdev/pci/nv4c.o
 nvkm-y += nvkm/subdev/pci/g84.o
 nvkm-y += nvkm/subdev/pci/g94.o
 nvkm-y += nvkm/subdev/pci/gf100.o
+nvkm-y += nvkm/subdev/pci/gf106.o
 nvkm-y += nvkm/subdev/pci/gk104.o
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c 
b/drm/nouveau/nvkm/subdev/pci/gf106.c
new file mode 100644
index 000..82d8c27
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Karol Herbst 
+ */
+#include "priv.h"
+
+static const struct nvkm_pci_func
+gf106_pci_func = {
+   .rd32 = nv40_pci_rd32,
+   .wr08 = nv40_pci_wr08,
+   .wr32 = nv40_pci_wr32,
+   .msi_rearm = nv40_pci_msi_rearm,
+};
+
+int
+gf106_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
+{
+   return nvkm_pci_new_(_pci_func, device, index, ppci);
+}
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org

[Nouveau] [PATCH v3 0/9] PCIEs speed change

[Karol Herbst]

I hope now the final revison of that patch series.

I've taken care of 2 out of 3 comments from ben.

I left the set_link and set_version name this way, because I can't figure any
better name and because they are always used with pcie. in front, so they
should fit in nice

Ben: if you are strong about that, I can change that, but I really want better
names then.

Karol Herbst (9):
  pci: add gk104 variant
  pci: add gf106 variant
  pci: implement generic code for PCIe speed change
  pci: implement pcie speed change for tesla
  pci: implement pcie speed change on Fermi
  pci: implement PCIe speed change for kepler+
  bios/perf: parse the pci speed from the bios for tesla and newer cards
  perf: add fields for pci speed and width and use it for the pstates
  perf: change pcie speed on pstate change

 drm/nouveau/include/nvkm/subdev/bios/perf.h |   2 +
 drm/nouveau/include/nvkm/subdev/clk.h   |   3 +
 drm/nouveau/include/nvkm/subdev/pci.h   |  16 ++
 drm/nouveau/nvkm/engine/device/base.c   |  30 ++--
 drm/nouveau/nvkm/subdev/bios/perf.c |  16 ++
 drm/nouveau/nvkm/subdev/clk/base.c  |   6 +
 drm/nouveau/nvkm/subdev/pci/Kbuild  |   3 +
 drm/nouveau/nvkm/subdev/pci/base.c  |   5 +
 drm/nouveau/nvkm/subdev/pci/g84.c   |  97 
 drm/nouveau/nvkm/subdev/pci/g94.c   |  18 +++
 drm/nouveau/nvkm/subdev/pci/gf100.c |  64 
 drm/nouveau/nvkm/subdev/pci/gf106.c |  48 ++
 drm/nouveau/nvkm/subdev/pci/gk104.c | 229 
 drm/nouveau/nvkm/subdev/pci/pcie.c  | 165 
 drm/nouveau/nvkm/subdev/pci/priv.h  |  32 
 15 files changed, 719 insertions(+), 15 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gf106.c
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gk104.c
 create mode 100644 drm/nouveau/nvkm/subdev/pci/pcie.c

-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v3 9/9] perf: change pcie speed on pstate change

[Karol Herbst]

v2: remove error and only set link for pcie devices

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/clk/base.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/clk/base.c 
b/drm/nouveau/nvkm/subdev/clk/base.c
index 7ae4f26..137e06f 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -176,6 +176,7 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
 {
struct nvkm_subdev *subdev = >subdev;
struct nvkm_ram *ram = subdev->device->fb->ram;
+   struct nvkm_pci *pci = subdev->device->pci;
struct nvkm_pstate *pstate;
int ret, idx = 0;
 
@@ -187,6 +188,9 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
nvkm_debug(subdev, "setting performance state %d\n", pstatei);
clk->pstate = pstatei;
 
+   if (pci && pci_is_pcie(pci->pdev))
+   nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width);
+
if (ram && ram->func->calc) {
int khz = pstate->base.domain[nv_clk_src_mem];
do {
-- 
2.6.1

___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92307] G98: WARNING: ... at include/drm/drm_crtc.h:1577 drm_helper_choose_encoder_dpms+0x8a/0x90 [drm_kms_helper]()

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92307

--- Comment #5 from poma  ---
Created attachment 118863
  --> https://bugs.freedesktop.org/attachment.cgi?id=118863=edit
dmesg 4.3.0-0.rc5.git0.1.fc24.x86_64+debug & nouveau git on G98

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [PATCH v2] pll/gk104: fix PLL instability due to bad configuration with gddr5

[Karol Herbst]

this patch uses an approach closer to the nvidia driver to configure both PLLs
for high gddr5 memory clocks (usually above 2400MHz)

previously nouveau used the one PLL as it was used for the lower clocks and just
adjusted the second PLL to get as close as possible to the requested clock.
This means for my card, that I got a 4050 MHz clock allthough 4008 MHz was
requested.

now the driver iterates over a list of PLL configuration also used by the
nvidia driver and then adjust the second PLL to get near the requested clock.
Also it hold to some restriction I found while analyzing the PLL configurations

This won't fix all gddr5 high clock issues itself, but it should be fine on
hybrid gpu systems as found on many laptops these days. Also switching while
normal desktop usage should be a lot more stable than before.

v2: move the pll code into ramgk104

Signed-off-by: Karol Herbst 
---
 drm/nouveau/nvkm/subdev/fb/ramgk104.c | 100 ++
 1 file changed, 77 insertions(+), 23 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/fb/ramgk104.c 
b/drm/nouveau/nvkm/subdev/fb/ramgk104.c
index 9893556..48d833b 100644
--- a/drm/nouveau/nvkm/subdev/fb/ramgk104.c
+++ b/drm/nouveau/nvkm/subdev/fb/ramgk104.c
@@ -945,6 +945,67 @@ gk104_ram_calc_data(struct gk104_ram *ram, u32 khz, struct 
nvkm_ram_data *data)
 }
 
 static int
+gt215_calc_pll_output(int fN, int M, int N, int P, int clk)
+{
+   return ((clk * N) + (((u16)(fN + 4096) * clk) >> 13)) / (M * P);
+}
+
+static int
+gk104_pll_calc_hiclk(int target_khz, int crystal,
+   int *N1, int *fN1, int *M1, int *P1,
+   int *N2, int *M2, int *P2)
+{
+   int best_clk = 0, best_err = target_khz, p_ref, n_ref;
+   bool upper = false;
+
+   *M1 = 1;
+   /* M has to be 1, otherwise it gets unstable */
+   *M2 = 1;
+   /* can be 1 or 2, sticking with 1 for simplicity */
+   *P2 = 1;
+
+   for (p_ref = 0x7; p_ref >= 0x5; --p_ref) {
+   for (n_ref = 0x25; n_ref <= 0x2b; ++n_ref) {
+   int cur_N, cur_clk, cur_err;
+
+   cur_clk = gt215_calc_pll_output(0, 1, n_ref, p_ref, 
crystal);
+   cur_N = target_khz / cur_clk;
+   cur_err = target_khz
+   - gt215_calc_pll_output(0xf000, 1, cur_N, 1, 
cur_clk);
+
+   /* we found a better combination */
+   if (cur_err < best_err) {
+   best_err = cur_err;
+   best_clk = cur_clk;
+   *N2 = cur_N;
+   *N1 = n_ref;
+   *P1 = p_ref;
+   upper = false;
+   }
+
+   cur_N += 1;
+   cur_err = gt215_calc_pll_output(0xf000, 1, cur_N, 1, 
cur_clk)
+   - target_khz;
+   if (cur_err < best_err) {
+   best_err = cur_err;
+   best_clk = cur_clk;
+   *N2 = cur_N;
+   *N1 = n_ref;
+   *P1 = p_ref;
+   upper = true;
+   }
+   }
+   }
+
+   /* adjust fN to get closer to the target clock */
+   *fN1 = (u16)best_err / *N2 * *P2) * (*P1 * *M1)) << 13) / crystal);
+   if (upper)
+   *fN1 = (u16)(1 - *fN1);
+
+   return gt215_calc_pll_output(*fN1, 1, *N1, *P1, crystal);
+}
+
+static int
 gk104_ram_calc_xits(struct gk104_ram *ram, struct nvkm_ram_data *next)
 {
struct gk104_ramfuc *fuc = >fuc;
@@ -968,31 +1029,24 @@ gk104_ram_calc_xits(struct gk104_ram *ram, struct 
nvkm_ram_data *next)
 * kepler boards, no idea how/why they're chosen.
 */
refclk = next->freq;
-   if (ram->mode == 2)
-   refclk = fuc->mempll.refclk;
-
-   /* calculate refpll coefficients */
-   ret = gt215_pll_calc(subdev, >refpll, refclk, >N1,
->fN1, >M1, >P1);
-   fuc->mempll.refclk = ret;
-   if (ret <= 0) {
-   nvkm_error(subdev, "unable to calc refpll\n");
-   return -EINVAL;
-   }
-
-   /* calculate mempll coefficients, if we're using it */
if (ram->mode == 2) {
-   /* post-divider doesn't work... the reg takes the values but
-* appears to completely ignore it.  there *is* a bit at
-* bit 28 that appears to divide the clock by 2 if set.
-*/
-   fuc->mempll.min_p = 1;
-   fuc->mempll.max_p = 2;
-
-   ret = gt215_pll_calc(subdev, >mempll, next->freq,
->N2, NULL, >M2, >P2);
+   ret = gk104_pll_calc_hiclk(next->freq, subdev->device->crystal,
+   

[Nouveau] [Bug 92307] NV50: WARNING: ... at include/drm/drm_crtc.h:1577 drm_helper_choose_encoder_dpms+0x8a/0x90 [drm_kms_helper]()

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92307

--- Comment #4 from poma  ---
(In reply to Stefan Huehner from comment #3)
> Seeing same here when 'switching off' and 'on' again hdmi display connected
> to a gm206


Goes - both, S3 RESUME and disable/enable the output will induce these
warnings, ...

$ xrandr --output DVI-I-1 --off ; xrandr --auto
$ xrandr --display :0
...
DVI-I-1 connected 1920x1080+0+0 ...
...

... with one behavioural exception - after xrandr OFF/ON routine, the mouse
cursor is visible and motile, but the rest of the screen is as blanked.

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

[Nouveau] [Bug 92307] G98: WARNING: ... at include/drm/drm_crtc.h:1577 drm_helper_choose_encoder_dpms+0x8a/0x90 [drm_kms_helper]()

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92307

poma  changed:

   What|Removed |Added

Summary|NV50: WARNING: ... at   |G98: WARNING: ... at
   |include/drm/drm_crtc.h:1577 |include/drm/drm_crtc.h:1577
   |drm_helper_choose_encoder_d |drm_helper_choose_encoder_d
   |pms+0x8a/0x90   |pms+0x8a/0x90
   |[drm_kms_helper]()  |[drm_kms_helper]()

-- 
You are receiving this mail because:
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau

Re: [Nouveau] [PATCH] pll/gk104: fix PLL instability due to bad configuration with gddr5

[Ben Skeggs]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 10/13/2015 06:18 AM, Karol Herbst wrote:
> this patch uses an approach closer to the nvidia driver to 
> configure both PLLs for high gddr5 memory clocks (usually above 
> 2400MHz)
> 
> previously nouveau used the one PLL as it was used for the lower 
> clocks and just adjusted the second PLL to get as close as possible
> to the requested clock. This means for my card, that I got a 4050
> MHz clock allthough 4008 MHz was requested.
> 
> now the driver iterates over a list of PLL configuration also used
>  by the nvidia driver and then adjust the second PLL to get near 
> the requested clock. Also it hold to some restriction I found while
> analyzing the PLL configurations
> 
> This won't fix all gddr5 high clock issues itself, but it should be
> fine on hybrid gpu systems as found on many laptops these days. 
> Also switching while normal desktop usage should be a lot more 
> stable than before.
Given that we really have no better ideas right now, I think the patch
is basically fine.

I think though, that given these PLLs are limited to FB, that you may
as well just stick the code in subdev/fb/ramgk104.c and be done with
it, there's no need for it to live in subdev/clk at all.

Ben.

> 
> Signed-off-by: Karol Herbst  --- 
> drm/nouveau/nvkm/subdev/clk/Kbuild |  1 + 
> drm/nouveau/nvkm/subdev/clk/pll.h  |  5 +++ 
> drm/nouveau/nvkm/subdev/clk/pllgk104.c | 77 
> ++ 
> drm/nouveau/nvkm/subdev/clk/pllgt215.c |  6 +++ 
> drm/nouveau/nvkm/subdev/fb/ramgk104.c  | 39 +++-- 5 
> files changed, 105 insertions(+), 23 deletions(-) create mode 
> 100644 drm/nouveau/nvkm/subdev/clk/pllgk104.c
> 
> diff --git a/drm/nouveau/nvkm/subdev/clk/Kbuild 
> b/drm/nouveau/nvkm/subdev/clk/Kbuild index ed7717b..5ac23fe 100644 
> --- a/drm/nouveau/nvkm/subdev/clk/Kbuild +++ 
> b/drm/nouveau/nvkm/subdev/clk/Kbuild @@ -11,3 +11,4 @@ nvkm-y += 
> nvkm/subdev/clk/gk20a.o
> 
> nvkm-y += nvkm/subdev/clk/pllnv04.o nvkm-y += 
> nvkm/subdev/clk/pllgt215.o +nvkm-y += nvkm/subdev/clk/pllgk104.o 
> diff --git a/drm/nouveau/nvkm/subdev/clk/pll.h 
> b/drm/nouveau/nvkm/subdev/clk/pll.h index 44020a3..1f5e0a0 100644 
> --- a/drm/nouveau/nvkm/subdev/clk/pll.h +++ 
> b/drm/nouveau/nvkm/subdev/clk/pll.h @@ -4,8 +4,13 @@ struct 
> nvkm_subdev; struct nvbios_pll;
> 
> +int calc_pll_clock(int fN, int M, int N, int P, int clk); + int 
> nv04_pll_calc(struct nvkm_subdev *, struct nvbios_pll *, u32 freq, 
> int *N1, int *M1, int *N2, int *M2, int *P); int 
> gt215_pll_calc(struct nvkm_subdev *, struct nvbios_pll *, u32
> freq, int *N, int *fN, int *M, int *P); +int
> gk104_pll_calc_hiclk(int target_khz, int crystal, +   int *N1, int
> *fN1, int *M1, int *P1, + int *N2, int *M2, int *P2); #endif diff
> --git a/drm/nouveau/nvkm/subdev/clk/pllgk104.c 
> b/drm/nouveau/nvkm/subdev/clk/pllgk104.c new file mode 100644 index
> 000..4863e64 --- /dev/null +++ 
> b/drm/nouveau/nvkm/subdev/clk/pllgk104.c @@ -0,0 +1,77 @@ +/* + * 
> Copyright 2015 Karol Herbst + * + * Permission is hereby granted, 
> free of charge, to any person obtaining a + * copy of this software
> and associated documentation files (the "Software"), + * to deal in
> the Software without restriction, including without limitation + *
> the rights to use, copy, modify, merge, publish, distribute,
> sublicense, + * and/or sell copies of the Software, and to permit
> persons to whom the + * Software is furnished to do so, subject to
> the following conditions: + * + * The above copyright notice and
> this permission notice shall be included in + * all copies or
> substantial portions of the Software. + * + * THE SOFTWARE IS
> PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + *
> IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
> MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND 
> NONINFRINGEMENT.  IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR
>  AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY,
>  WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING 
> FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * 
> OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Karol Herbst + */ 
> +#include "pll.h" + +int +gk104_pll_calc_hiclk(int target_khz, int
> crystal, +int *N1, int *fN1, int *M1, int *P1, +  int 
> *N2, int
> *M2, int *P2) +{ +int best_clk = 0, best_err = target_khz, p_ref,
> n_ref; +  bool upper = false; + + *M1 = 1; +  /* M has to be 1,
> otherwise it gets unstable */ +   *M2 = 1; +  /* can be 1 or 2, 
> sticking with 1 for simplicity */ +   *P2 = 1; + +for (p_ref = 0x7;
>  p_ref >= 0x5; --p_ref) { +   for (n_ref = 0x25; n_ref <= 0x2b; 
> ++n_ref) { +  int cur_N, cur_clk, cur_err; + +
> cur_clk = 
> calc_pll_clock(0, 1, n_ref, p_ref, crystal); +cur_N = 
> target_khz
> / 

Re: [Nouveau] [PATCH v2 3/9] pci: implement generic code for PCIe speed change

[Ben Skeggs]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 10/13/2015 07:44 PM, Karol Herbst wrote:
> v2: rename and group functions
> 
> Signed-off-by: Karol Herbst  --- 
> drm/nouveau/include/nvkm/subdev/pci.h |  14 +++ 
> drm/nouveau/nvkm/subdev/pci/Kbuild|   1 + 
> drm/nouveau/nvkm/subdev/pci/base.c|   5 ++ 
> drm/nouveau/nvkm/subdev/pci/pcie.c| 165
> ++ 
> drm/nouveau/nvkm/subdev/pci/priv.h|  15  5 files changed,
> 200 insertions(+) create mode 100644
> drm/nouveau/nvkm/subdev/pci/pcie.c
> 
> diff --git a/drm/nouveau/include/nvkm/subdev/pci.h
> b/drm/nouveau/include/nvkm/subdev/pci.h index 17fe7b7..ab9d5cc
> 100644 --- a/drm/nouveau/include/nvkm/subdev/pci.h +++
> b/drm/nouveau/include/nvkm/subdev/pci.h @@ -2,6 +2,12 @@ #define
> __NVKM_PCI_H__ #include 
> 
> +enum nvkm_pcie_speed { + NVKM_PCIE_SPEED_2_5, +
> NVKM_PCIE_SPEED_5_0, +NVKM_PCIE_SPEED_8_0, +}; + struct nvkm_pci
> { const struct nvkm_pci_func *func; struct nvkm_subdev subdev; @@
> -18,6 +24,11 @@ struct nvkm_pci { bool acquired; } agp;
> 
> + struct { +  enum nvkm_pcie_speed last_speed; +  
> u8 last_width; +
> } pcie; + bool msi; };
> 
> @@ -36,4 +47,7 @@ int g94_pci_new(struct nvkm_device *, int, struct
> nvkm_pci **); int gf100_pci_new(struct nvkm_device *, int, struct
> nvkm_pci **); int gf106_pci_new(struct nvkm_device *, int, struct
> nvkm_pci **); int gk104_pci_new(struct nvkm_device *, int, struct
> nvkm_pci **); + +/* pcie functions */ +int
> nvkm_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8
> width); #endif diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild
> b/drm/nouveau/nvkm/subdev/pci/Kbuild index 724afd4..3c2519f 100644 
> --- a/drm/nouveau/nvkm/subdev/pci/Kbuild +++
> b/drm/nouveau/nvkm/subdev/pci/Kbuild @@ -1,5 +1,6 @@ nvkm-y +=
> nvkm/subdev/pci/agp.o nvkm-y += nvkm/subdev/pci/base.o +nvkm-y +=
> nvkm/subdev/pci/pcie.o nvkm-y += nvkm/subdev/pci/nv04.o nvkm-y +=
> nvkm/subdev/pci/nv40.o nvkm-y += nvkm/subdev/pci/nv46.o diff --git
> a/drm/nouveau/nvkm/subdev/pci/base.c
> b/drm/nouveau/nvkm/subdev/pci/base.c index d671dcf..95a8d05 100644 
> --- a/drm/nouveau/nvkm/subdev/pci/base.c +++
> b/drm/nouveau/nvkm/subdev/pci/base.c @@ -117,6 +117,9 @@
> nvkm_pci_init(struct nvkm_subdev *subdev) ret =
> nvkm_agp_init(pci); if (ret) return ret; +} else { +  if
> (pci_is_pcie(pci->pdev)) +nvkm_pcie_init(pci); }
> 
> if (pci->func->init) @@ -160,6 +163,8 @@ nvkm_pci_new_(const struct
> nvkm_pci_func *func, struct nvkm_device *device, pci->func = func; 
> pci->pdev = device->func->pci(device)->pdev; pci->irq = -1; +
> pci->pcie.last_speed = -1; +  pci->pcie.last_width = -1;
> 
> if (device->type == NVKM_DEVICE_AGP) nvkm_agp_ctor(pci); diff --git
> a/drm/nouveau/nvkm/subdev/pci/pcie.c
> b/drm/nouveau/nvkm/subdev/pci/pcie.c new file mode 100644 index
> 000..e60d0ba --- /dev/null +++
> b/drm/nouveau/nvkm/subdev/pci/pcie.c @@ -0,0 +1,165 @@ +/* + *
> Copyright 2015 Karol Herbst + * + * Permission is hereby granted,
> free of charge, to any person obtaining a + * copy of this software
> and associated documentation files (the "Software"), + * to deal in
> the Software without restriction, including without limitation + *
> the rights to use, copy, modify, merge, publish, distribute,
> sublicense, + * and/or sell copies of the Software, and to permit
> persons to whom the + * Software is furnished to do so, subject to
> the following conditions: + * + * The above copyright notice and
> this permission notice shall be included in + * all copies or
> substantial portions of the Software. + * + * THE SOFTWARE IS
> PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + *
> IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND
> NONINFRINGEMENT.  IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR
> AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY,
> WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING
> FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + *
> OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Karol Herbst
>  + */ +#include "priv.h" + +static char
> *pcie_speed_strings[] = { +   "2.5GT/s", +"5.0GT/s", +"8.0GT/s", 
> +}; + +static enum nvkm_pcie_speed 
> +pci_bus_speed_to_nvkm_pcie_speed(enum pci_bus_speed speed) +{ +
> switch (speed) { +case PCIE_SPEED_2_5GT: +return
> NVKM_PCIE_SPEED_2_5; +case PCIE_SPEED_5_0GT: +return
> NVKM_PCIE_SPEED_5_0; +case PCIE_SPEED_8_0GT: +return
> NVKM_PCIE_SPEED_8_0; +default: +  /* XXX 0x16 is 8_0, 
> assume 0x17
> will be 16_0 for now */ + if (speed == 0x17) +
> return
> NVKM_PCIE_SPEED_8_0; +return -1; +} +} + +static s8 
> +nvkm_pci_get_pcie_version(struct nvkm_pci *pci) +{ + 

Re: [Nouveau] [PATCH v2 4/9] pci: implement pcie speed change for tesla

[Ben Skeggs]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 10/13/2015 07:44 PM, Karol Herbst wrote:
> v2: rename functions and simplify init
> 
> Signed-off-by: Karol Herbst  --- 
> drm/nouveau/nvkm/subdev/pci/g84.c   | 105
>  
> drm/nouveau/nvkm/subdev/pci/g94.c   |  10  
> drm/nouveau/nvkm/subdev/pci/gf100.c |   5 ++ 
> drm/nouveau/nvkm/subdev/pci/gf106.c |   5 ++ 
> drm/nouveau/nvkm/subdev/pci/gk104.c |   2 + 
> drm/nouveau/nvkm/subdev/pci/priv.h  |   9  6 files changed, 136
> insertions(+)
> 
> diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c
> b/drm/nouveau/nvkm/subdev/pci/g84.c index 3faa6bf..7a4e766 100644 
> --- a/drm/nouveau/nvkm/subdev/pci/g84.c +++
> b/drm/nouveau/nvkm/subdev/pci/g84.c @@ -25,6 +25,94 @@
> 
> #include 
> 
> +int +g84_pcie_version_supported(struct nvkm_pci *pci) +{ +   u32
> chipset = pci->subdev.device->chipset, reg_v; + + /* these cards
> report wrong information about what they support */ + if (chipset
> == 0x84 || chipset == 0x86) + return 1;
Give these chipsets their own implementation that just returns 1 for
this hook.

> + +   reg_v = nvkm_pci_rd32(pci, 0x460) & 0x200; +if (reg_v ==
> 0x200) +  return 2; + return 1; +} + +int 
> +g84_pcie_version(struct
> nvkm_pci *pci) +{ +   struct nvkm_device *device =
> pci->subdev.device; + return (nvkm_rd32(device, 0x00154c) & 0x1) +
> 1; +} + +void +g84_pcie_set_version(struct nvkm_pci *pci, u8 ver) 
> +{ +  struct nvkm_device *device = pci->subdev.device; +
> nvkm_mask(device, 0x00154c, 0x1, (ver >= 2 ? 0x1 : 0x0)); +} + 
> +static void +g84_pcie_set_cap_speed(struct nvkm_pci *pci, bool
> full_speed) +{ +  struct nvkm_device *device = pci->subdev.device; +
> nvkm_mask(device, 0x00154c, 0x80, full_speed ? 0x80 : 0x0); +} + 
> +enum nvkm_pcie_speed +g84_pcie_cur_speed(struct nvkm_pci *pci) +{ 
> + u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x3; +   switch (reg_v)
> { +   case 0x3: + return NVKM_PCIE_SPEED_8_0; +   
> case
> 0x2: +return NVKM_PCIE_SPEED_5_0; +   case 
> 0x1: +
> default: +return NVKM_PCIE_SPEED_2_5; +   } +} + +enum
> nvkm_pcie_speed +g84_pcie_max_speed(struct nvkm_pci *pci) +{ +u32
> reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300; + if (reg_v == 0x2200) 
> + return NVKM_PCIE_SPEED_5_0; +   return NVKM_PCIE_SPEED_2_5; +} 
> + 
> +void +g84_pcie_set_link_speed(struct nvkm_pci *pci, enum
> nvkm_pcie_speed speed) +{ +   u32 mask_value; + + if (speed ==
> NVKM_PCIE_SPEED_5_0) +mask_value = 0x20; +else +  
> mask_value =
> 0x10; + + nvkm_pci_mask(pci, 0x460, 0x30, mask_value); +
> nvkm_pci_mask(pci, 0x460, 0x1, 0x1); +} + +int 
> +g84_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed
> req_speed, +  u8 req_width) +{ +  if (req_speed ==
> NVKM_PCIE_SPEED_5_0) +g84_pcie_set_cap_speed(pci, true); +
> else +
> g84_pcie_set_cap_speed(pci, false); + +
> g84_pcie_set_link_speed(pci, req_speed); + +  return 0; +} + void 
> g84_pci_init(struct nvkm_pci *pci) { @@ -48,6 +136,13 @@
> g84_pci_init(struct nvkm_pci *pci) nvkm_pci_mask(pci, 0x041c,
> 0x0060, 0x); }
> 
> +int +g84_pcie_init(struct nvkm_pci *pci) +{ +
> g84_pcie_set_cap_speed(pci, g84_pcie_cur_speed(pci) ==
> NVKM_PCIE_SPEED_5_0); +   return 0; +} + static const struct
> nvkm_pci_func g84_pci_func = { .init = g84_pci_init, @@ -55,6
> +150,16 @@ g84_pci_func = { .wr08 = nv40_pci_wr08, .wr32 =
> nv40_pci_wr32, .msi_rearm = nv46_pci_msi_rearm, + +   .pcie.init =
> g84_pcie_init, +  .pcie.set_link = g84_pcie_set_link, + +
> .pcie.max_speed = g84_pcie_max_speed, +   .pcie.cur_speed =
> g84_pcie_cur_speed, + +   .pcie.set_version = g84_pcie_set_version, +
> .pcie.version = g84_pcie_version, +   .pcie.version_supported =
> g84_pcie_version_supported, };
> 
> int diff --git a/drm/nouveau/nvkm/subdev/pci/g94.c
> b/drm/nouveau/nvkm/subdev/pci/g94.c index cd311ee..f2f96c1 100644 
> --- a/drm/nouveau/nvkm/subdev/pci/g94.c +++
> b/drm/nouveau/nvkm/subdev/pci/g94.c @@ -30,6 +30,16 @@ g94_pci_func
> = { .wr08 = nv40_pci_wr08, .wr32 = nv40_pci_wr32, .msi_rearm =
> nv40_pci_msi_rearm, + +   .pcie.init = g84_pcie_init, +
> .pcie.set_link = g84_pcie_set_link, + +   .pcie.max_speed =
> g84_pcie_max_speed, + .pcie.cur_speed = g84_pcie_cur_speed, + +
> .pcie.set_version = g84_pcie_set_version, +   .pcie.version =
> g84_pcie_version, +   .pcie.version_supported =
> g84_pcie_version_supported, };
> 
> int diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c
> b/drm/nouveau/nvkm/subdev/pci/gf100.c index 25e1ae7..1ee43ad
> 100644 --- a/drm/nouveau/nvkm/subdev/pci/gf100.c +++
> b/drm/nouveau/nvkm/subdev/pci/gf100.c @@ -36,6 +36,11 @@
> gf100_pci_func = { .wr08 = nv40_pci_wr08, .wr32 = nv40_pci_wr32, 
> .msi_rearm = gf100_pci_msi_rearm, + + .pcie.max_speed =
> g84_pcie_max_speed, + 

Re: [Nouveau] [PATCH v2 6/9] pci: implement PCIe speed change for kepler+

[Ben Skeggs]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 10/13/2015 07:44 PM, Karol Herbst wrote:
> v2: rename functions
> 
> Signed-off-by: Karol Herbst  --- 
> drm/nouveau/nvkm/subdev/pci/gk104.c | 196
>  1 file changed, 196
> insertions(+)
> 
> diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c
> b/drm/nouveau/nvkm/subdev/pci/gk104.c index 458dd31..99b131c
> 100644 --- a/drm/nouveau/nvkm/subdev/pci/gk104.c +++
> b/drm/nouveau/nvkm/subdev/pci/gk104.c @@ -23,6 +23,197 @@ */ 
> #include "priv.h"
> 
> +static u32 +gk104_pci2_rd32(struct nvkm_pci *pci, u16 addr) +{ +
> struct nvkm_device *device = pci->subdev.device; +return
> nvkm_rd32(device, 0x08c000 + addr); +} + +static void 
> +gk104_pci2_mask(struct nvkm_pci *pci, u16 addr, u32 mask, u32
> value) +{ +   struct nvkm_device *device = pci->subdev.device; +
> nvkm_mask(device, 0x08c000 + addr, mask, value); +} +
Maybe skip these accessors and use nvkm_rd32/nvkm_mask directly, the
code is very specific to this chipset, and we don't need to abstract
away the mmio aperture difference like we do in some of the other code.

I don't have strong opinions on this one though.

> +static int +gk104_pcie_version_supported(struct nvkm_pci *pci) +{ 
> + return (gk104_pci2_rd32(pci, 0x1c0) & 0x4) == 0x4 ? 2 : 1; +} + 
> +static void +gk104_pcie_set_cap_speed(struct nvkm_pci *pci, enum
> nvkm_pcie_speed speed) +{ +   switch (speed) { +  case
> NVKM_PCIE_SPEED_2_5: +gf100_pcie_set_cap_speed(pci, false); +
> gk104_pci2_mask(pci, 0x1c0, 0x3, 0x1); +  break; +
> case
> NVKM_PCIE_SPEED_5_0: +gf100_pcie_set_cap_speed(pci, true); +
> gk104_pci2_mask(pci, 0x1c0, 0x3, 0x2); +  break; +
> case
> NVKM_PCIE_SPEED_8_0: +gf100_pcie_set_cap_speed(pci, true); +
> gk104_pci2_mask(pci, 0x1c0, 0x3, 0x3); +  break; +
> } +} + 
> +static enum nvkm_pcie_speed +gk104_pcie_cap_speed(struct nvkm_pci
> *pci) +{ +int speed = gf100_pcie_cap_speed(pci); +if (speed < 0) 
> + return speed; + +   if (speed == 0) +   return
> NVKM_PCIE_SPEED_2_5; + +  if (speed >= 1) { + int speed2 =
> gk104_pci2_rd32(pci, 0x1c0) & 0x3; +  switch (speed2) { + 
> case
> 0x0: +case 0x1: + return 
> NVKM_PCIE_SPEED_2_5; +   case
> 0x2: +return NVKM_PCIE_SPEED_5_0; +   case 
> 0x3: +
> return NVKM_PCIE_SPEED_8_0; + } + } + return -EINVAL; +} + 
> +static
> void +gk104_pcie_set_lnkctl_speed(struct nvkm_pci *pci, enum
> nvkm_pcie_speed speed) +{ +   u8 reg_v = 0; + switch (speed) { +  case
> NVKM_PCIE_SPEED_2_5: +reg_v = 1; +break; +
> case
> NVKM_PCIE_SPEED_5_0: +reg_v = 2; +break; +
> case
> NVKM_PCIE_SPEED_8_0: +reg_v = 3; +break; +
> } +
> nvkm_pci_mask(pci, 0xa8, 0x3, reg_v); +} + +static enum
> nvkm_pcie_speed +gk104_pcie_lnkctl_speed(struct nvkm_pci *pci) +{ +
> u8 reg_v = nvkm_pci_rd32(pci, 0xa8) & 0x3; +  switch (reg_v) { +
> case 0: + case 1: +   return NVKM_PCIE_SPEED_2_5; +   case 2: 
> +
> return NVKM_PCIE_SPEED_5_0; + case 3: +   return
> NVKM_PCIE_SPEED_8_0; +} + return -1; +} + +static enum
> nvkm_pcie_speed +gk104_pcie_max_speed(struct nvkm_pci *pci) +{ +
> u32 max_speed = gk104_pci2_rd32(pci, 0x1c0) & 0x30; + switch
> (max_speed) { +   case 0x00: +return 
> NVKM_PCIE_SPEED_8_0; +
> case 0x10: +  return NVKM_PCIE_SPEED_5_0; +   case 0x20: +
> return NVKM_PCIE_SPEED_2_5; + } + return NVKM_PCIE_SPEED_2_5; +} + 
> +static void +gk104_pcie_set_link_speed(struct nvkm_pci *pci, enum
> nvkm_pcie_speed speed) +{ +   u32 mask_value; +   switch (speed) { +
> default: +case NVKM_PCIE_SPEED_2_5: + mask_value = 0x8; +
> break; +  case NVKM_PCIE_SPEED_5_0: + mask_value = 0x4; +
> break; +  case NVKM_PCIE_SPEED_8_0: + mask_value = 0x0; +
> break; +  } + gk104_pci2_mask(pci, 0x40, 0xc, mask_value); +
> gk104_pci2_mask(pci, 0x40, 0x1, 0x1); +} + +static int 
> +gk104_pcie_init(struct nvkm_pci * pci) +{ +  if
> (!pci_is_pcie(pci->pdev)) +   return -ENODEV; + + if
> (gf100_pcie_version(pci) > 1) { + enum nvkm_pcie_speed +
> lnkctl_speed = gk104_pcie_lnkctl_speed(pci), +
> max_speed =
> gk104_pcie_max_speed(pci), +  cap_speed =
> gk104_pcie_cap_speed(pci); + +if (cap_speed != max_speed) { +
> nvkm_debug(>subdev, "adjusting cap speed to max speed\n"); +
> gk104_pcie_set_cap_speed(pci, max_speed); +   cap_speed =
> gk104_pcie_cap_speed(pci); +  if (cap_speed != 

[Nouveau] [Bug 92306] GL Excess demo renders incorrectly on nv43

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=92306

--- Comment #17 from Ben Skeggs  ---
(In reply to Ilia Mirkin from comment #14)
> (In reply to Andrew Randrianasulu from comment #13)
> > (In reply to Ilia Mirkin from comment #12)
> > > (In reply to Andrew Randrianasulu from comment #11)
> > > > "Mismatched color and zeta formats, ignoring zeta."
> > > 
> > > Yeah, as I suspected... unfortunately there's not a ton you can do besides
> > > fixing the issue. The problem is that you can't render to a 32-bit color
> > > format (e.g. RGBA8) while using a 16-bit zeta (Z16), and conversely you
> > > can't render to a 16-bit color format (e.g. RGB565) while using a 32-bit
> > > zeta (Z24S8).
> > > 
> > > My current solution to this problem is to just not set the zeta buffer and
> > > move on with life. This leads to incorrect rendering, but at least no 
> > > hangs.
> > > 
> > > The proper solution is to have 2 depth textures that you copy to and fro 
> > > and
> > > set the "right" one for the given color format. Ideally while minimizing 
> > > the
> > > number of copies.
> > 
> > Hm, but in my case it apparently worked fine... so, may be check is
> > overrestrictive?
> > 
> > I also tried to apply this path on top of mesa version indicated above
> > ((git-93161be)
> > 
> > patch---
> > diff --git a/src/gallium/drivers/nouveau/nv30/nv30_state.c
> > b/src/gallium/drivers/nouveau/nv30/nv30_state.c
> > index fd604c2..cceedfd 100644
> > --- a/src/gallium/drivers/nouveau/nv30/nv30_state.c
> > +++ b/src/gallium/drivers/nouveau/nv30/nv30_state.c
> > @@ -382,7 +382,7 @@ nv30_set_framebuffer_state(struct pipe_context *pipe,
> > (util_format_get_blocksize(fb->zsbuf->format) > 2) !=
> > (util_format_get_blocksize(fb->cbufs[0]->format) > 2)) {
> >nv30->framebuffer.zsbuf = NULL;
> > -  debug_printf("Mismatched color and zeta formats, ignoring
> > zeta.\n");
> > +  debug_printf("Mismatched color %d and zeta %d formats, ignoring
> > zeta.\n", fb->cbufs[0]->format, fb->zsbuf->format);
> > }
> >  }
> >  }
> > end-
> > 
> > and got this in terminal:
> > "Mismatched color 1 and zeta 16 formats, ignoring zeta."
> > 
> > This is a bit strange, this demo from ~2002 era, and apparently was  working
> > fine on older nvidia hardware. And on nouveau, until this  commit.  I will
> > retest just for making sure it doesn't flood my dmesg with errors 
> 
> You should be seeing errors about invalid values in dmesg for 0208 or some
> similar method. I'm guessing that the zeta buffer is used in such a way that
> things happen to work out, but the card doesn't really support it.
> 
> src/gallium/include/pipe/p_format.h:   PIPE_FORMAT_B8G8R8A8_UNORM  =
> 1,
> src/gallium/include/pipe/p_format.h:   PIPE_FORMAT_Z16_UNORM   =
> 16,
> 
> Not a valid combo, AFAIK.

I believe that restriction might only apply to swizzled surfaces.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
___
Nouveau mailing list
Nouveau@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/nouveau