[Nouveau] MediaWriter & Nouveau

2016-11-02 Thread poma 

Pan Bříza,
to se stane, když
Custom image - Pick a file from your drives(s)
...
nouveau :02:00.0: fifo: DMA_PUSHER - ch 5 [mediawriter[20975]] get 
0020171c34 put 00201746ec ib_get 0017 ib_put 0018 state 8000a32c (err: 
INVALID_CMD) push 00406040
nouveau :02:00.0: gr: DATA_ERROR 0004 [INVALID_VALUE]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
5 class 5039 mthd 0320 data 00046da8
nouveau :02:00.0: gr: DATA_ERROR 0005 [INVALID_ENUM]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
5 class 5039 mthd 0324 data 
nouveau :02:00.0: gr: DATA_ERROR 0005 [INVALID_ENUM]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
5 class 5039 mthd 0328 data 00046da4
nouveau :02:00.0: fifo: DMA_PUSHER - ch 5 [mediawriter[20975]] get 
0020175a18 put 002018ae6c ib_get 001a ib_put 001b state 80008208 (err: 
INVALID_CMD) push 00406040
nouveau :02:00.0: gr: DATA_ERROR 000c [INVALID_BITFIELD]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
4 class 502d mthd 0200 data 00086e04
nouveau :02:00.0: gr: DATA_ERROR 000c [INVALID_BITFIELD]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
4 class 502d mthd 0204 data 02cb02c6
nouveau :02:00.0: fifo: DMA_PUSHER - ch 5 [mediawriter[20975]] get 
002019d8b8 put 00201acb08 ib_get 0023 ib_put 0026 state 4004 (err: 
INVALID_MTHD) push 00406040
nouveau :02:00.0: fifo: CACHE_ERROR - ch 5 [mediawriter[20975]] subc 0 mthd 
 data 0390
nouveau :02:00.0: gr: DATA_ERROR 000d [BEGIN_END_ACTIVE]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
3 class 8297 mthd 131c data 3f5ededf
nouveau :02:00.0: gr: DATA_ERROR 000d [BEGIN_END_ACTIVE]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
3 class 8297 mthd 1320 data 3f5ededf
nouveau :02:00.0: gr: DATA_ERROR 000d [BEGIN_END_ACTIVE]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
3 class 8297 mthd 1324 data 3f5ededf
nouveau :02:00.0: gr: DATA_ERROR 000d [BEGIN_END_ACTIVE]
nouveau :02:00.0: gr: 0010 [] ch 5 [001f7bd000 mediawriter[20975]] subc 
3 class 8297 mthd 1328 data 3f80
nouveau :02:00.0: fifo: DMA_PUSHER - ch 5 [mediawriter[20975]] get 
00203c4e34 put 00203d04b0 ib_get 003b ib_put 003c state 8024 (err: 
INVALID_CMD) push 00406040
nouveau :02:00.0: mediawriter[20975]: push 0 buffer not in list
show_signal_msg: 21 callbacks suppressed
QSGRenderThread[21104]: segfault at 774b0 ip 7f10f99d5494 sp 
7f10f1989ee0 error 4 in libdrm_nouveau.so.2.0.0[7f10f99d2000+7000]

$ rpm -q mediawriter
mediawriter-4.0.0-2.fc24.x86_64


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[Nouveau] [PATCH v3 02/15] core: add falcon library

2016-11-02 Thread Alexandre Courbot 
Some falcon functionality, like loading code/data into IMEM/DMEM, is
re-implemented in various parts of the driver. Create a small falcon
library that will contain most common operations in order to avoid
duplicate code.

For now this library contains various defines that are used in secure
boot code, plus IMEM and DMEM loading functions.

In addition to the library itself, this patch updates users of the
previously secure-boot only definitions to use the new global ones.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/include/nvkm/core/falcon.h| 50 +
 drm/nouveau/include/nvkm/subdev/secboot.h | 16 ++--
 drm/nouveau/nvkm/core/Kbuild  |  1 +
 drm/nouveau/nvkm/core/falcon.c| 62 +++
 drm/nouveau/nvkm/engine/gr/gf100.c| 16 
 drm/nouveau/nvkm/engine/gr/gm200.c|  6 +--
 drm/nouveau/nvkm/subdev/secboot/base.c| 23 +++-
 drm/nouveau/nvkm/subdev/secboot/gm200.c   | 48 ++--
 drm/nouveau/nvkm/subdev/secboot/gm20b.c   |  4 +-
 drm/nouveau/nvkm/subdev/secboot/priv.h|  8 ++--
 10 files changed, 159 insertions(+), 75 deletions(-)
 create mode 100644 drm/nouveau/include/nvkm/core/falcon.h
 create mode 100644 drm/nouveau/nvkm/core/falcon.c

diff --git a/drm/nouveau/include/nvkm/core/falcon.h 
b/drm/nouveau/include/nvkm/core/falcon.h
new file mode 100644
index ..530119847163
--- /dev/null
+++ b/drm/nouveau/include/nvkm/core/falcon.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __NVKM_FALCON_H__
+#define __NVKM_FALCON_H__
+
+#include 
+
+enum nvkm_falconidx {
+   NVKM_FALCON_PMU = 0,
+   NVKM_FALCON_RESERVED= 1,
+   NVKM_FALCON_FECS= 2,
+   NVKM_FALCON_GPCCS   = 3,
+   NVKM_FALCON_END = 4,
+   NVKM_FALCON_INVALID = 0x,
+};
+
+enum nvkm_falcon_dmaidx {
+   FALCON_DMAIDX_UCODE = 0,
+   FALCON_DMAIDX_VIRT  = 1,
+   FALCON_DMAIDX_PHYS_VID  = 2,
+   FALCON_DMAIDX_PHYS_SYS_COH  = 3,
+   FALCON_DMAIDX_PHYS_SYS_NCOH = 4,
+};
+
+extern const char *nvkm_falcon_name[];
+
+void nvkm_falcon_load_imem(struct nvkm_device *, u32, void *, u32, u32, u32);
+void nvkm_falcon_load_dmem(struct nvkm_device *, u32, void *, u32, u32);
+
+#endif
diff --git a/drm/nouveau/include/nvkm/subdev/secboot.h 
b/drm/nouveau/include/nvkm/subdev/secboot.h
index b04c38c07761..ffc2204d2a50 100644
--- a/drm/nouveau/include/nvkm/subdev/secboot.h
+++ b/drm/nouveau/include/nvkm/subdev/secboot.h
@@ -24,15 +24,7 @@
 #define __NVKM_SECURE_BOOT_H__
 
 #include 
-
-enum nvkm_secboot_falcon {
-   NVKM_SECBOOT_FALCON_PMU = 0,
-   NVKM_SECBOOT_FALCON_RESERVED = 1,
-   NVKM_SECBOOT_FALCON_FECS = 2,
-   NVKM_SECBOOT_FALCON_GPCCS = 3,
-   NVKM_SECBOOT_FALCON_END = 4,
-   NVKM_SECBOOT_FALCON_INVALID = 0x,
-};
+#include 
 
 /**
  * @base:  base IO address of the falcon performing secure boot
@@ -48,9 +40,9 @@ struct nvkm_secboot {
 };
 #define nvkm_secboot(p) container_of((p), struct nvkm_secboot, subdev)
 
-bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_secboot_falcon);
-int nvkm_secboot_reset(struct nvkm_secboot *, u32 falcon);
-int nvkm_secboot_start(struct nvkm_secboot *, u32 falcon);
+bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_falconidx);
+int nvkm_secboot_reset(struct nvkm_secboot *, enum nvkm_falconidx);
+int nvkm_secboot_start(struct nvkm_secboot *, enum nvkm_falconidx);
 
 int gm200_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
 int gm20b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
diff --git a/drm/nouveau/nvkm/core/Kbuild b/drm/nouveau/nvkm/core/Kbuild
index 86a31a8e1e51..4196e4620c3b 100644
--- a/drm/nouveau/nvkm/core/Kbuild

[Nouveau] [PATCH v3 15/15] secboot: safer zeroing of BL descriptors

2016-11-02 Thread Alexandre Courbot 
Perform the zeroing of BL descriptors in the caller function instead of
trusting each generator will do it. This could avoid a few pulled hairs.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 4 ++--
 drm/nouveau/nvkm/subdev/secboot/acr_r361.c | 2 --
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
index 6d79fa27ef14..83de670a4362 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
@@ -104,7 +104,6 @@ acr_r352_generate_flcn_bl_desc(const struct nvkm_acr *acr,
addr_code = (base + pdesc->app_resident_code_offset) >> 8;
addr_data = (base + pdesc->app_resident_data_offset) >> 8;
 
-   memset(desc, 0, sizeof(*desc));
desc->ctx_dma = FALCON_DMAIDX_UCODE;
desc->code_dma_base = lower_32_bits(addr_code);
desc->non_sec_code_off = pdesc->app_resident_code_offset;
@@ -354,6 +353,7 @@ acr_r352_ls_write_wpr(struct acr_r352 *acr, struct 
list_head *imgs,
 >lsb_header, sizeof(img->lsb_header));
 
/* Generate and write BL descriptor */
+   memset(gdesc, 0, ls_func->bl_desc_size);
ls_func->generate_bl_desc(>base, _img, wpr_addr, gdesc);
 
nvkm_gpuobj_memcpy_to(wpr_blob, img->lsb_header.bl_data_off,
@@ -515,7 +515,6 @@ acr_r352_generate_hs_bl_desc(const struct hsf_load_header 
*hdr, void *_bl_desc,
struct acr_r352_flcn_bl_desc *bl_desc = _bl_desc;
u64 addr_code, addr_data;
 
-   memset(bl_desc, 0, sizeof(*bl_desc));
addr_code = offset >> 8;
addr_data = (offset + hdr->data_dma_base) >> 8;
 
@@ -719,6 +718,7 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_secboot 
*sb,
  code_size, hsbl_desc->start_tag);
 
/* Generate the BL header */
+   memset(bl_desc, 0, bl_desc_size);
acr->func->generate_hs_bl_desc(load_hdr, bl_desc, offset);
 
/*
diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r361.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r361.c
index df0a8f2a70ee..a758e8d45176 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r361.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r361.c
@@ -73,7 +73,6 @@ acr_r361_generate_flcn_bl_desc(const struct nvkm_acr *acr,
addr_code = base + pdesc->app_resident_code_offset;
addr_data = base + pdesc->app_resident_data_offset;
 
-   memset(desc, 0, sizeof(*desc));
desc->ctx_dma = FALCON_DMAIDX_UCODE;
desc->code_dma_base = u64_to_flcn64(addr_code);
desc->non_sec_code_off = pdesc->app_resident_code_offset;
@@ -89,7 +88,6 @@ acr_r361_generate_hs_bl_desc(const struct hsf_load_header 
*hdr, void *_bl_desc,
 {
struct acr_r361_flcn_bl_desc *bl_desc = _bl_desc;
 
-   memset(bl_desc, 0, sizeof(*bl_desc));
bl_desc->ctx_dma = FALCON_DMAIDX_VIRT;
bl_desc->code_dma_base = u64_to_flcn64(offset);
bl_desc->non_sec_code_off = hdr->non_sec_code_off;
-- 
2.10.0

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[Nouveau] [PATCH v3 04/15] secboot: rename init() hook to oneinit()

2016-11-02 Thread Alexandre Courbot 
The init() hook is called by the subdev's oneinit(). Rename it
accordingly to avoid confusion about the lifetime of objects allocated
in it.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/base.c  | 4 ++--
 drm/nouveau/nvkm/subdev/secboot/gm200.c | 4 ++--
 drm/nouveau/nvkm/subdev/secboot/gm20b.c | 6 +++---
 drm/nouveau/nvkm/subdev/secboot/priv.h  | 4 ++--
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/base.c 
b/drm/nouveau/nvkm/subdev/secboot/base.c
index 6b3346ff0253..ea36851358ea 100644
--- a/drm/nouveau/nvkm/subdev/secboot/base.c
+++ b/drm/nouveau/nvkm/subdev/secboot/base.c
@@ -196,8 +196,8 @@ nvkm_secboot_oneinit(struct nvkm_subdev *subdev)
int ret = 0;
 
/* Call chip-specific init function */
-   if (sb->func->init)
-   ret = sb->func->init(sb);
+   if (sb->func->oneinit)
+   ret = sb->func->oneinit(sb);
if (ret) {
nvkm_error(subdev, "Secure Boot initialization failed: %d\n",
   ret);
diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c 
b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index 8067d29f526f..b020e41d2391 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -1305,7 +1305,7 @@ gm200_secboot_start(struct nvkm_secboot *sb, enum 
nvkm_falconidx falcon)
 
 
 int
-gm200_secboot_init(struct nvkm_secboot *sb)
+gm200_secboot_oneinit(struct nvkm_secboot *sb)
 {
struct gm200_secboot *gsb = gm200_secboot(sb);
struct nvkm_device *device = sb->subdev.device;
@@ -1384,7 +1384,7 @@ gm200_secboot_dtor(struct nvkm_secboot *sb)
 static const struct nvkm_secboot_func
 gm200_secboot = {
.dtor = gm200_secboot_dtor,
-   .init = gm200_secboot_init,
+   .oneinit = gm200_secboot_oneinit,
.fini = gm200_secboot_fini,
.reset = gm200_secboot_reset,
.start = gm200_secboot_start,
diff --git a/drm/nouveau/nvkm/subdev/secboot/gm20b.c 
b/drm/nouveau/nvkm/subdev/secboot/gm20b.c
index 66a1d01f45ce..1cb663c31e17 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm20b.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm20b.c
@@ -174,7 +174,7 @@ gm20b_tegra_read_wpr(struct gm200_secboot *gsb)
 #endif
 
 static int
-gm20b_secboot_init(struct nvkm_secboot *sb)
+gm20b_secboot_oneinit(struct nvkm_secboot *sb)
 {
struct gm200_secboot *gsb = gm200_secboot(sb);
int ret;
@@ -183,13 +183,13 @@ gm20b_secboot_init(struct nvkm_secboot *sb)
if (ret)
return ret;
 
-   return gm200_secboot_init(sb);
+   return gm200_secboot_oneinit(sb);
 }
 
 static const struct nvkm_secboot_func
 gm20b_secboot = {
.dtor = gm200_secboot_dtor,
-   .init = gm20b_secboot_init,
+   .oneinit = gm20b_secboot_oneinit,
.reset = gm200_secboot_reset,
.start = gm200_secboot_start,
.managed_falcons = BIT(NVKM_FALCON_FECS),
diff --git a/drm/nouveau/nvkm/subdev/secboot/priv.h 
b/drm/nouveau/nvkm/subdev/secboot/priv.h
index b1ef3d1b4c9d..baa802b1e9d2 100644
--- a/drm/nouveau/nvkm/subdev/secboot/priv.h
+++ b/drm/nouveau/nvkm/subdev/secboot/priv.h
@@ -27,7 +27,7 @@
 #include 
 
 struct nvkm_secboot_func {
-   int (*init)(struct nvkm_secboot *);
+   int (*oneinit)(struct nvkm_secboot *);
int (*fini)(struct nvkm_secboot *, bool suspend);
void *(*dtor)(struct nvkm_secboot *);
int (*reset)(struct nvkm_secboot *, enum nvkm_falconidx);
@@ -224,7 +224,7 @@ struct gm200_secboot_func {
int (*prepare_blobs)(struct gm200_secboot *);
 };
 
-int gm200_secboot_init(struct nvkm_secboot *);
+int gm200_secboot_oneinit(struct nvkm_secboot *);
 void *gm200_secboot_dtor(struct nvkm_secboot *);
 int gm200_secboot_reset(struct nvkm_secboot *, u32);
 int gm200_secboot_start(struct nvkm_secboot *, u32);
-- 
2.10.0

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[Nouveau] [PATCH v3 09/15] secboot: add LS flags to LS func structure

2016-11-02 Thread Alexandre Courbot 
Add a flag that can be set when declaring how a LS firmware should be
loaded. This allows us to remove falcon-specific code in the loader.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 9 -
 drm/nouveau/nvkm/subdev/secboot/acr_r352.h | 2 ++
 drm/nouveau/nvkm/subdev/secboot/acr_r361.c | 2 ++
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
index 7af7866ab1ec..058386720a14 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
@@ -265,13 +265,10 @@ ls_ucode_img_fill_headers(struct acr_r352 *acr, struct 
ls_ucode_img *img,
 desc->app_resident_data_offset;
lhdr->app_data_size = desc->app_resident_data_size;
 
-   lhdr->flags = 0;
+   lhdr->flags = func->lhdr_flags;
if (img->falcon_id == acr->base.func->boot_falcon)
-   lhdr->flags = LSF_FLAG_DMACTL_REQ_CTX;
+   lhdr->flags |= LSF_FLAG_DMACTL_REQ_CTX;
 
-   /* GPCCS will be loaded using PRI */
-   if (img->falcon_id == NVKM_FALCON_GPCCS)
-   lhdr->flags |= LSF_FLAG_FORCE_PRIV_LOAD;
 
/* Align and save off BL descriptor size */
lhdr->bl_data_size = ALIGN(func->bl_desc_size, LSF_BL_DATA_SIZE_ALIGN);
@@ -867,6 +864,8 @@ acr_r352_ls_gpccs_func = {
.load = acr_ls_ucode_load_gpccs,
.generate_bl_desc = acr_r352_generate_flcn_bl_desc,
.bl_desc_size = sizeof(struct acr_r352_flcn_bl_desc),
+   /* GPCCS will be loaded using PRI */
+   .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD,
 };
 
 const struct acr_r352_func
diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.h 
b/drm/nouveau/nvkm/subdev/secboot/acr_r352.h
index 40c9619b4693..f6068404ba98 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.h
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.h
@@ -52,12 +52,14 @@ struct hsf_load_header {
  * @generate_bl_desc: function called on a block of bl_desc_size to generate 
the
  *   proper bootloader descriptor for this LS firmware
  * @bl_desc_size: size of the bootloader descriptor
+ * @lhdr_flags: LS flags
  */
 struct acr_r352_ls_func {
int (*load)(const struct nvkm_subdev *, struct ls_ucode_img *);
void (*generate_bl_desc)(const struct nvkm_acr *,
 const struct ls_ucode_img *, u64, void *);
u32 bl_desc_size;
+   u32 lhdr_flags;
 };
 
 /**
diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r361.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r361.c
index ce22fff45991..1e3c62d1e7ac 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r361.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r361.c
@@ -113,6 +113,8 @@ acr_r361_ls_gpccs_func = {
.load = acr_ls_ucode_load_gpccs,
.generate_bl_desc = acr_r361_generate_flcn_bl_desc,
.bl_desc_size = sizeof(struct acr_r361_flcn_bl_desc),
+   /* GPCCS will be loaded using PRI */
+   .lhdr_flags = LSF_FLAG_FORCE_PRIV_LOAD,
 };
 
 const struct acr_r352_func
-- 
2.10.0

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[Nouveau] [PATCH v3 03/15] secboot: use falcon library's IMEM/DMEM loading functions

2016-11-02 Thread Alexandre Courbot 
Replace the falcon loading functions with calls to the equivalent
functions of the falcon library.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/gm200.c | 31 +--
 1 file changed, 9 insertions(+), 22 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c 
b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index e387673e13a6..8067d29f526f 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -1103,39 +1103,26 @@ gm200_secboot_load_hs_bl(struct gm200_secboot *gsb, 
void *data, u32 data_size)
void *hsbl_data = blob_data + hsbl_desc->data_off;
u32 code_size = ALIGN(hsbl_desc->code_size, 256);
const u32 base = gsb->base.base;
-   u32 blk;
-   u32 tag;
-   int i;
+   u32 code_start;
 
/*
 * Copy HS bootloader data
 */
-   nvkm_wr32(device, base + 0x1c0, (0x | (0x1 << 24)));
-   for (i = 0; i < hsbl_desc->data_size / 4; i++)
-   nvkm_wr32(device, base + 0x1c4, ((u32 *)hsbl_data)[i]);
+   nvkm_falcon_load_dmem(device, gsb->base.base, hsbl_data, 0x0,
+ hsbl_desc->data_size);
 
/*
 * Copy HS bootloader interface structure where the HS descriptor
 * expects it to be
 */
-   nvkm_wr32(device, base + 0x1c0,
- (hsbl_desc->dmem_load_off | (0x1 << 24)));
-   for (i = 0; i < data_size / 4; i++)
-   nvkm_wr32(device, base + 0x1c4, ((u32 *)data)[i]);
+   nvkm_falcon_load_dmem(device, gsb->base.base, data,
+ hsbl_desc->dmem_load_off, data_size);
 
/* Copy HS bootloader code to end of IMEM */
-   blk = (nvkm_rd32(device, base + 0x108) & 0x1ff) - (code_size >> 8);
-   tag = hsbl_desc->start_tag;
-   nvkm_wr32(device, base + 0x180, ((blk & 0xff) << 8) | (0x1 << 24));
-   for (i = 0; i < code_size / 4; i++) {
-   /* write new tag every 256B */
-   if ((i & 0x3f) == 0) {
-   nvkm_wr32(device, base + 0x188, tag & 0x);
-   tag++;
-   }
-   nvkm_wr32(device, base + 0x184, ((u32 *)hsbl_code)[i]);
-   }
-   nvkm_wr32(device, base + 0x188, 0);
+   code_start = (nvkm_rd32(device, base + 0x108) & 0x1ff) << 8;
+   code_start -= code_size;
+   nvkm_falcon_load_imem(device, gsb->base.base, hsbl_code, code_start,
+ code_size, hsbl_desc->start_tag);
 }
 
 /**
-- 
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[Nouveau] [PATCH v3 00/15] Secure Boot refactoring

2016-11-02 Thread Alexandre Courbot 
This is a rework of the secure boot code that moves the building of the blob
into its own set of source files (and own hooks), making the code more flexible
and (hopefully) easier to understand as well.

This rework is needed to support more signed firmware for existing and new
chips. Since the firmwares in question are not available yet I cannot send the
code to manage then, but hopefully the gain in clarity will be enough to merge
this series ahead of the rest.

Of the whole series, patch 8 is the most significant as it reorganizes the code
into more source files. Chip support is separated from the ACR implementation,
with ACR being numbered according to the (public) NVIDIA driver version it was
build aainst. This means one can make any chip work with any ACR version just by
instanciating the proper ACR and adds a lot of flexibility that will be required
as more firmwares get released. At the moment, released firmwares cover driver
versions 352 (for GM20B) and 361 (for GM200, GM204, GM206 and GP100). The r361
implementation re-uses most of r352, and only implements its own BL descritors
since the structure changed between the two versions.

Other patches are a mix of minor optimizations (1, 2, 3, 4, 9, 10, 12, 13, 15),
small fixes (5, 7, 11), and addition of abstractions to properly support various
ACR versions (6, 14). Not all the abstractions are used at the moment
(particularly those of patch 14), but hopefully they will be put to good use
soon!

Changes since v1:
- Use NVIDIA driver versions to differenciate the ACR structures instead of
  arbitrary numbers
- Add abstractions to firmware loading functions
- Optimized set of abstractions
- Removed some more code

Changes since v2:
- Fix naming of new structures/functions

Alexandre Courbot (15):
  core: constify nv*_printk macros
  core: add falcon library
  secboot: use falcon library's IMEM/DMEM loading functions
  secboot: rename init() hook to oneinit()
  secboot: remove fixup_hs_desc hook
  secboot: add low-secure firmware hooks
  secboot: generate HS BL descriptor in hook
  secboot: reorganize into more files
  secboot: add LS flags to LS func structure
  secboot: split reset function
  secboot: disable falcon interrupts before running
  secboot: remove unneeded ls_ucode_img member
  secboot: remove ls_ucode_mgr
  secboot: abstract LS firmware loading functions
  secboot: safer zeroing of BL descriptors

 drm/nouveau/include/nvkm/core/client.h|4 +-
 drm/nouveau/include/nvkm/core/device.h|2 +-
 drm/nouveau/include/nvkm/core/falcon.h|   50 +
 drm/nouveau/include/nvkm/core/subdev.h|2 +-
 drm/nouveau/include/nvkm/subdev/secboot.h |   32 +-
 drm/nouveau/nvkm/core/Kbuild  |1 +
 drm/nouveau/nvkm/core/falcon.c|   62 ++
 drm/nouveau/nvkm/engine/gr/gf100.c|   16 +-
 drm/nouveau/nvkm/engine/gr/gm200.c|6 +-
 drm/nouveau/nvkm/subdev/secboot/Kbuild|4 +
 drm/nouveau/nvkm/subdev/secboot/acr.c |   54 +
 drm/nouveau/nvkm/subdev/secboot/acr.h |   68 ++
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c|  925 +
 drm/nouveau/nvkm/subdev/secboot/acr_r352.h|  246 +
 drm/nouveau/nvkm/subdev/secboot/acr_r361.c|  135 +++
 drm/nouveau/nvkm/subdev/secboot/base.c|  118 ++-
 drm/nouveau/nvkm/subdev/secboot/gm200.c   | 1335 +
 drm/nouveau/nvkm/subdev/secboot/gm200.h   |   43 +
 drm/nouveau/nvkm/subdev/secboot/gm20b.c   |  127 +--
 drm/nouveau/nvkm/subdev/secboot/ls_ucode.h|  151 +++
 drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c |  158 +++
 drm/nouveau/nvkm/subdev/secboot/priv.h|  199 +---
 22 files changed, 2091 insertions(+), 1647 deletions(-)
 create mode 100644 drm/nouveau/include/nvkm/core/falcon.h
 create mode 100644 drm/nouveau/nvkm/core/falcon.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr_r352.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr_r352.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr_r361.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/gm200.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/ls_ucode.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c

-- 
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[Nouveau] [PATCH v3 14/15] secboot: abstract LS firmware loading functions

2016-11-02 Thread Alexandre Courbot 
The WPR and LSB headers, used to generate the LS blob, may have a
different layout and sizes depending on the driver version they come
from. Abstract them and confine their use to driver-specific code.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c| 102 +-
 drm/nouveau/nvkm/subdev/secboot/acr_r352.h| 119 ++
 drm/nouveau/nvkm/subdev/secboot/acr_r361.c|   9 +-
 drm/nouveau/nvkm/subdev/secboot/ls_ucode.h| 100 +-
 drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c |  39 -
 5 files changed, 208 insertions(+), 161 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
index 4b72371bdbae..6d79fa27ef14 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
@@ -21,7 +21,6 @@
  */
 
 #include "acr_r352.h"
-#include "ls_ucode.h"
 
 #include 
 #include 
@@ -93,11 +92,12 @@ struct acr_r352_flcn_bl_desc {
  */
 static void
 acr_r352_generate_flcn_bl_desc(const struct nvkm_acr *acr,
-  const struct ls_ucode_img *img, u64 wpr_addr,
+  const struct ls_ucode_img *_img, u64 wpr_addr,
   void *_desc)
 {
+   struct ls_ucode_img_r352 *img = ls_ucode_img_r352(_img);
struct acr_r352_flcn_bl_desc *desc = _desc;
-   const struct ls_ucode_img_desc *pdesc = >ucode_desc;
+   const struct ls_ucode_img_desc *pdesc = &_img->ucode_desc;
u64 base, addr_code, addr_data;
 
base = wpr_addr + img->lsb_header.ucode_off + pdesc->app_start_offset;
@@ -162,29 +162,46 @@ struct hsflcn_acr_desc {
  * Low-secure blob creation
  */
 
-typedef int (*lsf_load_func)(const struct nvkm_subdev *, struct ls_ucode_img 
*);
-
 /**
  * ls_ucode_img_load() - create a lsf_ucode_img and load it
  */
-static struct ls_ucode_img *
-ls_ucode_img_load(const struct nvkm_subdev *subdev, lsf_load_func load_func)
+struct ls_ucode_img *
+acr_r352_ls_ucode_img_load(const struct acr_r352 *acr,
+  enum nvkm_falconidx falcon_id)
 {
-   struct ls_ucode_img *img;
+   const struct nvkm_subdev *subdev = acr->base.subdev;
+   struct ls_ucode_img_r352 *img;
int ret;
 
img = kzalloc(sizeof(*img), GFP_KERNEL);
if (!img)
return ERR_PTR(-ENOMEM);
 
-   ret = load_func(subdev, img);
+   img->base.falcon_id = falcon_id;
+
+   ret = acr->func->ls_func[falcon_id]->load(subdev, >base);
 
if (ret) {
+   kfree(img->base.ucode_data);
+   kfree(img->base.sig);
kfree(img);
return ERR_PTR(ret);
}
 
-   return img;
+   /* Check that the signature size matches our expectations... */
+   if (img->base.sig_size != sizeof(img->lsb_header.signature)) {
+   nvkm_error(subdev, "invalid signature size for %s falcon!\n",
+  nvkm_falcon_name[falcon_id]);
+   return ERR_PTR(-EINVAL);
+   }
+
+   /* Copy signature to the right place */
+   memcpy(>lsb_header.signature, img->base.sig, img->base.sig_size);
+
+   /* not needed? the signature should already have the right value */
+   img->lsb_header.signature.falcon_id = falcon_id;
+
+   return >base;
 }
 
 #define LSF_LSB_HEADER_ALIGN 256
@@ -194,7 +211,7 @@ ls_ucode_img_load(const struct nvkm_subdev *subdev, 
lsf_load_func load_func)
 #define LSF_UCODE_DATA_ALIGN 4096
 
 /**
- * ls_ucode_img_fill_headers - fill the WPR and LSB headers of an image
+ * acr_r352_ls_img_fill_headers - fill the WPR and LSB headers of an image
  * @acr:   ACR to use
  * @img:   image to generate for
  * @offset:offset in the WPR region where this image starts
@@ -205,24 +222,25 @@ ls_ucode_img_load(const struct nvkm_subdev *subdev, 
lsf_load_func load_func)
  * Return: offset at the end of this image.
  */
 static u32
-ls_ucode_img_fill_headers(struct acr_r352 *acr, struct ls_ucode_img *img,
- u32 offset)
+acr_r352_ls_img_fill_headers(struct acr_r352 *acr,
+struct ls_ucode_img_r352 *img, u32 offset)
 {
-   struct lsf_wpr_header *whdr = >wpr_header;
-   struct lsf_lsb_header *lhdr = >lsb_header;
-   struct ls_ucode_img_desc *desc = >ucode_desc;
+   struct ls_ucode_img *_img = >base;
+   struct acr_r352_lsf_wpr_header *whdr = >wpr_header;
+   struct acr_r352_lsf_lsb_header *lhdr = >lsb_header;
+   struct ls_ucode_img_desc *desc = &_img->ucode_desc;
const struct acr_r352_ls_func *func =
-   acr->func->ls_func[img->falcon_id];
+   acr->func->ls_func[_img->falcon_id];
 
/* Fill WPR header */
-   whdr->falcon_id = img->falcon_id;
+   whdr->falcon_id = _img->falcon_id;

[Nouveau] [PATCH v3 10/15] secboot: split reset function

2016-11-02 Thread Alexandre Courbot 
Split the reset function into more meaningful and reusable ones.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/include/nvkm/subdev/secboot.h  |  3 ++
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 78 --
 2 files changed, 56 insertions(+), 25 deletions(-)

diff --git a/drm/nouveau/include/nvkm/subdev/secboot.h 
b/drm/nouveau/include/nvkm/subdev/secboot.h
index 24d98878bb93..785e2c553392 100644
--- a/drm/nouveau/include/nvkm/subdev/secboot.h
+++ b/drm/nouveau/include/nvkm/subdev/secboot.h
@@ -30,6 +30,7 @@
  * @base: base IO address of the falcon performing secure boot
  * @managed_falcons: bitfield of falcons managed by this ACR
  * @debug_mode: whether the debug or production signatures should be used
+ * @wpr_set: whether the WPR region is currently set
 */
 struct nvkm_secboot {
const struct nvkm_secboot_func *func;
@@ -44,6 +45,8 @@ struct nvkm_secboot {
u32 wpr_size;
 
bool debug_mode;
+
+   bool wpr_set;
 };
 #define nvkm_secboot(p) container_of((p), struct nvkm_secboot, subdev)
 
diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
index 058386720a14..b350e107eff0 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
@@ -746,6 +746,54 @@ acr_r352_load(struct nvkm_acr *_acr, struct nvkm_secboot 
*sb,
return 0;
 }
 
+static int
+acr_r352_shutdown(struct acr_r352 *acr, struct nvkm_secboot *sb)
+{
+   int i;
+
+   /* Run the unload blob to unprotect the WPR region */
+   if (acr->unload_blob && sb->wpr_set) {
+   int ret;
+
+   nvkm_debug(>subdev, "running HS unload blob\n");
+   ret = sb->func->run_blob(sb, acr->unload_blob);
+   if (ret)
+   return ret;
+   nvkm_debug(>subdev, "HS unload blob completed\n");
+   }
+
+   for (i = 0; i < NVKM_FALCON_END; i++)
+   acr->falcon_state[i] = NON_SECURE;
+
+   sb->wpr_set = false;
+
+   return 0;
+}
+
+static int
+acr_r352_bootstrap(struct acr_r352 *acr, struct nvkm_secboot *sb)
+{
+   int ret;
+
+   if (sb->wpr_set)
+   return 0;
+
+   /* Make sure all blobs are ready */
+   ret = acr_r352_load_blobs(acr, sb);
+   if (ret)
+   return ret;
+
+   nvkm_debug(>subdev, "running HS load blob\n");
+   ret = sb->func->run_blob(sb, acr->load_blob);
+   if (ret)
+   return ret;
+   nvkm_debug(>subdev, "HS load blob completed\n");
+
+   sb->wpr_set = true;
+
+   return 0;
+}
+
 /*
  * acr_r352_reset() - execute secure boot from the prepared state
  *
@@ -760,11 +808,6 @@ acr_r352_reset(struct nvkm_acr *_acr, struct nvkm_secboot 
*sb,
struct acr_r352 *acr = acr_r352(_acr);
int ret;
 
-   /* Make sure all blobs are ready */
-   ret = acr_r352_load_blobs(acr, sb);
-   if (ret)
-   return ret;
-
/*
 * Dummy GM200 implementation: perform secure boot each time we are
 * called on FECS. Since only FECS and GPCCS are managed and started
@@ -776,16 +819,11 @@ acr_r352_reset(struct nvkm_acr *_acr, struct nvkm_secboot 
*sb,
if (falcon != NVKM_FALCON_FECS)
goto end;
 
-   /* If WPR is set and we have an unload blob, run it to unlock WPR */
-   if (acr->unload_blob &&
-   acr->falcon_state[NVKM_FALCON_FECS] != NON_SECURE) {
-   ret = sb->func->run_blob(sb, acr->unload_blob);
-   if (ret)
-   return ret;
-   }
+   ret = acr_r352_shutdown(acr, sb);
+   if (ret)
+   return ret;
 
-   /* Reload all managed falcons */
-   ret = sb->func->run_blob(sb, acr->load_blob);
+   acr_r352_bootstrap(acr, sb);
if (ret)
return ret;
 
@@ -824,18 +862,8 @@ static int
 acr_r352_fini(struct nvkm_acr *_acr, struct nvkm_secboot *sb, bool suspend)
 {
struct acr_r352 *acr = acr_r352(_acr);
-   int ret = 0;
-   int i;
 
-   /* Run the unload blob to unprotect the WPR region */
-   if (acr->unload_blob &&
-   acr->falcon_state[NVKM_FALCON_FECS] != NON_SECURE)
-   ret = sb->func->run_blob(sb, acr->unload_blob);
-
-   for (i = 0; i < NVKM_FALCON_END; i++)
-   acr->falcon_state[i] = NON_SECURE;
-
-   return ret;
+   return acr_r352_shutdown(acr, sb);
 }
 
 static void
-- 
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[Nouveau] [PATCH v3 13/15] secboot: remove ls_ucode_mgr

2016-11-02 Thread Alexandre Courbot 
This was used only locally to one function and can be replaced by ad-hoc
variables.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c | 90 +++---
 1 file changed, 33 insertions(+), 57 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
index cdba9ffc5bbe..4b72371bdbae 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
@@ -278,75 +278,44 @@ ls_ucode_img_fill_headers(struct acr_r352 *acr, struct 
ls_ucode_img *img,
 }
 
 /**
- * struct ls_ucode_mgr - manager for all LS falcon firmwares
- * @count: number of managed LS falcons
- * @wpr_size:  size of the required WPR region in bytes
- * @img_list:  linked list of lsf_ucode_img
+ * acr_r352_ls_fill_headers - fill WPR and LSB headers of all managed images
  */
-struct ls_ucode_mgr {
-   u16 count;
-   u32 wpr_size;
-   struct list_head img_list;
-};
-
-static void
-ls_ucode_mgr_init(struct ls_ucode_mgr *mgr)
-{
-   memset(mgr, 0, sizeof(*mgr));
-   INIT_LIST_HEAD(>img_list);
-}
-
-static void
-ls_ucode_mgr_cleanup(struct ls_ucode_mgr *mgr)
-{
-   struct ls_ucode_img *img, *t;
-
-   list_for_each_entry_safe(img, t, >img_list, node) {
-   kfree(img->ucode_data);
-   kfree(img);
-   }
-}
-
-static void
-ls_ucode_mgr_add_img(struct ls_ucode_mgr *mgr, struct ls_ucode_img *img)
-{
-   mgr->count++;
-   list_add_tail(>node, >img_list);
-}
-
-/**
- * ls_ucode_mgr_fill_headers - fill WPR and LSB headers of all managed images
- */
-static void
-ls_ucode_mgr_fill_headers(struct acr_r352 *acr, struct ls_ucode_mgr *mgr)
+static int
+acr_r352_ls_fill_headers(struct acr_r352 *acr, struct list_head *imgs)
 {
struct ls_ucode_img *img;
+   struct list_head *l;
+   u32 count = 0;
u32 offset;
 
+   /* Count the number of images to manage */
+   list_for_each(l, imgs)
+   count++;
+
/*
 * Start with an array of WPR headers at the base of the WPR.
 * The expectation here is that the secure falcon will do a single DMA
 * read of this array and cache it internally so it's ok to pack these.
 * Also, we add 1 to the falcon count to indicate the end of the array.
 */
-   offset = sizeof(struct lsf_wpr_header) * (mgr->count + 1);
+   offset = sizeof(struct lsf_wpr_header) * (count + 1);
 
/*
 * Walk the managed falcons, accounting for the LSB structs
 * as well as the ucode images.
 */
-   list_for_each_entry(img, >img_list, node) {
+   list_for_each_entry(img, imgs, node) {
offset = ls_ucode_img_fill_headers(acr, img, offset);
}
 
-   mgr->wpr_size = offset;
+   return offset;
 }
 
 /**
  * ls_ucode_mgr_write_wpr - write the WPR blob contents
  */
 static int
-ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct ls_ucode_mgr *mgr,
+ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct list_head *imgs,
   struct nvkm_gpuobj *wpr_blob, u32 wpr_addr)
 {
struct ls_ucode_img *img;
@@ -354,7 +323,7 @@ ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct 
ls_ucode_mgr *mgr,
 
nvkm_kmap(wpr_blob);
 
-   list_for_each_entry(img, >img_list, node) {
+   list_for_each_entry(img, imgs, node) {
const struct acr_r352_ls_func *ls_func =
 acr->func->ls_func[img->falcon_id];
u8 gdesc[ls_func->bl_desc_size];
@@ -400,11 +369,14 @@ acr_r352_prepare_ls_blob(struct acr_r352 *acr, u64 
wpr_addr, u32 wpr_size,
 unsigned long managed_falcons)
 {
const struct nvkm_subdev *subdev = acr->base.subdev;
-   struct ls_ucode_mgr mgr;
+   struct list_head imgs;
+   struct ls_ucode_img *img, *t;
+   int managed_count = 0;
+   u32 image_wpr_size;
int falcon_id;
int ret;
 
-   ls_ucode_mgr_init();
+   INIT_LIST_HEAD();
 
/* Load all LS blobs */
for_each_set_bit(falcon_id, _falcons, NVKM_FALCON_END) {
@@ -417,48 +389,52 @@ acr_r352_prepare_ls_blob(struct acr_r352 *acr, u64 
wpr_addr, u32 wpr_size,
ret = PTR_ERR(img);
goto cleanup;
}
-   ls_ucode_mgr_add_img(, img);
+   list_add_tail(>node, );
+   managed_count++;
}
 
/*
 * Fill the WPR and LSF headers with the right offsets and compute
 * required WPR size
 */
-   ls_ucode_mgr_fill_headers(acr, );
-   mgr.wpr_size = ALIGN(mgr.wpr_size, WPR_ALIGNMENT);
+   image_wpr_size = acr_r352_ls_fill_headers(acr, );
+   image_wpr_size = ALIGN(image_wpr_size, WPR_ALIGNMENT);
 
/* Allocate GPU object that will contain the WPR region */
-   ret = nvkm_gpuobj_new(subdev->device, mgr.wpr_size,

[Nouveau] [PATCH v3 05/15] secboot: remove fixup_hs_desc hook

2016-11-02 Thread Alexandre Courbot 
This hook can be removed if the function writing the HS
descriptor is aware of WPR settings. Let's do that as it allows us to
make the ACR descriptor structure private and save some code.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/gm200.c | 95 -
 drm/nouveau/nvkm/subdev/secboot/gm20b.c | 11 
 drm/nouveau/nvkm/subdev/secboot/priv.h  | 60 +++--
 3 files changed, 79 insertions(+), 87 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c 
b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index b020e41d2391..e1c51f8293c8 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -771,7 +771,7 @@ ls_ucode_mgr_write_wpr(struct gm200_secboot *gsb, struct 
ls_ucode_mgr *mgr,
u8 desc[gsb->func->bl_desc_size];
struct gm200_flcn_bl_desc gdesc;
 
-   ls_ucode_img_populate_bl_desc(img, gsb->wpr_addr,
+   ls_ucode_img_populate_bl_desc(img, gsb->acr_wpr_addr,
  );
gsb->func->fixup_bl_desc(, );
nvkm_gpuobj_memcpy_to(wpr_blob,
@@ -846,8 +846,11 @@ gm200_secboot_prepare_ls_blob(struct gm200_secboot *gsb)
 
/* If WPR address and size are not fixed, set them to fit the LS blob */
if (!gsb->wpr_size) {
-   gsb->wpr_addr = gsb->ls_blob->addr;
-   gsb->wpr_size = gsb->ls_blob->size;
+   gsb->acr_wpr_addr = gsb->ls_blob->addr;
+   gsb->acr_wpr_size = gsb->ls_blob->size;
+   } else {
+   gsb->acr_wpr_addr = gsb->wpr_addr;
+   gsb->acr_wpr_size = gsb->wpr_size;
}
 
/* Write LS blob */
@@ -925,6 +928,69 @@ gm200_secboot_populate_hsf_bl_desc(void *acr_image,
 }
 
 /**
+ * struct hsflcn_acr_desc - data section of the HS firmware
+ *
+ * This header is to be copied at the beginning of DMEM by the HS bootloader.
+ *
+ * @signature: signature of ACR ucode
+ * @wpr_region_id: region ID holding the WPR header and its details
+ * @wpr_offset:offset from the WPR region holding the wpr 
header
+ * @regions:   region descriptors
+ * @nonwpr_ucode_blob_size:size of LS blob
+ * @nonwpr_ucode_blob_start:   FB location of LS blob is
+ */
+struct hsflcn_acr_desc {
+   union {
+   u8 reserved_dmem[0x200];
+   u32 signatures[4];
+   } ucode_reserved_space;
+   u32 wpr_region_id;
+   u32 wpr_offset;
+   u32 mmu_mem_range;
+#define FLCN_ACR_MAX_REGIONS 2
+   struct {
+   u32 no_regions;
+   struct {
+   u32 start_addr;
+   u32 end_addr;
+   u32 region_id;
+   u32 read_mask;
+   u32 write_mask;
+   u32 client_mask;
+   } region_props[FLCN_ACR_MAX_REGIONS];
+   } regions;
+   u32 ucode_blob_size;
+   u64 ucode_blob_base __aligned(8);
+   struct {
+   u32 vpr_enabled;
+   u32 vpr_start;
+   u32 vpr_end;
+   u32 hdcp_policies;
+   } vpr_desc;
+};
+
+static void
+gm200_secboot_fixup_hs_desc(struct gm200_secboot *gsb,
+   struct hsflcn_acr_desc *desc)
+{
+   desc->ucode_blob_base = gsb->ls_blob->addr;
+   desc->ucode_blob_size = gsb->ls_blob->size;
+
+   desc->wpr_offset = 0;
+
+   /* WPR region information if WPR is not fixed */
+   if (gsb->wpr_size == 0) {
+   desc->wpr_region_id = 1;
+   desc->regions.no_regions = 1;
+   desc->regions.region_props[0].region_id = 1;
+   desc->regions.region_props[0].start_addr =
+gsb->acr_wpr_addr >> 8;
+   desc->regions.region_props[0].end_addr =
+  (gsb->acr_wpr_addr + gsb->acr_wpr_size) >> 8;
+   }
+}
+
+/**
  * gm200_secboot_prepare_hs_blob - load and prepare a HS blob and BL descriptor
  *
  * @gsb secure boot instance to prepare for
@@ -957,12 +1023,12 @@ gm200_secboot_prepare_hs_blob(struct gm200_secboot *gsb, 
const char *fw,
 
acr_data = acr_image + hsbin_hdr->data_offset;
 
-   /* Patch descriptor? */
+   /* Patch descriptor with WPR information? */
if (patch) {
fw_hdr = acr_image + hsbin_hdr->header_offset;
load_hdr = acr_image + fw_hdr->hdr_offset;
desc = acr_data + load_hdr->data_dma_base;
-   gsb->func->fixup_hs_desc(gsb, desc);
+   gm200_secboot_fixup_hs_desc(gsb, desc);
}
 
/* Generate HS BL descriptor */
@@ -1404,29 +1470,10 @@ gm200_secboot_fixup_bl_desc(const struct 
gm200_flcn_bl_desc *desc, void *ret)
memcpy(ret, desc, sizeof(*desc));
 }
 
-static

[Nouveau] [PATCH v3 12/15] secboot: remove unneeded ls_ucode_img member

2016-11-02 Thread Alexandre Courbot 
ucode_header is not used anywhere, so just get rid of it.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c| 25 +++--
 drm/nouveau/nvkm/subdev/secboot/ls_ucode.h|  2 --
 drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c |  2 --
 3 files changed, 7 insertions(+), 22 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c 
b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
index b350e107eff0..cdba9ffc5bbe 100644
--- a/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
+++ b/drm/nouveau/nvkm/subdev/secboot/acr_r352.c
@@ -214,12 +214,6 @@ ls_ucode_img_fill_headers(struct acr_r352 *acr, struct 
ls_ucode_img *img,
const struct acr_r352_ls_func *func =
acr->func->ls_func[img->falcon_id];
 
-   if (img->ucode_header) {
-   nvkm_fatal(acr->base.subdev,
-  "images withough loader are not supported yet!\n");
-   return offset;
-   }
-
/* Fill WPR header */
whdr->falcon_id = img->falcon_id;
whdr->bootstrap_owner = acr->base.func->boot_falcon;
@@ -309,7 +303,6 @@ ls_ucode_mgr_cleanup(struct ls_ucode_mgr *mgr)
 
list_for_each_entry_safe(img, t, >img_list, node) {
kfree(img->ucode_data);
-   kfree(img->ucode_header);
kfree(img);
}
 }
@@ -362,6 +355,10 @@ ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct 
ls_ucode_mgr *mgr,
nvkm_kmap(wpr_blob);
 
list_for_each_entry(img, >img_list, node) {
+   const struct acr_r352_ls_func *ls_func =
+acr->func->ls_func[img->falcon_id];
+   u8 gdesc[ls_func->bl_desc_size];
+
nvkm_gpuobj_memcpy_to(wpr_blob, pos, >wpr_header,
  sizeof(img->wpr_header));
 
@@ -369,18 +366,10 @@ ls_ucode_mgr_write_wpr(struct acr_r352 *acr, struct 
ls_ucode_mgr *mgr,
 >lsb_header, sizeof(img->lsb_header));
 
/* Generate and write BL descriptor */
-   if (!img->ucode_header) {
-   const struct acr_r352_ls_func *ls_func =
-acr->func->ls_func[img->falcon_id];
-   u8 gdesc[ls_func->bl_desc_size];
-
-   ls_func->generate_bl_desc(>base, img, wpr_addr,
- gdesc);
+   ls_func->generate_bl_desc(>base, img, wpr_addr, gdesc);
 
-   nvkm_gpuobj_memcpy_to(wpr_blob,
- img->lsb_header.bl_data_off,
- gdesc, ls_func->bl_desc_size);
-   }
+   nvkm_gpuobj_memcpy_to(wpr_blob, img->lsb_header.bl_data_off,
+ gdesc, ls_func->bl_desc_size);
 
/* Copy ucode */
nvkm_gpuobj_memcpy_to(wpr_blob, img->lsb_header.ucode_off,
diff --git a/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h 
b/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h
index 0518371a287c..3d8c42e11847 100644
--- a/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h
+++ b/drm/nouveau/nvkm/subdev/secboot/ls_ucode.h
@@ -173,7 +173,6 @@ struct ls_ucode_img_desc {
  * @node:  to link within lsf_ucode_mgr
  * @falcon_id: ID of the falcon this LS firmware is for
  * @ucode_desc:loaded or generated map of ucode_data
- * @ucode_header:  header of the firmware
  * @ucode_data:firmware payload (code and data)
  * @ucode_size:size in bytes of data in ucode_data
  * @wpr_header:WPR header to be written to the LS blob
@@ -188,7 +187,6 @@ struct ls_ucode_img {
enum nvkm_falconidx falcon_id;
 
struct ls_ucode_img_desc ucode_desc;
-   u32 *ucode_header;
u8 *ucode_data;
u32 ucode_size;
 
diff --git a/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c 
b/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c
index 09f5f1f1a50d..1c32cb0f16f9 100644
--- a/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c
+++ b/drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c
@@ -98,8 +98,6 @@ ls_ucode_img_load_gr(const struct nvkm_subdev *subdev, struct 
ls_ucode_img *img,
char f[64];
int ret;
 
-   img->ucode_header = NULL;
-
snprintf(f, sizeof(f), "gr/%s_bl", falcon_name);
ret = nvkm_firmware_get(subdev->device, f, );
if (ret)
-- 
2.10.0

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[Nouveau] [PATCH v3 06/15] secboot: add low-secure firmware hooks

2016-11-02 Thread Alexandre Courbot 
Secure firmwares provided by NVIDIA will follow the same overall
principle, but may slightly differ in format, or not use the same
bootloader descriptor even on the same chip. In order to handle
this as gracefully as possible, turn the LS firmware functions into
hooks that can be overloaded as needed.

The current hooks cover the external firmware loading as well as the
bootloader descriptor generation.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/gm200.c | 239 ++--
 drm/nouveau/nvkm/subdev/secboot/gm20b.c |  29 
 drm/nouveau/nvkm/subdev/secboot/priv.h  | 193 ++
 3 files changed, 264 insertions(+), 197 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c 
b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index e1c51f8293c8..8571a4b4d56c 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -130,175 +130,6 @@ struct fw_bl_desc {
 };
 
 
-/*
- *
- * LS blob structures
- *
- */
-
-/**
- * struct lsf_ucode_desc - LS falcon signatures
- * @prd_keys:  signature to use when the GPU is in production mode
- * @dgb_keys:  signature to use when the GPU is in debug mode
- * @b_prd_present: whether the production key is present
- * @b_dgb_present: whether the debug key is present
- * @falcon_id: ID of the falcon the ucode applies to
- *
- * Directly loaded from a signature file.
- */
-struct lsf_ucode_desc {
-   u8  prd_keys[2][16];
-   u8  dbg_keys[2][16];
-   u32 b_prd_present;
-   u32 b_dbg_present;
-   u32 falcon_id;
-};
-
-/**
- * struct lsf_lsb_header - LS firmware header
- * @signature: signature to verify the firmware against
- * @ucode_off: offset of the ucode blob in the WPR region. The ucode
- *  blob contains the bootloader, code and data of the
- *  LS falcon
- * @ucode_size:size of the ucode blob, including bootloader
- * @data_size: size of the ucode blob data
- * @bl_code_size:  size of the bootloader code
- * @bl_imem_off:   offset in imem of the bootloader
- * @bl_data_off:   offset of the bootloader data in WPR region
- * @bl_data_size:  size of the bootloader data
- * @app_code_off:  offset of the app code relative to ucode_off
- * @app_code_size: size of the app code
- * @app_data_off:  offset of the app data relative to ucode_off
- * @app_data_size: size of the app data
- * @flags: flags for the secure bootloader
- *
- * This structure is written into the WPR region for each managed falcon. Each
- * instance is referenced by the lsb_offset member of the corresponding
- * lsf_wpr_header.
- */
-struct lsf_lsb_header {
-   struct lsf_ucode_desc signature;
-   u32 ucode_off;
-   u32 ucode_size;
-   u32 data_size;
-   u32 bl_code_size;
-   u32 bl_imem_off;
-   u32 bl_data_off;
-   u32 bl_data_size;
-   u32 app_code_off;
-   u32 app_code_size;
-   u32 app_data_off;
-   u32 app_data_size;
-   u32 flags;
-#define LSF_FLAG_LOAD_CODE_AT_01
-#define LSF_FLAG_DMACTL_REQ_CTX4
-#define LSF_FLAG_FORCE_PRIV_LOAD   8
-};
-
-/**
- * struct lsf_wpr_header - LS blob WPR Header
- * @falcon_id: LS falcon ID
- * @lsb_offset:offset of the lsb_lsf_header in the WPR region
- * @bootstrap_owner:   secure falcon reponsible for bootstrapping the LS falcon
- * @lazy_bootstrap:skip bootstrapping by ACR
- * @status:bootstrapping status
- *
- * An array of these is written at the beginning of the WPR region, one for
- * each managed falcon. The array is terminated by an instance which falcon_id
- * is LSF_FALCON_ID_INVALID.
- */
-struct lsf_wpr_header {
-   u32  falcon_id;
-   u32  lsb_offset;
-   u32  bootstrap_owner;
-   u32  lazy_bootstrap;
-   u32  status;
-#define LSF_IMAGE_STATUS_NONE  0
-#define LSF_IMAGE_STATUS_COPY  1
-#define LSF_IMAGE_STATUS_VALIDATION_CODE_FAILED2
-#define LSF_IMAGE_STATUS_VALIDATION_DATA_FAILED3
-#define LSF_IMAGE_STATUS_VALIDATION_DONE   4
-#define LSF_IMAGE_STATUS_VALIDATION_SKIPPED5
-#define LSF_IMAGE_STATUS_BOOTSTRAP_READY   6
-};
-
-
-/**
- * struct ls_ucode_img_desc - descriptor of firmware image
- * @descriptor_size:   size of this descriptor
- * @image_size:size of the whole image
- * @bootloader_start_offset:   start offset of the bootloader in ucode image
- * @bootloader_size:   size of the bootloader
- * @bootloader_imem_offset:start off set of the bootloader in IMEM
- * @bootloader_entry_point:entry point of the bootloader in IMEM
- * @app_start_offset:  start offset of the LS firmware
- * @app_size:  size of the LS firmware's

[Nouveau] [PATCH v3 07/15] secboot: generate HS BL descriptor in hook

2016-11-02 Thread Alexandre Courbot 
Use the HS hook to completely generate the HS BL descriptor, similarly
to what is done in the LS hook, instead of (arbitrarily) using the
acr_v1 format as an intermediate.

This allows us to make the bootloader descriptor structures private to
each implementation, resulting in a cleaner an more consistent design.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/gm200.c | 177 
 drm/nouveau/nvkm/subdev/secboot/gm20b.c |  43 +++-
 drm/nouveau/nvkm/subdev/secboot/priv.h  |  71 +++--
 3 files changed, 137 insertions(+), 154 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c 
b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index 8571a4b4d56c..6f45706f8598 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -174,21 +174,45 @@ struct hsf_fw_header {
u32 hdr_size;
 };
 
+
 /**
- * struct hsf_load_header - HS firmware load header
+ * struct gm200_flcn_bl_desc - DMEM bootloader descriptor
+ * @signature: 16B signature for secure code. 0s if no secure code
+ * @ctx_dma:   DMA context to be used by BL while loading code/data
+ * @code_dma_base: 256B-aligned Physical FB Address where code is located
+ * (falcon's $xcbase register)
+ * @non_sec_code_off:  offset from code_dma_base where the non-secure code is
+ *  located. The offset must be multiple of 256 to help 
perf
+ * @non_sec_code_size: the size of the nonSecure code part.
+ * @sec_code_off:  offset from code_dma_base where the secure code is
+ *  located. The offset must be multiple of 256 to help 
perf
+ * @sec_code_size: offset from code_dma_base where the secure code is
+ *  located. The offset must be multiple of 256 to help 
perf
+ * @code_entry_point:  code entry point which will be invoked by BL after
+ *  code is loaded.
+ * @data_dma_base: 256B aligned Physical FB Address where data is located.
+ * (falcon's $xdbase register)
+ * @data_size: size of data block. Should be multiple of 256B
+ *
+ * Structure used by the bootloader to load the rest of the code. This has
+ * to be filled by host and copied into DMEM at offset provided in the
+ * hsflcn_bl_desc.bl_desc_dmem_load_off.
  */
-struct hsf_load_header {
+struct gm200_flcn_bl_desc {
+   u32 reserved[4];
+   u32 signature[4];
+   u32 ctx_dma;
+   struct flcn_u64 code_dma_base;
u32 non_sec_code_off;
u32 non_sec_code_size;
-   u32 data_dma_base;
+   u32 sec_code_off;
+   u32 sec_code_size;
+   u32 code_entry_point;
+   struct flcn_u64 data_dma_base;
u32 data_size;
-   u32 num_apps;
-   struct {
-   u32 sec_code_off;
-   u32 sec_code_size;
-   } app[0];
 };
 
+
 /**
  * Convenience function to duplicate a firmware file in memory and check that
  * it has the required minimum size.
@@ -739,39 +763,6 @@ gm200_secboot_hsf_patch_signature(struct gm200_secboot 
*gsb, void *acr_image)
 }
 
 /**
- * gm200_secboot_populate_hsf_bl_desc() - populate BL descriptor for HS image
- */
-static void
-gm200_secboot_populate_hsf_bl_desc(void *acr_image,
-  struct gm200_flcn_bl_desc *bl_desc)
-{
-   struct fw_bin_header *hsbin_hdr = acr_image;
-   struct hsf_fw_header *fw_hdr = acr_image + hsbin_hdr->header_offset;
-   struct hsf_load_header *load_hdr = acr_image + fw_hdr->hdr_offset;
-
-   /*
-* Descriptor for the bootloader that will load the ACR image into
-* IMEM/DMEM memory.
-*/
-   fw_hdr = acr_image + hsbin_hdr->header_offset;
-   load_hdr = acr_image + fw_hdr->hdr_offset;
-   memset(bl_desc, 0, sizeof(*bl_desc));
-   bl_desc->ctx_dma = FALCON_DMAIDX_VIRT;
-   bl_desc->non_sec_code_off = load_hdr->non_sec_code_off;
-   bl_desc->non_sec_code_size = load_hdr->non_sec_code_size;
-   bl_desc->sec_code_off = load_hdr->app[0].sec_code_off;
-   bl_desc->sec_code_size = load_hdr->app[0].sec_code_size;
-   bl_desc->code_entry_point = 0;
-   /*
-* We need to set code_dma_base to the virtual address of the acr_blob,
-* and add this address to data_dma_base before writing it into DMEM
-*/
-   bl_desc->code_dma_base.lo = 0;
-   bl_desc->data_dma_base.lo = load_hdr->data_dma_base;
-   bl_desc->data_size = load_hdr->data_size;
-}
-
-/**
  * struct hsflcn_acr_desc - data section of the HS firmware
  *
  * This header is to be copied at the beginning of DMEM by the HS bootloader.
@@ -846,37 +837,44 @@ gm200_secboot_fixup_hs_desc(struct gm200_secboot *gsb,
 static int
 gm200_secboot_prepare_hs_blob(struct gm200_secboot *gsb, const char *fw,
  struct nvkm_gpuobj **blob,
- struct gm200_flcn_bl_desc *bl_desc, bool patch)
+

[Nouveau] [PATCH v3 01/15] core: constify nv*_printk macros

2016-11-02 Thread Alexandre Courbot 
Constify the local variables declared in these macros so we can pass
const pointers to them.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/include/nvkm/core/client.h | 4 ++--
 drm/nouveau/include/nvkm/core/device.h | 2 +-
 drm/nouveau/include/nvkm/core/subdev.h | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drm/nouveau/include/nvkm/core/client.h 
b/drm/nouveau/include/nvkm/core/client.h
index eaf5905a87a3..99083349c3d4 100644
--- a/drm/nouveau/include/nvkm/core/client.h
+++ b/drm/nouveau/include/nvkm/core/client.h
@@ -37,8 +37,8 @@ int nvkm_client_notify_put(struct nvkm_client *, int index);
 
 /* logging for client-facing objects */
 #define nvif_printk(o,l,p,f,a...) do { 
\
-   struct nvkm_object *_object = (o); \
-   struct nvkm_client *_client = _object->client; \
+   const struct nvkm_object *_object = (o);   \
+   const struct nvkm_client *_client = _object->client;   \
if (_client->debug >= NV_DBG_##l)  \
printk(KERN_##p "nouveau: %s:%08x:%08x: "f, _client->name, \
   _object->handle, _object->oclass, ##a); \
diff --git a/drm/nouveau/include/nvkm/core/device.h 
b/drm/nouveau/include/nvkm/core/device.h
index 6bc712f32c8b..d426b86e2712 100644
--- a/drm/nouveau/include/nvkm/core/device.h
+++ b/drm/nouveau/include/nvkm/core/device.h
@@ -262,7 +262,7 @@ extern const struct nvkm_sclass nvkm_udevice_sclass;
 
 /* device logging */
 #define nvdev_printk_(d,l,p,f,a...) do {   
\
-   struct nvkm_device *_device = (d); \
+   const struct nvkm_device *_device = (d);   \
if (_device->debug >= (l)) \
dev_##p(_device->dev, f, ##a); \
 } while(0)
diff --git a/drm/nouveau/include/nvkm/core/subdev.h 
b/drm/nouveau/include/nvkm/core/subdev.h
index 57adefa8b08e..ca9ed3d68f44 100644
--- a/drm/nouveau/include/nvkm/core/subdev.h
+++ b/drm/nouveau/include/nvkm/core/subdev.h
@@ -32,7 +32,7 @@ void nvkm_subdev_intr(struct nvkm_subdev *);
 
 /* subdev logging */
 #define nvkm_printk_(s,l,p,f,a...) do {
\
-   struct nvkm_subdev *_subdev = (s); \
+   const struct nvkm_subdev *_subdev = (s);   \
if (_subdev->debug >= (l)) {   \
dev_##p(_subdev->device->dev, "%s: "f, \
nvkm_subdev_name[_subdev->index], ##a);\
-- 
2.10.0

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[Nouveau] [PATCH v3 11/15] secboot: disable falcon interrupts before running

2016-11-02 Thread Alexandre Courbot 
Make sure we are not disturbed by spurious interrupts, as we poll the
halt bit anyway.

Signed-off-by: Alexandre Courbot 
---
 drm/nouveau/nvkm/subdev/secboot/gm200.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c 
b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index 4932757ab1a2..5801babdf959 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -26,6 +26,7 @@
 
 #include 
 #include 
+#include 
 
 /**
  * gm200_secboot_setup_falcon() - set up the secure falcon for secure boot
@@ -99,6 +100,9 @@ gm200_secboot_run_blob(struct nvkm_secboot *sb, struct 
nvkm_gpuobj *blob)
if (ret)
goto done;
 
+   /* Disable interrupts as we will poll for the HALT bit */
+   nvkm_mc_intr_mask(sb->subdev.device, sb->devidx, false);
+
/* Start the HS bootloader */
ret = nvkm_secboot_falcon_run(sb);
if (ret)
-- 
2.10.0

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Re: [Nouveau] [PATCH] gr: fallback to legacy paths during firmware lookup

2016-11-02 Thread Alexandre Courbot 
On 11/02/2016 02:07 PM, Ilia Mirkin wrote:
> On Wed, Nov 2, 2016 at 12:54 AM, Alexandre Courbot  
> wrote:
>> Look for firmware files using the legacy ("nouveau/nvxx_fuc") path
>> if they cannot be found in the new, "official" path. User setups were
>> broken by the switch, which is bad.
>>
>> There are only 4 firmware files we may want to look up that way, so
>> hardcode them into the lookup function. All new firmware files should
>> use the standard "nvidia//gr/" path.
>>
>> Fixes: 8539b37acef7 ("drm/nouveau/gr: use NVIDIA-provided external 
>> firmwares")
>> Signed-off-by: Alexandre Courbot 
>> ---
>>  drm/nouveau/nvkm/engine/gr/gf100.c | 56 
>> ++
>>  1 file changed, 51 insertions(+), 5 deletions(-)
>>
>> diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c 
>> b/drm/nouveau/nvkm/engine/gr/gf100.c
>> index 157919c788e6..9e65adbab21c 100644
>> --- a/drm/nouveau/nvkm/engine/gr/gf100.c
>> +++ b/drm/nouveau/nvkm/engine/gr/gf100.c
>> @@ -1756,24 +1756,70 @@ gf100_gr_ = {
>>  };
>>
>>  int
>> +gf100_gr_ctor_fw_legacy(struct gf100_gr *gr, const char *fwname,
>> +   struct gf100_gr_fuc *fuc)
>> +{
>> +   struct nvkm_subdev *subdev = >base.engine.subdev;
>> +   struct nvkm_device *device = subdev->device;
>> +   const struct firmware *fw;
>> +   char f[32];
>> +   int ret;
>> +
>> +   snprintf(f, sizeof(f), "nouveau/nv%02x_%s", device->chipset, fwname);
>> +   ret = request_firmware(, f, device->dev);
>> +   if (ret) {
>> +   snprintf(f, sizeof(f), "nouveau/%s", fwname);
>> +   ret = request_firmware(, f, device->dev);
>> +   if (ret) {
>> +   nvkm_error(subdev, "failed to load %s\n", fwname);
>> +   return ret;
>> +   }
>> +   }
>> +
>> +   fuc->size = fw->size;
>> +   fuc->data = kmemdup(fw->data, fuc->size, GFP_KERNEL);
>> +   release_firmware(fw);
>> +   return (fuc->data != NULL) ? 0 : -ENOMEM;
>> +}
>> +
>> +int
>>  gf100_gr_ctor_fw(struct gf100_gr *gr, const char *fwname,
>>  struct gf100_gr_fuc *fuc)
>>  {
>> struct nvkm_subdev *subdev = >base.engine.subdev;
>> struct nvkm_device *device = subdev->device;
>> +   const char *legacy_fwname = NULL;
>> const struct firmware *fw;
>> int ret;
>>
>> ret = nvkm_firmware_get(device, fwname, );
>> -   if (ret) {
>> +   /* firmware found, success! */
>> +   if (!ret) {
>> +   fuc->size = fw->size;
>> +   fuc->data = kmemdup(fw->data, fuc->size, GFP_KERNEL);
>> +   nvkm_firmware_put(fw);
>> +   return (fuc->data != NULL) ? 0 : -ENOMEM;
>> +   }
>> +
>> +   /* see if this firmware has a legacy path */
>> +   if (!strcmp(fwname, "fecs_inst"))
>> +   legacy_fwname = "fuc409c";
>> +   else if (!strcmp(fwname, "fecs_data"))
>> +   legacy_fwname = "fuc409d";
>> +   else if (!strcmp(fwname, "gpccs_inst"))
>> +   legacy_fwname = "fuc41ac";
>> +   else if (!strcmp(fwname, "gpccs_data"))
>> +   legacy_fwname = "fuc41ad";
> 
> As I mentioned on IRC, I find this strcmp thing a little jarring. It
> should be pretty easy to just pass the legacy fwname into
> gf100_gr_ctor_fw directly - there are only a handful of callers, and
> most would just pass NULL in as the legacy fwname - only the ones in
> gf100.c would pass the "old" names in.

Yeah, that was the original approach actually. I switched to this for
the following reasons:

- We don't want to encourage using this legacy path, hence hiding it
from callers
- There are only 4 possible legacy files - it's ugly but still
manageable and contained in a single function

Of course, if the general consensus is that this is too ugly, it would
be trivial to turn it the way you suggested, so I don't feel too
strongly for one approach over the other.
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