Re: [Nouveau] [PATCH] drm/nouveau: fence: fix type cast warning in nouveau_fence_emit()
Reviewed-by: Lyude Paul
On Sat, 2023-09-16 at 03:14 +0200, Danilo Krummrich wrote:
> Fix the following warning.
>
> drivers/gpu/drm/nouveau/nouveau_fence.c:210:45: sparse: sparse:
> incorrect type in initializer (different address spaces)
> @@ expected struct nouveau_channel *chan
> @@ got struct nouveau_channel [noderef] __rcu *channel
>
> We're just about to emit the fence, there is nothing to protect against
> yet, hence it is safe to just cast __rcu away.
>
> Reported-by: kernel test robot
> Closes:
> https://lore.kernel.org/oe-kbuild-all/202309140340.bwkxzadx-...@intel.com/
> Fixes: 978474dc8278 ("drm/nouveau: fence: fix undefined fence state after
> emit")
> Signed-off-by: Danilo Krummrich
> ---
> drivers/gpu/drm/nouveau/nouveau_fence.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c
> b/drivers/gpu/drm/nouveau/nouveau_fence.c
> index 61d9e70da9fd..ca762ea55413 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_fence.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
> @@ -207,7 +207,7 @@ nouveau_fence_context_new(struct nouveau_channel *chan,
> struct nouveau_fence_cha
> int
> nouveau_fence_emit(struct nouveau_fence *fence)
> {
> - struct nouveau_channel *chan = fence->channel;
> + struct nouveau_channel *chan = unrcu_pointer(fence->channel);
> struct nouveau_fence_chan *fctx = chan->fence;
> struct nouveau_fence_priv *priv = (void*)chan->drm->fence;
> int ret;
--
Cheers,
Lyude Paul (she/her)
Software Engineer at Red Hat
Re: [PATCH 0/9] drm: Annotate structs with __counted_by
On Fri, 22 Sep 2023 10:32:05 -0700, Kees Cook wrote: > This is a batch of patches touching drm for preparing for the coming > implementation by GCC and Clang of the __counted_by attribute. Flexible > array members annotated with __counted_by can have their accesses > bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array > indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). > > As found with Coccinelle[1], add __counted_by to structs that would > benefit from the annotation. > > [...] Since this got Acks, I figure I should carry it in my tree. Let me know if this should go via drm instead. Applied to for-next/hardening, thanks! [1/9] drm/amd/pm: Annotate struct smu10_voltage_dependency_table with __counted_by https://git.kernel.org/kees/c/a6046ac659d6 [2/9] drm/amdgpu/discovery: Annotate struct ip_hw_instance with __counted_by https://git.kernel.org/kees/c/4df33089b46f [3/9] drm/i915/selftests: Annotate struct perf_series with __counted_by https://git.kernel.org/kees/c/ffd3f823bdf6 [4/9] drm/msm/dpu: Annotate struct dpu_hw_intr with __counted_by https://git.kernel.org/kees/c/2de35a989b76 [5/9] drm/nouveau/pm: Annotate struct nvkm_perfdom with __counted_by https://git.kernel.org/kees/c/188aeb08bfaa [6/9] drm/vc4: Annotate struct vc4_perfmon with __counted_by https://git.kernel.org/kees/c/59a54dc896c3 [7/9] drm/virtio: Annotate struct virtio_gpu_object_array with __counted_by https://git.kernel.org/kees/c/5cd476de33af [8/9] drm/vmwgfx: Annotate struct vmw_surface_dirty with __counted_by https://git.kernel.org/kees/c/b426f2e5356a [9/9] drm/v3d: Annotate struct v3d_perfmon with __counted_by https://git.kernel.org/kees/c/dc662fa1b0e4 Take care, -- Kees Cook
Re: [Nouveau] [PATCH 0/2][next] nouveau/svm: Replace one-element array with flexible-array member
On Wed, 16 Aug 2023 12:03:06 -0600, Gustavo A. R. Silva wrote: > This small series aims to replace a one-element array with a > flexible-array member in struct nouveau_svm. And, while at it, > fix a checkpatch.pl error. > > Gustavo A. R. Silva (2): > nouveau/svm: Replace one-element array with flexible-array member in > struct nouveau_svm > nouveau/svm: Split assignment from if conditional > > [...] These look trivially correct and haven't had further feedback for over a month. Applied to for-next/hardening, thanks! [1/2] nouveau/svm: Replace one-element array with flexible-array member in struct nouveau_svm https://git.kernel.org/kees/c/6ad33b53c9b8 [2/2] nouveau/svm: Split assignment from if conditional https://git.kernel.org/kees/c/4cb2e89fea5f Take care, -- Kees Cook
[Nouveau] Some monitors not working after 6.2 kernel due to Nouveau commit
Dear Nouveau developers, I encountered this problem using Artix Linux: https://forum.artixlinux.org/index.php/topic,5859 On 2 laptops (Dell M4400 and M4500, Nvidia graphics using Nouveau) which have a VGA port, a Maxim MX11-LCD15 TV with a VGA port stopped working, also another Panasonic TX-26LXD500 TV using VGA. These are older TV's, from the 2000's, I guess the EDID might not be entirely compliant with modern standards. A newish AEC monitor (not TV) did work with the latest kernels so not all VGA connected monitors are affected. >From searching online it seems that there are numerous reports of monitors >stopping working with the 6.2 kernel in various distros. This is the commit where the problem apparently first appears: https://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-fixes=f530bc60a30bee47ff51b7fb71511fdd058b774a commit f530bc60a30bee47ff51b7fb71511fdd058b774a (HEAD) Author: Ben Skeggs Date: Wed Jun 1 20:46:33 2022 +1000 drm/nouveau/disp: move HDMI config into acquire + infoframe methods v2: - fix typo in sorhdmi/g84 struct initialiser (kbuild test robot) v3: - less convoluted flow control in nvkm_uoutp_mthd_acquire_tmds() (lyude) v4: - we don't support hdmi on original nv50, don't try Signed-off-by: Ben Skeggs Reviewed-by: Lyude Paul
[Nouveau] [PATCH] drm/nouveau/flcn/msgq: fix potential deadlock on >lock
As >lock is acquired under both irq context from
gp102_sec2_intr() and softirq context from gm20b_pmu_recv(),
thus irq should be disabled while acquiring that lock, otherwise
there would be potential deadlock.
gm20b_pmu_recv()
--> nvkm_falcon_msgq_recv()
--> nvkm_falcon_msgq_open()
--> spin_lock(>lock)
--> gp102_sec2_intr()
--> nvkm_falcon_msgq_recv()
--> nvkm_falcon_msgq_open()
--> spin_lock(>lock)
This flaw was found by an experimental static analysis tool I am
developing for irq-related deadlock.
To prevent the potential problem, I change to spin_lock_irq() and
spin_unlock_irq() on the lock.
Signed-off-by: Chengfeng Ye
---
drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c
b/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c
index 16b246fda666..5c3b43216ee8 100644
--- a/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c
+++ b/drivers/gpu/drm/nouveau/nvkm/falcon/msgq.c
@@ -25,7 +25,7 @@
static void
nvkm_falcon_msgq_open(struct nvkm_falcon_msgq *msgq)
{
- spin_lock(>lock);
+ spin_lock_irq(>lock);
msgq->position = nvkm_falcon_rd32(msgq->qmgr->falcon, msgq->tail_reg);
}
@@ -37,7 +37,7 @@ nvkm_falcon_msgq_close(struct nvkm_falcon_msgq *msgq, bool
commit)
if (commit)
nvkm_falcon_wr32(falcon, msgq->tail_reg, msgq->position);
- spin_unlock(>lock);
+ spin_unlock_irq(>lock);
}
bool
--
2.17.1
[Nouveau] [PATCH 37/44] drm/nouveau/disp/r535: initial support
From: Ben Skeggs
Adds support for modesetting on RM.
Signed-off-by: Ben Skeggs
---
drivers/gpu/drm/nouveau/dispnv50/core.c |1 +
drivers/gpu/drm/nouveau/dispnv50/disp.c | 141 ++
drivers/gpu/drm/nouveau/include/nvif/class.h |2 +
.../drm/nouveau/include/nvkm/engine/disp.h| 19 +
.../gpu/drm/nouveau/include/nvkm/subdev/gsp.h | 35 +
.../common/sdk/nvidia/inc/class/cl0005.h | 38 +
.../nvidia/inc/class/cl2080_notification.h| 42 +
.../nvidia/inc/ctrl/ctrl0073/ctrl0073common.h | 39 +
.../nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h| 166 ++
.../sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h | 335
.../inc/ctrl/ctrl0073/ctrl0073specific.h | 216 +++
.../nvidia/inc/ctrl/ctrl0073/ctrl0073system.h | 34 +
.../nvidia/inc/ctrl/ctrl2080/ctrl2080event.h | 41 +
.../inc/ctrl/ctrl2080/ctrl2080internal.h | 43 +
.../535.54.03/common/sdk/nvidia/inc/nvos.h| 27 +
.../535.54.03/nvidia/generated/g_allclasses.h | 33 +
.../nvidia/generated/g_mem_desc_nvoc.h| 32 +
.../nvidia/generated/g_rpc-structures.h | 13 +
.../nvidia/inc/kernel/gpu/intr/engine_idx.h |2 +
.../nvidia/inc/kernel/os/nv_memory_type.h | 31 +
drivers/gpu/drm/nouveau/nvif/disp.c |1 +
.../gpu/drm/nouveau/nvkm/engine/device/base.c | 10 +
.../gpu/drm/nouveau/nvkm/engine/disp/Kbuild |3 +
.../gpu/drm/nouveau/nvkm/engine/disp/ad102.c | 52 +
.../gpu/drm/nouveau/nvkm/engine/disp/base.c |3 +-
.../gpu/drm/nouveau/nvkm/engine/disp/chan.h |4 +
.../gpu/drm/nouveau/nvkm/engine/disp/ga102.c |2 +-
.../gpu/drm/nouveau/nvkm/engine/disp/gv100.c |4 +-
.../gpu/drm/nouveau/nvkm/engine/disp/ior.h|2 +
.../gpu/drm/nouveau/nvkm/engine/disp/outp.c |3 +-
.../gpu/drm/nouveau/nvkm/engine/disp/priv.h |3 +
.../gpu/drm/nouveau/nvkm/engine/disp/r535.c | 1671 +
.../gpu/drm/nouveau/nvkm/engine/disp/tu102.c |2 +-
.../gpu/drm/nouveau/nvkm/engine/disp/uconn.c | 31 +-
.../gpu/drm/nouveau/nvkm/subdev/gsp/r535.c| 129 ++
35 files changed, 3202 insertions(+), 8 deletions(-)
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl0005.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl2080_notification.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073common.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080event.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/generated/g_allclasses.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/generated/g_mem_desc_nvoc.h
create mode 100644
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/inc/kernel/os/nv_memory_type.h
create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c
create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c
diff --git a/drivers/gpu/drm/nouveau/dispnv50/core.c
b/drivers/gpu/drm/nouveau/dispnv50/core.c
index abefc2343443..f045515696cb 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/core.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/core.c
@@ -42,6 +42,7 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core
**pcore)
int version;
int (*new)(struct nouveau_drm *, s32, struct nv50_core **);
} cores[] = {
+ { AD102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
{ GA102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
{ TU102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
{ GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new },
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 57b6864fb9d0..0f23c2bb814b 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -1592,6 +1592,146 @@ nv50_sor_atomic_disable(struct drm_encoder *encoder,
struct drm_atomic_state *st
nv_encoder->crtc = NULL;
}
+// common/inc/displayport/displayport.h
+#define DP_CONFIG_WATERMARK_ADJUST 2
+#define DP_CONFIG_WATERMARK_LIMIT 20
+#define DP_CONFIG_INCREASED_WATERMARK_ADJUST 8
+#define DP_CONFIG_INCREASED_WATERMARK_LIMIT 22
+
+static bool
+nv50_sor_dp_watermark_sst(struct nouveau_encoder *outp,
+ struct nv50_head *head, struct nv50_head_atom *asyh)
+{
+ bool enhancedFraming = outp->dp.dpcd[DP_MAX_LANE_COUNT] &
DP_ENHANCED_FRAME_CAP;
+ u64
Re: [Nouveau] [PATCH 3/3] drm/nouveau: exec: report max pushs through getparam
On Thu, 2023-09-28 at 11:12 +1000, Dave Airlie wrote:
> On Thu, 28 Sept 2023 at 07:55, Faith Ekstrand
> wrote:
> >
> > On Wed, 2023-09-27 at 03:22 +0200, Danilo Krummrich wrote:
> > > Report the maximum number of IBs that can be pushed with a single
> > > DRM_IOCTL_NOUVEAU_EXEC through DRM_IOCTL_NOUVEAU_GETPARAM.
> > >
> > > While the maximum number of IBs per ring might vary between
> > > chipsets,
> > > the kernel will make sure that userspace can only push a fraction
> > > of
> > > the
> > > maximum number of IBs per ring per job, such that we avoid a
> > > situation
> > > where there's only a single job occupying the ring, which could
> > > potentially lead to the ring run dry.
> > >
> > > Using DRM_IOCTL_NOUVEAU_GETPARAM to report the maximum number of
> > > IBs
> > > that can be pushed with a single DRM_IOCTL_NOUVEAU_EXEC implies
> > > that
> > > all channels of a given device have the same ring size.
> >
> > There's a bunch of nouveau kernel details I don't know here but the
> > interface looks good and I prefer it to a #define in the header.
> >
> > Acked-by: Faith Ekstrand
>
> For the series
>
> Reviewed-by: Dave Airlie
>
> we should probably land this in drm-misc-fixes, since it would be
> good
> to have in 6.6
Agreed. My Mesa patch should handle both the case where we have the
getparam and when we don't. However, I'd rather just make it part of
the new UAPI from the start and have a hard requirement on it since it
may reduce the current maximum in the header.
~Faith
> Dave.
>
> >
> >
> > > Signed-off-by: Danilo Krummrich
> > > ---
> > > drivers/gpu/drm/nouveau/nouveau_abi16.c | 19 +++
> > > drivers/gpu/drm/nouveau/nouveau_chan.c | 2 +-
> > > drivers/gpu/drm/nouveau/nouveau_dma.h | 3 +++
> > > drivers/gpu/drm/nouveau/nouveau_exec.c | 7 ---
> > > drivers/gpu/drm/nouveau/nouveau_exec.h | 5 +
> > > include/uapi/drm/nouveau_drm.h | 10 ++
> > > 6 files changed, 42 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c
> > > b/drivers/gpu/drm/nouveau/nouveau_abi16.c
> > > index 30afbec9e3b1..1a198689b391 100644
> > > --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
> > > +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
> > > @@ -31,6 +31,7 @@
> > >
> > > #include "nouveau_drv.h"
> > > #include "nouveau_dma.h"
> > > +#include "nouveau_exec.h"
> > > #include "nouveau_gem.h"
> > > #include "nouveau_chan.h"
> > > #include "nouveau_abi16.h"
> > > @@ -183,6 +184,20 @@ nouveau_abi16_fini(struct nouveau_abi16
> > > *abi16)
> > > cli->abi16 = NULL;
> > > }
> > >
> > > +static inline unsigned int
> > > +getparam_dma_ib_max(struct nvif_device *device)
> > > +{
> > > + const struct nvif_mclass dmas[] = {
> > > + { NV03_CHANNEL_DMA, 0 },
> > > + { NV10_CHANNEL_DMA, 0 },
> > > + { NV17_CHANNEL_DMA, 0 },
> > > + { NV40_CHANNEL_DMA, 0 },
> > > + {}
> > > + };
> > > +
> > > + return nvif_mclass(>object, dmas) < 0 ?
> > > NV50_DMA_IB_MAX : 0;
> > > +}
> > > +
> > > int
> > > nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS)
> > > {
> > > @@ -247,6 +262,10 @@
> > > nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS)
> > > case NOUVEAU_GETPARAM_GRAPH_UNITS:
> > > getparam->value = nvkm_gr_units(gr);
> > > break;
> > > + case NOUVEAU_GETPARAM_EXEC_PUSH_MAX:
> > > + getparam->value = getparam_dma_ib_max(device) /
> > > + NOUVEAU_EXEC_PUSH_MAX_DIV;
> > > + break;
> > > default:
> > > NV_PRINTK(dbg, cli, "unknown parameter %lld\n",
> > > getparam->param);
> > > return -EINVAL;
> > > diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c
> > > b/drivers/gpu/drm/nouveau/nouveau_chan.c
> > > index ac56f4689ee3..c3c2ab887978 100644
> > > --- a/drivers/gpu/drm/nouveau/nouveau_chan.c
> > > +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
> > > @@ -456,7 +456,7 @@ nouveau_channel_init(struct nouveau_channel
> > > *chan, u32 vram, u32 gart)
> > > chan->user_get = 0x44;
> > > chan->user_get_hi = 0x60;
> > > chan->dma.ib_base = 0x1 / 4;
> > > - chan->dma.ib_max = (0x02000 / 8) - 1;
> > > + chan->dma.ib_max = NV50_DMA_IB_MAX;
> > > chan->dma.ib_put = 0;
> > > chan->dma.ib_free = chan->dma.ib_max - chan-
> > > > dma.ib_put;
> > > chan->dma.max = chan->dma.ib_base;
> > > diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h
> > > b/drivers/gpu/drm/nouveau/nouveau_dma.h
> > > index 1744d95b233e..c52cda82353e 100644
> > > --- a/drivers/gpu/drm/nouveau/nouveau_dma.h
> > > +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
> > > @@ -49,6 +49,9 @@ void nv50_dma_push(struct nouveau_channel *,
> > > u64
> > > addr, u32 length,
> > > /* Maximum push buffer size. */
> > > #define
Re: [Nouveau] [PATCH 3/3] drm/nouveau: exec: report max pushs through getparam
On Wed, 2023-09-27 at 03:22 +0200, Danilo Krummrich wrote:
> Report the maximum number of IBs that can be pushed with a single
> DRM_IOCTL_NOUVEAU_EXEC through DRM_IOCTL_NOUVEAU_GETPARAM.
>
> While the maximum number of IBs per ring might vary between chipsets,
> the kernel will make sure that userspace can only push a fraction of
> the
> maximum number of IBs per ring per job, such that we avoid a
> situation
> where there's only a single job occupying the ring, which could
> potentially lead to the ring run dry.
>
> Using DRM_IOCTL_NOUVEAU_GETPARAM to report the maximum number of IBs
> that can be pushed with a single DRM_IOCTL_NOUVEAU_EXEC implies that
> all channels of a given device have the same ring size.
There's a bunch of nouveau kernel details I don't know here but the
interface looks good and I prefer it to a #define in the header.
Acked-by: Faith Ekstrand
> Signed-off-by: Danilo Krummrich
> ---
> drivers/gpu/drm/nouveau/nouveau_abi16.c | 19 +++
> drivers/gpu/drm/nouveau/nouveau_chan.c | 2 +-
> drivers/gpu/drm/nouveau/nouveau_dma.h | 3 +++
> drivers/gpu/drm/nouveau/nouveau_exec.c | 7 ---
> drivers/gpu/drm/nouveau/nouveau_exec.h | 5 +
> include/uapi/drm/nouveau_drm.h | 10 ++
> 6 files changed, 42 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c
> b/drivers/gpu/drm/nouveau/nouveau_abi16.c
> index 30afbec9e3b1..1a198689b391 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
> @@ -31,6 +31,7 @@
>
> #include "nouveau_drv.h"
> #include "nouveau_dma.h"
> +#include "nouveau_exec.h"
> #include "nouveau_gem.h"
> #include "nouveau_chan.h"
> #include "nouveau_abi16.h"
> @@ -183,6 +184,20 @@ nouveau_abi16_fini(struct nouveau_abi16 *abi16)
> cli->abi16 = NULL;
> }
>
> +static inline unsigned int
> +getparam_dma_ib_max(struct nvif_device *device)
> +{
> + const struct nvif_mclass dmas[] = {
> + { NV03_CHANNEL_DMA, 0 },
> + { NV10_CHANNEL_DMA, 0 },
> + { NV17_CHANNEL_DMA, 0 },
> + { NV40_CHANNEL_DMA, 0 },
> + {}
> + };
> +
> + return nvif_mclass(>object, dmas) < 0 ?
> NV50_DMA_IB_MAX : 0;
> +}
> +
> int
> nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS)
> {
> @@ -247,6 +262,10 @@ nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS)
> case NOUVEAU_GETPARAM_GRAPH_UNITS:
> getparam->value = nvkm_gr_units(gr);
> break;
> + case NOUVEAU_GETPARAM_EXEC_PUSH_MAX:
> + getparam->value = getparam_dma_ib_max(device) /
> + NOUVEAU_EXEC_PUSH_MAX_DIV;
> + break;
> default:
> NV_PRINTK(dbg, cli, "unknown parameter %lld\n",
> getparam->param);
> return -EINVAL;
> diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c
> b/drivers/gpu/drm/nouveau/nouveau_chan.c
> index ac56f4689ee3..c3c2ab887978 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_chan.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
> @@ -456,7 +456,7 @@ nouveau_channel_init(struct nouveau_channel
> *chan, u32 vram, u32 gart)
> chan->user_get = 0x44;
> chan->user_get_hi = 0x60;
> chan->dma.ib_base = 0x1 / 4;
> - chan->dma.ib_max = (0x02000 / 8) - 1;
> + chan->dma.ib_max = NV50_DMA_IB_MAX;
> chan->dma.ib_put = 0;
> chan->dma.ib_free = chan->dma.ib_max - chan-
> >dma.ib_put;
> chan->dma.max = chan->dma.ib_base;
> diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h
> b/drivers/gpu/drm/nouveau/nouveau_dma.h
> index 1744d95b233e..c52cda82353e 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_dma.h
> +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
> @@ -49,6 +49,9 @@ void nv50_dma_push(struct nouveau_channel *, u64
> addr, u32 length,
> /* Maximum push buffer size. */
> #define NV50_DMA_PUSH_MAX_LENGTH 0x7f
>
> +/* Maximum IBs per ring. */
> +#define NV50_DMA_IB_MAX ((0x02000 / 8) - 1)
> +
> /* Object handles - for stuff that's doesn't use handle == oclass.
> */
> enum {
> NvDmaFB = 0x8002,
> diff --git a/drivers/gpu/drm/nouveau/nouveau_exec.c
> b/drivers/gpu/drm/nouveau/nouveau_exec.c
> index ba6913a3efb6..5b5c4a77b8e6 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_exec.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_exec.c
> @@ -346,7 +346,7 @@ nouveau_exec_ioctl_exec(struct drm_device *dev,
> struct nouveau_channel *chan = NULL;
> struct nouveau_exec_job_args args = {};
> struct drm_nouveau_exec *req = data;
> - int ret = 0;
> + int push_max, ret = 0;
>
> if (unlikely(!abi16))
> return -ENOMEM;
> @@ -371,9 +371,10 @@ nouveau_exec_ioctl_exec(struct drm_device *dev,
> if (!chan->dma.ib_max)
> return nouveau_abi16_put(abi16, -ENOSYS);
>
> - if
[Nouveau] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.c and bus.c with a series of the non-existing config "NOUVEAU_I2C_INTERNAL"
In the source files drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.c:26 and drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.c:214 refer to configuration options "CONFIG_NOUVEAU_I2C_INTERNAL" and "CONFIG_NOUVEAU_I2C_INTERNAL_DEFAULT" for conditional compilation, but these configuration options are not defined in any kconfig files, which means the "#ifdef CONFIG_NOUVEAU_I2C_INTERNAL_xxx" condition contains dead code. Do these configuration options need to be retained and added later? Or can we simply drop the dead code? Best regards, Yanjie Ren Ying Sun
[Nouveau] [PATCH 32/44] drm/nouveau/gsp/r535: add support for booting GSP-RM
From: Ben Skeggs This commit adds the initial code needed to boot the GSP-RM firmware provided by NVIDIA, bringing with it the beginnings of Ada support. Until it's had more testing and time to bake, support is disabled by default (except on Ada). GSP-RM usage can be enabled by passing the "config=NvGspRm=1" module option. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvif/cl0080.h |1 + .../drm/nouveau/include/nvkm/core/device.h|1 + .../drm/nouveau/include/nvkm/core/falcon.h|4 + .../drm/nouveau/include/nvkm/engine/falcon.h |2 + .../drm/nouveau/include/nvkm/subdev/bios.h|1 + .../gpu/drm/nouveau/include/nvkm/subdev/gsp.h | 171 +- .../nvidia/inc/ctrl/ctrl0073/ctrl0073system.h | 31 + .../nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h| 33 + .../common/shared/msgq/inc/msgq/msgq_priv.h | 46 + .../uproc/os/common/include/libos_init_args.h | 52 + .../nvalloc/common/inc/gsp/gsp_fw_sr_meta.h | 79 + .../nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h | 149 ++ .../arch/nvalloc/common/inc/rmRiscvUcode.h| 82 + .../nvidia/arch/nvalloc/common/inc/rmgspseq.h | 100 ++ .../nvidia/generated/g_chipset_nvoc.h | 38 + .../535.54.03/nvidia/generated/g_os_nvoc.h| 44 + .../nvidia/generated/g_rpc-structures.h | 52 + .../nvidia/inc/kernel/gpu/gpu_acpi_data.h | 74 + .../nvidia/inc/kernel/gpu/gsp/gsp_fw_heap.h | 33 + .../nvidia/inc/kernel/gpu/gsp/gsp_init_args.h | 57 + .../inc/kernel/gpu/gsp/gsp_static_config.h| 74 + .../nvidia/kernel/inc/vgpu/rpc_global_enums.h | 262 +++ .../gpu/drm/nouveau/include/nvrm/nvtypes.h| 24 + .../gpu/drm/nouveau/nvkm/engine/device/base.c | 66 + .../gpu/drm/nouveau/nvkm/engine/device/user.c |1 + drivers/gpu/drm/nouveau/nvkm/falcon/Kbuild|1 + drivers/gpu/drm/nouveau/nvkm/falcon/base.c|9 + drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c |6 + drivers/gpu/drm/nouveau/nvkm/falcon/tu102.c | 28 + .../gpu/drm/nouveau/nvkm/subdev/bios/base.c |8 + .../gpu/drm/nouveau/nvkm/subdev/gsp/Kbuild|5 + .../gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c | 57 + .../gpu/drm/nouveau/nvkm/subdev/gsp/base.c|1 + .../gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c | 359 .../gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c | 22 + .../gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c | 138 +- .../gpu/drm/nouveau/nvkm/subdev/gsp/priv.h| 42 + .../gpu/drm/nouveau/nvkm/subdev/gsp/r535.c| 1561 + .../gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c | 162 ++ .../gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c | 22 + 40 files changed, 3896 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/shared/msgq/inc/msgq/msgq_priv.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/uproc/os/common/include/libos_init_args.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_sr_meta.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/arch/nvalloc/common/inc/rmRiscvUcode.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/arch/nvalloc/common/inc/rmgspseq.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/generated/g_chipset_nvoc.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/generated/g_os_nvoc.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/generated/g_rpc-structures.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/inc/kernel/gpu/gpu_acpi_data.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/inc/kernel/gpu/gsp/gsp_fw_heap.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/inc/kernel/gpu/gsp/gsp_init_args.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/kernel/inc/vgpu/rpc_global_enums.h create mode 100644 drivers/gpu/drm/nouveau/include/nvrm/nvtypes.h create mode 100644 drivers/gpu/drm/nouveau/nvkm/falcon/tu102.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl0080.h b/drivers/gpu/drm/nouveau/include/nvif/cl0080.h index 8b5a240d57e4..8ccc082a4a63 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/cl0080.h
