Re: [Nouveau] [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail
On Wed, Nov 07, 2012 at 08:04:41PM +0100, Marcin Slusarz wrote: On Wed, Nov 07, 2012 at 10:08:47AM +1000, Ben Skeggs wrote: On Tue, Nov 06, 2012 at 10:48:52PM +0100, Marcin Slusarz wrote: Now it outputs: nouveau E[ PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail nouveau E[ PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP (0x011fde03) nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS: CCACHE (0x00145b4d) (0x002d) ENG2D ROP (0x0034db40) How about this instead? PGRAPH_STATUS : 0x011fde03 [BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP] PGRAPH_VSTATUS0: 0x00145b4d [CCACHE] PGRAPH_VSTATUS1: 0x002d [] PGRAPH_VSTATUS2: 0x0034db40 [ENG2D ROP] Looks good too. I'll post updated patch tomorrow. I removed square brackets to make this code as simple as possible (think about last space before ]). --- From: Marcin Slusarz marcin.slus...@gmail.com Subject: [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail Now it prints: nouveau E[ PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail nouveau E[ PGRAPH][:02:00.0] PGRAPH_STATUS : 0x011fde03 BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS0: 0x00145b4d CCACHE nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS0: 0x002d nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS0: 0x0034db40 ENG2D ROP instead of: [drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03 0x00145b4d 0x002d 0x0034db40 Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com --- drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 76 ++-- 1 file changed, 72 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c index ab3b9dc..0d67e86 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c @@ -184,6 +184,65 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine) return 0; } +static const struct nouveau_bitfield nv50_pgraph_status[] = { + { 0x0001, BUSY }, /* set when any bit is set */ + { 0x0002, DISPATCH }, + { 0x0004, UNK2 }, + { 0x0008, UNK3 }, + { 0x0010, UNK4 }, + { 0x0020, UNK5 }, + { 0x0040, M2MF }, + { 0x0080, UNK7 }, + { 0x0100, CTXPROG }, + { 0x0200, VFETCH }, + { 0x0400, CCACHE_UNK4 }, + { 0x0800, STRMOUT_GSCHED_UNK5 }, + { 0x1000, UNK14XX }, + { 0x2000, UNK24XX_CSCHED }, + { 0x4000, UNK1CXX }, + { 0x8000, CLIPID }, + { 0x0001, ZCULL }, + { 0x0002, ENG2D }, + { 0x0004, UNK34XX }, + { 0x0008, TPRAST }, + { 0x0010, TPROP }, + { 0x0020, TEX }, + { 0x0040, TPVP }, + { 0x0080, MP }, + { 0x0100, ROP }, + {} +}; + +static const char *const nv50_pgraph_vstatus_0[] = { + VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL +}; + +static const char *const nv50_pgraph_vstatus_1[] = { + TPRAST, TPROP, TEXTURE, TPVP, MP, NULL +}; + +static const char *const nv50_pgraph_vstatus_2[] = { + UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX, + ROP, NULL +}; + +static void nouveau_pgraph_vstatus_print(struct nv50_graph_priv *priv, int r, + const char *const units[], u32 status) +{ + int i; + + nv_error(priv, PGRAPH_VSTATUS%d: 0x%08x, r, status); + + for (i = 0; units[i] status; i++) { + if ((status 7) == 1) + pr_cont( %s, units[i]); + status = 3; + } + if (status) + pr_cont( (invalid: 0x%x), status); + pr_cont(\n); +} + static int nv84_graph_tlb_flush(struct nouveau_engine *engine) { @@ -219,10 +278,19 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine) !(timeout = ptimer-read(ptimer) - start 20)); if (timeout) { - nv_error(priv, PGRAPH TLB flush idle timeout fail: - 0x%08x 0x%08x 0x%08x 0x%08x\n, -nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380), -nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388)); + nv_error(priv, PGRAPH TLB flush idle timeout fail\n); + + tmp = nv_rd32(priv, 0x400700); + nv_error(priv, PGRAPH_STATUS : 0x%08x, tmp); + nouveau_bitfield_print(nv50_pgraph_status, tmp); + pr_cont(\n); + + nouveau_pgraph_vstatus_print(priv, 0, nv50_pgraph_vstatus_0, + nv_rd32(priv, 0x400380)); +
Re: [Nouveau] [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail
On Wed, Nov 07, 2012 at 10:08:47AM +1000, Ben Skeggs wrote: On Tue, Nov 06, 2012 at 10:48:52PM +0100, Marcin Slusarz wrote: Now it outputs: nouveau E[ PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail nouveau E[ PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP (0x011fde03) nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS: CCACHE (0x00145b4d) (0x002d) ENG2D ROP (0x0034db40) How about this instead? PGRAPH_STATUS : 0x011fde03 [BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP] PGRAPH_VSTATUS0: 0x00145b4d [CCACHE] PGRAPH_VSTATUS1: 0x002d [] PGRAPH_VSTATUS2: 0x0034db40 [ENG2D ROP] Looks good too. I'll post updated patch tomorrow. Marcin ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail
Now it outputs: nouveau E[ PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail nouveau E[ PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP (0x011fde03) nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS: CCACHE (0x00145b4d) (0x002d) ENG2D ROP (0x0034db40) instead of: [drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03 0x00145b4d 0x002d 0x0034db40 Based on envytools docs. Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com --- drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 75 ++-- 1 file changed, 71 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c index ab3b9dc..5f1adca 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c @@ -184,6 +184,62 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine) return 0; } +static const struct nouveau_bitfield nv50_pgraph_status[] = { + { 0x0001, BUSY }, /* set when any bit is set */ + { 0x0002, DISPATCH }, + { 0x0004, UNK2 }, + { 0x0008, UNK3 }, + { 0x0010, UNK4 }, + { 0x0020, UNK5 }, + { 0x0040, M2MF }, + { 0x0080, UNK7 }, + { 0x0100, CTXPROG }, + { 0x0200, VFETCH }, + { 0x0400, CCACHE_UNK4 }, + { 0x0800, STRMOUT_GSCHED_UNK5 }, + { 0x1000, UNK14XX }, + { 0x2000, UNK24XX_CSCHED }, + { 0x4000, UNK1CXX }, + { 0x8000, CLIPID }, + { 0x0001, ZCULL }, + { 0x0002, ENG2D }, + { 0x0004, UNK34XX }, + { 0x0008, TPRAST }, + { 0x0010, TPROP }, + { 0x0020, TEX }, + { 0x0040, TPVP }, + { 0x0080, MP }, + { 0x0100, ROP }, + {} +}; + +static const char *const nv50_pgraph_vstatus_0[] = { + VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL +}; + +static const char *const nv50_pgraph_vstatus_1[] = { + TPRAST, TPROP, TEXTURE, TPVP, MP, NULL +}; + +static const char *const nv50_pgraph_vstatus_2[] = { + UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX, + ROP, NULL +}; + +static void nouveau_pgraph_vstatus_print(const char *const units[], u32 status) +{ + int i; + u32 tmp = status; + for (i = 0; units[i] tmp; i++) { + if ((tmp 7) == 1) + pr_cont(%s , units[i]); + tmp = 3; + } + if (tmp) + pr_cont(invalid: %x , tmp); + pr_cont((0x%08x) , status); +} + static int nv84_graph_tlb_flush(struct nouveau_engine *engine) { @@ -219,10 +275,21 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine) !(timeout = ptimer-read(ptimer) - start 20)); if (timeout) { - nv_error(priv, PGRAPH TLB flush idle timeout fail: - 0x%08x 0x%08x 0x%08x 0x%08x\n, -nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380), -nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388)); + nv_error(priv, PGRAPH TLB flush idle timeout fail\n); + + nv_error(priv, PGRAPH_STATUS: ); + tmp = nv_rd32(priv, 0x400700); + nouveau_bitfield_print(nv50_pgraph_status, tmp); + pr_cont( (0x%08x)\n, tmp); + + nv_error(priv, PGRAPH_VSTATUS: ); + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_0, + nv_rd32(priv, 0x400380)); + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_1, + nv_rd32(priv, 0x400384)); + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_2, + nv_rd32(priv, 0x400388)); + pr_cont(\n); } nv50_vm_flush_engine(engine-base, 0x00); -- 1.7.12 ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail
On Tue, Nov 06, 2012 at 10:48:52PM +0100, Marcin Slusarz wrote: Now it outputs: nouveau E[ PGRAPH][:02:00.0] PGRAPH TLB flush idle timeout fail nouveau E[ PGRAPH][:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP (0x011fde03) nouveau E[ PGRAPH][:02:00.0] PGRAPH_VSTATUS: CCACHE (0x00145b4d) (0x002d) ENG2D ROP (0x0034db40) How about this instead? PGRAPH_STATUS : 0x011fde03 [BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP] PGRAPH_VSTATUS0: 0x00145b4d [CCACHE] PGRAPH_VSTATUS1: 0x002d [] PGRAPH_VSTATUS2: 0x0034db40 [ENG2D ROP] instead of: [drm] nouveau :02:00.0: PGRAPH TLB flush idle timeout fail: 0x011fde03 0x00145b4d 0x002d 0x0034db40 Based on envytools docs. Signed-off-by: Marcin Slusarz marcin.slus...@gmail.com --- drivers/gpu/drm/nouveau/core/engine/graph/nv50.c | 75 ++-- 1 file changed, 71 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c index ab3b9dc..5f1adca 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c @@ -184,6 +184,62 @@ nv50_graph_tlb_flush(struct nouveau_engine *engine) return 0; } +static const struct nouveau_bitfield nv50_pgraph_status[] = { + { 0x0001, BUSY }, /* set when any bit is set */ + { 0x0002, DISPATCH }, + { 0x0004, UNK2 }, + { 0x0008, UNK3 }, + { 0x0010, UNK4 }, + { 0x0020, UNK5 }, + { 0x0040, M2MF }, + { 0x0080, UNK7 }, + { 0x0100, CTXPROG }, + { 0x0200, VFETCH }, + { 0x0400, CCACHE_UNK4 }, + { 0x0800, STRMOUT_GSCHED_UNK5 }, + { 0x1000, UNK14XX }, + { 0x2000, UNK24XX_CSCHED }, + { 0x4000, UNK1CXX }, + { 0x8000, CLIPID }, + { 0x0001, ZCULL }, + { 0x0002, ENG2D }, + { 0x0004, UNK34XX }, + { 0x0008, TPRAST }, + { 0x0010, TPROP }, + { 0x0020, TEX }, + { 0x0040, TPVP }, + { 0x0080, MP }, + { 0x0100, ROP }, + {} +}; + +static const char *const nv50_pgraph_vstatus_0[] = { + VFETCH, CCACHE, UNK4, UNK5, GSCHED, STRMOUT, UNK14XX, NULL +}; + +static const char *const nv50_pgraph_vstatus_1[] = { + TPRAST, TPROP, TEXTURE, TPVP, MP, NULL +}; + +static const char *const nv50_pgraph_vstatus_2[] = { + UNK24XX, CSCHED, UNK1CXX, CLIPID, ZCULL, ENG2D, UNK34XX, + ROP, NULL +}; + +static void nouveau_pgraph_vstatus_print(const char *const units[], u32 status) +{ + int i; + u32 tmp = status; + for (i = 0; units[i] tmp; i++) { + if ((tmp 7) == 1) + pr_cont(%s , units[i]); + tmp = 3; + } + if (tmp) + pr_cont(invalid: %x , tmp); + pr_cont((0x%08x) , status); +} + static int nv84_graph_tlb_flush(struct nouveau_engine *engine) { @@ -219,10 +275,21 @@ nv84_graph_tlb_flush(struct nouveau_engine *engine) !(timeout = ptimer-read(ptimer) - start 20)); if (timeout) { - nv_error(priv, PGRAPH TLB flush idle timeout fail: - 0x%08x 0x%08x 0x%08x 0x%08x\n, - nv_rd32(priv, 0x400700), nv_rd32(priv, 0x400380), - nv_rd32(priv, 0x400384), nv_rd32(priv, 0x400388)); + nv_error(priv, PGRAPH TLB flush idle timeout fail\n); + + nv_error(priv, PGRAPH_STATUS: ); + tmp = nv_rd32(priv, 0x400700); + nouveau_bitfield_print(nv50_pgraph_status, tmp); + pr_cont( (0x%08x)\n, tmp); + + nv_error(priv, PGRAPH_VSTATUS: ); + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_0, + nv_rd32(priv, 0x400380)); + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_1, + nv_rd32(priv, 0x400384)); + nouveau_pgraph_vstatus_print(nv50_pgraph_vstatus_2, + nv_rd32(priv, 0x400388)); + pr_cont(\n); } nv50_vm_flush_engine(engine-base, 0x00); -- 1.7.12 ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau