Re: [Nouveau] [PATCH 2/6] drm/nouveau: fault: Widen engine field
On Tue, Sep 17, 2019 at 01:48:20PM +1000, Ben Skeggs wrote: > On Tue, 17 Sep 2019 at 01:18, Thierry Reding wrote: > > > > From: Thierry Reding > > > > The engine field in the FIFO fault information registers is actually 9 > > bits wide. > Looks like this is true for fault buffer parsing too. Yes, I'll add that in v2. Thierry > > > > Signed-off-by: Thierry Reding > > --- > > drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > > b/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > > index b5e32295237b..28306c5f6651 100644 > > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > > @@ -137,8 +137,8 @@ gv100_fault_intr_fault(struct nvkm_fault *fault) > > info.addr = ((u64)addrhi << 32) | addrlo; > > info.inst = ((u64)insthi << 32) | (info0 & 0xf000); > > info.time = 0; > > - info.engine = (info0 & 0x00ff); > > info.aperture = (info0 & 0x0c00) >> 10; > > + info.engine = (info0 & 0x01ff); > > info.valid = (info1 & 0x8000) >> 31; > > info.gpc= (info1 & 0x1f00) >> 24; > > info.hub= (info1 & 0x0010) >> 20; > > -- > > 2.23.0 > > > > ___ > > Nouveau mailing list > > Nouveau@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/nouveau signature.asc Description: PGP signature ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [PATCH 2/6] drm/nouveau: fault: Widen engine field
On Tue, 17 Sep 2019 at 01:18, Thierry Reding wrote: > > From: Thierry Reding > > The engine field in the FIFO fault information registers is actually 9 > bits wide. Looks like this is true for fault buffer parsing too. > > Signed-off-by: Thierry Reding > --- > drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > b/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > index b5e32295237b..28306c5f6651 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c > @@ -137,8 +137,8 @@ gv100_fault_intr_fault(struct nvkm_fault *fault) > info.addr = ((u64)addrhi << 32) | addrlo; > info.inst = ((u64)insthi << 32) | (info0 & 0xf000); > info.time = 0; > - info.engine = (info0 & 0x00ff); > info.aperture = (info0 & 0x0c00) >> 10; > + info.engine = (info0 & 0x01ff); > info.valid = (info1 & 0x8000) >> 31; > info.gpc= (info1 & 0x1f00) >> 24; > info.hub= (info1 & 0x0010) >> 20; > -- > 2.23.0 > > ___ > Nouveau mailing list > Nouveau@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/nouveau ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
[Nouveau] [PATCH 2/6] drm/nouveau: fault: Widen engine field
From: Thierry Reding The engine field in the FIFO fault information registers is actually 9 bits wide. Signed-off-by: Thierry Reding --- drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c index b5e32295237b..28306c5f6651 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c @@ -137,8 +137,8 @@ gv100_fault_intr_fault(struct nvkm_fault *fault) info.addr = ((u64)addrhi << 32) | addrlo; info.inst = ((u64)insthi << 32) | (info0 & 0xf000); info.time = 0; - info.engine = (info0 & 0x00ff); info.aperture = (info0 & 0x0c00) >> 10; + info.engine = (info0 & 0x01ff); info.valid = (info1 & 0x8000) >> 31; info.gpc= (info1 & 0x1f00) >> 24; info.hub= (info1 & 0x0010) >> 20; -- 2.23.0 ___ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau
