Re: [Openocd-development] [PATCH] bootstrap: split bootstrap in two most common is called bootstrap
On 21/12/2010 21:50, Øyvind Harboe wrote: the bootstrap_inner will not perform the git submodule init+update, which most developers working with the master branch would want. Why add another file, just add the submodule stuff to bootstrap. Cheers Spen ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [PATCH] bootstrap: split bootstrap in two most common is called bootstrap
Like so? -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer From 37f4978f95a989d6bfcaf9aff354ee23a0855b92 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=98yvind=20Harboe?= oyvind.har...@zylin.com Date: Wed, 22 Dec 2010 14:29:34 +0100 Subject: [PATCH] bootstrap: by default the submodules are initialized MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit use nosubmodule to skip setting up submodules. Signed-off-by: Øyvind Harboe oyvind.har...@zylin.com --- bootstrap | 17 ++--- 1 files changed, 10 insertions(+), 7 deletions(-) diff --git a/bootstrap b/bootstrap index 3452a31..071ee2b 100755 --- a/bootstrap +++ b/bootstrap @@ -26,12 +26,15 @@ automake --gnu --add-missing --copy # AM_MAINTAINER_MODE requires --enable-maintainer-mode from everyone using # current source snapshots (working from GIT, or some source snapshot, etc) # otherwise the documentation will fail to build due to missing version.texi + +if [ -n $1 ] || [ $1 != nosubmodule ] +then +echo Setting up submodules +git submodule init +git submodule update +else +echo Skipping submodule setup +fi + echo Bootstrap complete. Quick start build instructions: -echo -echo 1. Fetch Jim Tcl -echo -echo git submodule init -echo git submodule update -echo -echo 2. Configure echo ./configure --enable-maintainer-mode -- 1.7.0.4 ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [PATCH] bootstrap: split bootstrap in two most common is called bootstrap
On 22/12/2010 13:40, Øyvind Harboe wrote: Like so? Much better :) ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [PATCH] bootstrap: split bootstrap in two most common is called bootstrap
Merged. -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [PATCH 1/2] config: add init_targets proc that is executed just before init
Merged. -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] [PATCH 1/3] contrib: change stm32 flash loader extension
From: Spencer Oliver ntfr...@users.sourceforge.net As the stm32 flash loader now uses the preprocessor change extension so that it used by default. Signed-off-by: Spencer Oliver ntfr...@users.sourceforge.net --- contrib/loaders/flash/stm32x.S | 57 contrib/loaders/flash/stm32x.s | 57 2 files changed, 57 insertions(+), 57 deletions(-) create mode 100644 contrib/loaders/flash/stm32x.S delete mode 100644 contrib/loaders/flash/stm32x.s diff --git a/contrib/loaders/flash/stm32x.S b/contrib/loaders/flash/stm32x.S new file mode 100644 index 000..7269e79 --- /dev/null +++ b/contrib/loaders/flash/stm32x.S @@ -0,0 +1,57 @@ +/*** + * Copyright (C) 2010 by Spencer Oliver * + * s...@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of* + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***/ + + .text + .syntax unified + .cpu cortex-m3 + .thumb + .thumb_func + .global write + +/* + r0 - source address + r1 - target address + r2 - count (halfword-16bit) + r3 - result + r4 - temp +*/ + +#define STM32_FLASH_CR_OFFSET 0x10/* offset of CR register in FLASH struct */ +#define STM32_FLASH_SR_OFFSET 0x0c/* offset of CR register in FLASH struct */ + +write: + ldr r4, STM32_FLASH_BASE +write_half_word: + movsr3, #0x01 + str r3, [r4, #STM32_FLASH_CR_OFFSET]/* PG (bit0) == 1 = flash programming enabled */ + ldrhr3, [r0], #0x02 /* read one half-word from src, increment ptr */ + strhr3, [r1], #0x02 /* write one half-word from src, increment ptr */ +busy: + ldr r3, [r4, #STM32_FLASH_SR_OFFSET] + tst r3, #0x01 /* BSY (bit0) == 1 = operation in progress */ + beq busy /* wait more... */ + tst r3, #0x14 /* PGERR (bit2) == 1 or WRPRTERR (bit4) == 1 = error */ + bne exit /* fail... */ + subsr2, r2, #0x01 /* decrement counter */ + bne write_half_word /* write next half-word if anything left */ +exit: + bkpt#0x00 + +STM32_FLASH_BASE: .word 0x40022000 /* base address of FLASH struct */ diff --git a/contrib/loaders/flash/stm32x.s b/contrib/loaders/flash/stm32x.s deleted file mode 100644 index 7269e79..000 --- a/contrib/loaders/flash/stm32x.s +++ /dev/null @@ -1,57 +0,0 @@ -/*** - * Copyright (C) 2010 by Spencer Oliver * - * s...@spen-soft.co.uk * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT
[Openocd-development] [PATCH]stm32xl support
[PATCH 1/3] contrib: change stm32 flash loader extension [PATCH 2/3] stm32: add dual flash bank support [PATCH 3/3] stm32: add stm32 xl family flash support ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
[Openocd-development] [PATCH 2/3] stm32: add dual flash bank support
From: Spencer Oliver ntfr...@users.sourceforge.net
This patch adds the initial dual flash bank support for devices such
as the stm32xl family.
Signed-off-by: Spencer Oliver ntfr...@users.sourceforge.net
---
contrib/loaders/flash/stm32x.S |5 ++-
src/flash/nor/stm32x.c | 63 +++
2 files changed, 40 insertions(+), 28 deletions(-)
diff --git a/contrib/loaders/flash/stm32x.S b/contrib/loaders/flash/stm32x.S
index 7269e79..01494b8 100644
--- a/contrib/loaders/flash/stm32x.S
+++ b/contrib/loaders/flash/stm32x.S
@@ -29,8 +29,8 @@
r0 - source address
r1 - target address
r2 - count (halfword-16bit)
- r3 - result
- r4 - temp
+ r3 - sector offet in : result out
+ r4 - flash base
*/
#define STM32_FLASH_CR_OFFSET 0x10/* offset of CR
register in FLASH struct */
@@ -38,6 +38,7 @@
write:
ldr r4, STM32_FLASH_BASE
+ add r4, r3
/* add offset 0x00 for sector 0 : 0x40 for sector 1 */
write_half_word:
movsr3, #0x01
str r3, [r4, #STM32_FLASH_CR_OFFSET]/* PG (bit0) ==
1 = flash programming enabled */
diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c
index 3c49b8b..8aae203 100644
--- a/src/flash/nor/stm32x.c
+++ b/src/flash/nor/stm32x.c
@@ -29,7 +29,6 @@
#include target/algorithm.h
#include target/armv7m.h
-
/* stm32x register locations */
#define STM32_FLASH_ACR0x40022000
@@ -83,7 +82,6 @@
#define KEY1 0x45670123
#define KEY2 0xCDEF89AB
-
struct stm32x_options
{
uint16_t RDP;
@@ -97,11 +95,11 @@ struct stm32x_flash_bank
struct working_area *write_algorithm;
int ppage_size;
int probed;
-};
-struct stm32x_mem_layout {
- uint32_t sector_start;
- uint32_t sector_size;
+ /* used to access dual flash bank stm32xl
+* 0x00 will address sector 0 flash
+* 0x40 will address sector 1 flash */
+ int register_offset;
};
static int stm32x_mass_erase(struct flash_bank *bank);
@@ -123,14 +121,21 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
stm32x_info-write_algorithm = NULL;
stm32x_info-probed = 0;
+ stm32x_info-register_offset = 0x00;
return ERROR_OK;
}
-static int stm32x_get_flash_status(struct flash_bank *bank, uint32_t *status)
+static inline int stm32x_get_flash_reg(struct flash_bank *bank, uint32_t reg)
+{
+ struct stm32x_flash_bank *stm32x_info = bank-driver_priv;
+ return reg + stm32x_info-register_offset;
+}
+
+static inline int stm32x_get_flash_status(struct flash_bank *bank, uint32_t
*status)
{
struct target *target = bank-target;
- return target_read_u32(target, STM32_FLASH_SR, status);
+ return target_read_u32(target, stm32x_get_flash_reg(bank,
STM32_FLASH_SR), status);
}
static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
@@ -174,7 +179,8 @@ static int stm32x_wait_status_busy(struct flash_bank *bank,
int timeout)
/* If this operation fails, we ignore it and report the original
* retval
*/
- target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR |
FLASH_PGERR);
+ target_write_u32(target, stm32x_get_flash_reg(bank,
STM32_FLASH_SR),
+ FLASH_WRPRTERR | FLASH_PGERR);
}
return retval;
}
@@ -437,22 +443,24 @@ static int stm32x_erase(struct flash_bank *bank, int
first, int last)
}
/* unlock flash registers */
- int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+ int retval = target_write_u32(target, stm32x_get_flash_reg(bank,
STM32_FLASH_KEYR), KEY1);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ retval = target_write_u32(target, stm32x_get_flash_reg(bank,
STM32_FLASH_KEYR), KEY2);
if (retval != ERROR_OK)
return retval;
for (i = first; i = last; i++)
{
- retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PER);
+ retval = target_write_u32(target, stm32x_get_flash_reg(bank,
STM32_FLASH_CR), FLASH_PER);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, STM32_FLASH_AR, bank-base +
bank-sectors[i].offset);
+ retval = target_write_u32(target, stm32x_get_flash_reg(bank,
STM32_FLASH_AR),
+ bank-base + bank-sectors[i].offset);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PER |
FLASH_STRT);
+ retval = target_write_u32(target,
+
[Openocd-development] [PATCH 3/3] stm32: add stm32 xl family flash support
From: Spencer Oliver ntfr...@users.sourceforge.net
Signed-off-by: Spencer Oliver ntfr...@users.sourceforge.net
---
src/flash/nor/stm32x.c | 46 +-
tcl/target/stm32.cfg |8 ++--
tcl/target/stm32xl.cfg |6 ++
3 files changed, 57 insertions(+), 3 deletions(-)
create mode 100644 tcl/target/stm32xl.cfg
diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c
index 8aae203..6393aa4 100644
--- a/src/flash/nor/stm32x.c
+++ b/src/flash/nor/stm32x.c
@@ -905,6 +905,34 @@ static int stm32x_probe(struct flash_bank *bank)
num_pages = 128;
}
}
+ else if ((device_id 0x7ff) == 0x430)
+ {
+ /* xl line density - we have 2k pages
+* 2 pages for a protection area */
+ page_size = 2048;
+ stm32x_info-ppage_size = 2;
+
+ /* check for early silicon */
+ if (num_pages == 0x)
+ {
+ /* number of sectors may be incorrrect on early silicon
*/
+ LOG_WARNING(STM32 flash size failed, probe inaccurate
- assuming 1024k flash);
+ num_pages = 1024;
+ }
+
+ /* split reported size into matching bank */
+ if (bank-base != 0x0808)
+ {
+ /* bank 0 will be fixed 512k */
+ num_pages = 512;
+ }
+ else
+ {
+ num_pages -= 512;
+ /* bank1 also uses a register offset */
+ stm32x_info-register_offset = 0x40;
+ }
+ }
else
{
LOG_WARNING(Cannot identify target as a STM32 family.);
@@ -922,7 +950,6 @@ static int stm32x_probe(struct flash_bank *bank)
bank-sectors = NULL;
}
- bank-base = 0x0800;
bank-size = (num_pages * page_size);
bank-num_sectors = num_pages;
bank-sectors = malloc(sizeof(struct flash_sector) * num_pages);
@@ -1075,6 +1102,23 @@ static int get_stm32x_info(struct flash_bank *bank, char
*buf, int buf_size)
break;
}
}
+ else if ((device_id 0x7ff) == 0x430)
+ {
+ printed = snprintf(buf, buf_size, stm32x (XL) - Rev: );
+ buf += printed;
+ buf_size -= printed;
+
+ switch (device_id 16)
+ {
+ case 0x1000:
+ snprintf(buf, buf_size, A);
+ break;
+
+ default:
+ snprintf(buf, buf_size, unknown);
+ break;
+ }
+ }
else
{
snprintf(buf, buf_size, Cannot identify target as a stm32x\n);
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 86e6ebb..eef1269 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -52,18 +52,22 @@ if { [info exists BSTAPID ] } {
set _BSTAPID4 0x06414041
# Connectivity line devices, Rev A and Rev Z
set _BSTAPID5 0x06418041
+ # XL line devices, Rev A
+ set _BSTAPID6 0x06430041
}
jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
- -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+ -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
+ -expected-id $_BSTAPID6
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position
$_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x2000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
+# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32x 0x0800 0 0 0 $_TARGETNAME
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
diff --git a/tcl/target/stm32xl.cfg b/tcl/target/stm32xl.cfg
new file mode 100644
index 000..cde07df
--- /dev/null
+++ b/tcl/target/stm32xl.cfg
@@ -0,0 +1,6 @@
+# script for stm32xl family (dual flash bank)
+source [find target/stm32.cfg]
+
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash1
+flash bank $_FLASHNAME stm32x 0x0808 0 0 0 $_TARGETNAME
--
1.7.1
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Re: [Openocd-development] [PATCH]stm32xl support
I don't want to call myself an expert on the stm32 code, but I trust your judgment here. Looks good to me! Good job! -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [PATCH 2/3] stm32: add dual flash bank support
On 2010-12-22 18:31, Spencer Oliver wrote: - 0xdf, 0xf8, 0x20, 0x40, /* ldr r4, STM32_FLASH_BASE */ + 0x08, 0x4c, /* ldr r4, STM32_FLASH_BASE */ How is that possible? 4\/3!! ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
Re: [Openocd-development] [PATCH 3/3] stm32: add stm32 xl family flash support
On 2010-12-22 18:31, Spencer Oliver wrote:
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 86e6ebb..eef1269 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -52,18 +52,22 @@ if { [info exists BSTAPID ] } {
set _BSTAPID4 0x06414041
# Connectivity line devices, Rev A and Rev Z
set _BSTAPID5 0x06418041
+ # XL line devices, Rev A
+ set _BSTAPID6 0x06430041
}
jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
- -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+ -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
+ -expected-id $_BSTAPID6
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position
$_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x2000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
+# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32x 0x0800 0 0 0 $_TARGETNAME
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
diff --git a/tcl/target/stm32xl.cfg b/tcl/target/stm32xl.cfg
new file mode 100644
index 000..cde07df
--- /dev/null
+++ b/tcl/target/stm32xl.cfg
@@ -0,0 +1,6 @@
+# script for stm32xl family (dual flash bank)
+source [find target/stm32.cfg]
+
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash1
+flash bank $_FLASHNAME stm32x 0x0808 0 0 0 $_TARGETNAME
If there is another target file for XL devices, maybe the BSTAPIDs
shouldn't be added to stm32.cfg file, but rather provided in stm32xl.cfg
before including stm32.cfg?
4\/3!!
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[Openocd-development] BeagleBoard with Cortex A9
Apparently TI just did an A9 version of their BeagleBoard: http://pandaboard.org/ -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer ___ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
