Re: [OpenWrt-Devel] [PATCH 2/3] mvebu: reduce speed to gen1 for armada 37xx devices pcie
W dniu 09.06.2018 o 19:02, Martin Blumenstingl pisze: > On Sat, Jun 9, 2018 at 4:15 PM Tomasz Maciej Nowak wrote: >> >> Since the beginning there's been an issue with initializing the Atheros >> based MiniPCIe wlan cards. Here's an example of kerenel log: >> >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x44 >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 >> ath9k :00:00.0: enabling device ( -> 0002) >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0xc >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x40 >> ath9k :00:00.0: request_irq failed >> advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 >> ath9k: probe of :00:00.0 failed with error -22 >> >> The same happens for ath5k cards, while ath10k card didn't appear at >> all (not detected). Following the issue on esppressobin.net forum [1] >> the workaround seems to be limiting the speed of PCIe bridge to 1st >> generation. This fixed the initialization of ath5k, ath9k and ath10k >> cards. The change shouldn't affect the performance for wireless cards, >> it could reduce the performance of storage controller cards but since >> OpenWrt focuses on wireless connectivity, fixing compatibility with >> wireless cards should be a priority. >> For the record, the iwlwifi and mt76 cards were not affected by this >> issue. > does this meant that the PCIe link speed depends on the board? No, that depends on the SoC board has and PCIe card which negotiates the speed and capabilities. It shouldn't depend on the board, of course if there are no design faults. Maybe some code in Atheros drivers also affects this or there's bug in aardvark enumerating code. The assessment of this is outside of my skills. > > the PCI dt-bindings already specify a "max-link-speed" property, see [0] > there's even a helper function to parse that property: > of_pci_get_max_link_speed > > this would give you control over the PCIe link speed per board (I am > assuming that the mvebu target uses devicetree). I tried this before submitting the patch, just to be sure retried it after Your mail. Setting this had no effect, the state was as if there was no change. > additionally this would allow you to send the patch upstream so > OpenWrt doesn't have to carry custom patches around forever > > what do you think? This driver still is in early stage, there are still some issues, until it'll be more mature I'm reluctant to send this workaround upstream or sending bug report. Thomas Petazzoni from Bootlin is working on this driver and still has some pending changes but that will take few months. Until his changes will hit upstream I'm inclined to keep this. There is also upcoming device from CZ.nic, namely Turris MOX, which is based on the same processor as ESPRESSObin. They already submitted watchdog driver to LKML and U-Boot tree and minor fixes to U-Boot. Maybe their involvement will speed up the changes and we'll see this workaround unnecessary. Just to be clear this issue and workaround affects only devices based on Armada 37xx SoC living in cortexa53 subtarget. Regards, Tomasz > > > Regards > Martin > > > [0] > https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pci/pci.txt > -- TMN ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH 2/3] mvebu: reduce speed to gen1 for armada 37xx devices pcie
The sender domain has a DMARC Reject/Quarantine policy which disallows sending mailing list messages using the original "From" header. To mitigate this problem, the original message has been wrapped automatically by the mailing list software.--- Begin Message --- On Sat, Jun 9, 2018 at 4:15 PM Tomasz Maciej Nowak wrote: > > Since the beginning there's been an issue with initializing the Atheros > based MiniPCIe wlan cards. Here's an example of kerenel log: > > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x44 > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 > ath9k :00:00.0: enabling device ( -> 0002) > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0xc > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x40 > ath9k :00:00.0: request_irq failed > advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 > ath9k: probe of :00:00.0 failed with error -22 > > The same happens for ath5k cards, while ath10k card didn't appear at > all (not detected). Following the issue on esppressobin.net forum [1] > the workaround seems to be limiting the speed of PCIe bridge to 1st > generation. This fixed the initialization of ath5k, ath9k and ath10k > cards. The change shouldn't affect the performance for wireless cards, > it could reduce the performance of storage controller cards but since > OpenWrt focuses on wireless connectivity, fixing compatibility with > wireless cards should be a priority. > For the record, the iwlwifi and mt76 cards were not affected by this > issue. does this meant that the PCIe link speed depends on the board? the PCI dt-bindings already specify a "max-link-speed" property, see [0] there's even a helper function to parse that property: of_pci_get_max_link_speed this would give you control over the PCIe link speed per board (I am assuming that the mvebu target uses devicetree). additionally this would allow you to send the patch upstream so OpenWrt doesn't have to carry custom patches around forever what do you think? Regards Martin [0] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pci/pci.txt --- End Message --- ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 3/3] uboot-sunxi: update Orange Pi R1 and Zero Plus
The device tree files are now matching the kernel 4.17 and this will be
send also for integration into mainline U-Boot.
Signed-off-by: Hauke Mehrtens
---
...i-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch | 63 ++
.../320-sunxi-Add-support-for-Orange-Pi-R1.patch | 58 +++--
.../patches/400-ARM-dts-orange-pi-zero-plus.patch | 234 ++---
3 files changed, 257 insertions(+), 98 deletions(-)
create mode 100644
package/boot/uboot-sunxi/patches/310-sunxi-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch
diff --git
a/package/boot/uboot-sunxi/patches/310-sunxi-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch
b/package/boot/uboot-sunxi/patches/310-sunxi-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch
new file mode 100644
index 00..97aad78796
--- /dev/null
+++
b/package/boot/uboot-sunxi/patches/310-sunxi-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch
@@ -0,0 +1,63 @@
+From 96c04aab58e351fa9ed7e95783018d6dbf60768f Mon Sep 17 00:00:00 2001
+From: Jun Nie
+Date: Mon, 7 May 2018 13:03:40 +0530
+Subject: sunxi: h3: Sync OTG and HCI nodes from Linux DT
+
+Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
+or MUSB controller.
+
+Signed-off-by: Jun Nie
+Reviewed-by: Jagan Teki
+Acked-by: Jun Nie
+---
+ arch/arm/dts/sun8i-h3.dtsi | 32
+ 1 file changed, 32 insertions(+)
+
+--- a/arch/arm/dts/sun8i-h3.dtsi
b/arch/arm/dts/sun8i-h3.dtsi
+@@ -219,6 +219,19 @@
+ #size-cells = <0>;
+ };
+
++ usb_otg: usb@1c19000 {
++ compatible = "allwinner,sun8i-h3-musb";
++ reg = <0x01c19000 0x400>;
++ clocks = < CLK_BUS_OTG>;
++ resets = < RST_BUS_OTG>;
++ interrupts = ;
++ interrupt-names = "mc";
++ phys = < 0>;
++ phy-names = "usb";
++ extcon = < 0>;
++ status = "disabled";
++ };
++
+ usbphy: phy@01c19400 {
+ compatible = "allwinner,sun8i-h3-usb-phy";
+ reg = <0x01c19400 0x2c>,
+@@ -251,6 +264,25 @@
+ #phy-cells = <1>;
+ };
+
++ ehci0: usb@1c1a000 {
++ compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
++ reg = <0x01c1a000 0x100>;
++ interrupts = ;
++ clocks = < CLK_BUS_EHCI0>, < CLK_BUS_OHCI0>;
++ resets = < RST_BUS_EHCI0>, < RST_BUS_OHCI0>;
++ status = "disabled";
++ };
++
++ ohci0: usb@1c1a400 {
++ compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
++ reg = <0x01c1a400 0x100>;
++ interrupts = ;
++ clocks = < CLK_BUS_EHCI0>, < CLK_BUS_OHCI0>,
++ < CLK_USB_OHCI0>;
++ resets = < RST_BUS_EHCI0>, < RST_BUS_OHCI0>;
++ status = "disabled";
++ };
++
+ ehci1: usb@01c1b000 {
+ compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
+ reg = <0x01c1b000 0x100>;
diff --git
a/package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch
b/package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch
index 193b2e480c..97c4769468 100644
---
a/package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch
+++
b/package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch
@@ -1,18 +1,32 @@
-From 068fb0d5728c5ec93cb961718d59e7c718886edd Mon Sep 17 00:00:00 2001
+From fd3736abbe57a819312c8df96d14ec396b074581 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens
Date: Tue, 26 Sep 2017 22:16:59 +0200
-Subject: sunxi: Add support for Orange Pi R1
+Subject: sun8i: h2: Add initial Orange Pi R1
-The device tree files are also submitted for inclusion into the Linux
-kernel.
+Orange Pi R1 is an open-source single-board computer using the
+Allwinner H2+ SOC.
+
+H2+ Orange Pi R1 has
+ - Quad-core Cortex-A7
+ - 256MB DDR3
+ - micrSD slot
+ - 128MBit SPI Nor flash
+ - Debug TTL UART
+ - 100MBit/s Ethernet (H2+)
+ - 100MBit/s Ethernet (RTL8152B)
+ - Wifi (RTL8189ETV)
+ - USB 2.0 OTG + power supply
+This board is very similar to the Orange Pi Zero.
+
+The device tree file is copied from the Linux kernel 4.18.
Signed-off-by: Hauke Mehrtens
---
- arch/arm/dts/Makefile | 1 +
- arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 77 ++
- board/sunxi/MAINTAINERS| 5 ++
- configs/orangepi_r1_defconfig | 26 ++
- 4 files changed, 109 insertions(+)
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 101 +
+
[OpenWrt-Devel] [PATCH 2/3] uboot-sunxi: update to version 2018.05
This patch 220-add-sunxi50i-nanopi-neo-plus2.patch was merged upstream. The u-boot-sunxi-with-spl.bin is now also created for the ARM64 sunxi boards by U-Boot itself, no need to do it manually any more. This was tested on a H2+ Orange Pi R1 and a H5 Orange Pi Zero Plus. Signed-off-by: Hauke Mehrtens --- package/boot/uboot-sunxi/Makefile | 8 +- .../patches/003-add-theobroma-a31-pangolin.patch | 4 +- .../patches/062-A20-improve-gmac-upload.patch | 2 +- .../091-sun6i-sync-PLL1-multdiv-with-Boot1.patch | 2 +- .../patches/093-sun6i-fix-PLL-LDO-voltselect.patch | 4 +- .../patches/100-sun6i-alternate-on-UART2.patch | 2 +- .../101-sun6i-support-console-on-UART2.patch | 2 +- .../102-sunxi-make_CONS_INDEX-configurable.patch | 2 +- ...check-environment-for-dtc-binary-location.patch | 10 +- .../patches/210-sunxi-deactivate-binman.patch | 21 ++- .../220-add-sunxi50i-nanopi-neo-plus2.patch| 165 - .../patches/221-compatible-old-dtc.patch | 4 +- .../320-sunxi-Add-support-for-Orange-Pi-R1.patch | 10 +- .../patches/400-ARM-dts-orange-pi-zero-plus.patch | 2 +- 14 files changed, 39 insertions(+), 199 deletions(-) delete mode 100644 package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile index 5257a41ad2..7773e340c1 100644 --- a/package/boot/uboot-sunxi/Makefile +++ b/package/boot/uboot-sunxi/Makefile @@ -9,9 +9,9 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2017.11 +PKG_VERSION:=2018.05 -PKG_HASH:=6a018fd3caf58f3dcfa23ee989a82bd35df03af71872b9dca8c6d758a0d26c05 +PKG_HASH:=4da13c2a6139a78cc08608f21fd4741db27eda336cfad7ab8264fda923b9c048 PKG_MAINTAINER:=Zoltan HERPAI @@ -245,11 +245,7 @@ UBOOT_MAKE_FLAGS += \ define Build/InstallDev $(INSTALL_DIR) $(STAGING_DIR_IMAGE) -ifeq ($(SUBTARGET),cortexa53) - cat $(PKG_BUILD_DIR)/spl/sunxi-spl.bin $(PKG_BUILD_DIR)/u-boot.itb > $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-u-boot-with-spl.bin -else $(CP) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-u-boot-with-spl.bin -endif mkimage -C none -A arm -T script -d uEnv-$(UENV).txt \ $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-boot.scr endef diff --git a/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch b/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch index 4458d514c2..6501cca6d2 100644 --- a/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch +++ b/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch @@ -1,6 +1,6 @@ --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -261,6 +261,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ +@@ -290,6 +290,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31-m9.dtb \ sun6i-a31-mele-a1000g-quad.dtb \ sun6i-a31-mixtile-loftq.dtb \ @@ -360,7 +360,7 @@ +CONFIG_SUNXI_SPI=y --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig -@@ -752,6 +752,14 @@ config VIDEO_LCD_PANEL_I2C_SCL +@@ -836,6 +836,14 @@ config VIDEO_LCD_PANEL_I2C_SCL Set the SCL pin for the LCD i2c interface. This takes a string in the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. diff --git a/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch b/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch index 679649c3f8..6dbcb10719 100644 --- a/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch +++ b/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch @@ -2,7 +2,7 @@ --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig -@@ -24,6 +24,7 @@ CONFIG_DFU_RAM=y +@@ -22,6 +22,7 @@ CONFIG_DFU_RAM=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_SUN7I_GMAC=y diff --git a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch index cf41c4f1f1..bcf2faa186 100644 --- a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch +++ b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch @@ -14,7 +14,7 @@ More specifically, the following settings are now used: --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c -@@ -113,11 +113,12 @@ void clock_set_pll1(unsigned int clk) +@@ -112,11 +112,12 @@ void clock_set_pll1(unsigned int clk) struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; const int p = 0; diff --git a/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch b/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch index a8e03e2fb2..b62209e1dc 100644 ---
[OpenWrt-Devel] [PATCH 1/3] arm-trusted-firmware-sunxi: update to version from 2018-02-10
Signed-off-by: Hauke Mehrtens --- package/boot/arm-trusted-firmware-sunxi/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/package/boot/arm-trusted-firmware-sunxi/Makefile b/package/boot/arm-trusted-firmware-sunxi/Makefile index d2554f4ebc..7bd042bdab 100644 --- a/package/boot/arm-trusted-firmware-sunxi/Makefile +++ b/package/boot/arm-trusted-firmware-sunxi/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/apritzel/arm-trusted-firmware -PKG_SOURCE_DATE:=2018-02-04 -PKG_SOURCE_VERSION:=ae78724247a01560164d607ed66db111c74d8df0 -PKG_MIRROR_HASH:=e4ddc3294f86c1e163d683a2322427bbdd5b63762ead4b1792b34df75d7bda28 +PKG_SOURCE_DATE:=2018-02-10 +PKG_SOURCE_VERSION:=c9f55c023164a6c8c49f70f7ac6c68c626839d6f +PKG_MIRROR_HASH:=94b5338592cf0bcc353b55da5fdd62c91ae8e6263822f73724cb72ecde3dbbf9 PKG_LICENSE:=BSD-3-Clause PKG_LICENSE_FILES:=license.md -- 2.11.0 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 2/2] mediatek: mt7622: Do not deactivate CONFIG_BLK_DEV
zram.ko needs CONFIG_BLK_DEV activated and it is by default for all other targets in OpenWrt. This makes zram.ko compile again. Compile tested only. Signed-off-by: Hauke Mehrtens --- target/linux/mediatek/mt7622/config-4.14 | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/mediatek/mt7622/config-4.14 b/target/linux/mediatek/mt7622/config-4.14 index 5d43b224f4..e76b8c4ab8 100644 --- a/target/linux/mediatek/mt7622/config-4.14 +++ b/target/linux/mediatek/mt7622/config-4.14 @@ -72,7 +72,6 @@ CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_SP805_WATCHDOG is not set CONFIG_ATA=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_BLK_DEV is not set CONFIG_BLK_DEV_SD=y CONFIG_BLK_MQ_PCI=y CONFIG_BLK_SCSI_REQUEST=y -- 2.11.0 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 1/2] mediatek: mt7622: Do not set CPU_SUBTYPE for Cortex A53
Neon and vfpv4 are mandatory extensions in the ARM64 instruction set now, do not activate them explicitly. GCC will make use of these extension now by default. This makes it possible to share the toolchain with other Cortex A53 SoCs. Compile tested only. Signed-off-by: Hauke Mehrtens --- target/linux/mediatek/mt7622/target.mk | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/mediatek/mt7622/target.mk b/target/linux/mediatek/mt7622/target.mk index 1fc33b8af8..b271869114 100644 --- a/target/linux/mediatek/mt7622/target.mk +++ b/target/linux/mediatek/mt7622/target.mk @@ -2,7 +2,6 @@ ARCH:=aarch64 SUBTARGET:=mt7622 BOARDNAME:=MT7622 CPU_TYPE:=cortex-a53 -CPU_SUBTYPE:=neon-vfpv4 KERNELNAME:=Image dtbs -- 2.11.0 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 3/3] mvebu: replace espressobin spi patch with upstream one
For easier future kernel bumps replace spi patch with upstream version
slightly modified. The modification removes partition definitions which
has been diffrent for some U-Boot versions.
Also this removes unnecessary i2c definition which was in the old patch.
Signed-off-by: Tomasz Maciej Nowak
---
...a-3720-espressobin-wire-up-spi-flash.patch | 45 +++
...sporessobin-dt-enable-spi-nor-on-i2c.patch | 29
2 files changed, 45 insertions(+), 29 deletions(-)
create mode 100644
target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch
delete mode 100644
target/linux/mvebu/patches-4.14/521-esporessobin-dt-enable-spi-nor-on-i2c.patch
diff --git
a/target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch
b/target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch
new file mode 100644
index 00..fb80db7e89
--- /dev/null
+++
b/target/linux/mvebu/patches-4.14/521-arm64-dts-armada-3720-espressobin-wire-up-spi-flash.patch
@@ -0,0 +1,45 @@
+From bffed3d4abcd32ba6d492a9bd7ebe81dc92eaa9a Mon Sep 17 00:00:00 2001
+From: Ellie Reeves
+Date: Sun, 25 Mar 2018 21:57:36 +0200
+Subject: [PATCH] arm64: dts: armada-3720-espressobin: wire up spi flash
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This is the storage the machine boots from by default. The partitioning
+is taken from the U-Boot that is shipped with the board. There is some
+more space on the flash that isn't used.
+
+Tested-by: Gregory CLEMENT
+Signed-off-by: Ellie Reeves
+Signed-off-by: Uwe Kleine-König
+Signed-off-by: Gregory CLEMENT
+
+[drop partitions, not every U-Boot has same layout]
+Signed-off-by: Tomasz Maciej Nowak
+---
+ .../dts/marvell/armada-3720-espressobin.dts | 13 +
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
+@@ -96,6 +96,19 @@
+ status = "okay";
+ };
+
++ {
++ status = "okay";
++
++ flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ reg = <0>;
++ compatible = "winbond,w25q32dw", "jedec,spi-flash";
++ spi-max-frequency = <10400>;
++ m25p,fast-read;
++ };
++};
++
+ /* Exported on the micro USB connector J5 through an FTDI */
+ {
+ status = "okay";
diff --git
a/target/linux/mvebu/patches-4.14/521-esporessobin-dt-enable-spi-nor-on-i2c.patch
b/target/linux/mvebu/patches-4.14/521-esporessobin-dt-enable-spi-nor-on-i2c.patch
deleted file mode 100644
index 3cabaa7a01..00
---
a/target/linux/mvebu/patches-4.14/521-esporessobin-dt-enable-spi-nor-on-i2c.patch
+++ /dev/null
@@ -1,29 +0,0 @@
a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
-+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
-@@ -111,6 +111,26 @@
- status = "okay";
- };
-
-+ {
-+ status = "okay";
-+
-+ w25q32dw@0 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "jedec,spi-nor";
-+ reg = <0>;
-+ spi-max-frequency = <10400>;
-+ m25,fast-read;
-+
-+ pinctrl-names = "default";
-+ pinctrl-0 = <_quad_pins>;
-+ };
-+};
-+
-+ {
-+ status = "okay";
-+};
-+
- {
- switch0: switch0@1 {
- compatible = "marvell,mv88e6085";
--
2.17.1
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[OpenWrt-Devel] [PATCH 1/3] mvebu: add fix for armada 37xx cpufreq driver
Backport from stable kernel tree fixing clock leak.
Signed-off-by: Tomasz Maciej Nowak
---
Please also cherry-pick this to OpenWrt 18.06.
---
...8-cpufreq-armada-37xx-Fix-clock-leak.patch | 35 +++
1 file changed, 35 insertions(+)
create mode 100644
target/linux/mvebu/patches-4.14/508-cpufreq-armada-37xx-Fix-clock-leak.patch
diff --git
a/target/linux/mvebu/patches-4.14/508-cpufreq-armada-37xx-Fix-clock-leak.patch
b/target/linux/mvebu/patches-4.14/508-cpufreq-armada-37xx-Fix-clock-leak.patch
new file mode 100644
index 00..7479c6db21
--- /dev/null
+++
b/target/linux/mvebu/patches-4.14/508-cpufreq-armada-37xx-Fix-clock-leak.patch
@@ -0,0 +1,35 @@
+From bbcc328561040292f7d6796954d478e4a2335e6f Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT
+Date: Wed, 4 Apr 2018 16:44:44 +0200
+Subject: [PATCH] cpufreq: armada-37xx: Fix clock leak
+
+There was no clk_put() balancing the clk_get(). This commit fixes it.
+
+Fixes: 92ce45fb875d (cpufreq: Add DVFS support for Armada 37xx)
+Cc: 4.16+ # 4.16+
+Reported-by: Thomas Petazzoni
+Signed-off-by: Gregory CLEMENT
+Acked-by: Viresh Kumar
+Signed-off-by: Rafael J. Wysocki
+---
+ drivers/cpufreq/armada-37xx-cpufreq.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/cpufreq/armada-37xx-cpufreq.c
b/drivers/cpufreq/armada-37xx-cpufreq.c
+@@ -202,6 +202,7 @@ static int __init armada37xx_cpufreq_dri
+ cur_frequency = clk_get_rate(clk);
+ if (!cur_frequency) {
+ dev_err(cpu_dev, "Failed to get clock rate for CPU\n");
++ clk_put(clk);
+ return -EINVAL;
+ }
+
+@@ -210,6 +211,7 @@ static int __init armada37xx_cpufreq_dri
+ return -EINVAL;
+
+ armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider);
++ clk_put(clk);
+
+ for (load_lvl = ARMADA_37XX_DVFS_LOAD_0; load_lvl < LOAD_LEVEL_NR;
+load_lvl++) {
--
2.17.1
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[OpenWrt-Devel] [PATCH 2/3] mvebu: reduce speed to gen1 for armada 37xx devices pcie
Since the beginning there's been an issue with initializing the Atheros based MiniPCIe wlan cards. Here's an example of kerenel log: advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x44 advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 ath9k :00:00.0: enabling device ( -> 0002) advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0xc advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x40 ath9k :00:00.0: request_irq failed advk-pcie d007.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4 ath9k: probe of :00:00.0 failed with error -22 The same happens for ath5k cards, while ath10k card didn't appear at all (not detected). Following the issue on esppressobin.net forum [1] the workaround seems to be limiting the speed of PCIe bridge to 1st generation. This fixed the initialization of ath5k, ath9k and ath10k cards. The change shouldn't affect the performance for wireless cards, it could reduce the performance of storage controller cards but since OpenWrt focuses on wireless connectivity, fixing compatibility with wireless cards should be a priority. For the record, the iwlwifi and mt76 cards were not affected by this issue. 1. http://espressobin.net/forums/topic/which-pcie-wlan-cards-are-supported Signed-off-by: Tomasz Maciej Nowak --- Please also cherry-pick this to OpenWrt 18.06. --- .../527-pci-aardvark-reduce-speed-to-gen1.patch | 15 +++ 1 file changed, 15 insertions(+) create mode 100644 target/linux/mvebu/patches-4.14/527-pci-aardvark-reduce-speed-to-gen1.patch diff --git a/target/linux/mvebu/patches-4.14/527-pci-aardvark-reduce-speed-to-gen1.patch b/target/linux/mvebu/patches-4.14/527-pci-aardvark-reduce-speed-to-gen1.patch new file mode 100644 index 00..1974c5684f --- /dev/null +++ b/target/linux/mvebu/patches-4.14/527-pci-aardvark-reduce-speed-to-gen1.patch @@ -0,0 +1,15 @@ +--- a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c +@@ -311,10 +311,10 @@ static void advk_pcie_setup_hw(struct ad + PCIE_CORE_CTRL2_TD_ENABLE; + advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); + +- /* Set GEN2 */ ++ /* Set GEN1 */ + reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); + reg &= ~PCIE_GEN_SEL_MSK; +- reg |= SPEED_GEN_2; ++ reg |= SPEED_GEN_1; + advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); + + /* Set lane X1 */ -- 2.17.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/listinfo/openwrt-devel
[OpenWrt-Devel] sysupgrade broken by 30f61a34b4cf ("base-files: always use staged sysupgrade")
brcm47xx and bcm53xx targets support multiple firmware formats, most
of them are TRX files with vendor-specific header prepended.
They are handled in [0]
target/linux/bcm53xx/base-files/lib/upgrade/platform.sh
by the platform_do_upgrade() which builds a proper command for
extracting TRX out of vendor-specific format.
Example:
To sysupgrade using Linksys's CyberTAN format something like this is called:
default_do_upgrade "/tmp/linksys-foo.bin" "dd bs=64 skip=1"
The problem is above commit introduced a regression breaking
sysupgrade using all these formats. The string returned by get_image()
has changed
Before:
cat /tmp/linksys-foo.bin | dd skip=32 iflag=skip_bytes
After:
dd skip=32 iflag=skip_bytes /tmp/linksys-foo.bin 2>/dev/null
As you can see command generated by get_image() after commit [1]
30f61a34b4cf ("base-files: always use staged sysupgrade") has changed,
is wrong and can't work.
Matthias: can you look at this, please?
[0]
https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/bcm53xx/base-files/lib/upgrade/platform.sh#l322
[1]
https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=30f61a34b4cfd2c676fea4a919e089d6a77254e9
--
Rafał
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Re: [OpenWrt-Devel] [PATCH] mpc85xx: Enable caam support only for p1020
On 06/08/2018 04:42 PM, Achim Gottinger wrote: > Disable caam support in default config and enable it only for the p1020 > target. > The generic target is used for the wdr4900-v1 tp-link router which does > not have an enabled caam engine. > If caam is build in for this target it adds non functional crypto > methods to the kernels crypto framework. > Strongswan for example tries to use these methods and as an result does > not work. > More about the issue is mentioned here > https://bugs.openwrt.org/index.php?do=details_id=1262 > > Signed-off-by: Achim Gottinger > --- > target/linux/mpc85xx/config-4.9 | 10 -- > target/linux/mpc85xx/generic/config-default | 10 ++ > target/linux/mpc85xx/p1020/config-default | 10 ++ > 3 files changed, 20 insertions(+), 10 deletions(-) Hi Felix, Please have a look at this patch. This problem was introduced in your commit: https://git.openwrt.org/c00e5a4f09115ec976fac7dc380f576ef6a24fab Hauke > > diff --git a/target/linux/mpc85xx/config-4.9 > b/target/linux/mpc85xx/config-4.9 > index 68568c4a62..cfbd089d20 100644 > --- a/target/linux/mpc85xx/config-4.9 > +++ b/target/linux/mpc85xx/config-4.9 > @@ -47,16 +47,6 @@ CONFIG_CRYPTO_AEAD2=y > CONFIG_CRYPTO_AKCIPHER=y > CONFIG_CRYPTO_AKCIPHER2=y > CONFIG_CRYPTO_AUTHENC=y > -CONFIG_CRYPTO_DEV_FSL_CAAM=y > -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y > -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y > -# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set > -# CONFIG_CRYPTO_DEV_FSL_CAAM_IMX is not set > -# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set > -CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y > -CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y > -CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 > -CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y > CONFIG_CRYPTO_HASH=y > CONFIG_CRYPTO_HASH2=y > CONFIG_CRYPTO_HW=y > diff --git a/target/linux/mpc85xx/generic/config-default > b/target/linux/mpc85xx/generic/config-default > index 81bf934b33..ca4ab43286 100644 > --- a/target/linux/mpc85xx/generic/config-default > +++ b/target/linux/mpc85xx/generic/config-default > @@ -1 +1,11 @@ > CONFIG_TL_WDR4900_V1=y > +# CONFIG_CRYPTO_DEV_FSL_CAAM is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_IMX is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_JR is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API is not set > diff --git a/target/linux/mpc85xx/p1020/config-default > b/target/linux/mpc85xx/p1020/config-default > index fd9433b59a..d906a06d46 100644 > --- a/target/linux/mpc85xx/p1020/config-default > +++ b/target/linux/mpc85xx/p1020/config-default > @@ -2,6 +2,16 @@ CONFIG_ARCH_HAS_TICK_BROADCAST=y > CONFIG_AT803X_PHY=y > CONFIG_CMDLINE_OVERRIDE=y > CONFIG_CPU_RMAP=y > +CONFIG_CRYPTO_DEV_FSL_CAAM=y > +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y > +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y > +# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_IMX is not set > +# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set > +CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y > +CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y > +CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 > +CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y > CONFIG_EEPROM_LEGACY=y > CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y > CONFIG_GENERIC_TBSYNC=y > -- > 2.11.0 > > > ___ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/listinfo/openwrt-devel > ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] kernel: bump 4.9 to 4.9.107
The sender domain has a DMARC Reject/Quarantine policy which disallows
sending mailing list messages using the original "From" header.
To mitigate this problem, the original message has been wrapped
automatically by the mailing list software.--- Begin Message ---
Refresh patches.
Compile-tested for: ar71xx
Run-tested on: ar71xx Archer C7 v2
Signed-off-by: Kevin Darbyshire-Bryant
---
include/kernel-version.mk | 4 +-
.../patches-4.9/910-unaligned_access_hacks.patch | 2 +-
..._pl011-Don-t-use-DT-aliases-for-numbering.patch | 2 +-
.../950-0195-amba_pl011-Round-input-clock-up.patch | 4 +-
.../pending-4.9/890-uart_optional_sysrq.patch | 2 +-
.../sunxi/patches-4.9/0052-stmmac-form-4-12.patch | 344 ++---
6 files changed, 168 insertions(+), 190 deletions(-)
diff --git a/include/kernel-version.mk b/include/kernel-version.mk
index 6c220f3f2a..f43344ab84 100644
--- a/include/kernel-version.mk
+++ b/include/kernel-version.mk
@@ -4,12 +4,12 @@ LINUX_RELEASE?=1
LINUX_VERSION-3.18 = .71
LINUX_VERSION-4.4 = .121
-LINUX_VERSION-4.9 = .106
+LINUX_VERSION-4.9 = .107
LINUX_VERSION-4.14 = .48
LINUX_KERNEL_HASH-3.18.71 =
5abc9778ad44ce02ed6c8ab52ece8a21c6d20d21f6ed8a19287b4a38a50c1240
LINUX_KERNEL_HASH-4.4.121 =
44a88268b5088dc326b30c9b9133ac35a9a200b636b7268d08f32abeae6ca729
-LINUX_KERNEL_HASH-4.9.106 =
2d409bb29588ea9a61bae006255ee97a675ded364c87a9ff43f687c5271bbe3c
+LINUX_KERNEL_HASH-4.9.107 =
3ce7f40ecee096cda1d51eb2cada105a39abe8da7b968ef85f52be961f22cad3
LINUX_KERNEL_HASH-4.14.48 =
80a0608f611fe7a5c54556402cdc2880a21301e1c4e1b19d4c1db82ad2bf22b9
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1
diff --git a/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch
b/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch
index 4c59876b82..1815ccb1d3 100644
--- a/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch
+++ b/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch
@@ -795,7 +795,7 @@
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
-@@ -3894,14 +3894,16 @@ static bool tcp_parse_aligned_timestamp(
+@@ -3896,14 +3896,16 @@ static bool tcp_parse_aligned_timestamp(
{
const __be32 *ptr = (const __be32 *)(th + 1);
diff --git
a/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch
b/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch
index 07944df1e0..2710ed63d7 100644
---
a/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch
+++
b/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch
@@ -14,7 +14,7 @@ use the same logic.
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
-@@ -2446,7 +2446,12 @@ static int pl011_setup_port(struct devic
+@@ -2501,7 +2501,12 @@ static int pl011_setup_port(struct devic
if (IS_ERR(base))
return PTR_ERR(base);
diff --git
a/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch
b/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch
index 11293c360e..b981be02ac 100644
---
a/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch
+++
b/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch
@@ -68,7 +68,7 @@ Signed-off-by: Phil Elwell
if (uap->vendor->fixed_options) {
baud = uap->fixed_baud;
-@@ -2377,6 +2394,7 @@ static struct uart_driver amba_reg = {
+@@ -2432,6 +2449,7 @@ static struct uart_driver amba_reg = {
.cons = AMBA_CONSOLE,
};
@@ -76,7 +76,7 @@ Signed-off-by: Phil Elwell
static int pl011_probe_dt_alias(int index, struct device *dev)
{
struct device_node *np;
-@@ -2408,6 +2426,7 @@ static int pl011_probe_dt_alias(int inde
+@@ -2463,6 +2481,7 @@ static int pl011_probe_dt_alias(int inde
return ret;
}
diff --git a/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch
b/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch
index 6cb745ee33..b317070e52 100644
--- a/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch
+++ b/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch
@@ -26,7 +26,7 @@ Signed-off-by: Felix Fietkau
{
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
-@@ -396,6 +396,11 @@ config MAGIC_SYSRQ_DEFAULT_ENABLE
+@@ -410,6 +410,11 @@ config MAGIC_SYSRQ_DEFAULT_ENABLE
This may be set to 1 or 0 to enable or disable them all, or
to a bitmask as described in Documentation/sysrq.txt.
diff --git a/target/linux/sunxi/patches-4.9/0052-stmmac-form-4-12.patch
b/target/linux/sunxi/patches-4.9/0052-stmmac-form-4-12.patch
index 1ed1294694..a1b018186f 100644
--- a/target/linux/sunxi/patches-4.9/0052-stmmac-form-4-12.patch
+++
