[OpenWrt-Devel] [PATCH] procd: Add cpu string to board detection
This patch is in relation to https://github.com/openwrt/openwrt/pull/1307 to help fix architecture detection in LuCI which was added in https://github.com/openwrt/luci/commit/b8f32b6da7accc672c5887e894a861de3f806cf5 Signed-off-by: Chris Blake --- system.c | 1 + 1 file changed, 1 insertion(+) diff --git a/system.c b/system.c index 151f613..87ce2da 100644 --- a/system.c +++ b/system.c @@ -65,6 +65,7 @@ static int system_board(struct ubus_context *ctx, struct ubus_object *obj, if (!strcasecmp(key, "system type") || !strcasecmp(key, "processor") || + !strcasecmp(key, "cpu") || !strcasecmp(key, "model name")) { strtoul(val + 2, , 0); -- 2.7.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 2/2] Add support for the Cisco Meraki MR24
This patch adds support for the Cisco Meraki MR24 Access point to the apm821xx target. More info on the device can be found at https://wiki.openwrt.org/toh/meraki/mr24 Signed-off-by: Chris Blake --- .../linux/apm821xx/base-files/etc/board.d/01_leds | 25 ++ .../apm821xx/base-files/etc/board.d/02_network | 3 + target/linux/apm821xx/base-files/etc/diag.sh | 37 ++ target/linux/apm821xx/base-files/lib/apm821xx.sh | 39 ++ .../lib/preinit/05_set_iface_mac_apm821xx | 17 + .../apm821xx/base-files/lib/upgrade/merakinand.sh | 65 .../apm821xx/base-files/lib/upgrade/platform.sh| 55 +++ target/linux/apm821xx/config-4.4 | 11 +- target/linux/apm821xx/dts/MR24.dts | 433 + target/linux/apm821xx/image/Makefile | 57 +++ .../200-add-meraki-mr24-ikarem-support.patch | 31 ++ target/linux/apm821xx/profiles/meraki.mk | 17 + tools/firmware-utils/src/mkmerakifw.c | 10 + 13 files changed, 798 insertions(+), 2 deletions(-) create mode 100755 target/linux/apm821xx/base-files/etc/board.d/01_leds create mode 100755 target/linux/apm821xx/base-files/etc/diag.sh create mode 100755 target/linux/apm821xx/base-files/lib/apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_iface_mac_apm821xx create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/merakinand.sh create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/platform.sh create mode 100644 target/linux/apm821xx/dts/MR24.dts create mode 100644 target/linux/apm821xx/patches-4.4/200-add-meraki-mr24-ikarem-support.patch create mode 100644 target/linux/apm821xx/profiles/meraki.mk diff --git a/target/linux/apm821xx/base-files/etc/board.d/01_leds b/target/linux/apm821xx/base-files/etc/board.d/01_leds new file mode 100755 index 000..a94871f --- /dev/null +++ b/target/linux/apm821xx/base-files/etc/board.d/01_leds @@ -0,0 +1,25 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/functions/uci-defaults.sh +. /lib/apm821xx.sh + +board_config_update + +board=$(apm821xx_board_name) + +case "$board" in +mr24) + ucidef_set_led_netdev "wan" "WAN" "mr24:green:wan" "eth0" + ucidef_set_led_wlan "wlan1" "WLAN1" "mr24:green:wifi1" "phy0assoc" + ucidef_set_led_wlan "wlan2" "WLAN2" "mr24:green:wifi2" "phy0assoc" + ucidef_set_led_wlan "wlan3" "WLAN3" "mr24:green:wifi3" "phy0assoc" + ucidef_set_led_wlan "wlan4" "WLAN4" "mr24:green:wifi4" "phy0tpt" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/apm821xx/base-files/etc/board.d/02_network b/target/linux/apm821xx/base-files/etc/board.d/02_network index c7d067b..9738b4e 100755 --- a/target/linux/apm821xx/base-files/etc/board.d/02_network +++ b/target/linux/apm821xx/base-files/etc/board.d/02_network @@ -12,6 +12,9 @@ board_config_update board=$(apm821xx_board_name) case "$board" in +mr24) + ucidef_set_interface_lan "eth0" + ;; *) ucidef_set_interfaces_lan_wan "eth0" "eth1" ;; diff --git a/target/linux/apm821xx/base-files/etc/diag.sh b/target/linux/apm821xx/base-files/etc/diag.sh new file mode 100755 index 000..787d0e1 --- /dev/null +++ b/target/linux/apm821xx/base-files/etc/diag.sh @@ -0,0 +1,37 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/functions/leds.sh +. /lib/apm821xx.sh + +get_status_led() { +case $(apm821xx_board_name) in +mr24) +status_led="mr24:green:power" +;; +esac +} + +set_state() { + get_status_led + + case "$1" in + preinit) + status_led_blink_preinit + ;; + + failsafe) + status_led_blink_failsafe + ;; + + preinit_regular) + status_led_blink_preinit_regular + ;; + + done) + status_led_on + ;; + esac +} diff --git a/target/linux/apm821xx/base-files/lib/apm821xx.sh b/target/linux/apm821xx/base-files/lib/apm821xx.sh new file mode 100755 index 000..cfb1536 --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/apm821xx.sh @@ -0,0 +1,39 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +APM821XX_BOARD_NAME= +APM821XX_MODEL= + +apm821xx_board_detect() { + local model + local name + + model=$(awk 'BEGIN{FS="[ \t]+:[ \t]"} /model/ {print $2}' /proc/cpuinfo) + + case "$model" in + *"Meraki MR24 Access Point") + name="mr24" + ;; + esac + + [ -z "$name" ] && name="unknown" + + [ -z &qu
[OpenWrt-Devel] [PATCH 1/2] Add support for the apm821xx Device Target
This adds a new target for PowerPC APM821xx (464-based) boards, as well as adds support for the booke-wdt watchdog package. Signed-off-by: Chris Blake --- include/target.mk | 1 + package/kernel/linux/modules/other.mk | 2 +- target/linux/apm821xx/Makefile | 29 ++ .../apm821xx/base-files/etc/board.d/02_network | 22 ++ .../lib/preinit/03_preinit_do_apm821xx.sh | 12 + .../lib/preinit/05_set_preinit_iface_apm821xx | 12 + target/linux/apm821xx/config-4.4 | 298 + target/linux/apm821xx/image/Makefile | 24 ++ .../700-powerpc_ibm_phy_add_ar8035.patch | 41 +++ .../800-ppc4xx-rng-fix-crash-during-init.patch | 117 target/linux/apm821xx/profiles/00-default.mk | 16 ++ 11 files changed, 573 insertions(+), 1 deletion(-) create mode 100644 target/linux/apm821xx/Makefile create mode 100755 target/linux/apm821xx/base-files/etc/board.d/02_network create mode 100644 target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx create mode 100644 target/linux/apm821xx/config-4.4 create mode 100644 target/linux/apm821xx/image/Makefile create mode 100644 target/linux/apm821xx/patches-4.4/700-powerpc_ibm_phy_add_ar8035.patch create mode 100644 target/linux/apm821xx/patches-4.4/800-ppc4xx-rng-fix-crash-during-init.patch create mode 100644 target/linux/apm821xx/profiles/00-default.mk diff --git a/include/target.mk b/include/target.mk index 76fbd99..5bdb7bf 100644 --- a/include/target.mk +++ b/include/target.mk @@ -253,6 +253,7 @@ ifeq ($(DUMP),1) CPU_CFLAGS_8540:=-mcpu=8540 CPU_CFLAGS_405:=-mcpu=405 CPU_CFLAGS_440:=-mcpu=440 +CPU_CFLAGS_464fp:=-mcpu=464fp endif ifeq ($(ARCH),sparc) CPU_TYPE = sparc diff --git a/package/kernel/linux/modules/other.mk b/package/kernel/linux/modules/other.mk index 528d32f..6624353 100644 --- a/package/kernel/linux/modules/other.mk +++ b/package/kernel/linux/modules/other.mk @@ -517,7 +517,7 @@ $(eval $(call KernelPackage,wdt-orion)) define KernelPackage/booke-wdt SUBMENU:=$(OTHER_MENU) TITLE:=PowerPC Book-E Watchdog Timer - DEPENDS:=@(TARGET_mpc85xx||TARGET_ppc40x||TARGET_ppc44x) + DEPENDS:=@(TARGET_apm821xx||TARGET_mpc85xx||TARGET_ppc40x||TARGET_ppc44x) KCONFIG:=CONFIG_BOOKE_WDT FILES:=$(LINUX_DIR)/drivers/$(WATCHDOG_DIR)/booke_wdt.ko AUTOLOAD:=$(call AutoLoad,50,booke_wdt,1) diff --git a/target/linux/apm821xx/Makefile b/target/linux/apm821xx/Makefile new file mode 100644 index 000..d48dab0 --- /dev/null +++ b/target/linux/apm821xx/Makefile @@ -0,0 +1,29 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk + +ARCH:=powerpc +BOARD:=apm821xx +BOARDNAME:=AppliedMicro APM821xx +CPU_TYPE:=464fp +FEATURES:=squashfs nand rtc fpu ramdisk +MAINTAINER:=Imre Kaloz <ka...@openwrt.org> + +KERNEL_PATCHVER:=4.4 + +include $(INCLUDE_DIR)/target.mk + +KERNELNAME:=uImage + +DEFAULT_PACKAGES += \ + kmod-leds-gpio kmod-booke-wdt wpad-mini + +define Target/Description + Build images for AppliedMicro APM821xx based boards. +endef + +$(eval $(call BuildTarget)) diff --git a/target/linux/apm821xx/base-files/etc/board.d/02_network b/target/linux/apm821xx/base-files/etc/board.d/02_network new file mode 100755 index 000..c7d067b --- /dev/null +++ b/target/linux/apm821xx/base-files/etc/board.d/02_network @@ -0,0 +1,22 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/functions/system.sh +. /lib/functions/uci-defaults.sh +. /lib/apm821xx.sh + +board_config_update + +board=$(apm821xx_board_name) + +case "$board" in +*) + ucidef_set_interfaces_lan_wan "eth0" "eth1" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh b/target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh new file mode 100644 index 000..53ca2f5 --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +do_apm821xx() { + . /lib/apm821xx.sh + + apm821xx_board_detect +} + +boot_hook_add preinit_main do_apm821xx diff --git a/target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx b/target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx new file mode 100644 index 000..5ccd8b6 --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx @@ -0,0 +1,12 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/apm821xx.sh + +apm821xx_set_preinit_iface() { + ifname=eth0 +} + +boot_hook_add preinit_main apm821xx_s
[OpenWrt-Devel] [PATCH 0/2] Add support for a apm821xx target & the Cisco Meraki MR24
These RFC patches were recommended by Imre Kaloz [0] to add support for the apm821xx SoC to support a subset of devices. Original discussion for these patches can be found at [1], and the previous RFC can be found at [2]. [0]: https://lists.openwrt.org/pipermail/openwrt-devel/2016-March/040626.html [1]: https://lists.openwrt.org/pipermail/openwrt-devel/2016-March/040615.html [2]: https://lists.openwrt.org/pipermail/openwrt-devel/2016-April/040641.html Chris Blake (2): Add support for the apm821xx Device Target Add support for the Cisco Meraki MR24 include/target.mk | 1 + package/kernel/linux/modules/other.mk | 2 +- target/linux/apm821xx/Makefile | 29 ++ .../linux/apm821xx/base-files/etc/board.d/01_leds | 25 ++ .../apm821xx/base-files/etc/board.d/02_network | 25 ++ target/linux/apm821xx/base-files/etc/diag.sh | 37 ++ target/linux/apm821xx/base-files/lib/apm821xx.sh | 39 ++ .../lib/preinit/03_preinit_do_apm821xx.sh | 12 + .../lib/preinit/05_set_iface_mac_apm821xx | 17 + .../lib/preinit/05_set_preinit_iface_apm821xx | 12 + .../apm821xx/base-files/lib/upgrade/merakinand.sh | 65 .../apm821xx/base-files/lib/upgrade/platform.sh| 55 +++ target/linux/apm821xx/config-4.4 | 305 +++ target/linux/apm821xx/dts/MR24.dts | 433 + target/linux/apm821xx/image/Makefile | 81 .../200-add-meraki-mr24-ikarem-support.patch | 31 ++ .../700-powerpc_ibm_phy_add_ar8035.patch | 41 ++ .../800-ppc4xx-rng-fix-crash-during-init.patch | 117 ++ target/linux/apm821xx/profiles/00-default.mk | 16 + target/linux/apm821xx/profiles/meraki.mk | 17 + tools/firmware-utils/src/mkmerakifw.c | 10 + 21 files changed, 1369 insertions(+), 1 deletion(-) create mode 100644 target/linux/apm821xx/Makefile create mode 100755 target/linux/apm821xx/base-files/etc/board.d/01_leds create mode 100755 target/linux/apm821xx/base-files/etc/board.d/02_network create mode 100755 target/linux/apm821xx/base-files/etc/diag.sh create mode 100755 target/linux/apm821xx/base-files/lib/apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_iface_mac_apm821xx create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/merakinand.sh create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/platform.sh create mode 100644 target/linux/apm821xx/config-4.4 create mode 100644 target/linux/apm821xx/dts/MR24.dts create mode 100644 target/linux/apm821xx/image/Makefile create mode 100644 target/linux/apm821xx/patches-4.4/200-add-meraki-mr24-ikarem-support.patch create mode 100644 target/linux/apm821xx/patches-4.4/700-powerpc_ibm_phy_add_ar8035.patch create mode 100644 target/linux/apm821xx/patches-4.4/800-ppc4xx-rng-fix-crash-during-init.patch create mode 100644 target/linux/apm821xx/profiles/00-default.mk create mode 100644 target/linux/apm821xx/profiles/meraki.mk -- 2.1.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] Fwd: [RFC 1/2] Add support for the apm821xx Device Target
Hello Imre, On Fri, Apr 1, 2016 at 8:32 AM, Imre Kaloz <ka...@openwrt.org> wrote: > On Fri, 01 Apr 2016 15:26:46 +0200, Chris Blake <chrisrblak...@gmail.com> > wrote: > >> Hey Imre, >> >> On Fri, Apr 1, 2016 at 7:35 AM, Imre Kaloz <ka...@openwrt.org> wrote: >>> >>> Hi Chris, >>> >>> On Fri, 01 Apr 2016 03:46:09 +0200, Chris Blake <chrisrblak...@gmail.com> >>> >>>> +CONFIG_BLUESTONE=y >>> >>> >>> >>> I doubt we support that here. >>> >> >> From my understanding, Bluestone is the dev board for the apm821xx, so >> for dependencies shouldn't this be selected? > > > Nope, as we don't support it. > > > Imre > I did some testing, and it seems that images fail to boot without this set in the kernel config, with the following error: [0.979336] Freeing unused kernel memory: 140K (c03b1000 - c03d4000) [0.986659] Bad trap at PC: b7e0f60c, SR: 2d000, vector=2010 [0.992337] init[1]: unhandled signal 5 at nip b7e0f60c lr b7e0f5c8 code 0 [1.000192] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0005 [1.000192] [1.009293] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0005 [1.009293] It's interesting, as we select all of the same configs that are set by CONFIG_BLUESTONE [0], except for APM821xx, even though we already enable the settings set by APM821xx [1], but PPC_FPU needs to be selected by a config to be enabled [2]. Because of this, I believe for the apm821xx target we will need to leave this selected unless you have any ideas. We could do a kernel patch to add a new CONFIG_IKAREM target, but then this would need to be done for every device added to this target, which is why I think just leaving CONFIG_BLUESTONE enabled would be the best plan of action. [0]: https://github.com/torvalds/linux/blob/v4.4/arch/powerpc/platforms/44x/Kconfig#L20 [1]: https://github.com/torvalds/linux/blob/v4.4/arch/powerpc/platforms/44x/Kconfig#L346 [2]: https://github.com/torvalds/linux/blob/v4.4/arch/powerpc/platforms/Kconfig.cputype#L169 Thanks, Chris Blake ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [RFC 2/2] Add support for the Meraki MR24
Hey Imre, On Fri, Apr 1, 2016 at 7:39 AM, Imre Kaloz <ka...@openwrt.org> wrote: > On Fri, 01 Apr 2016 03:46:10 +0200, Chris Blake <chrisrblak...@gmail.com> > wrote: > >> This patch adds support for the Meraki MR24 Access point to the apm821xx >> target. More info on the device can be found at >> https://wiki.openwrt.org/toh/meraki/mr24 >> >> Signed-off-by: Chris Blake <chrisrblak...@gmail.com> > > >> --- /dev/null >> +++ b/target/linux/apm821xx/dts/MR24.dts >> @@ -0,0 +1,433 @@ >> +/* >> + * Device Tree Source for Meraki MR24 (Ikarem) >> + * >> + * Copyright (C) 2016 Chris Blake <chrisrblak...@gmail.com> >> + * >> + * Based on Cisco Meraki GPL Release r23-20150601 MR24 DTS >> + * >> + * This file is licensed under the terms of the GNU General Public >> + * License version 2. This program is licensed "as is" without >> + * any warranty of any kind, whether express or implied. >> + */ >> + >> +/dts-v1/; >> + >> +/ { >> + #address-cells = <2>; >> + #size-cells = <1>; >> + model = "Meraki MR24 Access Point"; >> + compatible = "apm,bluestone"; > > > This should be "meraki,ikarem" if that's the codename for the box. > From my understanding this should stay as "apm,bluestone" as this is what the dts was based on, and needs to stay set for the platform code to work: http://lxr.free-electrons.com/source/arch/powerpc/platforms/44x/ppc44x_simple.c#L43 So not sure why setting this to "meraki,ikarem" would be the best plan of action, as then patches would be needed for the above code, and possibly more drivers. (still new to the ppc arch and dts files, so please correct me if I am wrong here). > ___ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [RFC 1/2] Add support for the apm821xx Device Target
Hey Imre, On Fri, Apr 1, 2016 at 7:35 AM, Imre Kaloz <ka...@openwrt.org> wrote: > Hi Chris, > > On Fri, 01 Apr 2016 03:46:09 +0200, Chris Blake <chrisrblak...@gmail.com> > >> +CONFIG_BLUESTONE=y > > > I doubt we support that here. > From my understanding, Bluestone is the dev board for the apm821xx, so for dependencies shouldn't this be selected? > > ___ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [RFC 2/2] Add support for the Meraki MR24
This patch adds support for the Meraki MR24 Access point to the apm821xx target. More info on the device can be found at https://wiki.openwrt.org/toh/meraki/mr24 Signed-off-by: Chris Blake <chrisrblak...@gmail.com> --- .../linux/apm821xx/base-files/etc/board.d/01_leds | 25 ++ .../apm821xx/base-files/etc/board.d/02_network | 5 +- target/linux/apm821xx/base-files/etc/diag.sh | 37 ++ target/linux/apm821xx/base-files/lib/apm821xx.sh | 39 ++ .../lib/preinit/05_set_iface_mac_apm821xx | 17 + .../apm821xx/base-files/lib/upgrade/merakinand.sh | 65 .../apm821xx/base-files/lib/upgrade/platform.sh| 55 +++ target/linux/apm821xx/dts/MR24.dts | 433 + target/linux/apm821xx/image/Makefile | 57 +++ .../700-powerpc_ibm_phy_add_ar8035.patch | 41 ++ .../800-ppc4xx-rng-fix-crash-during-init.patch | 117 ++ target/linux/apm821xx/profiles/meraki.mk | 17 + tools/firmware-utils/src/mkmerakifw.c | 10 + 13 files changed, 917 insertions(+), 1 deletion(-) create mode 100755 target/linux/apm821xx/base-files/etc/board.d/01_leds create mode 100755 target/linux/apm821xx/base-files/etc/diag.sh create mode 100755 target/linux/apm821xx/base-files/lib/apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_iface_mac_apm821xx create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/merakinand.sh create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/platform.sh create mode 100644 target/linux/apm821xx/dts/MR24.dts create mode 100644 target/linux/apm821xx/patches-4.4/700-powerpc_ibm_phy_add_ar8035.patch create mode 100644 target/linux/apm821xx/patches-4.4/800-ppc4xx-rng-fix-crash-during-init.patch create mode 100644 target/linux/apm821xx/profiles/meraki.mk diff --git a/target/linux/apm821xx/base-files/etc/board.d/01_leds b/target/linux/apm821xx/base-files/etc/board.d/01_leds new file mode 100755 index 000..a94871f --- /dev/null +++ b/target/linux/apm821xx/base-files/etc/board.d/01_leds @@ -0,0 +1,25 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/functions/uci-defaults.sh +. /lib/apm821xx.sh + +board_config_update + +board=$(apm821xx_board_name) + +case "$board" in +mr24) + ucidef_set_led_netdev "wan" "WAN" "mr24:green:wan" "eth0" + ucidef_set_led_wlan "wlan1" "WLAN1" "mr24:green:wifi1" "phy0assoc" + ucidef_set_led_wlan "wlan2" "WLAN2" "mr24:green:wifi2" "phy0assoc" + ucidef_set_led_wlan "wlan3" "WLAN3" "mr24:green:wifi3" "phy0assoc" + ucidef_set_led_wlan "wlan4" "WLAN4" "mr24:green:wifi4" "phy0tpt" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/apm821xx/base-files/etc/board.d/02_network b/target/linux/apm821xx/base-files/etc/board.d/02_network index a4e5ab4..9738b4e 100755 --- a/target/linux/apm821xx/base-files/etc/board.d/02_network +++ b/target/linux/apm821xx/base-files/etc/board.d/02_network @@ -11,7 +11,10 @@ board_config_update board=$(apm821xx_board_name) -case "$board" +case "$board" in +mr24) + ucidef_set_interface_lan "eth0" + ;; *) ucidef_set_interfaces_lan_wan "eth0" "eth1" ;; diff --git a/target/linux/apm821xx/base-files/etc/diag.sh b/target/linux/apm821xx/base-files/etc/diag.sh new file mode 100755 index 000..787d0e1 --- /dev/null +++ b/target/linux/apm821xx/base-files/etc/diag.sh @@ -0,0 +1,37 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/functions/leds.sh +. /lib/apm821xx.sh + +get_status_led() { +case $(apm821xx_board_name) in +mr24) +status_led="mr24:green:power" +;; +esac +} + +set_state() { + get_status_led + + case "$1" in + preinit) + status_led_blink_preinit + ;; + + failsafe) + status_led_blink_failsafe + ;; + + preinit_regular) + status_led_blink_preinit_regular + ;; + + done) + status_led_on + ;; + esac +} diff --git a/target/linux/apm821xx/base-files/lib/apm821xx.sh b/target/linux/apm821xx/base-files/lib/apm821xx.sh new file mode 100755 index 000..cfb1536 --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/apm821xx.sh @@ -0,0 +1,39 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +APM821XX_BOARD_NAME= +APM821XX_MODEL= + +apm821xx_board_detect() { + local model + local name + + model=$(awk 'BEGIN{FS="[ \t]+:[ \t]"} /model/ {print $2}' /proc/cpuinfo) + + case "$model" in + *"Meraki MR24 Access Point") +
[OpenWrt-Devel] [RFC 1/2] Add support for the apm821xx Device Target
This adds a new target for PowerPC APM821xx (464-based) boards, as well as adds support for the booke-wdt watchdog package. Signed-off-by: Chris Blake <chrisrblak...@gmail.com> --- include/target.mk | 1 + package/kernel/linux/modules/other.mk | 2 +- target/linux/apm821xx/Makefile | 30 +++ .../apm821xx/base-files/etc/board.d/02_network | 22 ++ .../lib/preinit/03_preinit_do_apm821xx.sh | 12 + .../lib/preinit/05_set_preinit_iface_apm821xx | 12 + target/linux/apm821xx/config-4.4 | 275 + target/linux/apm821xx/generic/config-default | 0 target/linux/apm821xx/generic/target.mk| 12 + target/linux/apm821xx/image/Makefile | 24 ++ target/linux/apm821xx/profiles/00-default.mk | 16 ++ 11 files changed, 405 insertions(+), 1 deletion(-) create mode 100644 target/linux/apm821xx/Makefile create mode 100755 target/linux/apm821xx/base-files/etc/board.d/02_network create mode 100644 target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx create mode 100644 target/linux/apm821xx/config-4.4 create mode 100644 target/linux/apm821xx/generic/config-default create mode 100644 target/linux/apm821xx/generic/target.mk create mode 100644 target/linux/apm821xx/image/Makefile create mode 100644 target/linux/apm821xx/profiles/00-default.mk diff --git a/include/target.mk b/include/target.mk index 76fbd99..6d036a0 100644 --- a/include/target.mk +++ b/include/target.mk @@ -253,6 +253,7 @@ ifeq ($(DUMP),1) CPU_CFLAGS_8540:=-mcpu=8540 CPU_CFLAGS_405:=-mcpu=405 CPU_CFLAGS_440:=-mcpu=440 +CPU_CFLAGS_464:=-mcpu=464 endif ifeq ($(ARCH),sparc) CPU_TYPE = sparc diff --git a/package/kernel/linux/modules/other.mk b/package/kernel/linux/modules/other.mk index 528d32f..6624353 100644 --- a/package/kernel/linux/modules/other.mk +++ b/package/kernel/linux/modules/other.mk @@ -517,7 +517,7 @@ $(eval $(call KernelPackage,wdt-orion)) define KernelPackage/booke-wdt SUBMENU:=$(OTHER_MENU) TITLE:=PowerPC Book-E Watchdog Timer - DEPENDS:=@(TARGET_mpc85xx||TARGET_ppc40x||TARGET_ppc44x) + DEPENDS:=@(TARGET_apm821xx||TARGET_mpc85xx||TARGET_ppc40x||TARGET_ppc44x) KCONFIG:=CONFIG_BOOKE_WDT FILES:=$(LINUX_DIR)/drivers/$(WATCHDOG_DIR)/booke_wdt.ko AUTOLOAD:=$(call AutoLoad,50,booke_wdt,1) diff --git a/target/linux/apm821xx/Makefile b/target/linux/apm821xx/Makefile new file mode 100644 index 000..1daf039 --- /dev/null +++ b/target/linux/apm821xx/Makefile @@ -0,0 +1,30 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk + +ARCH:=powerpc +BOARD:=apm821xx +BOARDNAME:=AppliedMicro APM821xx +CPU_TYPE:=464 +FEATURES:=squashfs nand rtc ramdisk +MAINTAINER:=Imre Kaloz <ka...@openwrt.org> +SUBTARGETS=generic + +KERNEL_PATCHVER:=4.4 + +include $(INCLUDE_DIR)/target.mk + +KERNELNAME:=uImage + +DEFAULT_PACKAGES += \ + kmod-leds-gpio kmod-booke-wdt wpad-mini + +define Target/Description + Build images for AppliedMicro APM821xx based boards. +endef + +$(eval $(call BuildTarget)) diff --git a/target/linux/apm821xx/base-files/etc/board.d/02_network b/target/linux/apm821xx/base-files/etc/board.d/02_network new file mode 100755 index 000..a4e5ab4 --- /dev/null +++ b/target/linux/apm821xx/base-files/etc/board.d/02_network @@ -0,0 +1,22 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/functions/system.sh +. /lib/functions/uci-defaults.sh +. /lib/apm821xx.sh + +board_config_update + +board=$(apm821xx_board_name) + +case "$board" +*) + ucidef_set_interfaces_lan_wan "eth0" "eth1" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh b/target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh new file mode 100644 index 000..53ca2f5 --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +do_apm821xx() { + . /lib/apm821xx.sh + + apm821xx_board_detect +} + +boot_hook_add preinit_main do_apm821xx diff --git a/target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx b/target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx new file mode 100644 index 000..5ccd8b6 --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx @@ -0,0 +1,12 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/apm821xx.sh + +apm821xx_set_preinit_iface() { + ifname=eth0 +} + +boot_hook_add preinit_main apm821xx_set_preinit_iface diff --git a/targe
[OpenWrt-Devel] [RFC 0/2] Add support for a apm821xx target & the Cisco Meraki MR24
These RFC patches were recommended by Imre Kaloz [0] to add support for the apm821xx SoC to support a subset of devices. Original discussion on this can be found at [1]. [0]: https://lists.openwrt.org/pipermail/openwrt-devel/2016-March/040626.html [1]: https://lists.openwrt.org/pipermail/openwrt-devel/2016-March/040615.html Chris Blake (2): Add support for the apm821xx Device Target Add support for the Meraki MR24 include/target.mk | 1 + package/kernel/linux/modules/other.mk | 2 +- target/linux/apm821xx/Makefile | 30 ++ .../linux/apm821xx/base-files/etc/board.d/01_leds | 25 ++ .../apm821xx/base-files/etc/board.d/02_network | 25 ++ target/linux/apm821xx/base-files/etc/diag.sh | 37 ++ target/linux/apm821xx/base-files/lib/apm821xx.sh | 39 ++ .../lib/preinit/03_preinit_do_apm821xx.sh | 12 + .../lib/preinit/05_set_iface_mac_apm821xx | 17 + .../lib/preinit/05_set_preinit_iface_apm821xx | 12 + .../apm821xx/base-files/lib/upgrade/merakinand.sh | 65 .../apm821xx/base-files/lib/upgrade/platform.sh| 55 +++ target/linux/apm821xx/config-4.4 | 275 + target/linux/apm821xx/dts/MR24.dts | 433 + target/linux/apm821xx/generic/config-default | 0 target/linux/apm821xx/generic/target.mk| 12 + target/linux/apm821xx/image/Makefile | 81 .../700-powerpc_ibm_phy_add_ar8035.patch | 41 ++ .../800-ppc4xx-rng-fix-crash-during-init.patch | 117 ++ target/linux/apm821xx/profiles/00-default.mk | 16 + target/linux/apm821xx/profiles/meraki.mk | 17 + tools/firmware-utils/src/mkmerakifw.c | 10 + 22 files changed, 1321 insertions(+), 1 deletion(-) create mode 100644 target/linux/apm821xx/Makefile create mode 100755 target/linux/apm821xx/base-files/etc/board.d/01_leds create mode 100755 target/linux/apm821xx/base-files/etc/board.d/02_network create mode 100755 target/linux/apm821xx/base-files/etc/diag.sh create mode 100755 target/linux/apm821xx/base-files/lib/apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/03_preinit_do_apm821xx.sh create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_iface_mac_apm821xx create mode 100644 target/linux/apm821xx/base-files/lib/preinit/05_set_preinit_iface_apm821xx create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/merakinand.sh create mode 100755 target/linux/apm821xx/base-files/lib/upgrade/platform.sh create mode 100644 target/linux/apm821xx/config-4.4 create mode 100644 target/linux/apm821xx/dts/MR24.dts create mode 100644 target/linux/apm821xx/generic/config-default create mode 100644 target/linux/apm821xx/generic/target.mk create mode 100644 target/linux/apm821xx/image/Makefile create mode 100644 target/linux/apm821xx/patches-4.4/700-powerpc_ibm_phy_add_ar8035.patch create mode 100644 target/linux/apm821xx/patches-4.4/800-ppc4xx-rng-fix-crash-during-init.patch create mode 100644 target/linux/apm821xx/profiles/00-default.mk create mode 100644 target/linux/apm821xx/profiles/meraki.mk -- 2.1.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] OpenWRT ppc44x target & the APM821XX SoC
Hi, On Thu, Mar 31, 2016 at 5:24 AM, Imre Kaloz <ka...@openwrt.org> wrote: > Hi, > > On Thu, 31 Mar 2016 12:19:36 +0200, Chris Blake <chrisrblak...@gmail.com> > wrote: > >> Yep, currently my apm821xx target on the repo is based on the 4.4 >> kernel, and has a few small patches in place for the ar8035 NIC, and a >> patch for fixing the Crypto driver for the apm821xx hardware. [0] > > > Did you try to send these upstream? > The ar8035 patch has not been sent upstream as it was taken from the Meraki GPL drop, but Christian Lamparter, the creator of the crypto patch, submitted the crypto patch for review upstream. > >>>> I am also aware of another developer working on porting over another >>>> device that uses this SoC, so it would be nice to know which path of >>>> action is recommended as other PPC targets (ex, mpc85xx) have been >>>> branched out in the past. >>> >>> >>> >>> Apples and oranges ;) The rule of thumb is "as long as there are more >>> differences than similarities, it should be a separate target". >> >> >> Awesome, will try and get this all drafted as a proper RFC then, >> unless you already have one submitted somewhere for this new target? > > > Feel free to send an RFC, I won't find time to update mine for at least a > few more days. > Will try to get this out then in the next 24~ or so hours. :) > > Imre > Chris B ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] OpenWRT ppc44x target & the APM821XX SoC
Hi Imre, On Thu, Mar 31, 2016 at 4:25 AM, Imre Kaloz <ka...@openwrt.org> wrote: > Hi Chris, > > On Thu, 31 Mar 2016 01:00:19 +0200, Chris Blake <chrisrblak...@gmail.com> > wrote: > >> Quick Question about the ppc44x target. I am currently working on >> porting over a PowerPC Device that uses the APM821XX SoC (464-based) >> but the closest current target would be ppc44x, which seems to be a >> bit outdated and lacks support for some system level integration >> (LED's, sysupgrade scripts, etc.). I was able to get OpenWRT up and >> running by creating a new device target for this SoC, but I was >> curious on the best way to get this merged upstream. >> >> The device in Question is a Cisco Meraki MR24, which has a APM82181 >> 800Mhz SoC, 128MB DDR2 RAM, and 2x Atheros PCIe wireless cards. The >> current working code can be found at >> https://github.com/riptidewave93/Openwrt-MR24 but I was curious on >> which of the following is the best way to move forward: >> >> 1. RFC the current code (new device target for this SoC) for review. >> 2. Create a new apm821xx subtarget for the ppc44x target, and RFC for >> review. >> 3. Other ideas? > > > I also have some patches for the APM82181, which I can update to 4.4. Are > you on 4.4 already? > In any case, the APM82181 is a PPC464 based core, which isn't the same as > the 44x so it shouldn't be it's subtarget. Yep, currently my apm821xx target on the repo is based on the 4.4 kernel, and has a few small patches in place for the ar8035 NIC, and a patch for fixing the Crypto driver for the apm821xx hardware. [0] >> I am also aware of another developer working on porting over another >> device that uses this SoC, so it would be nice to know which path of >> action is recommended as other PPC targets (ex, mpc85xx) have been >> branched out in the past. > > > Apples and oranges ;) The rule of thumb is "as long as there are more > differences than similarities, it should be a separate target". Awesome, will try and get this all drafted as a proper RFC then, unless you already have one submitted somewhere for this new target? > > > Imre [0]: https://github.com/riptidewave93/Openwrt-MR24/tree/master/overlay/target/linux/apm821xx/patches-4.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] OpenWRT ppc44x target & the APM821XX SoC
Hello everyone, Quick Question about the ppc44x target. I am currently working on porting over a PowerPC Device that uses the APM821XX SoC (464-based) but the closest current target would be ppc44x, which seems to be a bit outdated and lacks support for some system level integration (LED's, sysupgrade scripts, etc.). I was able to get OpenWRT up and running by creating a new device target for this SoC, but I was curious on the best way to get this merged upstream. The device in Question is a Cisco Meraki MR24, which has a APM82181 800Mhz SoC, 128MB DDR2 RAM, and 2x Atheros PCIe wireless cards. The current working code can be found at https://github.com/riptidewave93/Openwrt-MR24 but I was curious on which of the following is the best way to move forward: 1. RFC the current code (new device target for this SoC) for review. 2. Create a new apm821xx subtarget for the ppc44x target, and RFC for review. 3. Other ideas? I am also aware of another developer working on porting over another device that uses this SoC, so it would be nice to know which path of action is recommended as other PPC targets (ex, mpc85xx) have been branched out in the past. Thank you for your time. Regards, Chris Blake ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] [RFC] generic: Move NU801 LED driver to generic
On Mon, Mar 7, 2016 at 11:21 AM, Chris Blake <chrisrblak...@gmail.com> wrote: > This driver is mostly used by Cisco Meraki on their boards. For > example, the Meraki Z1 (another ar71xx target) as well as older gear, > such as the MR24 (PowerPC) which I should get my hands on in a few > days. > > - Chris B > > On Mon, Mar 7, 2016 at 11:16 AM, Felix Fietkau <n...@openwrt.org> wrote: >> On 2016-03-07 18:12, Chris Blake wrote: >>> The NU801 PWM LED driver is used on more than just the ar71xx >>> architecture, so the driver should be moved to generic to support any >>> future platforms or devices. >>> >>> Signed-off-by: Chris Blake <chrisrblak...@gmail.com> >> So what else uses it? Are there any specific 'future platforms or >> devices' that you have in mind? >> >> - Felix Got my MR24 and it does not use the NU801. I know some newer Broadcom Meraki's use the NU801, but I have not got my hands on any, nor have I heard of anyone else working on those boards currently so until then I will scrap this RFC. - Chris B ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] [RFC] generic: Move NU801 LED driver to generic
This driver is mostly used by Cisco Meraki on their boards. For example, the Meraki Z1 (another ar71xx target) as well as older gear, such as the MR24 (PowerPC) which I should get my hands on in a few days. - Chris B On Mon, Mar 7, 2016 at 11:16 AM, Felix Fietkau <n...@openwrt.org> wrote: > On 2016-03-07 18:12, Chris Blake wrote: >> The NU801 PWM LED driver is used on more than just the ar71xx >> architecture, so the driver should be moved to generic to support any >> future platforms or devices. >> >> Signed-off-by: Chris Blake <chrisrblak...@gmail.com> > So what else uses it? Are there any specific 'future platforms or > devices' that you have in mind? > > - Felix ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [RFC] generic: Move NU801 LED driver to generic
The NU801 PWM LED driver is used on more than just the ar71xx architecture, so the driver should be moved to generic to support any future platforms or devices. Signed-off-by: Chris Blake <chrisrblak...@gmail.com> --- package/kernel/linux/modules/leds.mk | 15 +++ target/linux/ar71xx/modules.mk| 15 --- .../{ar71xx => generic}/files/drivers/leds/leds-nu801.c | 0 .../patches-4.1/834-led-nu801.patch} | 14 +++--- .../patches-4.4/835-led-nu801.patch} | 14 +++--- 5 files changed, 29 insertions(+), 29 deletions(-) rename target/linux/{ar71xx => generic}/files/drivers/leds/leds-nu801.c (100%) rename target/linux/{ar71xx/patches-4.1/818-MIPS-ath79-add-nu801-led-driver.patch => generic/patches-4.1/834-led-nu801.patch} (78%) rename target/linux/{ar71xx/patches-4.4/818-MIPS-ath79-add-nu801-led-driver.patch => generic/patches-4.4/835-led-nu801.patch} (78%) diff --git a/package/kernel/linux/modules/leds.mk b/package/kernel/linux/modules/leds.mk index c4261d3..f156bf2 100644 --- a/package/kernel/linux/modules/leds.mk +++ b/package/kernel/linux/modules/leds.mk @@ -22,6 +22,21 @@ endef $(eval $(call KernelPackage,leds-gpio)) +define KernelPackage/leds-nu801 + SUBMENU:=$(LEDS_MENU) + TITLE:=NU801 LED support + DEPENDS:= @GPIO_SUPPORT + KCONFIG:=CONFIG_LEDS_NU801 + FILES:=$(LINUX_DIR)/drivers/leds/leds-nu801.ko + AUTOLOAD:=$(call AutoLoad,60,leds-nu801) +endef + +define KernelPackage/leds-nu801/description + Kernel module for the nu801 LED driver used on Cisco Meraki hardware. +endef + +$(eval $(call KernelPackage,leds-nu801)) + LED_TRIGGER_DIR=$(LINUX_DIR)/drivers/leds/trigger define KernelPackage/ledtrig-heartbeat diff --git a/target/linux/ar71xx/modules.mk b/target/linux/ar71xx/modules.mk index 9ead8b4..d264aa0 100644 --- a/target/linux/ar71xx/modules.mk +++ b/target/linux/ar71xx/modules.mk @@ -5,21 +5,6 @@ # See /LICENSE for more information. # -define KernelPackage/leds-nu801 - SUBMENU:=$(LEDS_MENU) - TITLE:=Meraki MR18 LED support - DEPENDS:=@TARGET_ar71xx - KCONFIG:=CONFIG_LEDS_NU801 - FILES:=$(LINUX_DIR)/drivers/leds/leds-nu801.ko - AUTOLOAD:=$(call AutoLoad,60,leds-nu801) -endef - -define KernelPackage/leds-nu801/description - Kernel module for the nu801 LED driver used on the Meraki MR18. -endef - -$(eval $(call KernelPackage,leds-nu801)) - define KernelPackage/leds-rb750 SUBMENU:=$(LEDS_MENU) diff --git a/target/linux/ar71xx/files/drivers/leds/leds-nu801.c b/target/linux/generic/files/drivers/leds/leds-nu801.c similarity index 100% rename from target/linux/ar71xx/files/drivers/leds/leds-nu801.c rename to target/linux/generic/files/drivers/leds/leds-nu801.c diff --git a/target/linux/ar71xx/patches-4.1/818-MIPS-ath79-add-nu801-led-driver.patch b/target/linux/generic/patches-4.1/834-led-nu801.patch similarity index 78% rename from target/linux/ar71xx/patches-4.1/818-MIPS-ath79-add-nu801-led-driver.patch rename to target/linux/generic/patches-4.1/834-led-nu801.patch index e264201..84861b0 100644 --- a/target/linux/ar71xx/patches-4.1/818-MIPS-ath79-add-nu801-led-driver.patch +++ b/target/linux/generic/patches-4.1/834-led-nu801.patch @@ -1,12 +1,12 @@ --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -500,6 +500,13 @@ config LEDS_MENF21BMC - + comment "LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)" - + +config LEDS_NU801 + tristate "LED driver for NU801 RGB LED" -+ depends on LEDS_CLASS && ATH79_MACH_MR18 ++ depends on LEDS_CLASS + help +This option enables support for NU801 RGB LED driver chips +accessed via GPIO. @@ -16,11 +16,11 @@ depends on LEDS_CLASS --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile -@@ -51,6 +51,7 @@ obj-$(CONFIG_LEDS_ADP5520) += leds-adp5 - obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o +@@ -51,6 +51,7 @@ obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o obj-$(CONFIG_LEDS_MC13783)+= leds-mc13783.o - obj-$(CONFIG_LEDS_RB750) += leds-rb750.o -+obj-$(CONFIG_LEDS_NU801) += leds-nu801.o obj-$(CONFIG_LEDS_NS2)+= leds-ns2.o obj-$(CONFIG_LEDS_NETXBIG)+= leds-netxbig.o ++obj-$(CONFIG_LEDS_NU801) += leds-nu801.o obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o + obj-$(CONFIG_LEDS_MAX8997)+= leds-max8997.o + obj-$(CONFIG_LEDS_LM355x) += leds-lm355x.o diff --git a/target/linux/ar71xx/patches-4.4/818-MIPS-ath79-add-nu801-led-driver.patch b/target/linux/generic/patches-4.4/835-led-nu801.patch similarity index 78% rename from target/linux/ar71xx/patches-4.4/818-MIPS-ath79-add-nu801-led-driver.patch rename to target/linux/generic/patches-4.4/835-led-nu801.patch index ec9f59e..3273546 100644 --- a/target/linux/ar71xx/patches-4.4/818-MIPS-ath79
[OpenWrt-Devel] [PATCH v4 0/2] ar71xx: Add Support for AirTight Networks C-55 Access Point
This list of patches is to add support for the AirTight Networks C-55 AP. Signed-off-by: Chris R Blake <chrisrblak...@gmail.com> Chris Blake (2): ar71xx: Add ath79_register_m25p80_large to support >16MB SPI chips ar71xx: Add support for AirTight Networks C-55 target/linux/ar71xx/base-files/etc/board.d/01_leds | 6 + .../linux/ar71xx/base-files/etc/board.d/02_network | 1 + target/linux/ar71xx/base-files/etc/diag.sh | 3 + .../etc/hotplug.d/firmware/10-ath9k-eeprom | 8 ++ target/linux/ar71xx/base-files/lib/ar71xx.sh | 3 + .../base-files/lib/preinit/05_set_iface_mac_ar71xx | 5 +- .../ar71xx/base-files/lib/upgrade/platform.sh | 1 + target/linux/ar71xx/config-4.1 | 1 + .../ar71xx/files/arch/mips/ath79/Kconfig.openwrt | 10 ++ target/linux/ar71xx/files/arch/mips/ath79/Makefile | 1 + .../ar71xx/files/arch/mips/ath79/dev-m25p80.c | 8 ++ .../ar71xx/files/arch/mips/ath79/dev-m25p80.h | 1 + .../linux/ar71xx/files/arch/mips/ath79/mach-c55.c | 132 + .../linux/ar71xx/files/arch/mips/ath79/machtypes.h | 1 + target/linux/ar71xx/generic/profiles/airtight.mk | 17 +++ target/linux/ar71xx/image/Makefile | 10 ++ 16 files changed, 207 insertions(+), 1 deletion(-) create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c create mode 100644 target/linux/ar71xx/generic/profiles/airtight.mk -- 2.1.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH v4 2/2] ar71xx: Add support for AirTight Networks C-55
;; diff --git a/target/linux/ar71xx/base-files/lib/preinit/05_set_iface_mac_ar71xx b/target/linux/ar71xx/base-files/lib/preinit/05_set_iface_mac_ar71xx index a9f4bf5..39da309 100644 --- a/target/linux/ar71xx/base-files/lib/preinit/05_set_iface_mac_ar71xx +++ b/target/linux/ar71xx/base-files/lib/preinit/05_set_iface_mac_ar71xx @@ -22,6 +22,10 @@ fetch_mac_from_mtd() { preinit_set_mac_address() { case $(ar71xx_board_name) in + c-55) + mac_lan=$(mtd_get_mac_binary art 0) + [ -n "$mac_lan" ] && ifconfig eth0 hw ether "$mac_lan" + ;; dir-615-c1) fetch_mac_from_mtd config lan_mac wan_mac echo 1 > /sys/class/leds/dir-615-c1:green:wancpu/brightness @@ -49,4 +53,3 @@ preinit_set_mac_address() { } boot_hook_add preinit_main preinit_set_mac_address - diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh index 7e564b4..e911092 100755 --- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh @@ -201,6 +201,7 @@ platform_check_image() { ap81 | \ ap83 | \ ap132 | \ + c-55 | \ cf-e316n-v2 | \ dgl-5500-a1 |\ dhp-1565-a1 |\ diff --git a/target/linux/ar71xx/config-4.1 b/target/linux/ar71xx/config-4.1 index 15754d9..79cf2df 100644 --- a/target/linux/ar71xx/config-4.1 +++ b/target/linux/ar71xx/config-4.1 @@ -50,6 +50,7 @@ CONFIG_ATH79_MACH_ARDUINO_YUN=y CONFIG_ATH79_MACH_AW_NR580=y CONFIG_ATH79_MACH_BHU_BXU2000N2_A=y CONFIG_ATH79_MACH_BSB=y +CONFIG_ATH79_MACH_C55=y CONFIG_ATH79_MACH_CAP4200AG=y CONFIG_ATH79_MACH_CARAMBOLA2=y CONFIG_ATH79_MACH_CF_E316N_V2=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index d619b3c..be74d3f 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -182,6 +182,16 @@ config ATH79_MACH_PB92 select ATH79_DEV_PB9X_PCI if PCI select ATH79_DEV_USB +config ATH79_MACH_C55 + bool "AirTight Networks C-55 support" + select SOC_AR934X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + config ATH79_MACH_AW_NR580 bool "AzureWave AW-NR580 board support" select SOC_AR71XX diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile index 9f67bd8..3fbe1a3 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile +++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile @@ -114,6 +114,7 @@ obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o +obj-$(CONFIG_ATH79_MACH_C55) += mach-c55.o obj-$(CONFIG_ATH79_MACH_QIHOO_C301)+= mach-qihoo-c301.o obj-$(CONFIG_ATH79_MACH_R6100) += mach-r6100.o obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c new file mode 100644 index 000..cbee18e --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c @@ -0,0 +1,132 @@ +/* + * AirTight Networks C-55 board support + * + * Copyright (C) 2014-2015 Chris Blake <chrisrblak...@gmail.com> + * + * Based on Senao CAP4200AG board support + * + * Copyright (C) 2012 Gabor Juhos <juh...@openwrt.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "common.h" +#include "pci.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-spi.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define C55_GPIO_LED_PWR_GREEN 12 +#define C55_GPIO_LED_PWR_AMBER 13 +#define C55_GPIO_LED_LAN_GREEN 14 +#define C55_GPIO_LED_LAN_AMBER 15 +#define C55_GPIO_LED_WLAN_GREEN18 +#define C55_GPIO_LED_WLAN_AMBER19 + +#define C55_GPIO_BTN_RESET 17 + +#define C55_KEYS_POLL_INTERVAL 20 /* msecs */ +#define C55_KEYS_DEBOUNCE_INTERVAL (3 * C55_KEYS_POLL_INTERVAL) + +#define C55_MAC_OFFSET 0 +#define C55_WMAC_CALDATA_OFFSET
[OpenWrt-Devel] [PATCH v4 1/2] ar71xx: Add ath79_register_m25p80_large to support >16MB SPI chips
The following patch is to add ath79_register_m25p80_large, which sets is_flash to false to support bit banging. This is needed on some 32MB+ SPI chips, such as the S25FL256S1 Signed-off-by: Chris R Blake--- target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c | 8 target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h | 1 + 2 files changed, 9 insertions(+) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c index 9323b31..e5831d4 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c @@ -106,6 +106,14 @@ static void add_mtd_concat_notifier(void) register_mtd_user(); } +void __init ath79_register_m25p80_large(struct flash_platform_data *pdata) +{ + ath79_spi_data.bus_num = 0; + ath79_spi_data.num_chipselect = 1; + ath79_spi0_cdata.is_flash = false; + ath79_spi_info[0].platform_data = pdata; + ath79_register_spi(_spi_data, ath79_spi_info, 1); +} void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) { diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h index 637b41a..5e66016 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h @@ -12,6 +12,7 @@ #include void ath79_register_m25p80(struct flash_platform_data *pdata) __init; +void ath79_register_m25p80_large(struct flash_platform_data *pdata) __init; void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; #endif /* _ATH79_DEV_M25P80_H */ -- 2.1.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 1/1] ar71xx: Update merakinand.sh to fix sysupgrade
Remove reliance on /lib/upgrade/nand.sh as this is called by sysupgrade, based on felix's comments at https://lists.openwrt.org/pipermail/openwrt-devel/2015-December/037963.html Signed-off-by: Chris R Blake --- target/linux/ar71xx/base-files/lib/upgrade/merakinand.sh | 1 - 1 file changed, 1 deletion(-) diff --git a/target/linux/ar71xx/base-files/lib/upgrade/merakinand.sh b/target/linux/ar71xx/base-files/lib/upgrade/merakinand.sh index fe78e9f..cc7a86c 100644 --- a/target/linux/ar71xx/base-files/lib/upgrade/merakinand.sh +++ b/target/linux/ar71xx/base-files/lib/upgrade/merakinand.sh @@ -7,7 +7,6 @@ # . /lib/ar71xx.sh . /lib/functions.sh -. /lib/upgrade/nand.sh get_magic_at() { local mtddev=$1 -- 2.1.4 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH v6 5/6] ar71xx: scan nand ubi partition for ath9k eeprom files
On Mon, Dec 7, 2015 at 7:48 PM, Yousong Zhou <yszhou4t...@gmail.com> wrote: > On 7 December 2015 at 23:55, Chris Blake <chrisrblak...@gmail.com> wrote: >> Yousong, >> >> Sorry to come back so fast, but how would moving the skip to hexdump >> help the code in any way? For example, we are currently using: >> >> dd bs=1 skip=$offset count=6 if=/dev/$part 2>/dev/null | hexdump -v -n >> 6 -e '5/1 "%02x:" 1/1 "%02x"' >> >> If we move the skip to hexdump, then we would also need to remove the >> count from dd, which means the entire partition is then piped into >> hexdump which to me seems to be a lot less efficient than the current >> implementation above. >> > > I used the following command before for fetching MAC addresses from > mtd devices. Not sure if it also works for ubi devices... > > hexdump -v -n 6 -s 0x1fc00 -e '5/1 "%02x:" 1/1 "%02x""\n"' /dev/mtd2 > > P.S. please avoid top posting > > Cheers, > yousong > > Will do, and thanks for the advice. As for UBI I was able to get it working, so expect all requested changes to be in the next patch revision. (along with a patch to fix up mtd_get_mac_binary) Thanks again! - Chris Blake >> On Mon, Dec 7, 2015 at 9:42 AM, Yousong Zhou <yszhou4t...@gmail.com> wrote: >>> >>> Am 07.12.2015 22:12 schrieb "Chris Blake" <chrisrblak...@gmail.com>: >>>> >>>> Hey Yousong, >>>> >>>> looking at the hexdump comment, this function was actually based off >>>> of the function mtd_get_mac_binary() which uses the same dd offset >>>> logic as you can see in mtd_get_mac_binary_ubi(). If this were to be >>>> changed, shouldn't the same change apply to mtd_get_mac_binary()? >>>> >>> >>> Yes, it should >>> >>>> I know this would require a new patch, but just want to make sure we >>>> are on the same page. >>> >>> Previously, I thought mtd_get_mac_binary_ubi was a new function and not >>> aware of its resemblence to mtd_get_mac_binary. A new patch is good if we >>> think it can help improve the code even though it is mostly unrelated in the >>> whole series. >>> >>> And a new nitpick crawls out below... >>> >>>> >>>> Regards, >>>> Chris Blake >>>> >>>> On Sun, Dec 6, 2015 at 10:05 PM, Yousong Zhou <yszhou4t...@gmail.com> >>>> wrote: >>>> > Hello, Christian, a few nitpicks inline :) >>>> > >>>> > On 6 December 2015 at 06:48, Christian Lamparter >>>> > <chunk...@googlemail.com> wrote: >>>> >> From: Chris R Blake <chrisrblak...@gmail.com> >>>> >> >>>> >> The MR18 stores the ath9k eeprom values on the NAND. >>>> >> This patch makes it possible to retrieve the images >>>> >> from there. >>>> >> >>>> >> Signed-off-by: Chris R Blake <chrisrblak...@gmail.com> >>>> >> --- >>>> >> package/base-files/files/lib/functions/system.sh| 17 >>>> >> + >>>> >> .../base-files/etc/hotplug.d/firmware/10-ath9k-eeprom | 6 +- >>>> >> 2 files changed, 22 insertions(+), 1 deletion(-) >>>> >> >>>> >> diff --git a/package/base-files/files/lib/functions/system.sh >>>> >> b/package/base-files/files/lib/functions/system.sh >>>> >> index 8d75a5a..928a429 100644 >>>> >> --- a/package/base-files/files/lib/functions/system.sh >>>> >> +++ b/package/base-files/files/lib/functions/system.sh >>>> >> @@ -41,6 +41,23 @@ mtd_get_mac_binary() { >>>> >> dd bs=1 skip=$offset count=6 if=$part 2>/dev/null | hexdump -v >>>> >> -n 6 -e '5/1 "%02x:" 1/1 "%02x"' >>>> >> } >>>> >> >>>> >> +mtd_get_mac_binary_ubi() { >>>> >> + local mtdname="$1" >>>> >> + local offset="$2" >>>> >> + >>>> >> + . /lib/upgrade/nand.sh >>>> >> + >>>> >> + local ubidev=$( nand_find_ubi $CI_UBIPART ) >>>> >> + local part="$( nand_find_volume $ubidev $1 )" >>>> > >>>> > Quotes and padding whitespaces are not need here for consistency of code
Re: [OpenWrt-Devel] [PATCH v6 5/6] ar71xx: scan nand ubi partition for ath9k eeprom files
Hey Yousong, looking at the hexdump comment, this function was actually based off of the function mtd_get_mac_binary() which uses the same dd offset logic as you can see in mtd_get_mac_binary_ubi(). If this were to be changed, shouldn't the same change apply to mtd_get_mac_binary()? I know this would require a new patch, but just want to make sure we are on the same page. Regards, Chris Blake On Sun, Dec 6, 2015 at 10:05 PM, Yousong Zhou <yszhou4t...@gmail.com> wrote: > Hello, Christian, a few nitpicks inline :) > > On 6 December 2015 at 06:48, Christian Lamparter > <chunk...@googlemail.com> wrote: >> From: Chris R Blake <chrisrblak...@gmail.com> >> >> The MR18 stores the ath9k eeprom values on the NAND. >> This patch makes it possible to retrieve the images >> from there. >> >> Signed-off-by: Chris R Blake <chrisrblak...@gmail.com> >> --- >> package/base-files/files/lib/functions/system.sh| 17 >> + >> .../base-files/etc/hotplug.d/firmware/10-ath9k-eeprom | 6 +- >> 2 files changed, 22 insertions(+), 1 deletion(-) >> >> diff --git a/package/base-files/files/lib/functions/system.sh >> b/package/base-files/files/lib/functions/system.sh >> index 8d75a5a..928a429 100644 >> --- a/package/base-files/files/lib/functions/system.sh >> +++ b/package/base-files/files/lib/functions/system.sh >> @@ -41,6 +41,23 @@ mtd_get_mac_binary() { >> dd bs=1 skip=$offset count=6 if=$part 2>/dev/null | hexdump -v -n 6 >> -e '5/1 "%02x:" 1/1 "%02x"' >> } >> >> +mtd_get_mac_binary_ubi() { >> + local mtdname="$1" >> + local offset="$2" >> + >> + . /lib/upgrade/nand.sh >> + >> + local ubidev=$( nand_find_ubi $CI_UBIPART ) >> + local part="$( nand_find_volume $ubidev $1 )" > > Quotes and padding whitespaces are not need here for consistency of code > style. > >> + >> + if [ -z "$part" ]; then >> + echo "mtd_get_mac_binary: ubi partition $mtdname not found!" >> >&2 >> + return >> + fi >> + >> + dd bs=1 skip=$offset count=6 if=/dev/$part 2>/dev/null | hexdump -v >> -n 6 -e '5/1 "%02x:" 1/1 "%02x"' > > hexdump accepts an argument for offset with -s option > >> +} >> + >> mtd_get_part_size() { >> local part_name=$1 >> local first dev size erasesize name >> diff --git >> a/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> b/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> index b5f0588..7287809 100644 >> --- a/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> +++ b/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> @@ -9,11 +9,14 @@ ath9k_eeprom_extract() { >> local part=$1 >> local offset=$2 >> local count=$3 >> + local ubidev=$( nand_find_ubi $CI_UBIPART ) >> local mtd >> >> mtd=$(find_mtd_chardev $part) >> [ -n "$mtd" ] || \ >> - ath9k_eeprom_die "no mtd device found for partition $part" >> + mtd="/dev/$(nand_find_volume $ubidev $part)" >> + [ -n "$mtd" ] || \ >> + ath9k_eeprom_die "no mtd device found for partition >> $part" >> > > The indentation here can be misleading > >> dd if=$mtd of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count >> 2>/dev/null || \ >> ath9k_eeprom_die "failed to extract from $mtd" >> @@ -32,6 +35,7 @@ ath9k_patch_firmware_mac() { >> . /lib/ar71xx.sh >> . /lib/functions.sh >> . /lib/functions/system.sh >> +. /lib/upgrade/nand.sh >> > > I suggest we move this part including the line "[ -e > /lib/firmware/$FIRMWARE ] && exit 0" to top of this file. > > yousong > > >> board=$(ar71xx_board_name) >> >> -- >> 2.6.2 >> ___ >> openwrt-devel mailing list >> openwrt-devel@lists.openwrt.org >> https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel > ___ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH v6 6/6] ar71xx: add support for Cisco's MR18
Hey lynxis, Looking over the new Makefile style, I was unable to find any examples of this for devices that rely on NAND and .tar sysupgrade images, such as the NetgearNAND boards. (maybe I am blind?) It's also worth noting this device is a bit special, as it doesn't use a UBI generated image for the system.img, but instead a squashfs file. If you have any tips on how to move this code over to the new style, please let me know or feel free to reach out to me directly. With that said, would it be possible to get this merged as is in the meantime to help get this device mainline? Best Regards, Chris Blake On Sun, Dec 6, 2015 at 12:56 AM, Alexander Couzens <lyn...@fe80.eu> wrote: > Hi Christian, > > please use the new image/Makefile style. Like the most tplink or > ubiquity devices use it. > > If you need any help, just ask. > > Best, > lynxis > > On Sat, 5 Dec 2015 23:48:08 +0100 > Christian Lamparter <chunk...@googlemail.com> wrote: > >> +MIPS_MACHINE(ATH79_MACH_MR18, "MR18", "Meraki MR18", mr18_setup); >> diff --git a/target/linux/ar71xx/image/Makefile >> b/target/linux/ar71xx/image/Makefile index d12ad8b..bac4a18 100644 >> --- a/target/linux/ar71xx/image/Makefile >> +++ b/target/linux/ar71xx/image/Makefile >> @@ -1494,6 +1494,7 @@ >> dragino2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,16000k(firmware),64k(config)ro >> hiwifi_hc6361_mtdlayout=mtdparts=spi0.0:64k(u-boot)ro,64k(bdinfo)ro,1280k(kernel),14848k(rootfs),64k(backup)ro,64k(art)ro,16128k@0x2(firmware) >> mr12_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,256k(u-boot-env)ro,13440k(rootfs),2304k(kernel),128k(art)ro,15744k@0x8(firmware) >> mr16_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,256k(u-boot-env)ro,13440k(rootfs),2304k(kernel),128k(art)ro,15744k@0x8(firmware) >> +mr18_mtdlayout=mtdparts=ar934x-nfc:512k(nandloader)ro,8M(kernel),8M(recovery),113664k(ubi),128k@130944k(odm-caldata)ro >> pb92_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,2752k(rootfs),896k(kernel),64k(nvram),64k(art)ro,3648k@0x5(firmware) >> planex_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,7744k(firmware),128k(art)ro >> ubntxm_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,7552k(firmware),256k(cfg)ro,64k(EEPROM)ro >> @@ -1975,6 +1976,37 @@ Image/Build/CyberTANLZMA/buildkernel=$(call >> MkuImageLzma,$(2),$(3) $(4)) Image/Build/CyberTANLZMA=$(call >> Image/Build/CyberTAN,$(1),$(2),$(3),$(4),$(5)) >> +define Image/Build/MerakiNAND/initramfs >> + $(eval kernelsize=$(call mtdpartsize,kernel,$(4))) >> + $(call PatchKernel,$(2),$(3) $(4),"-initramfs") >> + -$(STAGING_DIR_HOST)/bin/mkmerakifw \ >> + -B $(2) -s \ >> + -i $(KDIR_TMP)/vmlinux-initramfs-$(2) \ >> + -o $(KDIR_TMP)/vmlinux-initramfs-$(2)-patched >> + $(CP) $(KDIR_TMP)/vmlinux-initramfs-$(2)-patched >> $(BIN_DIR)/$(IMG_PREFIX)-$(2)-initramfs.bin +endef >> + > > > -- > Alexander Couzens > > mail: lyn...@fe80.eu > jabber: lyn...@fe80.eu > mobile: +4915123277221 > gpg: 390D CF78 8BF9 AA50 4F8F F1E2 C29E 9DA6 A0DF 8604 > > ___ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel > ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH v6 5/6] ar71xx: scan nand ubi partition for ath9k eeprom files
Hey Yousong, Thanks for the clarification, will get this all cleaned up for the next patch revision. Keep the feedback coming! :) Regards, Chris Blake On Mon, Dec 7, 2015 at 9:42 AM, Yousong Zhou <yszhou4t...@gmail.com> wrote: > > Am 07.12.2015 22:12 schrieb "Chris Blake" <chrisrblak...@gmail.com>: >> >> Hey Yousong, >> >> looking at the hexdump comment, this function was actually based off >> of the function mtd_get_mac_binary() which uses the same dd offset >> logic as you can see in mtd_get_mac_binary_ubi(). If this were to be >> changed, shouldn't the same change apply to mtd_get_mac_binary()? >> > > Yes, it should > >> I know this would require a new patch, but just want to make sure we >> are on the same page. > > Previously, I thought mtd_get_mac_binary_ubi was a new function and not > aware of its resemblence to mtd_get_mac_binary. A new patch is good if we > think it can help improve the code even though it is mostly unrelated in the > whole series. > > And a new nitpick crawls out below... > >> >> Regards, >> Chris Blake >> >> On Sun, Dec 6, 2015 at 10:05 PM, Yousong Zhou <yszhou4t...@gmail.com> >> wrote: >> > Hello, Christian, a few nitpicks inline :) >> > >> > On 6 December 2015 at 06:48, Christian Lamparter >> > <chunk...@googlemail.com> wrote: >> >> From: Chris R Blake <chrisrblak...@gmail.com> >> >> >> >> The MR18 stores the ath9k eeprom values on the NAND. >> >> This patch makes it possible to retrieve the images >> >> from there. >> >> >> >> Signed-off-by: Chris R Blake <chrisrblak...@gmail.com> >> >> --- >> >> package/base-files/files/lib/functions/system.sh| 17 >> >> + >> >> .../base-files/etc/hotplug.d/firmware/10-ath9k-eeprom | 6 +- >> >> 2 files changed, 22 insertions(+), 1 deletion(-) >> >> >> >> diff --git a/package/base-files/files/lib/functions/system.sh >> >> b/package/base-files/files/lib/functions/system.sh >> >> index 8d75a5a..928a429 100644 >> >> --- a/package/base-files/files/lib/functions/system.sh >> >> +++ b/package/base-files/files/lib/functions/system.sh >> >> @@ -41,6 +41,23 @@ mtd_get_mac_binary() { >> >> dd bs=1 skip=$offset count=6 if=$part 2>/dev/null | hexdump -v >> >> -n 6 -e '5/1 "%02x:" 1/1 "%02x"' >> >> } >> >> >> >> +mtd_get_mac_binary_ubi() { >> >> + local mtdname="$1" >> >> + local offset="$2" >> >> + >> >> + . /lib/upgrade/nand.sh >> >> + >> >> + local ubidev=$( nand_find_ubi $CI_UBIPART ) >> >> + local part="$( nand_find_volume $ubidev $1 )" >> > >> > Quotes and padding whitespaces are not need here for consistency of code >> > style. >> > >> >> + >> >> + if [ -z "$part" ]; then >> >> + echo "mtd_get_mac_binary: ubi partition $mtdname not >> >> found!" >&2 > > Here the error message should be reworded. > > yousong > >> >> + return >> >> + fi >> >> + >> >> + dd bs=1 skip=$offset count=6 if=/dev/$part 2>/dev/null | >> >> hexdump -v -n 6 -e '5/1 "%02x:" 1/1 "%02x"' >> > >> > hexdump accepts an argument for offset with -s option >> > >> >> +} >> >> + >> >> mtd_get_part_size() { >> >> local part_name=$1 >> >> local first dev size erasesize name >> >> diff --git >> >> a/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> >> b/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> >> index b5f0588..7287809 100644 >> >> --- >> >> a/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> >> +++ >> >> b/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom >> >> @@ -9,11 +9,14 @@ ath9k_eeprom_extract() { >> >> local part=$1 >> >> local offset=$2 >> >> local count=$3 >> >> + local ubidev=$( nand_find_ubi $CI_UBIPART ) >> >> local mtd >> >> >> >> mtd=$(find_mtd_chardev $part) >&
[OpenWrt-Devel] [PATCH 1/2] ar71xx: Add ath79_register_m25p80_large to support >16MB SPI chips
The following patch is to add ath79_register_m25p80_large, which sets is_flash to false to support bit banging. This is needed on some 32MB+ SPI chips, such as the S25FL256S1 Signed-off-by: Chris R Blake--- diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c index 9323b31..e5831d4 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c @@ -106,6 +106,14 @@ static void add_mtd_concat_notifier(void) register_mtd_user(); } +void __init ath79_register_m25p80_large(struct flash_platform_data *pdata) +{ + ath79_spi_data.bus_num = 0; + ath79_spi_data.num_chipselect = 1; + ath79_spi0_cdata.is_flash = false; + ath79_spi_info[0].platform_data = pdata; + ath79_register_spi(_spi_data, ath79_spi_info, 1); +} void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) { diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h index 637b41a..5e66016 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h @@ -12,6 +12,7 @@ #include void ath79_register_m25p80(struct flash_platform_data *pdata) __init; +void ath79_register_m25p80_large(struct flash_platform_data *pdata) __init; void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; #endif /* _ATH79_DEV_M25P80_H */ ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 2/2] ar71xx: Add support for AirTight Networks C-55
0644 --- a/target/linux/ar71xx/config-4.1 +++ b/target/linux/ar71xx/config-4.1 @@ -49,6 +49,7 @@ CONFIG_ATH79_MACH_ARCHER_C7=y CONFIG_ATH79_MACH_AW_NR580=y CONFIG_ATH79_MACH_BHU_BXU2000N2_A=y CONFIG_ATH79_MACH_BSB=y +CONFIG_ATH79_MACH_C55=y CONFIG_ATH79_MACH_CAP4200AG=y CONFIG_ATH79_MACH_CARAMBOLA2=y CONFIG_ATH79_MACH_CF_E316N_V2=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c new file mode 100644 index 000..cbee18e --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c @@ -0,0 +1,132 @@ +/* + * AirTight Networks C-55 board support + * + * Copyright (C) 2014-2015 Chris Blake <chrisrblak...@gmail.com> + * + * Based on Senao CAP4200AG board support + * + * Copyright (C) 2012 Gabor Juhos <juh...@openwrt.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "common.h" +#include "pci.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-spi.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define C55_GPIO_LED_PWR_GREEN12 +#define C55_GPIO_LED_PWR_AMBER13 +#define C55_GPIO_LED_LAN_GREEN14 +#define C55_GPIO_LED_LAN_AMBER15 +#define C55_GPIO_LED_WLAN_GREEN18 +#define C55_GPIO_LED_WLAN_AMBER19 + +#define C55_GPIO_BTN_RESET17 + +#define C55_KEYS_POLL_INTERVAL20/* msecs */ +#define C55_KEYS_DEBOUNCE_INTERVAL (3 * C55_KEYS_POLL_INTERVAL) + +#define C55_MAC_OFFSET0 +#define C55_WMAC_CALDATA_OFFSET0x1000 +#define C55_PCIE_CALDATA_OFFSET0x5000 + +static struct gpio_led c55_leds_gpio[] __initdata = { +{ +.name= "c-55:green:pwr", +.gpio= C55_GPIO_LED_PWR_GREEN, +.active_low= 1, +}, +{ +.name= "c-55:amber:pwr", +.gpio= C55_GPIO_LED_PWR_AMBER, +.active_low= 1, +}, +{ +.name= "c-55:green:lan", +.gpio= C55_GPIO_LED_LAN_GREEN, +.active_low= 1, +}, +{ +.name= "c-55:amber:lan", +.gpio= C55_GPIO_LED_LAN_AMBER, +.active_low= 1, +}, +{ +.name= "c-55:green:wlan", +.gpio= C55_GPIO_LED_WLAN_GREEN, +.active_low= 1, +}, +{ +.name= "c-55:amber:wlan", +.gpio= C55_GPIO_LED_WLAN_AMBER, +.active_low= 1, +}, +}; + +static struct gpio_keys_button c55_gpio_keys[] __initdata = { +{ +.desc= "Reset button", +.type= EV_KEY, +.code= KEY_RESTART, +.debounce_interval = C55_KEYS_DEBOUNCE_INTERVAL, +.gpio= C55_GPIO_BTN_RESET, +.active_low= 1, +}, +}; + +static void __init c55_setup(void) +{ +/* SPI Storage*/ +ath79_register_m25p80_large(NULL); + +/* MDIO Interface */ +ath79_register_mdio(0, 0x0); + +/* AR8035-A Ethernet */ +ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | + AR934X_ETH_CFG_SW_ONLY_MODE); +ath79_init_mac(ath79_eth0_data.mac_addr, NULL, 0); +ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; +ath79_eth0_data.phy_mask = BIT(0); +ath79_eth0_data.mii_bus_dev = _mdio0_device.dev; +ath79_eth0_pll_data.pll_1000 = 0x0600; +ath79_register_eth(0); + +/* LEDs & GPIO */ +ath79_gpio_output_select(C55_GPIO_LED_LAN_GREEN, + AR934X_GPIO_OUT_GPIO); +ath79_gpio_output_select(C55_GPIO_LED_LAN_AMBER, + AR934X_GPIO_OUT_GPIO); +ath79_register_leds_gpio(-1, ARRAY_SIZE(c55_leds_gpio), + c55_leds_gpio); +ath79_register_gpio_keys_polled(-1, C55_KEYS_POLL_INTERVAL, +ARRAY_SIZE(c55_gpio_keys), +c55_gpio_keys); + +/* WiFi */ +ath79_wmac_disable_2ghz(); +ath79_register_wmac_simple(); +ap91_pci_init_simple(); + +} +MIPS_MACHINE(ATH79_MACH_C55, "C-55", "AirTight Networks C-55", + c55_setup); diff --git a/target/linux/ar71xx/generic/profiles/airtight.mk b/target/linux/ar71xx/generic/profiles/airtight.mk new file mode 100644 index 000..00f9ce4 --- /dev/null +++ b/target/linux/ar71xx/generic/profiles/airtight.mk @@ -0,0 +1,17 @@ +# +# Copyright (C) 2015 Chris Blake (chrisrblak...@gmail.com) +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/C-55 +NAME:=AirTigh
Re: [OpenWrt-Devel] [PATCH 1/2] ar71xx: Add ath79_register_m25p80_large to support >16MB SPI chips
Sorry about that, below should be an updated patch. git send-email was giving me issues, so I may need to resolve that before trying again if this still doesn't work. Signed-off-by: Chris R Blake--- diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c index 9323b31..e5831d4 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c @@ -106,6 +106,14 @@ static void add_mtd_concat_notifier(void) register_mtd_user(); } +void __init ath79_register_m25p80_large(struct flash_platform_data *pdata) +{ + ath79_spi_data.bus_num = 0; + ath79_spi_data.num_chipselect = 1; + ath79_spi0_cdata.is_flash = false; + ath79_spi_info[0].platform_data = pdata; + ath79_register_spi(_spi_data, ath79_spi_info, 1); +} void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) { diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h index 637b41a..5e66016 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h @@ -12,6 +12,7 @@ #include void ath79_register_m25p80(struct flash_platform_data *pdata) __init; +void ath79_register_m25p80_large(struct flash_platform_data *pdata) __init; void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; #endif /* _ATH79_DEV_M25P80_H */ ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] ar71xx: Add eth rx delay for qca955x platforms
This patch is to add support for qca955x_eth_rx_delay to work with the qca955x SoC. Signed-off-by: Chris R Blake--- --- a/arch/mips/ath79/dev-eth.c +++ b/arch/mips/ath79/dev-eth.c @@ -823,6 +825,32 @@ iounmap(base); } +void __init ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, + unsigned int rxdv) +{ + void __iomem *base; + u32 t; + + rxd &= QCA955X_ETH_CFG_RXD_DELAY_MASK; + rxdv &= QCA955X_ETH_CFG_RDV_DELAY_MASK; + + base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); + + t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); + + t &= ~(QCA955X_ETH_CFG_RXD_DELAY_MASK << QCA955X_ETH_CFG_RXD_DELAY_SHIFT | + QCA955X_ETH_CFG_RDV_DELAY_MASK << QCA955X_ETH_CFG_RDV_DELAY_SHIFT); + + t |= (rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT | + rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT); + + __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); + /* flush write */ + __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); + + iounmap(base); +} + static int ath79_eth_instance __initdata; void __init ath79_register_eth(unsigned int id) { --- a/arch/mips/ath79/dev-eth.h +++ b/arch/mips/ath79/dev-eth.h @@ -49,5 +49,6 @@ void ath79_setup_ar934x_eth_cfg(u32 mask); void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); void ath79_setup_qca955x_eth_cfg(u32 mask); +void ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); #endif /* _ATH79_DEV_ETH_H */ --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -1098,5 +1098,11 @@ #define QCA955X_ETH_CFG_RGMII_EN BIT(0) #define QCA955X_ETH_CFG_GE0_SGMII BIT(6) +#define QCA955X_ETH_CFG_RXD_DELAY BIT(14) +#define QCA955X_ETH_CFG_RXD_DELAY_MASK 0x3 +#define QCA955X_ETH_CFG_RXD_DELAY_SHIFT 14 +#define QCA955X_ETH_CFG_RDV_DELAY BIT(16) +#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 +#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 #endif /* __ASM_MACH_AR71XX_REGS_H */ ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] ar71xx: add support for qca955x sgmii/serdes calibration
This patch is to add support for sgmii/serdes calibration from within the OpenWRT environment. This is needed on boards that do not use u-boot or do not have a pre-init process that runs calibration. Signed-off-by: Chris R Blake--- --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-08-05 12:58:15.580496899 +0200 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-08-05 13:52:32.590857293 +0200 @@ -360,6 +360,7 @@ #define QCA955X_PLL_CLK_CTRL_REG 0x08 #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 +#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f @@ -392,6 +393,10 @@ #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) +#define QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT BIT(2) +#define QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK BIT(1) +#define QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL BIT(0) + #define QCA956X_PLL_CPU_CONFIG_REG 0x00 #define QCA956X_PLL_CPU_CONFIG1_REG 0x04 #define QCA956X_PLL_DDR_CONFIG_REG 0x08 @@ -1104,5 +1109,11 @@ #define QCA955X_ETH_CFG_RDV_DELAY BIT(16) #define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 #define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 + +#define QCA955X_GMAC_REG_SGMII_SERDES 0x0018 +#define QCA955X_SGMII_SERDES_RES_CALIBRATION BIT(23) +#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf +#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 +#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) #endif /* __ASM_MACH_AR71XX_REGS_H */ --- a/arch/mips/ath79/dev-eth.c 2015-08-05 14:17:25.757504251 +0200 +++ b/arch/mips/ath79/dev-eth.c 2015-08-05 14:09:54.716333554 +0200 @@ -849,6 +849,37 @@ void __init ath79_setup_qca955x_eth_rx_d iounmap(base); } +void __init ath79_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value) +{ + void __iomem *ethbase, *pllbase; + u32 t; + + ethbase = ioremap_nocache(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); + pllbase = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); + + /* To Check the locking of the SGMII PLL */ + t = __raw_readl(ethbase + QCA955X_GMAC_REG_SGMII_SERDES); + t &= ~(QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK << + QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT); + t |= (sgmii_value & QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK) << + QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT; + __raw_writel(t, ethbase + QCA955X_GMAC_REG_SGMII_SERDES); + + __raw_writel(QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT | + QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK | + QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL, + pllbase + QCA955X_PLL_ETH_SGMII_SERDES_REG); + + ath79_device_reset_clear(QCA955X_RESET_SGMII_ANALOG); + ath79_device_reset_clear(QCA955X_RESET_SGMII); + + while (!(__raw_readl(ethbase + QCA955X_GMAC_REG_SGMII_SERDES) & + QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS)); + + iounmap(ethbase); + iounmap(pllbase); +} + static int ath79_eth_instance __initdata; void __init ath79_register_eth(unsigned int id) { --- a/arch/mips/ath79/dev-eth.h 2015-08-05 14:17:25.757504251 +0200 +++ b/arch/mips/ath79/dev-eth.h 2015-08-05 13:58:20.292866210 +0200 @@ -50,5 +50,6 @@ void ath79_setup_ar934x_eth_cfg(u32 mask void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); void ath79_setup_qca955x_eth_cfg(u32 mask); void ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); +void ath79_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value); #endif /* _ATH79_DEV_ETH_H */ ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] ar71xx: add support for qca955x sgmii/serdes calibration
Scratch this, this is suppose to be in a patch file in ./target/linux/ar71xx/patches-4.1/, will rebase later. On Thu, Sep 17, 2015 at 7:38 AM, Chris Blake <chrisrblak...@gmail.com> wrote: > This patch is to add support for sgmii/serdes calibration from within the > OpenWRT environment. This is needed on boards that do not use u-boot or do > not have a pre-init process that runs calibration. > > Signed-off-by: Chris R Blake <chrisrblak...@gmail.com> > > --- > > --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-08-05 > 12:58:15.580496899 +0200 > +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-08-05 > 13:52:32.590857293 +0200 > @@ -360,6 +360,7 @@ > #define QCA955X_PLL_CLK_CTRL_REG 0x08 > #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 > #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 > +#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c > > #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 > #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f > @@ -392,6 +393,10 @@ > #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) > #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) > > +#define QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT BIT(2) > +#define QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK BIT(1) > +#define QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL BIT(0) > + > #define QCA956X_PLL_CPU_CONFIG_REG 0x00 > #define QCA956X_PLL_CPU_CONFIG1_REG 0x04 > #define QCA956X_PLL_DDR_CONFIG_REG 0x08 > @@ -1104,5 +1109,11 @@ > #define QCA955X_ETH_CFG_RDV_DELAY BIT(16) > #define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 > #define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 > + > +#define QCA955X_GMAC_REG_SGMII_SERDES 0x0018 > +#define QCA955X_SGMII_SERDES_RES_CALIBRATION BIT(23) > +#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf > +#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 > +#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) > > #endif /* __ASM_MACH_AR71XX_REGS_H */ > --- a/arch/mips/ath79/dev-eth.c 2015-08-05 14:17:25.757504251 +0200 > +++ b/arch/mips/ath79/dev-eth.c 2015-08-05 14:09:54.716333554 +0200 > @@ -849,6 +849,37 @@ void __init ath79_setup_qca955x_eth_rx_d > iounmap(base); > } > > +void __init ath79_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value) > +{ > + void __iomem *ethbase, *pllbase; > + u32 t; > + > + ethbase = ioremap_nocache(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); > + pllbase = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); > + > + /* To Check the locking of the SGMII PLL */ > + t = __raw_readl(ethbase + QCA955X_GMAC_REG_SGMII_SERDES); > + t &= ~(QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK << > + QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT); > + t |= (sgmii_value & QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK) << > + QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT; > + __raw_writel(t, ethbase + QCA955X_GMAC_REG_SGMII_SERDES); > + > + __raw_writel(QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT | > + QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK | > + QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL, > + pllbase + QCA955X_PLL_ETH_SGMII_SERDES_REG); > + > + ath79_device_reset_clear(QCA955X_RESET_SGMII_ANALOG); > + ath79_device_reset_clear(QCA955X_RESET_SGMII); > + > + while (!(__raw_readl(ethbase + QCA955X_GMAC_REG_SGMII_SERDES) & > + QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS)); > + > + iounmap(ethbase); > + iounmap(pllbase); > +} > + > static int ath79_eth_instance __initdata; > void __init ath79_register_eth(unsigned int id) > { > --- a/arch/mips/ath79/dev-eth.h 2015-08-05 14:17:25.757504251 +0200 > +++ b/arch/mips/ath79/dev-eth.h 2015-08-05 13:58:20.292866210 +0200 > @@ -50,5 +50,6 @@ void ath79_setup_ar934x_eth_cfg(u32 mask > void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); > void ath79_setup_qca955x_eth_cfg(u32 mask); > void ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, unsigned int > rxdv); > +void ath79_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value); > > #endif /* _ATH79_DEV_ETH_H */ > ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] ar71xx: Add eth rx delay for qca955x platforms
Scratch this, this is suppose to be in a patch file in ./target/linux/ar71xx/patches-4.1/, will rebase later. On Thu, Sep 17, 2015 at 7:30 AM, Chris Blake <chrisrblak...@gmail.com> wrote: > This patch is to add support for qca955x_eth_rx_delay to work with the > qca955x SoC. > > Signed-off-by: Chris R Blake <chrisrblak...@gmail.com> > > --- > --- a/arch/mips/ath79/dev-eth.c > +++ b/arch/mips/ath79/dev-eth.c > @@ -823,6 +825,32 @@ > iounmap(base); > } > > +void __init ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, > + unsigned int rxdv) > +{ > + void __iomem *base; > + u32 t; > + > + rxd &= QCA955X_ETH_CFG_RXD_DELAY_MASK; > + rxdv &= QCA955X_ETH_CFG_RDV_DELAY_MASK; > + > + base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); > + > + t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); > + > + t &= ~(QCA955X_ETH_CFG_RXD_DELAY_MASK << QCA955X_ETH_CFG_RXD_DELAY_SHIFT > | > + QCA955X_ETH_CFG_RDV_DELAY_MASK << QCA955X_ETH_CFG_RDV_DELAY_SHIFT); > + > + t |= (rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT | > + rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT); > + > + __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); > + /* flush write */ > + __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); > + > + iounmap(base); > +} > + > static int ath79_eth_instance __initdata; > void __init ath79_register_eth(unsigned int id) > { > --- a/arch/mips/ath79/dev-eth.h > +++ b/arch/mips/ath79/dev-eth.h > @@ -49,5 +49,6 @@ > void ath79_setup_ar934x_eth_cfg(u32 mask); > void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); > void ath79_setup_qca955x_eth_cfg(u32 mask); > +void ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, unsigned int > rxdv); > > #endif /* _ATH79_DEV_ETH_H */ > --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h > +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h > @@ -1098,5 +1098,11 @@ > > #define QCA955X_ETH_CFG_RGMII_EN BIT(0) > #define QCA955X_ETH_CFG_GE0_SGMII BIT(6) > +#define QCA955X_ETH_CFG_RXD_DELAY BIT(14) > +#define QCA955X_ETH_CFG_RXD_DELAY_MASK 0x3 > +#define QCA955X_ETH_CFG_RXD_DELAY_SHIFT 14 > +#define QCA955X_ETH_CFG_RDV_DELAY BIT(16) > +#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 > +#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 > > #endif /* __ASM_MACH_AR71XX_REGS_H */ > ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH v2] ar71xx: Add eth rx delay for qca955x platforms
This patch is to add support for qca955x_eth_rx_delay to work with the qca955x SoC. Signed-off-by: Chris R Blake--- diff -rupN a/target/linux/ar71xx/patches-4.1/742-MIPS-ath79-add-qca955x-mac-tx-rx-delay.patch b/target/linux/ar71xx/patches-4.1/742-MIPS-ath79-add-qca955x-mac-tx-rx-delay.patch --- a/target/linux/ar71xx/patches-4.1/742-MIPS-ath79-add-qca955x-mac-tx-rx-delay.patch 1969-12-31 18:00:00.0 -0600 +++ b/target/linux/ar71xx/patches-4.1/742-MIPS-ath79-add-qca955x-mac-tx-rx-delay.patch 2015-09-17 07:50:06.0 -0500 @@ -0,0 +1,58 @@ +--- a/arch/mips/ath79/dev-eth.c b/arch/mips/ath79/dev-eth.c +@@ -823,6 +825,32 @@ + iounmap(base); + } + ++void __init ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, ++ unsigned int rxdv) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ rxd &= QCA955X_ETH_CFG_RXD_DELAY_MASK; ++ rxdv &= QCA955X_ETH_CFG_RDV_DELAY_MASK; ++ ++ base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); ++ ++ t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); ++ ++ t &= ~(QCA955X_ETH_CFG_RXD_DELAY_MASK << QCA955X_ETH_CFG_RXD_DELAY_SHIFT | ++ QCA955X_ETH_CFG_RDV_DELAY_MASK << QCA955X_ETH_CFG_RDV_DELAY_SHIFT); ++ ++ t |= (rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT | ++ rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT); ++ ++ __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); ++ /* flush write */ ++ __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); ++ ++ iounmap(base); ++} ++ + static int ath79_eth_instance __initdata; + void __init ath79_register_eth(unsigned int id) + { +--- a/arch/mips/ath79/dev-eth.h b/arch/mips/ath79/dev-eth.h +@@ -49,5 +49,6 @@ + void ath79_setup_ar934x_eth_cfg(u32 mask); + void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); + void ath79_setup_qca955x_eth_cfg(u32 mask); ++void ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); + + #endif /* _ATH79_DEV_ETH_H */ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1098,5 +1098,11 @@ + + #define QCA955X_ETH_CFG_RGMII_EN BIT(0) + #define QCA955X_ETH_CFG_GE0_SGMII BIT(6) ++#define QCA955X_ETH_CFG_RXD_DELAY BIT(14) ++#define QCA955X_ETH_CFG_RXD_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_RXD_DELAY_SHIFT 14 ++#define QCA955X_ETH_CFG_RDV_DELAY BIT(16) ++#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 ++#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 + + #endif /* __ASM_MACH_AR71XX_REGS_H */ ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH v2] ar71xx: add support for qca955x sgmii/serdes calibration
This patch is to add support for sgmii/serdes calibration from within the OpenWRT environment. This is needed on boards that do not use u-boot or do not have a pre-init process that runs calibration. Signed-off-by: Chris R Blake--- diff -rupN a/target/linux/ar71xx/patches-4.1/743-MIPS-ath79-add-qca955x-mac-sgmii-calibration.patch b/target/linux/ar71xx/patches-4.1/743-MIPS-ath79-add-qca955x-mac-sgmii-calibration.patch --- a/target/linux/ar71xx/patches-4.1/743-MIPS-ath79-add-qca955x-mac-sgmii-calibration.patch 1969-12-31 18:00:00.0 -0600 +++ b/target/linux/ar71xx/patches-4.1/743-MIPS-ath79-add-qca955x-mac-sgmii-calibration.patch 2015-09-17 07:49:54.0 -0500 @@ -0,0 +1,82 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-08-05 12:58:15.580496899 +0200 b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-08-05 13:52:32.590857293 +0200 +@@ -360,6 +360,7 @@ + #define QCA955X_PLL_CLK_CTRL_REG 0x08 + #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 + #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 ++#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c + + #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 + #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f +@@ -392,6 +393,10 @@ + #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) + #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT BIT(2) ++#define QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK BIT(1) ++#define QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL BIT(0) ++ + #define QCA956X_PLL_CPU_CONFIG_REG 0x00 + #define QCA956X_PLL_CPU_CONFIG1_REG 0x04 + #define QCA956X_PLL_DDR_CONFIG_REG 0x08 +@@ -1104,5 +1109,11 @@ + #define QCA955X_ETH_CFG_RDV_DELAY BIT(16) + #define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 + #define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 ++ ++#define QCA955X_GMAC_REG_SGMII_SERDES 0x0018 ++#define QCA955X_SGMII_SERDES_RES_CALIBRATION BIT(23) ++#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf ++#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 ++#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) + + #endif /* __ASM_MACH_AR71XX_REGS_H */ +--- a/arch/mips/ath79/dev-eth.c 2015-08-05 14:17:25.757504251 +0200 b/arch/mips/ath79/dev-eth.c 2015-08-05 14:09:54.716333554 +0200 +@@ -849,6 +849,37 @@ void __init ath79_setup_qca955x_eth_rx_d + iounmap(base); + } + ++void __init ath79_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value) ++{ ++ void __iomem *ethbase, *pllbase; ++ u32 t; ++ ++ ethbase = ioremap_nocache(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); ++ pllbase = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ ++ /* To Check the locking of the SGMII PLL */ ++ t = __raw_readl(ethbase + QCA955X_GMAC_REG_SGMII_SERDES); ++ t &= ~(QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK << ++ QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT); ++ t |= (sgmii_value & QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK) << ++ QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT; ++ __raw_writel(t, ethbase + QCA955X_GMAC_REG_SGMII_SERDES); ++ ++ __raw_writel(QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT | ++ QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK | ++ QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL, ++ pllbase + QCA955X_PLL_ETH_SGMII_SERDES_REG); ++ ++ ath79_device_reset_clear(QCA955X_RESET_SGMII_ANALOG); ++ ath79_device_reset_clear(QCA955X_RESET_SGMII); ++ ++ while (!(__raw_readl(ethbase + QCA955X_GMAC_REG_SGMII_SERDES) & ++ QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS)); ++ ++ iounmap(ethbase); ++ iounmap(pllbase); ++} ++ + static int ath79_eth_instance __initdata; + void __init ath79_register_eth(unsigned int id) + { +--- a/arch/mips/ath79/dev-eth.h 2015-08-05 14:17:25.757504251 +0200 b/arch/mips/ath79/dev-eth.h 2015-08-05 13:58:20.292866210 +0200 +@@ -50,5 +50,6 @@ void ath79_setup_ar934x_eth_cfg(u32 mask + void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); + void ath79_setup_qca955x_eth_cfg(u32 mask); + void ath79_setup_qca955x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); ++void ath79_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value); + + #endif /* _ATH79_DEV_ETH_H */ ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] ar71xx: fix kernel Oops in at803x_link_change_notify
Not sure if this helps, but the recent Cisco Meraki AP drop includes a newish PHY driver for the at8033/8035. The GPL source is at http://dl.meraki.net/linux/meraki-firmware-sources-r23-20150601.tar.bz2 and a copy of the actual file can be found at https://github.com/riptidewave93/meraki-linux/blob/linux-3.4-r23-20150601/drivers/net/ethernet/atheros/ag7240/phys/athr_ar8033_phy.c On Mon, Jul 6, 2015 at 6:26 AM, Christian Lamparter chunk...@googlemail.com wrote: On Friday, July 03, 2015 12:29:32 PM Sven Eckelmann wrote: Sven, I've seen you did quite a bit of work on the OM5P-AN with the same F1E-PHY. I went through the code from Atheros' original driver SDK v17 (which was part of the GPL source for the mynet). Apart from tx delay handling, everything else matches perfectly, so the tx/rx delay code should be enabled by default for this chip on all platforms without needing any platform data overwrites. Interesting, I don't have the SDK and I am only using OpenWrt. So I cannot say anything about the Atheros driver. But sounds like you are right. At least all recent devices I had in my hand required this change. Oh, I figured you have access to some of Qualcomm Atheros' SDKs and most importantly: some documentations from Qualcomm Atheros? I hoped you could confirm or disconfirm based on the documents. I also saw your fixup_rgmii_tx_delay delay change. I would ack when you submit a change like this. Just don't forget that the pll_1000 has also to be changed (especially when you move the default values to at803x.c): --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c @@ -154,7 +154,8 @@ static struct i2c_board_info om5pan_i2c_devs[] __initdata = { static struct at803x_platform_data om5p_an_at803x_data = { .disable_smarteee = 1, .enable_rgmii_rx_delay = 1, - .enable_rgmii_tx_delay = 1, + .enable_rgmii_tx_delay = 0, + .fixup_rgmii_tx_delay = 1, }; static struct mdio_board_info om5p_an_mdio0_info[] = { @@ -201,7 +202,7 @@ static void __init om5p_an_setup(void) ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.mii_bus_dev = ath79_mdio0_device.dev; ath79_eth0_data.phy_mask = BIT(7); - ath79_eth0_pll_data.pll_1000 = 0x0200; + ath79_eth0_pll_data.pll_1000 = 0x0e00; ath79_eth0_pll_data.pll_100 = 0x0101; ath79_eth0_pll_data.pll_10 = 0x1313; ath79_register_eth(0); I don't have the equipment to check the actual signals (as you said in an earlier mail) - only some people which complained very loud when their long cable setup didn't work. :) Long cable... That's a good point, I think I never tested the AT8035 with anything beyond a 5m / 16 feet cable. Maybe there are some non atheros SoC's out there which would have problems when you would change the default behavior of the AT8035. I've been looking around for devices with an AT8035. And I found a few gems. http://lists.infradead.org/pipermail/linux-arm-kernel/2013-September/200978.html https://forum.openwrt.org/viewtopic.php?id=42896 https://dev.openwrt.org/ticket/13203 ... (The AT8035 is also used in some of the new HomePlug AV2 equipment) As far as I can tell, the defaults only seem to work for the 100mbps. This makes sense, since the F1E has different PLLs and rx/tx delay settings. Fixing this globally might actually be a good thing. At least I'll give it a try. I'm interested to hear from any other devices which have a AT803x. Also, please let me know where to get the GPL tars for the devices. I have forwarded your mail to the person which is handling the actual firmware builds of the OM5P-AN. He will contact you later and provide the sources. Oh, that might be helpful yes. I can also post the sources from Western Digital's S17_SSDK [The Ethernet driver SDK is part of their GPL.tar.gz]. Thanks, Christian ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] ar71xx: Add support for the Meraki MR12 MR16
This patch is to add support for the Meraki MR12 and MR16 Access Points. Currently everything is working, minus the 2nd NIC interface on the MR12 which is built into the SoC. Signed-off-by: Chris R Blake chrisrblake93 at gmail.com -- diff --git a/target/linux/ar71xx/base-files/etc/diag.sh b/target/linux/ar71xx/base-files/etc/diag.sh index d702d45..785888d 100644 --- a/target/linux/ar71xx/base-files/etc/diag.sh +++ b/target/linux/ar71xx/base-files/etc/diag.sh @@ -109,6 +109,12 @@ get_status_led() { mc-mac1200r) status_led=mercury:green:system ;; + mr12) + status_led=mr12:green:power + ;; + mr16) + status_led=mr16:green:power + ;; mr600) status_led=mr600:orange:power ;; diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds index 16064de..41b 100644 --- a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds +++ b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds @@ -178,6 +178,22 @@ mc-mac1200r) ucidef_set_led_wlan wlan5g WLAN5G mercury:green:wlan5g phy0tpt ;; +mr12) + ucidef_set_led_netdev wan WAN mr12:green:wan eth0 + ucidef_set_led_wlan wlan1 WLAN1 mr12:green:wifi1 phy0assoc + ucidef_set_led_wlan wlan2 WLAN2 mr12:green:wifi2 phy0assoc + ucidef_set_led_wlan wlan3 WLAN3 mr12:green:wifi3 phy0assoc + ucidef_set_led_wlan wlan4 WLAN4 mr12:green:wifi4 phy0tpt + ;; + +mr16) + ucidef_set_led_netdev wan WAN mr16:green:wan eth0 + ucidef_set_led_wlan wlan1 WLAN1 mr16:green:wifi1 phy0assoc + ucidef_set_led_wlan wlan2 WLAN2 mr16:green:wifi2 phy0assoc + ucidef_set_led_wlan wlan3 WLAN3 mr16:green:wifi3 phy0assoc + ucidef_set_led_wlan wlan4 WLAN4 mr16:green:wifi4 phy0tpt + ;; + mr600) ucidef_set_led_wlan wlan58 WLAN58 mr600:green:wlan58 phy0tpt ;; diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration b/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration index d9aa519..aa0e1b4 100644 --- a/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration +++ b/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration @@ -61,6 +61,8 @@ dir-615-c1|\ dir-615-e1|\ dir-615-e4|\ ja76pf|\ +mr-12|\ +mr-16|\ rb-750|\ rb-751|\ tew-632brp|\ diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh b/target/linux/ar71xx/base-files/lib/ar71xx.sh index 645c5d9..d5dd561 100755 --- a/target/linux/ar71xx/base-files/lib/ar71xx.sh +++ b/target/linux/ar71xx/base-files/lib/ar71xx.sh @@ -471,6 +471,12 @@ ar71xx_board_detect() { *MAC1200R) name=mc-mac1200r ;; + *MR12) + name=mr12 + ;; + *MR16) + name=mr16 + ;; *MR600v2) name=mr600v2 ;; diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh index b3c61ef..82b5bfa 100755 --- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh @@ -184,6 +184,8 @@ platform_check_image() { db120 | \ f9k1115v2 |\ hornet-ub | \ + mr12 | \ + mr16 | \ wpj558 | \ zcn-1523h-2 | \ zcn-1523h-5) diff --git a/target/linux/ar71xx/config-3.18 b/target/linux/ar71xx/config-3.18 index 36b8bb6..543b77e 100644 --- a/target/linux/ar71xx/config-3.18 +++ b/target/linux/ar71xx/config-3.18 @@ -68,6 +68,8 @@ CONFIG_ATH79_MACH_HORNET_UB=y CONFIG_ATH79_MACH_JA76PF=y CONFIG_ATH79_MACH_JWAP003=y CONFIG_ATH79_MACH_MC_MAC1200R=y +CONFIG_ATH79_MACH_MR16=y +CONFIG_ATH79_MACH_MR12=y CONFIG_ATH79_MACH_MR600=y CONFIG_ATH79_MACH_MR900=y CONFIG_ATH79_MACH_MYNET_N600=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr12.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr12.c new file mode 100644 index 000..12c9a1c --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr12.c @@ -0,0 +1,115 @@ +/* + * Cisco Meraki MR12 board support + * + * Copyright (C) 2014-2015 Chris Blake chrisrblak...@gmail.com + * + * Based on Atheros AP96 board support configuration + * + * Copyright (C) 2009 Marco Porsch + * Copyright (C) 2009-2012 Gabor Juhos juh...@openwrt.org + * Copyright (C) 2010 Atheros Communications + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include linux/platform_device.h +#include linux/delay.h + +#include asm/mach-ath79/ath79.h + +#include dev-ap9x-pci.h +#include dev-eth.h +#include dev-gpio-buttons.h +#include dev-leds-gpio.h +#include dev-m25p80.h +#include machtypes.h
[OpenWrt-Devel] [PATCH] ar71xx: Add support for the Meraki MR12 MR16
This patch is to add support for the Meraki MR12 and MR16 Access Points. Currently everything is working, minus the 2nd NIC interface on the MR12 which is built into the SoC. Signed-off-by: Chris R Blake chrisrblak...@gmail.com --- diff -Naur ./a/target/linux/ar71xx/base-files/etc/diag.sh ./b/target/linux/ar71xx/base-files/etc/diag.sh --- ./a/target/linux/ar71xx/base-files/etc/diag.sh 2015-05-09 09:46:44.41600 -0500 +++ ./b/target/linux/ar71xx/base-files/etc/diag.sh 2015-05-09 09:57:42.35600 -0500 @@ -109,6 +109,12 @@ mc-mac1200r) status_led=mercury:green:system ;; + mr12) + status_led=mr12:green:power + ;; + mr16) + status_led=mr16:green:power + ;; mr600) status_led=mr600:orange:power ;; diff -Naur ./a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds ./b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds --- ./a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds 2015-05-09 09:46:44.41600 -0500 +++ ./b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds 2015-05-09 09:57:42.35600 -0500 @@ -178,6 +178,22 @@ ucidef_set_led_wlan wlan5g WLAN5G mercury:green:wlan5g phy0tpt ;; +mr12) + ucidef_set_led_netdev wan WAN mr12:green:wan eth0 + ucidef_set_led_wlan wlan1 WLAN1 mr12:green:wifi1 phy0assoc + ucidef_set_led_wlan wlan2 WLAN2 mr12:green:wifi2 phy0assoc + ucidef_set_led_wlan wlan3 WLAN3 mr12:green:wifi3 phy0assoc + ucidef_set_led_wlan wlan4 WLAN4 mr12:green:wifi4 phy0tpt + ;; + +mr16) + ucidef_set_led_netdev wan WAN mr16:green:wan eth0 + ucidef_set_led_wlan wlan1 WLAN1 mr16:green:wifi1 phy0assoc + ucidef_set_led_wlan wlan2 WLAN2 mr16:green:wifi2 phy0assoc + ucidef_set_led_wlan wlan3 WLAN3 mr16:green:wifi3 phy0assoc + ucidef_set_led_wlan wlan4 WLAN4 mr16:green:wifi4 phy0tpt + ;; + mr600) ucidef_set_led_wlan wlan58 WLAN58 mr600:green:wlan58 phy0tpt ;; diff -Naur ./a/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration ./b/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration --- ./a/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration 2015-05-09 09:46:44.41600 -0500 +++ ./b/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration 2015-05-09 09:57:42.35600 -0500 @@ -61,6 +61,8 @@ dir-615-e1|\ dir-615-e4|\ ja76pf|\ +mr-12|\ +mr-16|\ rb-750|\ rb-751|\ tew-632brp|\ diff -Naur ./a/target/linux/ar71xx/base-files/lib/ar71xx.sh ./b/target/linux/ar71xx/base-files/lib/ar71xx.sh --- ./a/target/linux/ar71xx/base-files/lib/ar71xx.sh 2015-05-09 09:46:44.41600 -0500 +++ ./b/target/linux/ar71xx/base-files/lib/ar71xx.sh 2015-05-09 09:57:42.36000 -0500 @@ -471,6 +471,12 @@ *MAC1200R) name=mc-mac1200r ;; + *MR12) + name=mr12 + ;; + *MR16) + name=mr16 + ;; *MR600v2) name=mr600v2 ;; diff -Naur ./a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh ./b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh --- ./a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh 2015-05-09 09:46:44.41600 -0500 +++ ./b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh 2015-05-09 09:57:42.36000 -0500 @@ -184,6 +184,8 @@ db120 | \ f9k1115v2 |\ hornet-ub | \ + mr12 | \ + mr16 | \ wpj558 | \ zcn-1523h-2 | \ zcn-1523h-5) diff -Naur ./a/target/linux/ar71xx/config-3.18 ./b/target/linux/ar71xx/config-3.18 --- ./a/target/linux/ar71xx/config-3.18 2015-05-09 09:46:44.41600 -0500 +++ ./b/target/linux/ar71xx/config-3.18 2015-05-09 09:57:42.36000 -0500 @@ -68,6 +68,8 @@ CONFIG_ATH79_MACH_JA76PF=y CONFIG_ATH79_MACH_JWAP003=y CONFIG_ATH79_MACH_MC_MAC1200R=y +CONFIG_ATH79_MACH_MR16=y +CONFIG_ATH79_MACH_MR12=y CONFIG_ATH79_MACH_MR600=y CONFIG_ATH79_MACH_MR900=y CONFIG_ATH79_MACH_MYNET_N600=y diff -Naur ./a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr12.c ./b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr12.c --- ./a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr12.c 1969-12-31 18:00:00.0 -0600 +++ ./b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr12.c 2015-05-09 09:57:42.36400 -0500 @@ -0,0 +1,115 @@ +/* + * Cisco Meraki MR12 board support + * + * Copyright (C) 2014-2015 Chris Blake chrisrblak...@gmail.com + * + * Based on Atheros AP96 board support configuration + * + * Copyright (C) 2009 Marco Porsch + * Copyright (C) 2009-2012 Gabor Juhos juh...@openwrt.org + * Copyright (C) 2010 Atheros Communications + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include linux/platform_device.h +#include linux/delay.h + +#include asm/mach-ath79/ath79.h + +#include dev-ap9x-pci.h +#include dev-eth.h +#include dev-gpio-buttons.h +#include dev-leds-gpio.h +#include dev-m25p80.h +#include machtypes.h + +#define MR12_GPIO_LED_W4_GREEN 14 +#define MR12_GPIO_LED_W3_GREEN 13 +#define MR12_GPIO_LED_W2_GREEN 12 +#define MR12_GPIO_LED_W1_GREEN 11 + +#define