Re: [OpenWrt-Devel] [PATCH] rampips: Fix pinmux functions for MT7621
On Thursday 30 July 2015 14:23:06 John Crispin wrote: On 29/07/2015 17:19, Sven Eckelmann wrote: The pinctrl-rt2880 code doesn't support multiple functions with the same name. This will result in incorrect pinmux configuration. The MT7621 uses 2 bit wide configuration of the sdhci, spi, mdio, pcie, wdt, uart2 and uart3. But the code only changed a single bit for uart3, uart2 and mdio. Also the order of uart2 and uart3 group was exchanged. The spi nand settings was also reserved only 7 PINs instead of 8 as the spi spi setting. i stumbled across this problem on mt7628/88 last few days. the pinctrl code was written for a core with 1 bit / function and then grew with new socs. i'll try to fix this in the pinctrl driver the next few days rather than have redundant function names. What about the other problems like wrong settings width, wrong settings position and missing settings? Should I resend them? Btw. keep in mind that the functions have conflicting settings (different PINs). Kind regards, Sven ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] rampips: Fix pinmux functions for MT7621
On 31/07/2015 11:23, Sven Eckelmann wrote: On Friday 31 July 2015 10:33:59 John Crispin wrote: [...] What about the other problems like wrong settings width, wrong settings position and missing settings? Should I resend them? which patch exactly ? I have now submitted the patch but this time split into separate patches [1,2,3] (these are the ones with the other problems). The last one [4] is the patch which you want to drop and instead modify the pinctrl-rt2880. thanks, i'll add them to my tree in a sec and push them later on with a pile of other mt7628 patches which i am testing just now. Kind regards, Sven [1] http://patchwork.ozlabs.org/patch/502439/ [2] http://patchwork.ozlabs.org/patch/502440/ [3] http://patchwork.ozlabs.org/patch/502442/ [4] http://patchwork.ozlabs.org/patch/502444/ ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] rampips: Fix pinmux functions for MT7621
On Friday 31 July 2015 10:33:59 John Crispin wrote: [...] What about the other problems like wrong settings width, wrong settings position and missing settings? Should I resend them? which patch exactly ? I have now submitted the patch but this time split into separate patches [1,2,3] (these are the ones with the other problems). The last one [4] is the patch which you want to drop and instead modify the pinctrl-rt2880. Kind regards, Sven [1] http://patchwork.ozlabs.org/patch/502439/ [2] http://patchwork.ozlabs.org/patch/502440/ [3] http://patchwork.ozlabs.org/patch/502442/ [4] http://patchwork.ozlabs.org/patch/502444/ signature.asc Description: This is a digitally signed message part. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] rampips: Fix pinmux functions for MT7621
On 29/07/2015 17:19, Sven Eckelmann wrote:
The pinctrl-rt2880 code doesn't support multiple functions with the same
name. This will result in incorrect pinmux configuration.
The MT7621 uses 2 bit wide configuration of the sdhci, spi, mdio, pcie,
wdt, uart2 and uart3. But the code only changed a single bit for uart3,
uart2 and mdio. Also the order of uart2 and uart3 group was exchanged.
The spi nand settings was also reserved only 7 PINs instead of 8 as the
spi spi setting.
i stumbled across this problem on mt7628/88 last few days. the pinctrl
code was written for a core with 1 bit / function and then grew with new
socs. i'll try to fix this in the pinctrl driver the next few days
rather than have redundant function names.
John
Signed-off-by: Sven Eckelmann s...@open-mesh.com
---
target/linux/ramips/dts/mt7621.dtsi| 14 +++
.../0012-MIPS-ralink-add-MT7621-support.patch | 45
+++---
2 files changed, 38 insertions(+), 21 deletions(-)
diff --git a/target/linux/ramips/dts/mt7621.dtsi
b/target/linux/ramips/dts/mt7621.dtsi
index 53b215f40f10..f09ec3e5b694 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -130,31 +130,31 @@
uart1_pins: uart1 {
uart1 {
ralink,group = uart1;
- ralink,function = uart;
+ ralink,function = uart1;
};
};
uart2_pins: uart2 {
uart2 {
ralink,group = uart2;
- ralink,function = uart;
+ ralink,function = uart2;
};
};
uart3_pins: uart3 {
uart3 {
ralink,group = uart3;
- ralink,function = uart;
+ ralink,function = uart3;
};
};
rgmii1_pins: rgmii1 {
rgmii1 {
ralink,group = rgmii1;
- ralink,function = rgmii;
+ ralink,function = rgmii1;
};
};
rgmii2_pins: rgmii2 {
rgmii2 {
ralink,group = rgmii2;
- ralink,function = rgmii;
+ ralink,function = rgmii2;
};
};
mdio_pins: mdio {
@@ -172,11 +172,11 @@
nand_pins: nand {
spi-nand {
ralink,group = spi;
- ralink,function = nand;
+ ralink,function = nand1;
};
sdhci-nand {
ralink,group = sdhci;
- ralink,function = nand;
+ ralink,function = nand2;
};
};
sdhci_pins: sdhci {
diff --git
a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
index 771de12f171d..23d32681bf77 100644
---
a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
+++
b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
@@ -520,7 +520,7 @@ Signed-off-by: John Crispin blo...@openwrt.org
+}
--- /dev/null
+++ b/arch/mips/ralink/mt7621.c
-@@ -0,0 +1,192 @@
+@@ -0,0 +1,209 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
@@ -555,8 +555,12 @@ Signed-off-by: John Crispin blo...@openwrt.org
+
+#define MT7621_GPIO_MODE_UART1 1
+#define MT7621_GPIO_MODE_I2C2
-+#define MT7621_GPIO_MODE_UART2 3
-+#define MT7621_GPIO_MODE_UART3 5
++#define MT7621_GPIO_MODE_UART3_MASK 0x3
++#define MT7621_GPIO_MODE_UART3_SHIFT3
++#define MT7621_GPIO_MODE_UART3_GPIO 1
++#define MT7621_GPIO_MODE_UART2_MASK 0x3
++#define MT7621_GPIO_MODE_UART2_SHIFT5
++#define MT7621_GPIO_MODE_UART2_GPIO 1
+#define MT7621_GPIO_MODE_JTAG 7
+#define MT7621_GPIO_MODE_WDT_MASK 0x3
+#define MT7621_GPIO_MODE_WDT_SHIFT 8
@@ -566,7 +570,9 @@ Signed-off-by: John Crispin blo...@openwrt.org
+#define MT7621_GPIO_MODE_PCIE_MASK 0x3
+#define MT7621_GPIO_MODE_PCIE_SHIFT 10
+#define MT7621_GPIO_MODE_PCIE_GPIO 1
-+#define MT7621_GPIO_MODE_MDIO 12
++#define MT7621_GPIO_MODE_MDIO_MASK 0x3
++#define MT7621_GPIO_MODE_MDIO_SHIFT 12
++#define MT7621_GPIO_MODE_MDIO_GPIO 1
+#define
[OpenWrt-Devel] [PATCH] rampips: Fix pinmux functions for MT7621
The pinctrl-rt2880 code doesn't support multiple functions with the same
name. This will result in incorrect pinmux configuration.
The MT7621 uses 2 bit wide configuration of the sdhci, spi, mdio, pcie,
wdt, uart2 and uart3. But the code only changed a single bit for uart3,
uart2 and mdio. Also the order of uart2 and uart3 group was exchanged.
The spi nand settings was also reserved only 7 PINs instead of 8 as the
spi spi setting.
Signed-off-by: Sven Eckelmann s...@open-mesh.com
---
target/linux/ramips/dts/mt7621.dtsi| 14 +++
.../0012-MIPS-ralink-add-MT7621-support.patch | 45 +++---
2 files changed, 38 insertions(+), 21 deletions(-)
diff --git a/target/linux/ramips/dts/mt7621.dtsi
b/target/linux/ramips/dts/mt7621.dtsi
index 53b215f40f10..f09ec3e5b694 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -130,31 +130,31 @@
uart1_pins: uart1 {
uart1 {
ralink,group = uart1;
- ralink,function = uart;
+ ralink,function = uart1;
};
};
uart2_pins: uart2 {
uart2 {
ralink,group = uart2;
- ralink,function = uart;
+ ralink,function = uart2;
};
};
uart3_pins: uart3 {
uart3 {
ralink,group = uart3;
- ralink,function = uart;
+ ralink,function = uart3;
};
};
rgmii1_pins: rgmii1 {
rgmii1 {
ralink,group = rgmii1;
- ralink,function = rgmii;
+ ralink,function = rgmii1;
};
};
rgmii2_pins: rgmii2 {
rgmii2 {
ralink,group = rgmii2;
- ralink,function = rgmii;
+ ralink,function = rgmii2;
};
};
mdio_pins: mdio {
@@ -172,11 +172,11 @@
nand_pins: nand {
spi-nand {
ralink,group = spi;
- ralink,function = nand;
+ ralink,function = nand1;
};
sdhci-nand {
ralink,group = sdhci;
- ralink,function = nand;
+ ralink,function = nand2;
};
};
sdhci_pins: sdhci {
diff --git
a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
index 771de12f171d..23d32681bf77 100644
--- a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
+++ b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
@@ -520,7 +520,7 @@ Signed-off-by: John Crispin blo...@openwrt.org
+}
--- /dev/null
+++ b/arch/mips/ralink/mt7621.c
-@@ -0,0 +1,192 @@
+@@ -0,0 +1,209 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
@@ -555,8 +555,12 @@ Signed-off-by: John Crispin blo...@openwrt.org
+
+#define MT7621_GPIO_MODE_UART11
+#define MT7621_GPIO_MODE_I2C 2
-+#define MT7621_GPIO_MODE_UART23
-+#define MT7621_GPIO_MODE_UART35
++#define MT7621_GPIO_MODE_UART3_MASK 0x3
++#define MT7621_GPIO_MODE_UART3_SHIFT 3
++#define MT7621_GPIO_MODE_UART3_GPIO 1
++#define MT7621_GPIO_MODE_UART2_MASK 0x3
++#define MT7621_GPIO_MODE_UART2_SHIFT 5
++#define MT7621_GPIO_MODE_UART2_GPIO 1
+#define MT7621_GPIO_MODE_JTAG 7
+#define MT7621_GPIO_MODE_WDT_MASK 0x3
+#define MT7621_GPIO_MODE_WDT_SHIFT8
@@ -566,7 +570,9 @@ Signed-off-by: John Crispin blo...@openwrt.org
+#define MT7621_GPIO_MODE_PCIE_MASK0x3
+#define MT7621_GPIO_MODE_PCIE_SHIFT 10
+#define MT7621_GPIO_MODE_PCIE_GPIO1
-+#define MT7621_GPIO_MODE_MDIO 12
++#define MT7621_GPIO_MODE_MDIO_MASK0x3
++#define MT7621_GPIO_MODE_MDIO_SHIFT 12
++#define MT7621_GPIO_MODE_MDIO_GPIO1
+#define MT7621_GPIO_MODE_RGMII1 14
+#define MT7621_GPIO_MODE_RGMII2 15
+#define MT7621_GPIO_MODE_SPI_MASK 0x3
@@ -576,10 +582,18 @@ Signed-off-by: John Crispin blo...@openwrt.org
+#define MT7621_GPIO_MODE_SDHCI_SHIFT 18
+#define MT7621_GPIO_MODE_SDHCI_GPIO 1
+
-+static struct rt2880_pmx_func uart1_grp[] = {
