Re: [OpenWrt-Devel] [PATCH 4/5] ar93x: Add option to disable JTAG, which blocks a GPIO

[Gabor Juhos]

Hi Daniel,

The ath79_gpio_function_* routines should be fixed instead of adding a separate
function for AR934x. I will fix those.

Thanks,
Gabor

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[OpenWrt-Devel] [PATCH 4/5] ar93x: Add option to disable JTAG, which blocks a GPIO

[Daniel Dickinson]

Signed-off-by: Daniel Dickinson dan...@powercloudsystems.com
---
 .../680-MIPS-ath79-ar93x-allow-disable-jtag.patch  |   40 
 .../680-MIPS-ath79-ar93x-allow-disable-jtag.patch  |   40 
 2 files changed, 80 insertions(+)
 create mode 100644 
target/linux/ar71xx/patches-3.3/680-MIPS-ath79-ar93x-allow-disable-jtag.patch
 create mode 100644 
target/linux/ar71xx/patches-3.6/680-MIPS-ath79-ar93x-allow-disable-jtag.patch

diff --git 
a/target/linux/ar71xx/patches-3.3/680-MIPS-ath79-ar93x-allow-disable-jtag.patch 
b/target/linux/ar71xx/patches-3.3/680-MIPS-ath79-ar93x-allow-disable-jtag.patch
new file mode 100644
index 000..a440031
--- /dev/null
+++ 
b/target/linux/ar71xx/patches-3.3/680-MIPS-ath79-ar93x-allow-disable-jtag.patch
@@ -0,0 +1,40 @@
+Index: linux-3.3.8/arch/mips/ath79/gpio.c
+===
+--- linux-3.3.8.orig/arch/mips/ath79/gpio.c2012-10-25 23:16:10.214087229 
-0400
 linux-3.3.8/arch/mips/ath79/gpio.c 2012-10-25 23:26:51.257686927 -0400
+@@ -139,6 +139,22 @@
+   .base   = 0,
+ };
+ 
++void ar934x_gpio_function_enable(u32 mask)
++{
++
++  void __iomem *base = ath79_gpio_base;
++  unsigned long flags;
++
++  spin_lock_irqsave(ath79_gpio_lock, flags);
++
++  __raw_writel(__raw_readl(base + AR934X_GPIO_REG_FUNC) | mask,
++   base + AR934X_GPIO_REG_FUNC);
++  /* flush write */
++  __raw_readl(base + AR934X_GPIO_REG_FUNC);
++
++  spin_unlock_irqrestore(ath79_gpio_lock, flags);
++}
++
+ void ath79_gpio_function_enable(u32 mask)
+ {
+   void __iomem *base = ath79_gpio_base;
+Index: linux-3.3.8/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+===
+--- linux-3.3.8.orig/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
2012-10-25 23:16:10.174088003 -0400
 linux-3.3.8/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2012-10-25 
23:26:51.257686927 -0400
+@@ -626,6 +626,8 @@
+ #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT13
+ #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
+ 
++#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1)
++
+ #define AR71XX_GPIO_FUNC_STEREO_ENBIT(17)
+ #define AR71XX_GPIO_FUNC_SLIC_EN  BIT(16)
+ #define AR71XX_GPIO_FUNC_SPI_CS2_EN   BIT(13)
diff --git 
a/target/linux/ar71xx/patches-3.6/680-MIPS-ath79-ar93x-allow-disable-jtag.patch 
b/target/linux/ar71xx/patches-3.6/680-MIPS-ath79-ar93x-allow-disable-jtag.patch
new file mode 100644
index 000..cc0956e
--- /dev/null
+++ 
b/target/linux/ar71xx/patches-3.6/680-MIPS-ath79-ar93x-allow-disable-jtag.patch
@@ -0,0 +1,40 @@
+Index: linux-3.6.5/arch/mips/ath79/gpio.c
+===
+--- linux-3.6.5.orig/arch/mips/ath79/gpio.c2012-11-01 23:56:07.514239441 
-0400
 linux-3.6.5/arch/mips/ath79/gpio.c 2012-11-01 23:56:15.678091741 -0400
+@@ -139,6 +139,22 @@
+   .base   = 0,
+ };
+ 
++void ar934x_gpio_function_enable(u32 mask)
++{
++
++  void __iomem *base = ath79_gpio_base;
++  unsigned long flags;
++
++  spin_lock_irqsave(ath79_gpio_lock, flags);
++
++  __raw_writel(__raw_readl(base + AR934X_GPIO_REG_FUNC) | mask,
++   base + AR934X_GPIO_REG_FUNC);
++  /* flush write */
++  __raw_readl(base + AR934X_GPIO_REG_FUNC);
++
++  spin_unlock_irqrestore(ath79_gpio_lock, flags);
++}
++
+ void ath79_gpio_function_enable(u32 mask)
+ {
+   void __iomem *base = ath79_gpio_base;
+Index: linux-3.6.5/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+===
+--- linux-3.6.5.orig/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
2012-11-01 23:56:07.486239947 -0400
 linux-3.6.5/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2012-11-01 
23:56:15.678091741 -0400
+@@ -627,6 +627,8 @@
+ #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT13
+ #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
+ 
++#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1)
++
+ #define AR71XX_GPIO_FUNC_STEREO_ENBIT(17)
+ #define AR71XX_GPIO_FUNC_SLIC_EN  BIT(16)
+ #define AR71XX_GPIO_FUNC_SPI_CS2_EN   BIT(13)
-- 
1.7.9.5

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