On Mon, 2020-07-20 at 13:37 +0200, Klaus Jensen wrote:
> From: Klaus Jensen
>
> The NVM Express specification generally uses 'zeroes' and not 'zeros',
> so let us align with it.
>
> Cc: Fam Zheng
> Signed-off-by: Klaus Jensen
> ---
> block/nvme.c | 4 ++--
> hw/block/nvme.c | 8
> include/block/nvme.h | 4 ++--
> 3 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/block/nvme.c b/block/nvme.c
> index c1c4c07ac6cc..05485fdd1189 100644
> --- a/block/nvme.c
> +++ b/block/nvme.c
> @@ -537,7 +537,7 @@ static void nvme_identify(BlockDriverState *bs, int
> namespace, Error **errp)
>s->page_size / sizeof(uint64_t) * s->page_size);
>
> oncs = le16_to_cpu(idctrl->oncs);
> -s->supports_write_zeroes = !!(oncs & NVME_ONCS_WRITE_ZEROS);
> +s->supports_write_zeroes = !!(oncs & NVME_ONCS_WRITE_ZEROES);
> s->supports_discard = !!(oncs & NVME_ONCS_DSM);
>
> memset(resp, 0, 4096);
> @@ -1201,7 +1201,7 @@ static coroutine_fn int
> nvme_co_pwrite_zeroes(BlockDriverState *bs,
> }
>
> NvmeCmd cmd = {
> -.opcode = NVME_CMD_WRITE_ZEROS,
> +.opcode = NVME_CMD_WRITE_ZEROES,
> .nsid = cpu_to_le32(s->nsid),
> .cdw10 = cpu_to_le32((offset >> s->blkshift) & 0x),
> .cdw11 = cpu_to_le32(((offset >> s->blkshift) >> 32) & 0x),
> diff --git a/hw/block/nvme.c b/hw/block/nvme.c
> index 10fe53873ae9..e2932239c661 100644
> --- a/hw/block/nvme.c
> +++ b/hw/block/nvme.c
> @@ -614,7 +614,7 @@ static uint16_t nvme_flush(NvmeCtrl *n, NvmeNamespace
> *ns, NvmeCmd *cmd,
> return NVME_NO_COMPLETE;
> }
>
> -static uint16_t nvme_write_zeros(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd
> *cmd,
> +static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd
> *cmd,
> NvmeRequest *req)
> {
> NvmeRwCmd *rw = (NvmeRwCmd *)cmd;
> @@ -714,8 +714,8 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeCmd *cmd,
> NvmeRequest *req)
> switch (cmd->opcode) {
> case NVME_CMD_FLUSH:
> return nvme_flush(n, ns, cmd, req);
> -case NVME_CMD_WRITE_ZEROS:
> -return nvme_write_zeros(n, ns, cmd, req);
> +case NVME_CMD_WRITE_ZEROES:
> +return nvme_write_zeroes(n, ns, cmd, req);
> case NVME_CMD_WRITE:
> case NVME_CMD_READ:
> return nvme_rw(n, ns, cmd, req);
> @@ -2328,7 +2328,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice
> *pci_dev)
> id->sqes = (0x6 << 4) | 0x6;
> id->cqes = (0x4 << 4) | 0x4;
> id->nn = cpu_to_le32(n->num_namespaces);
> -id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROS | NVME_ONCS_TIMESTAMP |
> +id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROES | NVME_ONCS_TIMESTAMP |
> NVME_ONCS_FEATURES);
>
> subnqn = g_strdup_printf("nqn.2019-08.org.qemu:%s", n->params.serial);
> diff --git a/include/block/nvme.h b/include/block/nvme.h
> index 370df7fc0570..65e68a82c897 100644
> --- a/include/block/nvme.h
> +++ b/include/block/nvme.h
> @@ -460,7 +460,7 @@ enum NvmeIoCommands {
> NVME_CMD_READ = 0x02,
> NVME_CMD_WRITE_UNCOR= 0x04,
> NVME_CMD_COMPARE= 0x05,
> -NVME_CMD_WRITE_ZEROS= 0x08,
> +NVME_CMD_WRITE_ZEROES = 0x08,
> NVME_CMD_DSM= 0x09,
> };
>
> @@ -838,7 +838,7 @@ enum NvmeIdCtrlOncs {
> NVME_ONCS_COMPARE = 1 << 0,
> NVME_ONCS_WRITE_UNCORR = 1 << 1,
> NVME_ONCS_DSM = 1 << 2,
> -NVME_ONCS_WRITE_ZEROS = 1 << 3,
> +NVME_ONCS_WRITE_ZEROES = 1 << 3,
> NVME_ONCS_FEATURES = 1 << 4,
> NVME_ONCS_RESRVATIONS = 1 << 5,
> NVME_ONCS_TIMESTAMP = 1 << 6,
Nothing against this.
Reviewed-by: Maxim Levitsky
Best regards,
Maxim Levitsky