[Qemu-commits] [qemu/qemu] 007531: configure: use a native non-cross compiler for lin...
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 007531586aa8ef6dccdadd927b89a50af62288d1
https://github.com/qemu/qemu/commit/007531586aa8ef6dccdadd927b89a50af62288d1
Author: Paolo Bonzini
Date: 2023-12-22 (Fri, 22 Dec 2023)
Changed paths:
M configure
Log Message:
---
configure: use a native non-cross compiler for linux-user
Commit c2118e9e1ab ("configure: don't try a "native" cross for linux-user",
2023-11-23) sought to avoid issues with using the native compiler with a
cross-endian or cross-bitness setup. However, in doing so it ended up
requiring a cross compiler setup (and most likely a slow compiler setup)
even when building TCG tests that are native to the host architecture.
Always allow the host compiler in that case.
Cc: qemu-sta...@nongnu.org
Fixes: c2118e9e1ab ("configure: don't try a "native" cross for linux-user",
2023-11-23)
Signed-off-by: Paolo Bonzini
Commit: 6032627f07a1632114f09612c80cf806ba03de4a
https://github.com/qemu/qemu/commit/6032627f07a1632114f09612c80cf806ba03de4a
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/translate.c
Log Message:
---
target/i386: optimize computation of JL and JLE from flags
Take advantage of the fact that there can be no 1 bits between SF and OF.
If they were adjacent, you could sum SF and get a carry only if SF was
already set. Then the value of OF in the sum is the XOR of OF itself,
the carry (which is SF) and 0 (the value of the OF bit in the addend):
this is OF^SF exactly.
Because OF and SF are not adjacent, just place more 1 bits to the
left so that the carry propagates, which means summing CC_O - CC_S.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 1e7dde8008e4973faed3c6a0d7a909cc35cbdf74
https://github.com/qemu/qemu/commit/1e7dde8008e4973faed3c6a0d7a909cc35cbdf74
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/translate.c
Log Message:
---
target/i386: speedup JO/SETO after MUL or IMUL
OF is equal to the carry flag, so use the same CCPrepare.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 83280f6a621c6a1aca54cc751e713d9567a9f5b2
https://github.com/qemu/qemu/commit/83280f6a621c6a1aca54cc751e713d9567a9f5b2
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/excp_helper.c
M target/i386/tcg/helper-tcg.h
M target/i386/tcg/misc_helper.c
Log Message:
---
target/i386: remove unnecessary arguments from raise_interrupt
is_int is always 1, and error_code is always zero.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 8cc746525cf7961dc4dbd144b678a1c036aa3647
https://github.com/qemu/qemu/commit/8cc746525cf7961dc4dbd144b678a1c036aa3647
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/emit.c.inc
M target/i386/tcg/translate.c
Log Message:
---
target/i386: remove unnecessary truncations
gen_lea_v_seg (called by gen_add_A0_ds_seg) already zeroes any
bits of s->A0 beyond s->aflag. It does so before summing the
segment base and, if not in 64-bit mode, also after summing it.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 2455e9cf5ac74fb42224309aa93ee8c3fd4b23e0
https://github.com/qemu/qemu/commit/2455e9cf5ac74fb42224309aa93ee8c3fd4b23e0
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/cpu.h
M target/i386/tcg/cc_helper.c
M target/i386/tcg/fpu_helper.c
M target/i386/tcg/int_helper.c
M target/i386/tcg/misc_helper.c
M target/i386/tcg/seg_helper.c
Log Message:
---
target/i386: clean up cpu_cc_compute_all
cpu_cc_compute_all() has an argument that is always equal to CC_OP for
historical
reasons (dating back to commit a7812ae4123, "TCG variable type checking.",
2008-11-17,
which added the argument to helper_cc_compute_all). It does not make sense for
the
argument to have any other value, so remove it and clean up some lines that are
not
too long anymore.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 8147df44daea383256964d2aeeed14bcfc8f63ce
https://github.com/qemu/qemu/commit/8147df44daea383256964d2aeeed14bcfc8f63ce
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/decode-new.c.inc
Log Message:
---
target/i386: document more deviations from the manual
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: b609db947752f0cc48471127d2abaff444dc836b
https://github.com/qemu/qemu/commit/b609db947752f0cc48471127d2abaff444dc836b
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/decode-new.c.inc
M
[Qemu-commits] [qemu/qemu] 007531: configure: use a native non-cross compiler for lin...
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 007531586aa8ef6dccdadd927b89a50af62288d1
https://github.com/qemu/qemu/commit/007531586aa8ef6dccdadd927b89a50af62288d1
Author: Paolo Bonzini
Date: 2023-12-22 (Fri, 22 Dec 2023)
Changed paths:
M configure
Log Message:
---
configure: use a native non-cross compiler for linux-user
Commit c2118e9e1ab ("configure: don't try a "native" cross for linux-user",
2023-11-23) sought to avoid issues with using the native compiler with a
cross-endian or cross-bitness setup. However, in doing so it ended up
requiring a cross compiler setup (and most likely a slow compiler setup)
even when building TCG tests that are native to the host architecture.
Always allow the host compiler in that case.
Cc: qemu-sta...@nongnu.org
Fixes: c2118e9e1ab ("configure: don't try a "native" cross for linux-user",
2023-11-23)
Signed-off-by: Paolo Bonzini
Commit: 6032627f07a1632114f09612c80cf806ba03de4a
https://github.com/qemu/qemu/commit/6032627f07a1632114f09612c80cf806ba03de4a
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/translate.c
Log Message:
---
target/i386: optimize computation of JL and JLE from flags
Take advantage of the fact that there can be no 1 bits between SF and OF.
If they were adjacent, you could sum SF and get a carry only if SF was
already set. Then the value of OF in the sum is the XOR of OF itself,
the carry (which is SF) and 0 (the value of the OF bit in the addend):
this is OF^SF exactly.
Because OF and SF are not adjacent, just place more 1 bits to the
left so that the carry propagates, which means summing CC_O - CC_S.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 1e7dde8008e4973faed3c6a0d7a909cc35cbdf74
https://github.com/qemu/qemu/commit/1e7dde8008e4973faed3c6a0d7a909cc35cbdf74
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/translate.c
Log Message:
---
target/i386: speedup JO/SETO after MUL or IMUL
OF is equal to the carry flag, so use the same CCPrepare.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 83280f6a621c6a1aca54cc751e713d9567a9f5b2
https://github.com/qemu/qemu/commit/83280f6a621c6a1aca54cc751e713d9567a9f5b2
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/excp_helper.c
M target/i386/tcg/helper-tcg.h
M target/i386/tcg/misc_helper.c
Log Message:
---
target/i386: remove unnecessary arguments from raise_interrupt
is_int is always 1, and error_code is always zero.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 8cc746525cf7961dc4dbd144b678a1c036aa3647
https://github.com/qemu/qemu/commit/8cc746525cf7961dc4dbd144b678a1c036aa3647
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/emit.c.inc
M target/i386/tcg/translate.c
Log Message:
---
target/i386: remove unnecessary truncations
gen_lea_v_seg (called by gen_add_A0_ds_seg) already zeroes any
bits of s->A0 beyond s->aflag. It does so before summing the
segment base and, if not in 64-bit mode, also after summing it.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 2455e9cf5ac74fb42224309aa93ee8c3fd4b23e0
https://github.com/qemu/qemu/commit/2455e9cf5ac74fb42224309aa93ee8c3fd4b23e0
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/cpu.h
M target/i386/tcg/cc_helper.c
M target/i386/tcg/fpu_helper.c
M target/i386/tcg/int_helper.c
M target/i386/tcg/misc_helper.c
M target/i386/tcg/seg_helper.c
Log Message:
---
target/i386: clean up cpu_cc_compute_all
cpu_cc_compute_all() has an argument that is always equal to CC_OP for
historical
reasons (dating back to commit a7812ae4123, "TCG variable type checking.",
2008-11-17,
which added the argument to helper_cc_compute_all). It does not make sense for
the
argument to have any other value, so remove it and clean up some lines that are
not
too long anymore.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: 8147df44daea383256964d2aeeed14bcfc8f63ce
https://github.com/qemu/qemu/commit/8147df44daea383256964d2aeeed14bcfc8f63ce
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/decode-new.c.inc
Log Message:
---
target/i386: document more deviations from the manual
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Commit: b609db947752f0cc48471127d2abaff444dc836b
https://github.com/qemu/qemu/commit/b609db947752f0cc48471127d2abaff444dc836b
Author: Paolo Bonzini
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M target/i386/tcg/decode-new.c.inc
M
