Re: [Qemu-devel] Missing ARMv6 instructions?
On Sun, 2 Apr 2006, Jamie Lokier wrote: Chris Wilson wrote: I find it strange that ARM would restrict emulation of their architecture -- that could hardly pose a threat to their business, I would say. Unfortunately, I don't. ARM probably makes quite a lot of money from their development tools (compilers, debuggers, simulators) as well as actual chips, and they have been an extensive user of software patents, even in the EU where they are probably not valid. How about we target OpenCores instead of ARM? I like the idea, but do you know of anyone using OpenCores devices implemented in silicon? It seems to me the motivation for ARM emulation is to be able to simulate embedded devices that people may feasibly end up using. IMHO majority of embedded devices is still ARM7TDMI based and this instruction set (ARMv4 IIRC) should be emulated well in Qemu. Also please have a look at www.skyeye.org project to see how other projects do emulation for actual embedded devices. Cheers, Karel -- Karel Gardas [EMAIL PROTECTED] ObjectSecurity Ltd. http://www.objectsecurity.com ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/target-i386 translate.c
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/04/02 19:13:41 Modified files: target-i386: translate.c Log message: btx decode fix on x86_64 CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-i386/translate.c.diff?tr1=1.53&tr2=1.54&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/hw pci.c
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/04/02 19:11:31 Modified files: hw : pci.c Log message: do not test reserved config bits CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/pci.c.diff?tr1=1.22&tr2=1.23&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/hw ide.c
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/04/02 19:10:48 Modified files: hw : ide.c Log message: CDROM detection fix CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/ide.c.diff?tr1=1.39&tr2=1.40&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/pc-bios bios.diff bios.bin
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/04/02 19:10:24 Modified files: pc-bios: bios.diff bios.bin Log message: update to latest Bochs bios - added PCI BIOS real mode 'get irq routing options' function CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/pc-bios/bios.diff.diff?tr1=1.9&tr2=1.10&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/pc-bios/bios.bin.diff?tr1=1.11&tr2=1.12&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] Missing ARMv6 instructions?
Hi Jamie, > I like the idea, but do you know of anyone using OpenCores devices > implemented in silicon? It seems to me the motivation for ARM > emulation is to be able to simulate embedded devices that people may > feasibly end up using. I'm no expert, but it appears that OpenCores have a working core that runs most of the MIPS instruction set. MIPS is a very well known, tried and trusted architecture. My cable modem has a MIPS-compatible processor made by Toshiba. It seems to me that MIPS is just as realistic and usable platform as ARM. But I would be very interested to hear from anyone who knows better. Now, I wonder when Qemu will support MIPS emulation? :-) Cheers, Chris. -- ___ __ _ / __/ / ,__(_)_ | Chris Wilson < at qwirx.com> - Cambs UK | / (_/ ,\/ _/ /_ \ | Security/C/C++/Java/Perl/SQL/HTML Developer | \ _/_/_/_//_/___/ | We are GNU-free your mind-and your software | ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] Missing ARMv6 instructions?
Chris Wilson wrote: > > I find it strange that ARM would restrict emulation of their architecture > > -- that could hardly pose a threat to their business, I would say. > > Unfortunately, I don't. ARM probably makes quite a lot of money from > their development tools (compilers, debuggers, simulators) as well as > actual chips, and they have been an extensive user of software patents, > even in the EU where they are probably not valid. > > How about we target OpenCores instead of ARM? I like the idea, but do you know of anyone using OpenCores devices implemented in silicon? It seems to me the motivation for ARM emulation is to be able to simulate embedded devices that people may feasibly end up using. -- Jamie ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] [PATCH] Add MIPS ELF loader
"Dirk Behme" <[EMAIL PROTECTED]> wrote: See a http://pastebin.com/628591 Sorry, does this link really work? I get a nearly empty page for this. Ah, pastebin keeps data only a day. I'm working on something similiar, if you want to call an embedded bootloader like uboot a BIOS ;) Anyway, I need to execute mips assembly starting from 0xbfc0 as well. I'm trying to port a mmon: http://www.brouhaha.com/~eric/software/mmon/ It's fairly simply MIPS monitor which requires only ~200 bytes and a working 16c550 UART. I think it should be possible to switch to 0xbfc0 by adjusting the addresses in hw/mips_r4k.c Things are more complicated. There should be two mode for the MIPS emulator : to run MIPS BIOS/Monitor after a "full hardwere reset" and to run a Linux kernel with "pre-initialized hardware". MIPS Monitor should run in the BEV mode (Boot Exception Vector) to use vectors like 0xbfc00380 while Linux should use 0x8380. This state is controlled under the SR[BEV] CP0 register. GXEmul has a special -Q swith to run MIPS emulation in the BEV mode. There is another bug : for unknown reason, Qemu start BIOS execution from the 0xbfc4, not from the first address, see a hw/mips_r4k.c:221 I've just changet it to the 0xbfc0 In the current Qemu-CVS it is possible fo pass a control to the BIOS region 0xbfc0. Just omit a "-kernel" option and use a dummy MIPS ELF file as a parameter. This file may contain just a series of zeros (NOPs). Qemu will start execution of the binary 'mips_bios.bin' at the 0xbfc0 (except 0xbfc4 bug). Try to change the following lines in hw/mips_r4k.c: cpu_register_physical_memory(0x1fc0, ram_size, IO_MEM_RAM); This already done in the CVS hw/mips_r4k.c:215 Look at the my mmon-qemu port: http://www.nwpi.ru/~alec/mips/mmon-quemu-0.5.tgz It uses a dummy 'reset' ELF file to run a mips_bios.bin . You could find my qemu.log there: http://www.nwpi.ru/~alec/mips/qemu_log.txt It goes into infinity exception loop. The command string was $ qemu-system-mips -d out_asm,in_asm,op,int,exec,cpu -m 16 -nographic reset The mips_bios.bin is a my port of 'mmon'. P.S. JFYI: A good explanation of the MIPS reset: http://www.amd.com/files/connectivitysolutions/aufamily/au1000/Au1000Reset_rev1.2.pdf -- -=AV=- ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
