[Qemu-devel] TCG: register survival outside basic block
Hi, I'd like to use TCG for the remaining Sparc ops, the attached patch converts addcc for Sparc32. But I have a problem with register handling. I'd like to use some registers across basic blocks, but currently they get eliminated like tmp0 and tmp3 below. Is it possible to add some kind of register locking to prevent this? Or would you have other suggestions? IN: 0xffd0ea84: addcc %i1, %g3, %i1 OP: ld_i64 tmp1,env,$0x20 ld_i32 T0,tmp1,$0x44 ld_i32 T1,env,$0xc mov_i32 tmp0,T0 add_i32 T0,T0,T1 movi_i32 tmp2,$0x0 mov_i32 tmp3,tmp2 brcond_i32 T0,tmp2,$0x1,$0x0 movi_i32 tmp3,$0x40 set_label $0x0 brcond_i32 T0,tmp2,$0x3,$0x1 or_i32 tmp3,tmp3,$0x80 set_label $0x1 st_i32 tmp3,env,$0xb4 brcond_i32 T0,tmp0,$0x7,$0x2 ld_i32 tmp5,env,$0xb4 or_i32 tmp5,tmp5,$0x10 st_i32 tmp5,env,$0xb4 set_label $0x2 xor_i32 tmp7,tmp0,T1 xor_i32 tmp7,tmp7,$0x xor_i32 tmp8,tmp0,T0 and_i32 tmp7,tmp7,tmp8 and_i32 tmp7,tmp7,$0x8000 movi_i32 tmp9,$0x0 brcond_i32 tmp7,tmp9,$0x0,$0x3 ld_i32 tmp12,env,$0xb4 or_i32 tmp12,tmp12,$0x20 st_i32 tmp12,env,$0xb4 set_label $0x3 ld_i64 tmp1,env,$0x20 st_i32 T0,tmp1,$0x44 movi_i32 tmp0,$0xffd0ea88 st_i32 tmp0,env,$0xa8 movi_i32 tmp0,$0xffd0ea8c st_i32 tmp0,env,$0xac call $0x48b7e0,$0x0,$0x4 exit_tb $0x0 OP after la: ld_i64 tmp1,env,$0x20 ld_i32 T0,tmp1,$0x44 ld_i32 T1,env,$0xc nopn $0x2,$0x2 add_i32 T0,T0,T1 movi_i32 tmp2,$0x0 nopn $0x2,$0x2 brcond_i32 T0,tmp2,$0x1,$0x0 nopn $0x2,$0x2 set_label $0x0 brcond_i32 T0,tmp2,$0x3,$0x1 nopn $0x3,$0x7,$0x3 set_label $0x1 st_i32 tmp3,env,$0xb4 brcond_i32 T0,tmp0,$0x7,$0x2 ld_i32 tmp5,env,$0xb4 or_i32 tmp5,tmp5,$0x10 st_i32 tmp5,env,$0xb4 set_label $0x2 xor_i32 tmp7,tmp0,T1 xor_i32 tmp7,tmp7,$0x xor_i32 tmp8,tmp0,T0 and_i32 tmp7,tmp7,tmp8 and_i32 tmp7,tmp7,$0x8000 movi_i32 tmp9,$0x0 brcond_i32 tmp7,tmp9,$0x0,$0x3 ld_i32 tmp12,env,$0xb4 or_i32 tmp12,tmp12,$0x20 st_i32 tmp12,env,$0xb4 set_label $0x3 ld_i64 tmp1,env,$0x20 st_i32 T0,tmp1,$0x44 movi_i32 tmp0,$0xffd0ea88 st_i32 tmp0,env,$0xa8 movi_i32 tmp0,$0xffd0ea8c st_i32 tmp0,env,$0xac call $0x48b7e0,$0x0,$0x4 exit_tb $0x0 end tcg_addcc.diff Description: plain/text
[Qemu-devel] Re: Re: Atheros Wireless Device Emulation
On Friday 29 February 2008 19:22:53 Sylvain Petreolle wrote: Look at pci.c.rej. Because of the lines of the recent e1000 pci card inclusion, patch refuses to apply it. Its just a matter of resynch... Now I got it ;-) This one (http://stud4.tuwien.ac.at/~e0126605/qemu_atheros/atheros_wlan.patch) is for the current CVS version. Do we have writing access to the CVS?? Since I doubt it, could someone apply the patch (in case you think it is good enough ;-) ) Some more infos on the wlan emulation: - if you cannot connect to the router (happens to me sometimes with windows guests), simply cancel connecting and retry - i experienced problems when getting a dynamic ip from qemu (dhcp) when using multiple NICs. Simply disable all other NICs and it always worked for me or use static IPs. - Inbound connections still buggy - Still does not work with current CVS of Madwifi drivers. Use MadWifi 0.9.3 (and don't forget to use the _linux_ model type as explained in previous posts) - I just tried the patch and got a qemu: fatal: triple fault ... i restarted qemu and everything worked fine. either there is still a major bug in my code, or the snapshots inside my image were a little messed up. Have fun with the code ;-) --Clemens
[Qemu-devel] qemu hw/etraxfs_ser.c hw/etraxfs_timer.c target...
CVSROOT:/sources/qemu Module name:qemu Changes by: Edgar E. Iglesias edgar_igl 08/03/01 17:25:33 Modified files: hw : etraxfs_ser.c etraxfs_timer.c target-cris: helper.c op.c Log message: * target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags. * target-cris/helper.c: Update ERP for user-mode simulation aswell. * hw/etraxfs_timer.c: Support multiple timers. * hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_ser.c?cvsroot=qemur1=1.2r2=1.3 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/etraxfs_timer.c?cvsroot=qemur1=1.2r2=1.3 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/helper.c?cvsroot=qemur1=1.4r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/target-cris/op.c?cvsroot=qemur1=1.5r2=1.6
[Qemu-devel] qemu/tests/cris check_btst.s
CVSROOT:/sources/qemu Module name:qemu Changes by: Edgar E. Iglesias edgar_igl 08/03/01 18:50:55 Modified files: tests/cris : check_btst.s Log message: Add test-case for btst CCS flags updates. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/tests/cris/check_btst.s?cvsroot=qemur1=1.1r2=1.2
RE: [kvm-devel] [Qemu-devel] [PATCH] USB 2.0 EHCI emulation
Can you give me some details about the device? -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Gerb Stralko Sent: Friday, February 29, 2008 4:17 PM To: Arnon Gilboa Cc: [EMAIL PROTECTED]; qemu-devel@nongnu.org Subject: Re: [kvm-devel] [Qemu-devel] [PATCH] USB 2.0 EHCI emulation On Fri, Feb 29, 2008 at 2:33 AM, Arnon Gilboa [EMAIL PROTECTED] wrote: In hw/pc.c, replace usb_uhci_piix3_init(pci_bus, piix3_devfn + 2); With usb_ehci_init(pci_bus, piix3_devfn + 2); With these changes.. I can't add the usb devices anymore to a Windows XP (32 bit). This is the command i use to start kvm: /usr/local/bin/kvm/qemu-system-x86_64 -localtime -m 512 -usb -hda win32xp.img To add usb device i normally go to the qemu console and type: info usbhost find the number for my device i want to connect to usb_add host:03f0:01cda But with your patch, when i try to add a usb device i get: Could not add 'USB device host:03f0:01cda' Since i'm using EHCI emulation, do i need to add usb devices in a different way? Or should it work exactly the same way? Thanks, Jerry Note my comments on the original post: -tested on XP guest -does not support ISO transfers -timing issues -Original Message- From: Gerb Stralko [mailto:[EMAIL PROTECTED] Sent: Thursday, February 28, 2008 9:46 PM To: Arnon Gilboa Cc: qemu-devel@nongnu.org; [EMAIL PROTECTED] Subject: Re: [kvm-devel] [Qemu-devel] [PATCH] USB 2.0 EHCI emulation Attached is a repost of the preliminary patch implementing USB 2.0 EHCI emulation. I want to start testing your patches for the EHCI stuff. Do i need to enable anything inorder to get EHCI emulation working after applying your patch? Unfortunately, with this patch it doesn't work for me. My guest host (windows vista) still became really slow when I add the a usb device. Waiting for your comments, Arnon Thanks, Jerry
[Qemu-devel] qemu configure tests/Makefile tests/test-mmap.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Edgar E. Iglesias edgar_igl 08/03/01 22:23:17 Modified files: . : configure tests : Makefile Added files: tests : test-mmap.c Log message: Add a tests for user-mode mmap CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/configure?cvsroot=qemur1=1.188r2=1.189 http://cvs.savannah.gnu.org/viewcvs/qemu/tests/Makefile?cvsroot=qemur1=1.45r2=1.46 http://cvs.savannah.gnu.org/viewcvs/qemu/tests/test-mmap.c?cvsroot=qemurev=1.1
[Qemu-devel] [PATCH] Let ESP SCSI adapter to be usable outside sun4m (v2)
Hi,
At the moment, ESP SCSI adapter can only be used inside sun4m machines.
Attached patch moves the declaration outside sun4m.h, so other machines
can also use it. Declaration has been added to a new file scsi.h.
As Blue Swirl suggested, DMA access functions are sent to the init function.
Hervé
Index: Makefile.target
===
RCS file: /sources/qemu/qemu/Makefile.target,v
retrieving revision 1.246
diff -u -r1.246 Makefile.target
--- Makefile.target 27 Feb 2008 17:53:27 - 1.246
+++ Makefile.target 1 Mar 2008 22:03:35 -
@@ -514,7 +514,7 @@
endif
# SCSI layer
-OBJS+= lsi53c895a.o
+OBJS+= lsi53c895a.o esp.o
# USB layer
OBJS+= usb-ohci.o
@@ -576,7 +576,7 @@
OBJS+= cirrus_vga.o parallel.o ptimer.o
else
OBJS+= sun4m.o tcx.o pcnet.o iommu.o m48t59.o slavio_intctl.o
-OBJS+= slavio_timer.o slavio_serial.o slavio_misc.o fdc.o esp.o sparc32_dma.o
+OBJS+= slavio_timer.o slavio_serial.o slavio_misc.o fdc.o sparc32_dma.o
OBJS+= cs4231.o ptimer.o eccmemctl.o sbi.o sun4c_intctl.o
endif
endif
Index: hw/esp.c
===
RCS file: /sources/qemu/qemu/hw/esp.c,v
retrieving revision 1.33
diff -u -r1.33 esp.c
--- hw/esp.c1 Jan 2008 17:06:38 - 1.33
+++ hw/esp.c1 Mar 2008 22:23:03 -
@@ -24,9 +24,7 @@
#include hw.h
#include block.h
#include scsi-disk.h
-#include sun4m.h
-/* FIXME: Only needed for MAX_DISKS, which is probably wrong. */
-#include sysemu.h
+#include scsi.h
/* debug ESP card */
//#define DEBUG_ESP
@@ -75,6 +73,9 @@
uint32_t dma_counter;
uint8_t *async_buf;
uint32_t async_len;
+
+espdma_memory_read_write dma_memory_read;
+espdma_memory_read_write dma_memory_write;
void *dma_opaque;
};
@@ -152,7 +153,7 @@
target = s-wregs[ESP_WBUSID] 7;
DPRINTF(get_cmd: len %d target %d\n, dmalen, target);
if (s-dma) {
-espdma_memory_read(s-dma_opaque, buf, dmalen);
+s-dma_memory_read(s-dma_opaque, buf, dmalen);
} else {
buf[0] = 0;
memcpy(buf[1], s-ti_buf, dmalen);
@@ -236,7 +237,7 @@
s-ti_buf[0] = s-sense;
s-ti_buf[1] = 0;
if (s-dma) {
-espdma_memory_write(s-dma_opaque, s-ti_buf, 2);
+s-dma_memory_write(s-dma_opaque, s-ti_buf, 2);
s-rregs[ESP_RSTAT] = STAT_IN | STAT_TC | STAT_ST;
s-rregs[ESP_RINTR] = INTR_BS | INTR_FC;
s-rregs[ESP_RSEQ] = SEQ_CD;
@@ -269,7 +270,7 @@
len = s-dma_left;
if (s-do_cmd) {
DPRINTF(command len %d + %d\n, s-cmdlen, len);
-espdma_memory_read(s-dma_opaque, s-cmdbuf[s-cmdlen], len);
+s-dma_memory_read(s-dma_opaque, s-cmdbuf[s-cmdlen], len);
s-ti_size = 0;
s-cmdlen = 0;
s-do_cmd = 0;
@@ -284,9 +285,9 @@
len = s-async_len;
}
if (to_device) {
-espdma_memory_read(s-dma_opaque, s-async_buf, len);
+s-dma_memory_read(s-dma_opaque, s-async_buf, len);
} else {
-espdma_memory_write(s-dma_opaque, s-async_buf, len);
+s-dma_memory_write(s-dma_opaque, s-async_buf, len);
}
s-dma_left -= len;
s-async_buf += len;
@@ -621,6 +622,8 @@
}
void *esp_init(target_phys_addr_t espaddr,
+ espdma_memory_read_write dma_memory_read,
+ espdma_memory_read_write dma_memory_write,
void *dma_opaque, qemu_irq irq, qemu_irq *reset)
{
ESPState *s;
@@ -631,6 +634,8 @@
return NULL;
s-irq = irq;
+s-dma_memory_read = dma_memory_read;
+s-dma_memory_write = dma_memory_write;
s-dma_opaque = dma_opaque;
esp_io_memory = cpu_register_io_memory(0, esp_mem_read, esp_mem_write, s);
Index: hw/sun4m.c
===
RCS file: /sources/qemu/qemu/hw/sun4m.c,v
retrieving revision 1.85
diff -u -r1.85 sun4m.c
--- hw/sun4m.c 29 Feb 2008 19:26:20 - 1.85
+++ hw/sun4m.c 1 Mar 2008 22:25:18 -
@@ -31,6 +31,7 @@
#include net.h
#include boards.h
#include firmware_abi.h
+#include scsi.h
//#define DEBUG_IRQ
@@ -505,8 +506,9 @@
exit(1);
}
-main_esp = esp_init(hwdef-esp_base, espdma, *espdma_irq,
-esp_reset);
+main_esp = esp_init(hwdef-esp_base,
+espdma_memory_read, espdma_memory_write,
+espdma, *espdma_irq, esp_reset);
for (i = 0; i ESP_MAX_DEVS; i++) {
index = drive_get_index(IF_SCSI, 0, i);
@@ -653,8 +655,9 @@
exit(1);
}
-main_esp = esp_init(hwdef-esp_base, espdma, *espdma_irq,
-esp_reset);
+main_esp = esp_init(hwdef-esp_base,
+espdma_memory_read, espdma_memory_write,
+espdma, *espdma_irq, esp_reset);
for (i = 0; i ESP_MAX_DEVS; i++) {
index = drive_get_index(IF_SCSI, 0, i);
@@ -1158,8 +1161,9 @@
exit(1);
}
-main_esp =
