[Qemu-devel] Re: [RFC PATCH 5/5] VFIO based device assignment
On 07/11/2010 10:38 PM, Alex Williamson wrote: What about page attributes? There are two cases: - snoop capable iommu - can use write-backed RAM, but need to enable snoop. BARs still need to respect page attributes. - older mmu - need to respect guest memory type; probably cannot be done without kvm. If the guest maps a BAR or RAM using write-combine memory type, can we reflect that? This may provide a considerable performance benefit. Do we do anything about this today in kvm device assignment? Maybe it's buried in the kernel side bits and I've missed it. I would expect that WC mappings in the guest carry through to host virtual mappings, but maybe we can only do that with kvm. Yes, see arch/x86/kvm/mmu.c, set_spte() calling -get_mt_mask(). Strangely, it's qualified with tdp. Perhaps because of all of the scary errata regarding mismatching memory types for a page. The processor side mappings are independent of the iommu mappings since devices don't care about such things. Thanks, Yeah. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.
[Qemu-devel] Re: [RFC PATCH 4/5] APIC/IOAPIC EOI callback
On 07/11/2010 09:30 PM, Avi Kivity wrote: Registering an eventfd for the eoi seems like a reasonable alternative. I'm worried about that racing (with what?) I don't think there's a problem. First, the EOI message is itself asynchronous. While the write to the local APIC is synchronous, effects on the rest of the system are effected using an APIC message, which travels asynchronously. Second, a component that needs timely information doesn't have to wait; it can read the eventfd and be sure it has seen all EOIs up to now. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.
[Qemu-devel] Re: [RFC PATCH 0/5] QEMU VFIO device assignment
On 07/11/2010 11:24 PM, Alex Williamson wrote: One other thing to be aware of is that vfio requires devices to be PCI-2.3 compliant in order to support DisINTx. This allows vfio to support devices making use of shared INTx interrupts, but excludes older devices that users maybe managed to get assigned to an exclusive interrupt for kvm style assignment. I suppose we might be able to make vfio work with either pci 2.3 devices or older devices with exclusive interrupts if that ends up affecting many users. PCI 2.3 is already old enough (6-7 years?) that I believe we can require it. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.
[Qemu-devel] [Bug 532733] Re: apt/dpkg in qemu-system-arm hangs if a big task is installed
I'm now implementing the support for creating a rootstock rootfs without requiring root, and I also got stuck at a segmentation fault, just after executing the debootstrap' second stage. I'm running the qemu-system-arm from qemu-kvm-extras 0.12.4+noroms- 0ubuntu4, at maverick. My qemu command line: qemu-system-arm -M versatilepb -cpu cortex-a8 -kernel qemu-vmlinuz -no-reboot -nographic -drive file=qemu-armel-rootstock.img,aio=native,cache=none -m 256 -append 'console=ttyAMA0,115200n8 root=/dev/sda rw mem=256M init=/bin/installer' Uncompressing Linux. done, booting the kernel. [0.00] Initializing cgroup subsys cpuset [0.00] Initializing cgroup subsys cpu ... ... I: Configuring initramfs-tools... I: Base system installed successfully. I: Starting basic services in VM [ 912.758337] udev: starting version 151 Adding `local diversion of /usr/sbin/invoke-rc.d to /usr/sbin/invoke-rc.d.rootstock' [ 913.623614] eth0: link up Internet Systems Consortium DHCP Client V3.1.3 Copyright 2004-2009 Internet Systems Consortium. All rights reserved. For info, please visit https://www.isc.org/software/dhcp/ Listening on LPF/eth0/52:54:00:12:34:56 Sending on LPF/eth0/52:54:00:12:34:56 Sending on Socket/fallback DHCPDISCOVER on eth0 to 255.255.255.255 port 67 interval 7 DHCPOFFER of 10.0.2.15 from 10.0.2.2 DHCPREQUEST of 10.0.2.15 on eth0 to 255.255.255.255 port 67 DHCPACK of 10.0.2.15 from 10.0.2.2 bound to 10.0.2.15 -- renewal in 34170 seconds. Generating locales... en_GB.UTF-8... done Segmentation fault (core dumped) [436282.681876] qemu-system-arm[4435]: segfault at cd7797cc ip cd7797cc sp 7fffa42e3070 error 14 For testing and debugging purposes, I'm also uploading the rootstock image to my server (if you want to test, wait at least 2 hours and make sure to check the md5). Image: * rootfs: http://rsalveti.net/pub/ubuntu/rootstock/qemu-armel-rootstock.img (md5 356b497edddec08ff19f2ef545b4e207) * kernel: http://ports.ubuntu.com/ubuntu-ports/dists/lucid/main/installer-armel/current/images/versatile/netboot/vmlinuz Going to get some sleep now but tomorrow will try qemu with gdb and also with the current upstream version. -- apt/dpkg in qemu-system-arm hangs if a big task is installed https://bugs.launchpad.net/bugs/532733 You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. Status in QEMU: Invalid Status in “qemu-kvm” package in Ubuntu: Incomplete Status in “qemu-kvm” source package in Lucid: Incomplete Bug description: Binary package hint: qemu-kvm running rootstock and installing ubuntu-netbook^ makes the VM hang in unpacking iso-codes this is reproducable every time in rootstock as well as in a standard qemu-system-arm vm that contains a minimal ubuntu with running apt-get install ubuntu-netbook
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
12.07.2010 09:24, Giangiacomo Mariotti wrote: Hi, is it a known problem how much slow is Btrfs with kvm/qemu(meaning that the image kvm/qemu uses as the hd is on a partition formatted with Btrfs, not that the fs used by the hd inside the kvm environment is Btrfs, in fact inside kvm the / partition is formatted with ext3)? I haven't written down the exact numbers, because I forgot, but while I was trying to make it work, after I noticed how much longer than usual it was taking to just install the system, I took a look at iotop and it was reporting a write speed of the kvm process of approximately 3M/s, while the Btrfs kernel thread had an approximately write speed of 7K/s! Just formatting the partitions during the debian installation took minutes. When the actual installation of the distro started I had to stop it, because it was taking hours! The iotop results made me think that the problem could be Btrfs, but, to be sure that it wasn't instead a kvm/qemu problem, I cut/pasted the same virtual hd on an ext3 fs and started kvm with the same parameters as before. The installation of debian inside kvm this time went smoothly and fast, like normally it does. I've been using Btrfs for some time now and while it has never been a speed champion(and I guess it's not supposed to be one and I don't even really care that much about it), I've never had any noticeable performance problem before and it has always been quite stable. In this test case though, it seems to be doing very bad. This looks quite similar to a problem with ext4 and O_SYNC which I reported earlier but no one cared to answer (or read?) - there: http://permalink.gmane.org/gmane.linux.file-systems/42758 (sent to qemu-devel and linux-fsdevel lists - Cc'd too). You can try a few other options, esp. cache=none and re-writing some guest files to verify. /mjt
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
On 07/12/2010 12:09 AM, Michael Tokarev wrote: 12.07.2010 09:24, Giangiacomo Mariotti wrote: Hi, is it a known problem how much slow is Btrfs with kvm/qemu(meaning that the image kvm/qemu uses as the hd is on a partition formatted with Btrfs, not that the fs used by the hd inside the kvm environment is Btrfs, in fact inside kvm the / partition is formatted with ext3)? I haven't written down the exact numbers, because I forgot, but while I was trying to make it work, after I noticed how much longer than usual it was taking to just install the system, I took a look at iotop and it was reporting a write speed of the kvm process of approximately 3M/s, while the Btrfs kernel thread had an approximately write speed of 7K/s! Just formatting the partitions during the debian installation took minutes. When the actual installation of the distro started I had to stop it, because it was taking hours! The iotop results made me think that the problem could be Btrfs, but, to be sure that it wasn't instead a kvm/qemu problem, I cut/pasted the same virtual hd on an ext3 fs and started kvm with the same parameters as before. The installation of debian inside kvm this time went smoothly and fast, like normally it does. I've been using Btrfs for some time now and while it has never been a speed champion(and I guess it's not supposed to be one and I don't even really care that much about it), I've never had any noticeable performance problem before and it has always been quite stable. In this test case though, it seems to be doing very bad. This looks quite similar to a problem with ext4 and O_SYNC which I reported earlier but no one cared to answer (or read?) - there: http://permalink.gmane.org/gmane.linux.file-systems/42758 (sent to qemu-devel and linux-fsdevel lists - Cc'd too). You can try a few other options, esp. cache=none and re-writing some guest files to verify. /mjt -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ cool a solution... glad to see... no chance at a bisect with this? (getting this down too a commit or two makes things easier) Justin P. Mattock
[Qemu-devel] [PATCH] pci/multi function bit: fix v582c686.c.
The file, v582c686.c, was added after the change set of
b80d4a9887fa4b6cc63f8c3a13ab2a45054d3e5c and
fecb93c45c749a4c994d8d12bdee17ce2012de9e
are created, but before the patch series was commit.
So similar fix is needed to v582c686.c.
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Michael S. Tsirkin m...@redhat.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
This is only compile tested.
Huacai, can you please test it? Or provide me pmon_fulong2e.bin?
I wasn't able to find it, and tried the source repository,
http://www.loongson.cn/support/git/pmon, but wasn't able to clone.
$ git clone http://www.loongson.cn/support/git/pmon
Cloning into pmon...
fatal: http://www.loongson.cn/support/git/pmon/info/refs not found: did you run
git update-server-info on the server?
---
hw/vt82c686.c |5 +
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index a0c5747..cacc217 100644
--- a/hw/vt82c686.c
+++ b/hw/vt82c686.c
@@ -468,7 +468,6 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_ACPI);
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
pci_config_set_revision(pci_conf, 0x40);
-pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
pci_set_word(pci_conf + PCI_COMMAND, 0);
pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK |
@@ -556,8 +555,6 @@ static int vt82c686b_initfn(PCIDevice *d)
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
pci_config_set_prog_interface(pci_conf, 0x0);
pci_config_set_revision(pci_conf,0x40); /* Revision 4.0 */
-pci_conf[PCI_HEADER_TYPE] =
-PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION;
wmask = d-wmask;
for (i = 0x00; i 0xff; i++) {
@@ -575,7 +572,7 @@ int vt82c686b_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
-d = pci_create_simple(bus, devfn, VT82C686B);
+d = pci_create_simple_multifunction(bus, devfn, true, VT82C686B);
return d-devfn;
}
--
1.7.1.1
[Qemu-devel] Re: [PATCH] qemu-img: Fix copy+paste bug in documentation
Am 09.07.2010 20:30, schrieb Stefan Weil: Replace rebase by resize in documentation of resize command. Cc: Stefan Hajnoczi stefa...@linux.vnet.ibm.com Cc: Kevin Wolf kw...@redhat.com Signed-off-by: Stefan Weil w...@mail.berlios.de Thanks, applied to the block branch. Kevin
Re: [Qemu-devel] [PATCH v2] Block migration fail, ignore error from bdrv_getlength
Am 10.07.2010 17:59, schrieb Shahar Havivi:
When there is no block driver associate with BlockDriverState bdrv_getlength
returns -ENOMEDIUM that cause block migration to fail
v2:
fix sectors0 to sectors=0
Please put the changes between patch versions below the --- line so that
git am ignores it.
Signed-off-by: Shahar Havivi shah...@redhat.com
---
block-migration.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/block-migration.c b/block-migration.c
index 7db6f02..a77106e 100644
--- a/block-migration.c
+++ b/block-migration.c
@@ -238,7 +238,7 @@ static void init_blk_migration_it(void *opaque,
BlockDriverState *bs)
if (!bdrv_is_read_only(bs)) {
sectors = bdrv_getlength(bs) BDRV_SECTOR_BITS;
-if (sectors == 0) {
+if (sectors = 0) {
return;
}
Dealing with -errno shifted by 9 looks really strange, but it should be
correct (sectors being -1 for error cases in practice).
Thanks, applied to the block branch.
Kevin
Re: [Qemu-devel] [PATCH v2 0/2] target-sh4: Add support for missing ldc stc instructions with sgr
On Mon, Jul 12, 2010 at 02:05:30PM +0900, Alexandre Courbot wrote: This series of patch adds support for the missing ldc stc privileged instructions with the sgr register. In order to take the difference of support between SH4A and SH4 (which does not recognize ldc with sgr), the LDST macro has been split into two simpler macros. Changelog from v1: signed off the patches (sorry for omitting it). Thanks, both applied. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net
[Qemu-devel] Re: [RFC PATCH 4/5] APIC/IOAPIC EOI callback
On Mon, Jul 12, 2010 at 09:33:12AM +0300, Avi Kivity wrote: On 07/11/2010 09:30 PM, Avi Kivity wrote: Registering an eventfd for the eoi seems like a reasonable alternative. I'm worried about that racing (with what?) I don't think there's a problem. First, the EOI message is itself asynchronous. While the write to the local APIC is synchronous, effects on the rest of the system are effected using an APIC message, which travels asynchronously. Second, a component that needs timely information doesn't have to wait; it can read the eventfd and be sure it has seen all EOIs up to now. I remember we already discussed the use of eventfd for reporting EOI and decided against it, but I don't remember why. :( Was it because if we are going to export EOI to userspace anyway we want to be able to use it for RTC timedrift fixing and for that we need to know what CPU called EOI and eventfd can't provide that? -- Gleb.
[Qemu-devel] [Bug 595438] Re: KVM segmentation fault, using SCSI+writeback and linux 2.4 guest
valgrind --malloc-fill=0x69 --free-fill=0x11 Process terminating with default action of signal 11 (SIGSEGV) ==00:00:01:03.046 29447== Access not within mapped region at address 0x1151 ==00:00:01:03.046 29447==at 0x80B4713: scsi_req_free (scsi-bus.c:153) ==00:00:01:03.047 29447==by 0x80B186B: scsi_remove_request (scsi-disk.c:86) ==00:00:01:03.047 29447==by 0x8095280: qcow_aio_write_cb (qcow2.c:640) ==00:00:01:03.047 29447==by 0x80849BE: posix_aio_process_queue (posix-aio-compat.c:460) ==00:00:01:03.047 29447==by 0x8084A76: posix_aio_read (posix-aio-compat.c:501) ==00:00:01:03.047 29447==by 0x805E3D7: main_loop_wait (vl.c:1300) ==00:00:01:03.047 29447==by 0x806EA83: kvm_main_loop (qemu-kvm.c:1710) ==00:00:01:03.047 29447==by 0x8060A72: main (vl.c:1340) It seems, that 0x1151 - is a pointer inside already freed region :( http://dl3.ideco-software.ru/IdecoICS/IdecoICS_342_123.iso http://dl1.ideco-software.ru/IdecoICS/IdecoICS_342_123.iso http://dl2.ideco-software.ru/IdecoICS/IdecoICS_342_123.iso (If you get 404, please inform me, I will give new links.) Instructions how to reproduce: after boot: type setup100hz action=install p=1 and press Enter. Line should look as: boot: setup100hz action=install p=1 In each experiment You need fresh (empty) qemu-img create -f qcow2 8G image (preferable in tmpfs filesystem) Image will be expanded nearly to 1.5 Gb. I have VMX-enabled Intel processor and 32-bit kernel. KVM was built just using ./configure make command: qemu-system-x86_64 -drive file=xxx.img,cache=writeback,if=scsi -cdrom IdecoICS_342_123.iso It will show some dialogs while copying files after which it will go to reboot if all OK. In our case: somewhere during copying files, kvm will do segmentation fault, before rebooting of VM. -- KVM segmentation fault, using SCSI+writeback and linux 2.4 guest https://bugs.launchpad.net/bugs/595438 You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. Status in QEMU: Confirmed Bug description: I Use Ubuntu 32 bit 10.04 with standard KVM. I have Intel E7600 @ 3.06GHz processor with VMX In this system I Run: LC_ALL=C PATH=/usr/local/sbin:/usr/local/bin:/usr/bin:/usr/sbin:/sbin:/bin QEMU_AUDIO_DRV=none /usr/bin/kvm -M pc-0.12 -enable-kvm -m 256 -smp 1 -name spamsender -uuid b9cacd5e-08f7-41fd-78c8-89cec59af881 -chardev socket,id=monitor,path=/var/lib/libvirt/qemu/spamsender.monitor,server,nowait -monitor chardev:monitor -boot d -drive file=/mnt/megadiff/cdiso_400_130.iso,if=ide,media=cdrom,index=2 -drive file=/home/mmarkk/spamsender2.img,if=scsi,index=0,format=qcow2,cache=writeback -net nic,macaddr=00:00:00:00:00:00,vlan=0,name=nic.0 -net tap,vlan=0,name=tap.0 -chardev pty,id=serial0 -serial chardev:serial0 -parallel none -usb -vnc 127.0.0.1:0 -vga cirrus .iso image contain custom distro of 2.4-linux kernel based system. During install process (when .tar.gz actively unpacked), kvm dead with segmentation fault. And ONLY when I choose scsi virtual disk and writeback simultaneously. But, writeback+ide, writethrough+scsi works OK. I use qcow2. It seems, that qcow does not have such problems. Virtual machine get down at random time during file copy. It seems, when qcow2 file size need to be expanded.
[Qemu-devel] Re: [RFC PATCH 4/5] APIC/IOAPIC EOI callback
On 07/12/2010 12:05 PM, Gleb Natapov wrote: On Mon, Jul 12, 2010 at 09:33:12AM +0300, Avi Kivity wrote: On 07/11/2010 09:30 PM, Avi Kivity wrote: Registering an eventfd for the eoi seems like a reasonable alternative. I'm worried about that racing (with what?) I don't think there's a problem. First, the EOI message is itself asynchronous. While the write to the local APIC is synchronous, effects on the rest of the system are effected using an APIC message, which travels asynchronously. Second, a component that needs timely information doesn't have to wait; it can read the eventfd and be sure it has seen all EOIs up to now. I remember we already discussed the use of eventfd for reporting EOI and decided against it, but I don't remember why. :( Was it because if we are going to export EOI to userspace anyway we want to be able to use it for RTC timedrift fixing and for that we need to know what CPU called EOI and eventfd can't provide that? IIRC it was the synchronity argument. But it's bogus: if the RTC wants to know whether an ack occured before it makes some decision, all it has to do is read() the eventfd and find out. Another issue is which cpu issued the ack. I suppose we can have per-vcpu eventfds, though that's ugly. -- error compiling committee.c: too many arguments to function
[Qemu-devel] [PATCH] trace: Remove monitor.h dependency from simpletrace
User-mode targets don't have a monitor so the simple trace backend
currently does not build on those targets. This patch abstracts the
monitor printing interface so there is no direct coupling between
simpletrace and the monitor.
Signed-off-by: Stefan Hajnoczi stefa...@linux.vnet.ibm.com
---
I started reading the monitor code today and realized that there is already a
solution to this problem. The monitor printing interface uses FILE* instead of
Monitor*, allowing QEMU subsystems to contain monitor printing code that thinks
it is doing standard library stream I/O. This idiom is used by
cpu_dump_state(), dump_exec_info(), and others.
monitor.c | 14 +-
simpletrace.c | 17 -
tracetool |4 ++--
3 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/monitor.c b/monitor.c
index 433a3ec..090e13c 100644
--- a/monitor.c
+++ b/monitor.c
@@ -920,6 +920,18 @@ static void do_info_cpu_stats(Monitor *mon)
}
#endif
+#if defined(CONFIG_SIMPLE_TRACE)
+static void do_info_trace(Monitor *mon)
+{
+st_print_trace((FILE *)mon, monitor_fprintf);
+}
+
+static void do_info_trace_events(Monitor *mon)
+{
+st_print_trace_events((FILE *)mon, monitor_fprintf);
+}
+#endif
+
/**
* do_quit(): Quit QEMU execution
*/
@@ -2584,7 +2596,7 @@ static const mon_cmd_t info_cmds[] = {
.args_type = ,
.params = ,
.help = show available trace-events their state,
-.mhandler.info = do_info_all_trace_events,
+.mhandler.info = do_info_trace_events,
},
#endif
{
diff --git a/simpletrace.c b/simpletrace.c
index 4a4203e..7094f4b 100644
--- a/simpletrace.c
+++ b/simpletrace.c
@@ -1,7 +1,6 @@
#include stdlib.h
#include stdio.h
#include time.h
-#include monitor.h
#include trace.h
typedef struct {
@@ -95,24 +94,24 @@ void trace5(TraceEventID event, unsigned long x1, unsigned
long x2, unsigned lon
trace(event, x1, x2, x3, x4, x5);
}
-void do_info_trace(Monitor *mon)
+void st_print_trace(FILE *stream, int (*stream_printf)(FILE *stream, const
char *fmt, ...))
{
unsigned int i;
-for (i = 0; i trace_idx ; i++) {
-monitor_printf(mon, Event %lu : %lx %lx %lx %lx %lx\n,
- trace_buf[i].event, trace_buf[i].x1, trace_buf[i].x2,
-trace_buf[i].x3, trace_buf[i].x4, trace_buf[i].x5);
+for (i = 0; i trace_idx; i++) {
+stream_printf(stream, Event %lu : %lx %lx %lx %lx %lx\n,
+ trace_buf[i].event, trace_buf[i].x1, trace_buf[i].x2,
+ trace_buf[i].x3, trace_buf[i].x4, trace_buf[i].x5);
}
}
-void do_info_all_trace_events(Monitor *mon)
+void st_print_trace_events(FILE *stream, int (*stream_printf)(FILE *stream,
const char *fmt, ...))
{
unsigned int i;
for (i = 0; i NR_TRACE_EVENTS; i++) {
-monitor_printf(mon, %s [Event ID %u] : state %u\n,
-trace_list[i].tp_name, i, trace_list[i].state);
+stream_printf(stream, %s [Event ID %u] : state %u\n,
+ trace_list[i].tp_name, i, trace_list[i].state);
}
}
diff --git a/tracetool b/tracetool
index 43757e3..8d8f27c 100755
--- a/tracetool
+++ b/tracetool
@@ -139,8 +139,8 @@ void trace2(TraceEventID event, unsigned long x1, unsigned
long x2);
void trace3(TraceEventID event, unsigned long x1, unsigned long x2, unsigned
long x3);
void trace4(TraceEventID event, unsigned long x1, unsigned long x2, unsigned
long x3, unsigned long x4);
void trace5(TraceEventID event, unsigned long x1, unsigned long x2, unsigned
long x3, unsigned long x4, unsigned long x5);
-void do_info_trace(Monitor *mon);
-void do_info_all_trace_events(Monitor *mon);
+void st_print_trace(FILE *stream, int (*stream_printf)(FILE *stream, const
char *fmt, ...));
+void st_print_trace_events(FILE *stream, int (*stream_printf)(FILE *stream,
const char *fmt, ...));
void change_trace_event_state(const char *tname, bool tstate);
EOF
--
1.7.1
Re: [Qemu-devel] [PATCH] trace: Remove monitor.h dependency from simpletrace
I forgot to mention this patch is against the tracing branch, not qemu.git: http://repo.or.cz/w/qemu/stefanha.git/shortlog/refs/heads/tracing Stefan
[Qemu-devel] Re: [PATCH 0/8] Split ide-drive and scsi-disk qdevs, and more
Am 06.07.2010 14:37, schrieb Markus Armbruster: This patch series is about purging the type hint from the block layer. My previous series cleaned up improper uses it. Remaining uses are info block and qdevs ide-drive, scsidisk. Remove the type hint from info block. Its value is unreliable anyway. ide-drive and scsi-disk can either act as disk or as CD drive. They use their drive's type hint to decide between disk and CD. This is unclean. Disk vs. CD needs to be in qdev, not BlockDriverState, because it belongs to the drive's guest part. Split them into separate devices for disk and CD. Keep the old ones for backward compatibility. Bonus fix: reject empty drives unless media is removable (1-3/8). This patch series is available at git://repo.or.cz/qemu/armbru.git tag block-qdev-split: this series, based on tag block-fixes-2-v2: my previous series, based on tag blockdev-base, which the current kevin/block Markus Armbruster (8): virtio-pci: Check for virtio_blk_init() failure virtio-blk: Fix virtio-blk-s390 to require drive ide scsi virtio-blk: Reject empty drives unless media is removable Thanks, applied patches 1-3 to the block branch. block QMP: Drop query-block member type (type= in info block) ide: Split qdev ide-drive into ide-hd and ide-cd scsi: Split qdev scsi-disk into scsi-hd and scsi-cd blockdev: Store -drive option media in DriveInfo block: Remove type hint As discussed on IRC last week I'll wait for a respin for the remaining ones. Kevin
[Qemu-devel] [PATCH v2 0/5] pci: split out bridge code into pci_bridge and make it library
changes v1 - v2:
- introduce pci_internals.h to accomodate pci internal strcutures to
share between pci.c and pci_bridge.c
- don't make PCIBridge::bus pointer as suggested by
Michael S. Tsirkin m...@redhat.com
- rename PCIBridge::bus - PCIBridge::sec_bus
- eliminate pci_reguster_secondary_bus()/pci_unregister_secondary_bus()
- document pci bridge library functions.
- introduced pci bridge library.
Clean up of pci host bus ans piix pci as discussed with v1
will be addressed after this patch set is accepted.
Patch description:
Now pci.c has grown. So split bridge related code into dedicated file
for further extension to pci bridge. Further clean up and pcie port emulator.
This make patch conflict less possible in future.
Isaku Yamahata (5):
pci: move out pci internal structures, PCIBus, PCIBridge, and
pci_bus_info.
pci/bridge: split out pci bridge code into pci_bridge.c from pci.c
pci_bridge: rename PCIBridge::bus - PCIBridge::sec_bus.
pci_bridge: clean up: remove pci_{register,
unregister}_secondary_bus()
pci_bridge: introduce pci bridge library.
Makefile.objs |2 +-
hw/apb_pci.c | 43 ++---
hw/dec_pci.c | 35 ++--
hw/pci.c | 207 +--
hw/pci.h |5 +-
hw/pci_bridge.c| 249
hw/pci_bridge.h| 62 +
hw/pci_internals.h | 42 +
qemu-common.h |1 +
9 files changed, 416 insertions(+), 230 deletions(-)
create mode 100644 hw/pci_bridge.c
create mode 100644 hw/pci_bridge.h
create mode 100644 hw/pci_internals.h
[Qemu-devel] [PATCH v2 1/5] pci: move out pci internal structures, PCIBus, PCIBridge, and pci_bus_info.
move out pci internal structures, PCIBus, PCIBridge and pci_bus_info into
private header file, pci_internals.h.
This is a preparation. Later pci bridge implementation will be
split out form pci.c into pci_bridge.c.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c | 32 ++--
hw/pci_internals.h | 40
2 files changed, 42 insertions(+), 30 deletions(-)
create mode 100644 hw/pci_internals.h
diff --git a/hw/pci.c b/hw/pci.c
index a3c2873..41227bf 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -23,6 +23,7 @@
*/
#include hw.h
#include pci.h
+#include pci_internals.h
#include monitor.h
#include net.h
#include sysemu.h
@@ -36,31 +37,10 @@
# define PCI_DPRINTF(format, ...) do { } while (0)
#endif
-struct PCIBus {
-BusState qbus;
-int devfn_min;
-pci_set_irq_fn set_irq;
-pci_map_irq_fn map_irq;
-pci_hotplug_fn hotplug;
-DeviceState *hotplug_qdev;
-void *irq_opaque;
-PCIDevice *devices[256];
-PCIDevice *parent_dev;
-target_phys_addr_t mem_base;
-
-QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
-QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
-
-/* The bus IRQ state is the logical OR of the connected devices.
- Keep a count of the number of devices with raised IRQs. */
-int nirq;
-int *irq_count;
-};
-
static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent);
static char *pcibus_get_dev_path(DeviceState *dev);
-static struct BusInfo pci_bus_info = {
+struct BusInfo pci_bus_info = {
.name = PCI,
.size = sizeof(PCIBus),
.print_dev = pcibus_dev_print,
@@ -1524,14 +1504,6 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char
*default_model,
return res;
}
-typedef struct {
-PCIDevice dev;
-PCIBus bus;
-uint32_t vid;
-uint32_t did;
-} PCIBridge;
-
-
static void pci_bridge_update_mappings_fn(PCIBus *b, PCIDevice *d)
{
pci_update_mappings(d);
diff --git a/hw/pci_internals.h b/hw/pci_internals.h
new file mode 100644
index 000..8a3026b
--- /dev/null
+++ b/hw/pci_internals.h
@@ -0,0 +1,40 @@
+#ifndef QEMU_PCI_INTERNALS_H
+#define QEMU_PCI_INTERNALS_H
+
+/*
+ * This header files is private to pci.c and pci_bridge.c
+ * So following structures are opaque to others and shouldn't be
+ * accessed.
+ */
+
+extern struct BusInfo pci_bus_info;
+
+struct PCIBus {
+BusState qbus;
+int devfn_min;
+pci_set_irq_fn set_irq;
+pci_map_irq_fn map_irq;
+pci_hotplug_fn hotplug;
+DeviceState *hotplug_qdev;
+void *irq_opaque;
+PCIDevice *devices[256];
+PCIDevice *parent_dev;
+target_phys_addr_t mem_base;
+
+QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
+QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
+
+/* The bus IRQ state is the logical OR of the connected devices.
+ Keep a count of the number of devices with raised IRQs. */
+int nirq;
+int *irq_count;
+};
+
+typedef struct {
+PCIDevice dev;
+PCIBus bus;
+uint32_t vid;
+uint32_t did;
+} PCIBridge;
+
+#endif /* QEMU_PCI_INTERNALS_H */
--
1.7.1.1
[Qemu-devel] [PATCH v2 4/5] pci_bridge: clean up: remove pci_{register, unregister}_secondary_bus()
Remove pci_{register, unregister}_secondary_bus() by open code.
They are old stype API and aren't used any more by others. So eliminate it.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci_bridge.c | 32 ++--
1 files changed, 10 insertions(+), 22 deletions(-)
diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index a5c4ece..16f930a 100644
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -37,26 +37,6 @@ PCIDevice *pci_bridge_get_device(PCIBus *bus)
return bus-parent_dev;
}
-static void pci_register_secondary_bus(PCIBus *parent,
- PCIBus *bus,
- PCIDevice *dev,
- pci_map_irq_fn map_irq,
- const char *name)
-{
-qbus_create_inplace(bus-qbus, pci_bus_info, dev-qdev, name);
-bus-map_irq = map_irq;
-bus-parent_dev = dev;
-
-QLIST_INIT(bus-child);
-QLIST_INSERT_HEAD(parent-child, bus, sibling);
-}
-
-static void pci_unregister_secondary_bus(PCIBus *bus)
-{
-assert(QLIST_EMPTY(bus-child));
-QLIST_REMOVE(bus, sibling);
-}
-
static uint32_t pci_config_get_io_base(PCIDevice *d,
uint32_t base, uint32_t base_upper16)
{
@@ -162,7 +142,8 @@ static int pci_bridge_initfn(PCIDevice *dev)
static int pci_bridge_exitfn(PCIDevice *pci_dev)
{
PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev);
-pci_unregister_secondary_bus(s-sec_bus);
+assert(QLIST_EMPTY(s-sec_bus.child));
+QLIST_REMOVE(s-sec_bus, sibling);
return 0;
}
@@ -172,6 +153,7 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool
multifunction,
{
PCIDevice *dev;
PCIBridge *s;
+PCIBus *sec_bus;
dev = pci_create_multifunction(bus, devfn, multifunction, pci-bridge);
qdev_prop_set_uint32(dev-qdev, vendorid, vid);
@@ -179,7 +161,13 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool
multifunction,
qdev_init_nofail(dev-qdev);
s = DO_UPCAST(PCIBridge, dev, dev);
-pci_register_secondary_bus(bus, s-sec_bus, s-dev, map_irq, name);
+sec_bus = s-sec_bus;
+qbus_create_inplace(sec_bus-qbus, pci_bus_info, dev-qdev, name);
+sec_bus-parent_dev = dev;
+sec_bus-map_irq = map_irq;
+
+QLIST_INIT(sec_bus-child);
+QLIST_INSERT_HEAD(bus-child, sec_bus, sibling);
return s-sec_bus;
}
--
1.7.1.1
[Qemu-devel] [PATCH v2 5/5] pci_bridge: introduce pci bridge library.
introduce pci bridge library.
convert apb bridge and dec p2p bridge to use new pci bridge library.
save/restore is supported as a side effect.
This is also preparation for pci express root/upstream/downstream port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/apb_pci.c | 42 ++-
hw/dec_pci.c | 34 +---
hw/pci_bridge.c| 154 +++-
hw/pci_bridge.h| 24 +++--
hw/pci_internals.h | 10 ++--
qemu-common.h |1 +
6 files changed, 185 insertions(+), 80 deletions(-)
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 88ee4a9..d446550 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -31,6 +31,7 @@
#include pci_host.h
#include pci_bridge.h
#include rwhandler.h
+#include pci_bridge.h
#include apb_pci.h
#include sysemu.h
@@ -294,9 +295,17 @@ static void pci_apb_set_irq(void *opaque, int irq_num, int
level)
}
}
-static void apb_pci_bridge_init(PCIBus *b)
+static int apb_pci_bridge_initfn(PCIDevice *dev)
{
-PCIDevice *dev = pci_bridge_get_device(b);
+int rc;
+
+rc = pci_bridge_initfn(dev);
+if (rc 0) {
+return rc;
+}
+
+pci_config_set_vendor_id(dev-config, PCI_VENDOR_ID_SUN);
+pci_config_set_device_id(dev-config, PCI_DEVICE_ID_SUN_SIMBA);
/*
* command register:
@@ -313,6 +322,7 @@ static void apb_pci_bridge_init(PCIBus *b)
PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ |
PCI_STATUS_DEVSEL_MEDIUM);
pci_set_byte(dev-config + PCI_REVISION_ID, 0x11);
+return 0;
}
PCIBus *pci_apb_init(target_phys_addr_t special_base,
@@ -323,6 +333,7 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
SysBusDevice *s;
APBState *d;
unsigned int i;
+PCIBridge *br;
/* Ultrasparc PBM main bus */
dev = qdev_create(NULL, pbm);
@@ -348,17 +359,15 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
pci_create_simple(d-bus, 0, pbm);
/* APB secondary busses */
-*bus2 = pci_bridge_init(d-bus, PCI_DEVFN(1, 0), true,
-PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA,
-pci_apb_map_irq,
-Advanced PCI Bus secondary bridge 1);
-apb_pci_bridge_init(*bus2);
-
-*bus3 = pci_bridge_init(d-bus, PCI_DEVFN(1, 1), true,
-PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_SIMBA,
-pci_apb_map_irq,
-Advanced PCI Bus secondary bridge 2);
-apb_pci_bridge_init(*bus3);
+br = pci_bridge_create_simple(d-bus, PCI_DEVFN(1, 0), true,
+ pci_apb_map_irq, pbm-bridge,
+ Advanced PCI Bus secondary bridge 1);
+*bus2 = pci_bridge_get_sec_bus(br);
+
+br = pci_bridge_create_simple(d-bus, PCI_DEVFN(1, 1), true,
+ pci_apb_map_irq, pbm-bridge,
+ Advanced PCI Bus secondary bridge 2);
+*bus3 = pci_bridge_get_sec_bus(br);
return d-bus;
}
@@ -441,10 +450,17 @@ static SysBusDeviceInfo pbm_host_info = {
.qdev.reset = pci_pbm_reset,
.init = pci_pbm_init_device,
};
+
+static PCIDeviceInfo pbm_pci_bridge_info = {
+.qdev.name = pbm-bridge,
+.init = apb_pci_bridge_initfn,
+};
+
static void pbm_register_devices(void)
{
sysbus_register_withprop(pbm_host_info);
pci_qdev_register(pbm_pci_host_info);
+pci_bridge_qdev_register(pbm_pci_bridge_info);
}
device_init(pbm_register_devices)
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index f7a9cdc..ce84faa 100644
--- a/hw/dec_pci.c
+++ b/hw/dec_pci.c
@@ -49,18 +49,33 @@ static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
return irq_num;
}
-PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
+static int dec_21154_initfn(PCIDevice *dev)
{
-DeviceState *dev;
-PCIBus *ret;
+int rc;
+
+rc = pci_bridge_initfn(dev);
+if (rc 0) {
+return rc;
+}
+
+pci_config_set_vendor_id(dev-config, PCI_VENDOR_ID_DEC);
+pci_config_set_device_id(dev-config, PCI_DEVICE_ID_DEC_21154);
+return 0;
+}
-dev = qdev_create(NULL, dec-21154);
-qdev_init_nofail(dev);
-ret = pci_bridge_init(parent_bus, devfn, false,
- PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21154,
- dec_map_irq, DEC 21154 PCI-PCI bridge);
+static PCIDeviceInfo dec_21154_pci_bridge_info = {
+.qdev.name = dec-21154-p2p-bridge,
+.qdev.desc = DEC 21154 PCI-PCI bridge,
+.init = dec_21154_initfn,
+};
-return ret;
+PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
+{
+PCIBridge *br;
+br = pci_bridge_create_simple(parent_bus, devfn, false, dec_map_irq,
+ dec-21154-p2p-bridge,
+ DEC 21154 PCI-PCI bridge);
+return pci_bridge_get_sec_bus(br);
}
static int
[Qemu-devel] [PATCH v2 3/5] pci_bridge: rename PCIBridge::bus - PCIBridge::sec_bus.
To avoid confusion of primary bus with secondary bus,
rename PCIBridge::bus to PCIBridge::sec_bus.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci_bridge.c|7 +++
hw/pci_internals.h |2 +-
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index 3f69a44..a5c4ece 100644
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -162,8 +162,7 @@ static int pci_bridge_initfn(PCIDevice *dev)
static int pci_bridge_exitfn(PCIDevice *pci_dev)
{
PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev);
-PCIBus *bus = s-bus;
-pci_unregister_secondary_bus(bus);
+pci_unregister_secondary_bus(s-sec_bus);
return 0;
}
@@ -180,8 +179,8 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool
multifunction,
qdev_init_nofail(dev-qdev);
s = DO_UPCAST(PCIBridge, dev, dev);
-pci_register_secondary_bus(bus, s-bus, s-dev, map_irq, name);
-return s-bus;
+pci_register_secondary_bus(bus, s-sec_bus, s-dev, map_irq, name);
+return s-sec_bus;
}
static PCIDeviceInfo bridge_info = {
diff --git a/hw/pci_internals.h b/hw/pci_internals.h
index 8a3026b..fa844ab 100644
--- a/hw/pci_internals.h
+++ b/hw/pci_internals.h
@@ -32,7 +32,7 @@ struct PCIBus {
typedef struct {
PCIDevice dev;
-PCIBus bus;
+PCIBus sec_bus;
uint32_t vid;
uint32_t did;
} PCIBridge;
--
1.7.1.1
[Qemu-devel] [PATCH v2 2/5] pci/bridge: split out pci bridge code into pci_bridge.c from pci.c
Move pci bridge related code into pci_bridge.c from pci.c
for further enhancement. pci.c is big enough now, so split it out.
No code change but exporting some accesser functions.
In fact, few pci bridge functions stays in pci.c.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs |2 +-
hw/apb_pci.c|1 +
hw/dec_pci.c|1 +
hw/pci.c| 175 +--
hw/pci.h|5 +-
hw/pci_bridge.c | 206 +++
hw/pci_bridge.h | 48 +
7 files changed, 260 insertions(+), 178 deletions(-)
create mode 100644 hw/pci_bridge.c
create mode 100644 hw/pci_bridge.h
diff --git a/Makefile.objs b/Makefile.objs
index 67f1b21..594894b 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -139,7 +139,7 @@ user-obj-y += cutils.o cache-utils.o
hw-obj-y =
hw-obj-y += vl.o loader.o
hw-obj-y += virtio.o virtio-console.o
-hw-obj-y += fw_cfg.o pci.o pci_host.o pcie_host.o
+hw-obj-y += fw_cfg.o pci.o pci_host.o pcie_host.o pci_bridge.o
hw-obj-y += watchdog.o
hw-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
hw-obj-$(CONFIG_ECC) += ecc.o
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 0ecac55..88ee4a9 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -29,6 +29,7 @@
#include sysbus.h
#include pci.h
#include pci_host.h
+#include pci_bridge.h
#include rwhandler.h
#include apb_pci.h
#include sysemu.h
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index ee49d5a..f7a9cdc 100644
--- a/hw/dec_pci.c
+++ b/hw/dec_pci.c
@@ -27,6 +27,7 @@
#include sysbus.h
#include pci.h
#include pci_host.h
+#include pci_bridge.h
/* debug DEC */
//#define DEBUG_DEC
diff --git a/hw/pci.c b/hw/pci.c
index 41227bf..737fbd2 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -23,6 +23,7 @@
*/
#include hw.h
#include pci.h
+#include pci_bridge.h
#include pci_internals.h
#include monitor.h
#include net.h
@@ -263,26 +264,6 @@ PCIBus *pci_register_bus(DeviceState *parent, const char
*name,
return bus;
}
-static void pci_register_secondary_bus(PCIBus *parent,
- PCIBus *bus,
- PCIDevice *dev,
- pci_map_irq_fn map_irq,
- const char *name)
-{
-qbus_create_inplace(bus-qbus, pci_bus_info, dev-qdev, name);
-bus-map_irq = map_irq;
-bus-parent_dev = dev;
-
-QLIST_INIT(bus-child);
-QLIST_INSERT_HEAD(parent-child, bus, sibling);
-}
-
-static void pci_unregister_secondary_bus(PCIBus *bus)
-{
-assert(QLIST_EMPTY(bus-child));
-QLIST_REMOVE(bus, sibling);
-}
-
int pci_bus_num(PCIBus *s)
{
if (!s-parent_dev)
@@ -790,75 +771,6 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
}
}
-static uint32_t pci_config_get_io_base(PCIDevice *d,
- uint32_t base, uint32_t base_upper16)
-{
-uint32_t val;
-
-val = ((uint32_t)d-config[base] PCI_IO_RANGE_MASK) 8;
-if (d-config[base] PCI_IO_RANGE_TYPE_32) {
-val |= (uint32_t)pci_get_word(d-config + base_upper16) 16;
-}
-return val;
-}
-
-static pcibus_t pci_config_get_memory_base(PCIDevice *d, uint32_t base)
-{
-return ((pcibus_t)pci_get_word(d-config + base) PCI_MEMORY_RANGE_MASK)
- 16;
-}
-
-static pcibus_t pci_config_get_pref_base(PCIDevice *d,
- uint32_t base, uint32_t upper)
-{
-pcibus_t tmp;
-pcibus_t val;
-
-tmp = (pcibus_t)pci_get_word(d-config + base);
-val = (tmp PCI_PREF_RANGE_MASK) 16;
-if (tmp PCI_PREF_RANGE_TYPE_64) {
-val |= (pcibus_t)pci_get_long(d-config + upper) 32;
-}
-return val;
-}
-
-static pcibus_t pci_bridge_get_base(PCIDevice *bridge, uint8_t type)
-{
-pcibus_t base;
-if (type PCI_BASE_ADDRESS_SPACE_IO) {
-base = pci_config_get_io_base(bridge,
- PCI_IO_BASE, PCI_IO_BASE_UPPER16);
-} else {
-if (type PCI_BASE_ADDRESS_MEM_PREFETCH) {
-base = pci_config_get_pref_base(
-bridge, PCI_PREF_MEMORY_BASE, PCI_PREF_BASE_UPPER32);
-} else {
-base = pci_config_get_memory_base(bridge, PCI_MEMORY_BASE);
-}
-}
-
-return base;
-}
-
-static pcibus_t pci_bridge_get_limit(PCIDevice *bridge, uint8_t type)
-{
-pcibus_t limit;
-if (type PCI_BASE_ADDRESS_SPACE_IO) {
-limit = pci_config_get_io_base(bridge,
- PCI_IO_LIMIT, PCI_IO_LIMIT_UPPER16);
-limit |= 0xfff; /* PCI bridge spec 3.2.5.6. */
-} else {
-if (type PCI_BASE_ADDRESS_MEM_PREFETCH) {
-limit = pci_config_get_pref_base(
-bridge, PCI_PREF_MEMORY_LIMIT, PCI_PREF_LIMIT_UPPER32);
-} else {
-limit = pci_config_get_memory_base(bridge, PCI_MEMORY_LIMIT);
-}
-limit |= 0xf; /* PCI bridge spec 3.2.5.{1, 8}. */
-
[Qemu-devel] [Bug 494500] Re: QEMU 0.12.0 does not support KVM with Kernel 2.6.29, bug in ./configure and kvm-all.c
It works now: sudo apt-get remove kvm-source wget \ http://download.savannah.gnu.org/releases/qemu/qemu-0.12.4.tar.gz tar xzvf qemu-0.12.4.tar.gz cd qemu-0.12.4 ./configure --enable-kvm make sudo checkinstall --pkgname=qemu-self-compiled qemu -monitor stdio -enable-kvm (qemu) info kvm ** Changed in: qemu Status: New = Fix Committed -- QEMU 0.12.0 does not support KVM with Kernel 2.6.29, bug in ./configure and kvm-all.c https://bugs.launchpad.net/bugs/494500 You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. Status in QEMU: Fix Committed Bug description: I tryed to compile QEMU 0.12.0-rc1 with KVM support without success. Here my configuration: uname -a Linux bla 2.6.28-11-server #42-Ubuntu SMP Fri Apr 17 02:45:36 UTC 2009 x86_64 GNU/Linux dpkg -l | grep kvm ii kvm1:84+dfsg-0ubuntu11 This KVM modul works fine. I've installed this packets: sudo apt-get install make wget zlib1g-dev libsdl-gfx1.2-dev sudo apt-get install gcc libsdl1.2-dev zlib1g-dev libasound2-dev linux-kernel-headers-`uname-r` pkg-config libgnutls-dev libpci-dev The compiling of QEMU 0.12.0-rc1 wihout KVM support was OK. ./configure --enable-kvm #error Missing KVM capability KVM_CAP_DESTROY_MEMORY_REGION_WORKS NOTE: To enable KVM support, update your kernel to 2.6.29+ or install recent kvm-kmod from http://sourceforge.net/projects/kvm. ERROR ERROR: User requested feature kvm ERROR: configure was not able to find it ERROR I can't change the kernel because Ubuntu 9.10 are too buggy. So I tryed to install the latest kvm modul. wget \ http://sourceforge.net/projects/kvm/files/kvm-kmod/2.6.32/kvm-kmod-2.6.32.tar.bz2/download tar xjvf kvm-kmod-2.6.32.tar.bz2 cd kvm-kmod-2.6.32 ./configure make sudo make install sudo rmmod kvm_intel kvm_adm kvm sudo make install sudo rmmod kvm_intel kvm sudo modprobe kvm_intel dmesg | grep kvm [81811.678377] loaded kvm module (kvm-kmod-2.6.32) I tryed to compile QEMU with kvm support but I got the same error. ./configure --enable-kvm #error Missing KVM capability KVM_CAP_DESTROY_MEMORY_REGION_WORKS NOTE: To enable KVM support, update your kernel to 2.6.29+ or install recent kvm-kmod from http://sourceforge.net/projects/kvm. ERROR ERROR: User requested feature kvm ERROR: configure was not able to find it ERROR What is wrong? See also http://qemu-buch.de/de/index.php/QEMU-KVM-Buch/_Installation
[Qemu-devel] Re: [RFC PATCH 0/5] QEMU VFIO device assignment
On Mon, Jul 12, 2010 at 09:29:38AM +0300, Avi Kivity wrote: On 07/11/2010 11:24 PM, Alex Williamson wrote: One other thing to be aware of is that vfio requires devices to be PCI-2.3 compliant in order to support DisINTx. This allows vfio to support devices making use of shared INTx interrupts, but excludes older devices that users maybe managed to get assigned to an exclusive interrupt for kvm style assignment. I suppose we might be able to make vfio work with either pci 2.3 devices or older devices with exclusive interrupts if that ends up affecting many users. PCI 2.3 is already old enough (6-7 years?) I believe it was made a standard in 2002. that I believe we can require it. -- I have a truly marvellous patch that fixes the bug which this signature is too narrow to contain.
[Qemu-devel] Re: [PATCH] pci/multi function bit: fix v582c686.c.
On Mon, Jul 12, 2010 at 04:18:01PM +0900, Isaku Yamahata wrote:
The file, v582c686.c, was added after the change set of
b80d4a9887fa4b6cc63f8c3a13ab2a45054d3e5c and
fecb93c45c749a4c994d8d12bdee17ce2012de9e
are created, but before the patch series was commit.
So similar fix is needed to v582c686.c.
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Michael S. Tsirkin m...@redhat.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
This is only compile tested.
Huacai, can you please test it? Or provide me pmon_fulong2e.bin?
I wasn't able to find it, and tried the source repository,
http://www.loongson.cn/support/git/pmon, but wasn't able to clone.
$ git clone http://www.loongson.cn/support/git/pmon
Cloning into pmon...
fatal: http://www.loongson.cn/support/git/pmon/info/refs not found: did you
run git update-server-info on the server?
Yea, submodules are evil like that. We should really look into switching to
subtrees IMO.
---
hw/vt82c686.c |5 +
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index a0c5747..cacc217 100644
--- a/hw/vt82c686.c
+++ b/hw/vt82c686.c
@@ -468,7 +468,6 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_ACPI);
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
pci_config_set_revision(pci_conf, 0x40);
-pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
pci_set_word(pci_conf + PCI_COMMAND, 0);
pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK |
@@ -556,8 +555,6 @@ static int vt82c686b_initfn(PCIDevice *d)
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
pci_config_set_prog_interface(pci_conf, 0x0);
pci_config_set_revision(pci_conf,0x40); /* Revision 4.0 */
-pci_conf[PCI_HEADER_TYPE] =
-PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION;
wmask = d-wmask;
for (i = 0x00; i 0xff; i++) {
@@ -575,7 +572,7 @@ int vt82c686b_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
-d = pci_create_simple(bus, devfn, VT82C686B);
+d = pci_create_simple_multifunction(bus, devfn, true, VT82C686B);
return d-devfn;
}
--
1.7.1.1
[Qemu-devel] [PATCH 3/7] seabios: smm: move out piix4 specific logic to dev-i440fx.c
move out piix4 specific logic to dev-i440fx.c by using pci_find_init_device().
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/dev-i440fx.c | 25 +
src/dev-i440fx.h |1 +
src/post.h |6 ++
src/smm.c| 18 +-
4 files changed, 45 insertions(+), 5 deletions(-)
diff --git a/src/dev-i440fx.c b/src/dev-i440fx.c
index 5961efc..17d42ce 100644
--- a/src/dev-i440fx.c
+++ b/src/dev-i440fx.c
@@ -16,6 +16,7 @@
#include pci_regs.h // PCI_INTERRUPT_LINE
#include post.h
#include dev-i440fx.h
+#include post.h
#define I440FX_PAM0 0x59
@@ -64,3 +65,27 @@ void piix4_pm_init(u16 bdf, void *arg)
pci_config_writel(bdf, 0x90, PORT_SMB_BASE | 1);
pci_config_writeb(bdf, 0xd2, 0x09); /* enable SMBus io space */
}
+
+#define PIIX_DEVACTB0x58
+#define PIIX_APMC_EN(1 25)
+
+static int piix4_apmc_is_enabled(u16 bdf)
+{
+/* check if SMM init is already done */
+u32 value = pci_config_readl(bdf, PIIX_DEVACTB);
+return value PIIX_APMC_EN;
+}
+
+static void piix4_apmc_enable(u16 bdf)
+{
+/* enable SMI generation when writing to the APMC register */
+u32 value = pci_config_readl(bdf, PIIX_DEVACTB);
+pci_config_writel(bdf, PIIX_DEVACTB, value | PIIX_APMC_EN);
+}
+
+void piix4_apmc_detected(u16 bdf, void *arg)
+{
+struct apmc_ops *ops = arg;
+ops-is_enabled = piix4_apmc_is_enabled;
+ops-enable = piix4_apmc_enable;
+}
diff --git a/src/dev-i440fx.h b/src/dev-i440fx.h
index abcd0d1..934e7f2 100644
--- a/src/dev-i440fx.h
+++ b/src/dev-i440fx.h
@@ -7,5 +7,6 @@ void i440fx_shadow_detected(u16 bdf, void *arg);
void piix_isa_bridge_init(u16 bdf, void *arg);
void piix_ide_init(u16 bdf, void *arg);
void piix4_pm_init(u16 bdf, void *arg);
+void piix4_apmc_detected(u16 bdf, void *arg);
#endif // __I440FX_H
diff --git a/src/post.h b/src/post.h
index 18f89fb..2996878 100644
--- a/src/post.h
+++ b/src/post.h
@@ -10,4 +10,10 @@ struct pam_regs
u32 pam0;
};
+struct apmc_ops
+{
+int (*is_enabled)(u16 bdf);
+void (*enable)(u16 bdf);
+};
+
#endif /* __POST_H */
diff --git a/src/smm.c b/src/smm.c
index 3f53ef9..baa272f 100644
--- a/src/smm.c
+++ b/src/smm.c
@@ -10,6 +10,8 @@
#include config.h // CONFIG_*
#include ioport.h // outb
#include pci_ids.h // PCI_VENDOR_ID_INTEL
+#include post.h
+#include dev-i440fx.h
ASM32FLAT(
.global smm_relocation_start\n
@@ -72,6 +74,13 @@ ASM32FLAT(
extern u8 smm_relocation_start, smm_relocation_end;
extern u8 smm_code_start, smm_code_end;
+static const struct pci_device_id apmc_ops_tbl[] = {
+PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
+ piix4_apmc_detected),
+
+PCI_DEVICE_END,
+};
+
void
smm_init(void)
{
@@ -84,8 +93,8 @@ smm_init(void)
dprintf(3, init smm\n);
// This code is hardcoded for PIIX4 Power Management device.
-int bdf = pci_find_device(PCI_VENDOR_ID_INTEL
- , PCI_DEVICE_ID_INTEL_82371AB_3);
+struct apmc_ops apmc_ops;
+int bdf = pci_find_init_device(apmc_ops_tbl, apmc_ops);
if (bdf 0)
// Device not found
return;
@@ -95,8 +104,7 @@ smm_init(void)
return;
/* check if SMM init is already done */
-u32 value = pci_config_readl(bdf, 0x58);
-if (value (1 25))
+if (apmc_ops.is_enabled(bdf))
return;
/* enable the SMM memory window */
@@ -110,7 +118,7 @@ smm_init(void)
smm_relocation_end - smm_relocation_start);
/* enable SMI generation when writing to the APMC register */
-pci_config_writel(bdf, 0x58, value | (1 25));
+apmc_ops.enable(bdf);
/* init APM status port */
outb(0x01, PORT_SMI_STATUS);
--
1.7.1.1
[Qemu-devel] [PATCH 2/7] seabios: shadow: make device finding more generic.
pam register offset is north bridge specific.
So determine the offset based on found north bridge.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/dev-i440fx.c |9 +
src/dev-i440fx.h |1 +
src/post.h | 13 +
src/shadow.c | 44 +---
4 files changed, 52 insertions(+), 15 deletions(-)
create mode 100644 src/post.h
diff --git a/src/dev-i440fx.c b/src/dev-i440fx.c
index 864a52c..5961efc 100644
--- a/src/dev-i440fx.c
+++ b/src/dev-i440fx.c
@@ -14,8 +14,17 @@
#include ioport.h // outb
#include pci.h // pci_config_writeb
#include pci_regs.h // PCI_INTERRUPT_LINE
+#include post.h
#include dev-i440fx.h
+#define I440FX_PAM0 0x59
+
+void i440fx_shadow_detected(u16 bdf, void *arg)
+{
+struct pam_regs *pam_regs = arg;
+pam_regs-pam0 = I440FX_PAM0;
+}
+
/* PIIX3/PIIX4 PCI to ISA bridge */
void piix_isa_bridge_init(u16 bdf, void *arg)
{
diff --git a/src/dev-i440fx.h b/src/dev-i440fx.h
index ded5740..abcd0d1 100644
--- a/src/dev-i440fx.h
+++ b/src/dev-i440fx.h
@@ -3,6 +3,7 @@
#include types.h // u16
+void i440fx_shadow_detected(u16 bdf, void *arg);
void piix_isa_bridge_init(u16 bdf, void *arg);
void piix_ide_init(u16 bdf, void *arg);
void piix4_pm_init(u16 bdf, void *arg);
diff --git a/src/post.h b/src/post.h
new file mode 100644
index 000..18f89fb
--- /dev/null
+++ b/src/post.h
@@ -0,0 +1,13 @@
+//
+// Copyright (C) 2010 Isaku Yamahata yamahata at valinux co jp
+//
+// This file may be distributed under the terms of the GNU LGPLv3 license.
+#ifndef __POST_H
+#define __POST_H
+
+struct pam_regs
+{
+u32 pam0;
+};
+
+#endif /* __POST_H */
diff --git a/src/shadow.c b/src/shadow.c
index 978424e..2a360a8 100644
--- a/src/shadow.c
+++ b/src/shadow.c
@@ -9,6 +9,8 @@
#include pci.h // pci_config_writeb
#include config.h // CONFIG_*
#include pci_ids.h // PCI_VENDOR_ID_INTEL
+#include post.h
+#include dev-i440fx.h
// Test if 'addr' is in the range from 'start'..'start+size'
#define IN_RANGE(addr, start, size) ({ \
@@ -18,35 +20,42 @@
(__addr - __start __size); \
})
+static const struct pci_device_id dram_controller_tbl[] = {
+PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441,
+ i440fx_shadow_detected),
+PCI_DEVICE_END
+};
+
// On the emulators, the bios at 0xf is also at 0x
#define BIOS_SRC_ADDR 0x
// Enable shadowing and copy bios.
static void
-__make_bios_writable(u16 bdf)
+__make_bios_writable(u16 bdf, u32 pam0)
{
// Make ram from 0xc-0xf writable
int clear = 0;
int i;
for (i=0; i6; i++) {
-int reg = pci_config_readb(bdf, 0x5a + i);
+ u32 pam = pam0 + 1 + i;
+ int reg = pci_config_readb(bdf, pam);
if ((reg 0x11) != 0x11) {
// Need to copy optionroms to work around qemu implementation
void *mem = (void*)(BUILD_ROM_START + i * 32*1024);
memcpy((void*)BUILD_BIOS_TMP_ADDR, mem, 32*1024);
-pci_config_writeb(bdf, 0x5a + i, 0x33);
+pci_config_writeb(bdf, pam, 0x33);
memcpy(mem, (void*)BUILD_BIOS_TMP_ADDR, 32*1024);
clear = 1;
} else {
-pci_config_writeb(bdf, 0x5a + i, 0x33);
+pci_config_writeb(bdf, pam, 0x33);
}
}
if (clear)
memset((void*)BUILD_BIOS_TMP_ADDR, 0, 32*1024);
// Make ram from 0xf-0x10 writable
-int reg = pci_config_readb(bdf, 0x59);
-pci_config_writeb(bdf, 0x59, 0x30);
+int reg = pci_config_readb(bdf, pam0);
+pci_config_writeb(bdf, pam0, 0x30);
if (reg 0x10)
// Ram already present.
return;
@@ -64,26 +73,29 @@ make_bios_writable(void)
dprintf(3, enabling shadow ram\n);
+// at this point, staticlly alloacted variable can't written.
+// so stack should be used.
+struct pam_regs pam_regs;
// Locate chip controlling ram shadowing.
-int bdf = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441);
+int bdf = pci_find_init_device(dram_controller_tbl, pam_regs);
if (bdf 0) {
dprintf(1, Unable to unlock ram - bridge not found\n);
return;
}
-int reg = pci_config_readb(bdf, 0x59);
+int reg = pci_config_readb(bdf, pam_regs.pam0);
if (!(reg 0x10)) {
// QEMU doesn't fully implement the piix shadow capabilities -
// if ram isn't backing the bios segment when shadowing is
// disabled, the code itself wont be in memory. So, run the
// code from the high-memory flash location.
u32 pos = (u32)__make_bios_writable - BUILD_BIOS_ADDR + BIOS_SRC_ADDR;
-void (*func)(u16 bdf) = (void*)pos;
-func(bdf);
+void (*func)(u16 bdf, u32 pam0) = (void*)pos;
+func(bdf, pam_regs.pam0);
return;
}
// Ram already present - just enable writes
-__make_bios_writable(bdf);
+
[Qemu-devel] [PATCH 7/7] seabios: acpi: clean up of finding pm device.
Make it table driven to other chip set.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/acpi.c | 10 --
1 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/acpi.c b/src/acpi.c
index 32d436f..fa07c37 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -527,6 +527,13 @@ build_srat(void)
return srat;
}
+static const struct pci_device_id acpi_find_tbl[] = {
+/* PIIX4 Power Management device. */
+PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, NULL),
+
+PCI_DEVICE_END,
+};
+
struct rsdp_descriptor *RsdpAddr;
#define MAX_ACPI_TABLES 20
@@ -539,8 +546,7 @@ acpi_bios_init(void)
dprintf(3, init ACPI tables\n);
// This code is hardcoded for PIIX4 Power Management device.
-int bdf = pci_find_device(PCI_VENDOR_ID_INTEL
- , PCI_DEVICE_ID_INTEL_82371AB_3);
+int bdf = pci_find_init_device(acpi_find_tbl, NULL);
if (bdf 0)
// Device not found
return;
--
1.7.1.1
[Qemu-devel] [PATCH 4/7] seabios: smm_init: move out i440fx smram operation into dev-i440fx.c
move out i440fx smram operation into dev-i440fx.c.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/dev-i440fx.c |8
src/dev-i440fx.h |1 +
src/post.h |5 +
src/smm.c| 17 -
4 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/src/dev-i440fx.c b/src/dev-i440fx.c
index 17d42ce..c9e0c3e 100644
--- a/src/dev-i440fx.c
+++ b/src/dev-i440fx.c
@@ -26,6 +26,14 @@ void i440fx_shadow_detected(u16 bdf, void *arg)
pam_regs-pam0 = I440FX_PAM0;
}
+#define I440FX_SMRAM0x72
+
+void i440fx_smram_detected(u16 bdf, void *arg)
+{
+struct smram_regs *smram_regs = arg;
+smram_regs-smram = I440FX_SMRAM;
+}
+
/* PIIX3/PIIX4 PCI to ISA bridge */
void piix_isa_bridge_init(u16 bdf, void *arg)
{
diff --git a/src/dev-i440fx.h b/src/dev-i440fx.h
index 934e7f2..6250c5e 100644
--- a/src/dev-i440fx.h
+++ b/src/dev-i440fx.h
@@ -4,6 +4,7 @@
#include types.h // u16
void i440fx_shadow_detected(u16 bdf, void *arg);
+void i440fx_smram_detected(u16 bdf, void *arg);
void piix_isa_bridge_init(u16 bdf, void *arg);
void piix_ide_init(u16 bdf, void *arg);
void piix4_pm_init(u16 bdf, void *arg);
diff --git a/src/post.h b/src/post.h
index 2996878..c82ee8f 100644
--- a/src/post.h
+++ b/src/post.h
@@ -16,4 +16,9 @@ struct apmc_ops
void (*enable)(u16 bdf);
};
+struct smram_regs
+{
+u32 smram;
+};
+
#endif /* __POST_H */
diff --git a/src/smm.c b/src/smm.c
index baa272f..4518d95 100644
--- a/src/smm.c
+++ b/src/smm.c
@@ -81,6 +81,13 @@ static const struct pci_device_id apmc_ops_tbl[] = {
PCI_DEVICE_END,
};
+static const struct pci_device_id smram_tbl[] = {
+PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441,
+ i440fx_smram_detected),
+
+PCI_DEVICE_END,
+};
+
void
smm_init(void)
{
@@ -98,9 +105,9 @@ smm_init(void)
if (bdf 0)
// Device not found
return;
-int i440_bdf = pci_find_device(PCI_VENDOR_ID_INTEL
- , PCI_DEVICE_ID_INTEL_82441);
-if (i440_bdf 0)
+struct smram_regs smram_regs;
+int smram_bdf = pci_find_init_device(smram_tbl, smram_regs);
+if (smram_bdf 0)
return;
/* check if SMM init is already done */
@@ -108,7 +115,7 @@ smm_init(void)
return;
/* enable the SMM memory window */
-pci_config_writeb(i440_bdf, 0x72, 0x02 | 0x48);
+pci_config_writeb(smram_bdf, smram_regs.smram, 0x02 | 0x48);
/* save original memory content */
memcpy((void *)BUILD_SMM_ADDR, (void *)BUILD_SMM_INIT_ADDR,
BUILD_SMM_SIZE);
@@ -139,5 +146,5 @@ smm_init(void)
wbinvd();
/* close the SMM memory window and enable normal SMM */
-pci_config_writeb(i440_bdf, 0x72, 0x02 | 0x08);
+pci_config_writeb(smram_bdf, smram_regs.smram, 0x02 | 0x08);
}
--
1.7.1.1
[Qemu-devel] [PATCH 1/7] seabios: pci: introduce helper function to find device from table and initialize it.
introduce helper function to find device from table and initialize it.
pci_find_init_device(). This will be used later.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/pci.c | 12
src/pci.h |1 +
2 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/src/pci.c b/src/pci.c
index c54b084..611d0e2 100644
--- a/src/pci.c
+++ b/src/pci.c
@@ -203,3 +203,15 @@ int pci_init_device(const struct pci_device_id *ids, u16
bdf, void *arg)
}
return -1;
}
+
+int pci_find_init_device(const struct pci_device_id *ids, void *arg)
+{
+int bdf, max;
+
+foreachpci(bdf, max) {
+if (pci_init_device(ids, bdf, arg) == 0) {
+return bdf;
+}
+}
+return -1;
+}
diff --git a/src/pci.h b/src/pci.h
index fa6a32d..9c3108c 100644
--- a/src/pci.h
+++ b/src/pci.h
@@ -93,6 +93,7 @@ struct pci_device_id {
}
int pci_init_device(const struct pci_device_id *table, u16 bdf, void *arg);
+int pci_find_init_device(const struct pci_device_id *ids, void *arg);
// pirtable.c
void create_pirtable(void);
--
1.7.1.1
[Qemu-devel] [PATCH 0/7] abstract chipset(i440fx) specific register operation.
This patch set abstract out chipset specific operation, and spit out i440fx specific operation into dev-i440fx.c with it. Thus q35 specific register value/operation will be added easily. Isaku Yamahata (7): seabios: pci: introduce helper function to find device from table and initialize it. seabios: shadow: make device finding more generic. seabios: smm: move out piix4 specific logic to dev-i440fx.c seabios: smm_init: move out i440fx smram operation into dev-i440fx.c seabios: acpi: move acpi definitions to acpi.h from acpi.c seabios: acpi: split out piix4 pm logic. seabios: acpi: clean up of finding pm device. src/acpi.c | 102 + src/acpi.h | 81 ++ src/dev-i440fx.c | 57 ++ src/dev-i440fx.h |4 ++ src/pci.c| 12 ++ src/pci.h|1 + src/post.h | 24 + src/shadow.c | 44 +++ src/smm.c| 35 +- 9 files changed, 251 insertions(+), 109 deletions(-) create mode 100644 src/post.h
[Qemu-devel] [PATCH 5/7] seabios: acpi: move acpi definitions to acpi.h from acpi.c
Move ACPI_TABLE_HEADER_DEF and struct fadt_descriptor_rev1
from acpi.h to acpi.c for later use.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/acpi.c | 73 -
src/acpi.h | 76
2 files changed, 76 insertions(+), 73 deletions(-)
diff --git a/src/acpi.c b/src/acpi.c
index 0559443..1179570 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -19,18 +19,6 @@
/* Table structure from Linux kernel (the ACPI tables are under the
BSD license) */
-#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
-u32 signature; /* ACPI signature (4 ASCII characters) */ \
-u32 length; /* Length of table, in bytes, including header
*/ \
-u8 revision; /* ACPI Specification minor version # */ \
-u8 checksum; /* To make sum of entire table == 0 */ \
-u8 oem_id [6]; /* OEM identification */ \
-u8 oem_table_id [8]; /* OEM table identification */ \
-u32 oem_revision; /* OEM revision number */ \
-u8 asl_compiler_id [4];/* ASL compiler vendor ID */ \
-u32 asl_compiler_revision; /* ASL compiler revision number */
-
-
struct acpi_table_header /* ACPI common table header */
{
ACPI_TABLE_HEADER_DEF
@@ -65,67 +53,6 @@ struct facs_descriptor_rev1
/*
- * ACPI 1.0 Fixed ACPI Description Table (FADT)
- */
-#define FACP_SIGNATURE 0x50434146 // FACP
-struct fadt_descriptor_rev1
-{
-ACPI_TABLE_HEADER_DEF /* ACPI common table header */
-u32 firmware_ctrl; /* Physical address of FACS */
-u32 dsdt; /* Physical address of DSDT */
-u8 model; /* System Interrupt Model */
-u8 reserved1; /* Reserved */
-u16 sci_int;/* System vector of SCI interrupt */
-u32 smi_cmd;/* Port address of SMI command port */
-u8 acpi_enable;/* Value to write to smi_cmd to enable ACPI */
-u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
-u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS
state */
-u8 reserved2; /* Reserved - must be zero */
-u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg
Blk */
-u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg
Blk */
-u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg
Blk */
-u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg
Blk */
-u32 pm2_cnt_blk;/* Port address of Power Mgt 2 Control Reg Blk
*/
-u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg
Blk */
-u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0
Reg Blk */
-u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1
Reg Blk */
-u8 pm1_evt_len;/* Byte length of ports at pm1_x_evt_blk */
-u8 pm1_cnt_len;/* Byte length of ports at pm1_x_cnt_blk */
-u8 pm2_cnt_len;/* Byte Length of ports at pm2_cnt_blk */
-u8 pm_tmr_len; /* Byte Length of ports at pm_tm_blk */
-u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
-u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
-u8 gpe1_base; /* Offset in gpe model where gpe1 events start
*/
-u8 reserved3; /* Reserved */
-u16 plvl2_lat; /* Worst case HW latency to enter/exit C2
state */
-u16 plvl3_lat; /* Worst case HW latency to enter/exit C3
state */
-u16 flush_size; /* Size of area read to flush caches */
-u16 flush_stride; /* Stride used in flushing caches */
-u8 duty_offset;/* Bit location of duty cycle field in p_cnt
reg */
-u8 duty_width; /* Bit width of duty cycle field in p_cnt reg
*/
-u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM
*/
-u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS
RAM */
-u8 century;/* Index to century in RTC CMOS RAM */
-u8 reserved4; /* Reserved */
-u8 reserved4a; /* Reserved */
-u8 reserved4b; /* Reserved */
-#if 0
-u32 wb_invd : 1;/* The wbinvd instruction works properly */
-u32 wb_invd_flush : 1;/* The wbinvd flushes but does not invalidate
*/
-u32 proc_c1 : 1;/* All processors support C1 state */
-u32 plvl2_up: 1;/* C2 state works on MP system */
-u32 pwr_button : 1;/* Power button is handled as a generic
feature */
-u32 sleep_button: 1;/* Sleep button is handled as a generic
feature, or not present */
-u32 fixed_rTC : 1;/* RTC wakeup stat not in
[Qemu-devel] [PATCH 6/7] seabios: acpi: split out piix4 pm logic.
split out piix4 pm logic.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/acpi.c | 19 ++-
src/acpi.h |5 +
src/dev-i440fx.c | 15 +++
src/dev-i440fx.h |1 +
4 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/src/acpi.c b/src/acpi.c
index 1179570..32d436f 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -12,6 +12,7 @@
#include pci_ids.h // PCI_VENDOR_ID_INTEL
#include pci_regs.h // PCI_INTERRUPT_LINE
#include paravirt.h
+#include dev-i440fx.h // piix4_fadt_init
//
/* ACPI tables init */
@@ -202,11 +203,6 @@ static inline u16 cpu_to_le16(u16 x)
return x;
}
-static inline u32 cpu_to_le32(u32 x)
-{
-return x;
-}
-
static void
build_header(struct acpi_table_header *h, u32 sig, int len, u8 rev)
{
@@ -222,6 +218,14 @@ build_header(struct acpi_table_header *h, u32 sig, int
len, u8 rev)
h-checksum -= checksum(h, len);
}
+static const struct pci_device_id fadt_init_tbl[] = {
+/* PIIX4 Power Management device (for ACPI) */
+PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
+ piix4_fadt_init),
+
+PCI_DEVICE_END
+};
+
static void*
build_fadt(int bdf)
{
@@ -251,8 +255,6 @@ build_fadt(int bdf)
int pm_sci_int = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
fadt-sci_int = cpu_to_le16(pm_sci_int);
fadt-smi_cmd = cpu_to_le32(PORT_SMI_CMD);
-fadt-acpi_enable = 0xf1;
-fadt-acpi_disable = 0xf0;
fadt-pm1a_evt_blk = cpu_to_le32(PORT_ACPI_PM_BASE);
fadt-pm1a_cnt_blk = cpu_to_le32(PORT_ACPI_PM_BASE + 0x04);
fadt-pm_tmr_blk = cpu_to_le32(PORT_ACPI_PM_BASE + 0x08);
@@ -261,8 +263,7 @@ build_fadt(int bdf)
fadt-pm_tmr_len = 4;
fadt-plvl2_lat = cpu_to_le16(0xfff); // C2 state not supported
fadt-plvl3_lat = cpu_to_le16(0xfff); // C3 state not supported
-fadt-gpe0_blk = cpu_to_le32(0xafe0);
-fadt-gpe0_blk_len = 4;
+pci_init_device(fadt_init_tbl, bdf, fadt);
/* WBINVD + PROC_C1 + SLP_BUTTON + FIX_RTC */
fadt-flags = cpu_to_le32((1 0) | (1 2) | (1 5) | (1 6));
diff --git a/src/acpi.h b/src/acpi.h
index e01315a..56add07 100644
--- a/src/acpi.h
+++ b/src/acpi.h
@@ -98,4 +98,9 @@ struct fadt_descriptor_rev1
#endif
} PACKED;
+static inline u32 cpu_to_le32(u32 x)
+{
+return x;
+}
+
#endif // acpi.h
diff --git a/src/dev-i440fx.c b/src/dev-i440fx.c
index c9e0c3e..e5dd7dd 100644
--- a/src/dev-i440fx.c
+++ b/src/dev-i440fx.c
@@ -17,6 +17,7 @@
#include post.h
#include dev-i440fx.h
#include post.h
+#include acpi.h // cpu_to_le32
#define I440FX_PAM0 0x59
@@ -97,3 +98,17 @@ void piix4_apmc_detected(u16 bdf, void *arg)
ops-is_enabled = piix4_apmc_is_enabled;
ops-enable = piix4_apmc_enable;
}
+
+#define PIIX4_ACPI_ENABLE 0xf1
+#define PIIX4_ACPI_DISABLE 0xf0
+#define PIIX4_GPE0_BLK 0xafe0
+#define PIIX4_GPE0_BLK_LEN 4
+
+void piix4_fadt_init(u16 bdf, void *arg)
+{
+struct fadt_descriptor_rev1 *fadt = arg;
+fadt-acpi_enable = PIIX4_ACPI_ENABLE;
+fadt-acpi_disable = PIIX4_ACPI_DISABLE;
+fadt-gpe0_blk = cpu_to_le32(PIIX4_GPE0_BLK);
+fadt-gpe0_blk_len = PIIX4_GPE0_BLK_LEN;
+}
diff --git a/src/dev-i440fx.h b/src/dev-i440fx.h
index 6250c5e..ee89c23 100644
--- a/src/dev-i440fx.h
+++ b/src/dev-i440fx.h
@@ -9,5 +9,6 @@ void piix_isa_bridge_init(u16 bdf, void *arg);
void piix_ide_init(u16 bdf, void *arg);
void piix4_pm_init(u16 bdf, void *arg);
void piix4_apmc_detected(u16 bdf, void *arg);
+void piix4_fadt_init(u16 bdf, void *arg);
#endif // __I440FX_H
--
1.7.1.1
[Qemu-devel] [PATCH v2] pci/multi function bit: fix v582c686.c.
The file, v582c686.c, was added after the change set of
b80d4a9887fa4b6cc63f8c3a13ab2a45054d3e5c and
fecb93c45c749a4c994d8d12bdee17ce2012de9e
are created, but before the patch series was commit.
So similar fix is needed to v582c686.c.
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Michael S. Tsirkin m...@redhat.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
changes v1 - v2:
- added hw/ide/via.c
This is only compile tested.
---
hw/ide/via.c |1 -
hw/vt82c686.c |5 +
2 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/hw/ide/via.c b/hw/ide/via.c
index a403e8c..b2c7cad 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -150,7 +150,6 @@ static int vt82c686b_ide_initfn(PCIDevice *dev)
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy ATA mode */
pci_config_set_revision(pci_conf,0x06); /* Revision 0.6 */
-pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; /* header_type */
pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x00c0);
qemu_register_reset(via_reset, d);
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index a0c5747..cacc217 100644
--- a/hw/vt82c686.c
+++ b/hw/vt82c686.c
@@ -468,7 +468,6 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_ACPI);
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
pci_config_set_revision(pci_conf, 0x40);
-pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
pci_set_word(pci_conf + PCI_COMMAND, 0);
pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK |
@@ -556,8 +555,6 @@ static int vt82c686b_initfn(PCIDevice *d)
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
pci_config_set_prog_interface(pci_conf, 0x0);
pci_config_set_revision(pci_conf,0x40); /* Revision 4.0 */
-pci_conf[PCI_HEADER_TYPE] =
-PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION;
wmask = d-wmask;
for (i = 0x00; i 0xff; i++) {
@@ -575,7 +572,7 @@ int vt82c686b_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
-d = pci_create_simple(bus, devfn, VT82C686B);
+d = pci_create_simple_multifunction(bus, devfn, true, VT82C686B);
return d-devfn;
}
--
1.7.1.1
[Qemu-devel] Re: [PATCH] pci/multi function bit: fix v582c686.c.
On Mon, Jul 12, 2010 at 07:18:16PM +0800, chen huacai wrote:
I have tested, this patch is OK.
The git repository of PMON is unavailable currently, so you can get a
binary version of PMON in the attachment.
BTW, the PCI_HEADER_TYPE setting in hw/ide/via.c can also be removed.
Thank you for testing. I should have used grep -r.
I sent out updated version, so please test it again.
thanks,
On Mon, Jul 12, 2010 at 3:18 PM, Isaku Yamahata yamah...@valinux.co.jp
wrote:
The file, v582c686.c, was added after the change set of
b80d4a9887fa4b6cc63f8c3a13ab2a45054d3e5c and
fecb93c45c749a4c994d8d12bdee17ce2012de9e
are created, but before the patch series was commit.
So similar fix is needed to v582c686.c.
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Michael S. Tsirkin m...@redhat.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
This is only compile tested.
Huacai, can you please test it? Or provide me pmon_fulong2e.bin?
I wasn't able to find it, and tried the source repository,
http://www.loongson.cn/support/git/pmon, but wasn't able to clone.
$ git clone http://www.loongson.cn/support/git/pmon
Cloning into pmon...
fatal: http://www.loongson.cn/support/git/pmon/info/refs not found: did you
run git update-server-info on the server?
---
??hw/vt82c686.c | ?? ??5 +
??1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index a0c5747..cacc217 100644
--- a/hw/vt82c686.c
+++ b/hw/vt82c686.c
@@ -468,7 +468,6 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
?? ?? pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_ACPI);
?? ?? pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
?? ?? pci_config_set_revision(pci_conf, 0x40);
- ?? ??pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
?? ?? pci_set_word(pci_conf + PCI_COMMAND, 0);
?? ?? pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK |
@@ -556,8 +555,6 @@ static int vt82c686b_initfn(PCIDevice *d)
?? ?? pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
?? ?? pci_config_set_prog_interface(pci_conf, 0x0);
?? ?? pci_config_set_revision(pci_conf,0x40); /* Revision 4.0 */
- ?? ??pci_conf[PCI_HEADER_TYPE] =
- ?? ?? ?? ??PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION;
?? ?? wmask = d-wmask;
?? ?? for (i = 0x00; i 0xff; i++) {
@@ -575,7 +572,7 @@ int vt82c686b_init(PCIBus *bus, int devfn)
??{
?? ?? PCIDevice *d;
- ?? ??d = pci_create_simple(bus, devfn, VT82C686B);
+ ?? ??d = pci_create_simple_multifunction(bus, devfn, true, VT82C686B);
?? ?? return d-devfn;
??}
--
1.7.1.1
--
Huacai Chen
--
yamahata
[Qemu-devel] Re: [PATCH v2 5/5] pci_bridge: introduce pci bridge library.
On Mon, Jul 12, 2010 at 07:36:44PM +0900, Isaku Yamahata wrote:
diff --git a/hw/pci_bridge.h b/hw/pci_bridge.h
index ddb2c82..4697c7a 100644
--- a/hw/pci_bridge.h
+++ b/hw/pci_bridge.h
@@ -29,13 +29,27 @@
#include pci.h
PCIDevice *pci_bridge_get_device(PCIBus *bus);
+PCIBus *pci_bridge_get_sec_bus(PCIBridge *br);
-pcibus_t pci_bridge_get_base(PCIDevice *bridge, uint8_t type);
-pcibus_t pci_bridge_get_limit(PCIDevice *bridge, uint8_t type);
+pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type);
+pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type);
-PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool multifunction,
-uint16_t vid, uint16_t did,
-pci_map_irq_fn map_irq, const char *name);
+void pci_bridge_write_config(PCIDevice *d,
+ uint32_t address, uint32_t val, int len);
+void pci_bridge_reset_reg(PCIDevice *dev);
+void pci_bridge_reset(DeviceState *qdev);
+
+int pci_bridge_initfn(PCIDevice *pci_dev);
+int pci_bridge_exitfn(PCIDevice *pci_dev);
+
+void pci_bridge_qdev_register(PCIDeviceInfo *info);
+
+PCIBridge *pci_bridge_create(PCIBus *bus, int devfn, bool multifunction,
+ pci_map_irq_fn map_irq,
+ const char *name, const char *bus_name);
+PCIBridge *pci_bridge_create_simple(PCIBus *bus, int devfn, bool
multifunction,
+pci_map_irq_fn map_irq,
+const char *name, const char *bus_name);
The APIs leave much to be desired. _simple and regular are same? What does
_register do?
We really should just use qdev: Can't we use pci_qdev_register_many and
pci_create to create the bridge? Long term, all pci_create variants
should go and get replaced with qdev_create.
#endif /* QEMU_PCI_BRIDGE_H */
/*
diff --git a/hw/pci_internals.h b/hw/pci_internals.h
index fa844ab..6502f83 100644
--- a/hw/pci_internals.h
+++ b/hw/pci_internals.h
@@ -30,11 +30,13 @@ struct PCIBus {
int *irq_count;
};
-typedef struct {
+struct PCIBridge {
PCIDevice dev;
+
+/* private member */
PCIBus sec_bus;
-uint32_t vid;
-uint32_t did;
-} PCIBridge;
+pci_map_irq_fn map_irq;
+const char *bus_name;
+};
#endif /* QEMU_PCI_INTERNALS_H */
diff --git a/qemu-common.h b/qemu-common.h
index 3fb2f0b..d735235 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -219,6 +219,7 @@ typedef struct PCIHostState PCIHostState;
typedef struct PCIExpressHost PCIExpressHost;
typedef struct PCIBus PCIBus;
typedef struct PCIDevice PCIDevice;
+typedef struct PCIBridge PCIBridge;
typedef struct SerialState SerialState;
typedef struct IRQState *qemu_irq;
typedef struct PCMCIACardState PCMCIACardState;
--
1.7.1.1
[Qemu-devel] Re: [PATCH v2 0/5] pci: split out bridge code into pci_bridge and make it library
On Mon, Jul 12, 2010 at 07:36:39PM +0900, Isaku Yamahata wrote:
changes v1 - v2:
- introduce pci_internals.h to accomodate pci internal strcutures to
share between pci.c and pci_bridge.c
- don't make PCIBridge::bus pointer as suggested by
Michael S. Tsirkin m...@redhat.com
- rename PCIBridge::bus - PCIBridge::sec_bus
- eliminate pci_reguster_secondary_bus()/pci_unregister_secondary_bus()
- document pci bridge library functions.
- introduced pci bridge library.
I've applied patches 1-4 to make it easier to build upon.
Pushed in pci branch in my tree.
Sent comments on patch 5.
Clean up of pci host bus ans piix pci as discussed with v1
will be addressed after this patch set is accepted.
Patch description:
Now pci.c has grown. So split bridge related code into dedicated file
for further extension to pci bridge. Further clean up and pcie port emulator.
This make patch conflict less possible in future.
Isaku Yamahata (5):
pci: move out pci internal structures, PCIBus, PCIBridge, and
pci_bus_info.
pci/bridge: split out pci bridge code into pci_bridge.c from pci.c
pci_bridge: rename PCIBridge::bus - PCIBridge::sec_bus.
pci_bridge: clean up: remove pci_{register,
unregister}_secondary_bus()
pci_bridge: introduce pci bridge library.
Makefile.objs |2 +-
hw/apb_pci.c | 43 ++---
hw/dec_pci.c | 35 ++--
hw/pci.c | 207 +--
hw/pci.h |5 +-
hw/pci_bridge.c| 249
hw/pci_bridge.h| 62 +
hw/pci_internals.h | 42 +
qemu-common.h |1 +
9 files changed, 416 insertions(+), 230 deletions(-)
create mode 100644 hw/pci_bridge.c
create mode 100644 hw/pci_bridge.h
create mode 100644 hw/pci_internals.h
[Qemu-devel] Re: [PATCH v2 2/5] pci/bridge: split out pci bridge code into pci_bridge.c from pci.c
On Mon, Jul 12, 2010 at 07:36:41PM +0900, Isaku Yamahata wrote:
Move pci bridge related code into pci_bridge.c from pci.c
for further enhancement. pci.c is big enough now, so split it out.
No code change but exporting some accesser functions.
In fact, few pci bridge functions stays in pci.c.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Got conflicts starting with this patch.
Could you please rebase to my pci tree and repost patches 2-4?
---
Makefile.objs |2 +-
hw/apb_pci.c|1 +
hw/dec_pci.c|1 +
hw/pci.c| 175 +--
hw/pci.h|5 +-
hw/pci_bridge.c | 206
+++
hw/pci_bridge.h | 48 +
7 files changed, 260 insertions(+), 178 deletions(-)
create mode 100644 hw/pci_bridge.c
create mode 100644 hw/pci_bridge.h
diff --git a/Makefile.objs b/Makefile.objs
index 67f1b21..594894b 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -139,7 +139,7 @@ user-obj-y += cutils.o cache-utils.o
hw-obj-y =
hw-obj-y += vl.o loader.o
hw-obj-y += virtio.o virtio-console.o
-hw-obj-y += fw_cfg.o pci.o pci_host.o pcie_host.o
+hw-obj-y += fw_cfg.o pci.o pci_host.o pcie_host.o pci_bridge.o
hw-obj-y += watchdog.o
hw-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
hw-obj-$(CONFIG_ECC) += ecc.o
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 0ecac55..88ee4a9 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -29,6 +29,7 @@
#include sysbus.h
#include pci.h
#include pci_host.h
+#include pci_bridge.h
#include rwhandler.h
#include apb_pci.h
#include sysemu.h
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index ee49d5a..f7a9cdc 100644
--- a/hw/dec_pci.c
+++ b/hw/dec_pci.c
@@ -27,6 +27,7 @@
#include sysbus.h
#include pci.h
#include pci_host.h
+#include pci_bridge.h
/* debug DEC */
//#define DEBUG_DEC
diff --git a/hw/pci.c b/hw/pci.c
index 41227bf..737fbd2 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -23,6 +23,7 @@
*/
#include hw.h
#include pci.h
+#include pci_bridge.h
#include pci_internals.h
#include monitor.h
#include net.h
@@ -263,26 +264,6 @@ PCIBus *pci_register_bus(DeviceState *parent, const char
*name,
return bus;
}
-static void pci_register_secondary_bus(PCIBus *parent,
- PCIBus *bus,
- PCIDevice *dev,
- pci_map_irq_fn map_irq,
- const char *name)
-{
-qbus_create_inplace(bus-qbus, pci_bus_info, dev-qdev, name);
-bus-map_irq = map_irq;
-bus-parent_dev = dev;
-
-QLIST_INIT(bus-child);
-QLIST_INSERT_HEAD(parent-child, bus, sibling);
-}
-
-static void pci_unregister_secondary_bus(PCIBus *bus)
-{
-assert(QLIST_EMPTY(bus-child));
-QLIST_REMOVE(bus, sibling);
-}
-
int pci_bus_num(PCIBus *s)
{
if (!s-parent_dev)
@@ -790,75 +771,6 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
}
}
-static uint32_t pci_config_get_io_base(PCIDevice *d,
- uint32_t base, uint32_t base_upper16)
-{
-uint32_t val;
-
-val = ((uint32_t)d-config[base] PCI_IO_RANGE_MASK) 8;
-if (d-config[base] PCI_IO_RANGE_TYPE_32) {
-val |= (uint32_t)pci_get_word(d-config + base_upper16) 16;
-}
-return val;
-}
-
-static pcibus_t pci_config_get_memory_base(PCIDevice *d, uint32_t base)
-{
-return ((pcibus_t)pci_get_word(d-config + base) PCI_MEMORY_RANGE_MASK)
- 16;
-}
-
-static pcibus_t pci_config_get_pref_base(PCIDevice *d,
- uint32_t base, uint32_t upper)
-{
-pcibus_t tmp;
-pcibus_t val;
-
-tmp = (pcibus_t)pci_get_word(d-config + base);
-val = (tmp PCI_PREF_RANGE_MASK) 16;
-if (tmp PCI_PREF_RANGE_TYPE_64) {
-val |= (pcibus_t)pci_get_long(d-config + upper) 32;
-}
-return val;
-}
-
-static pcibus_t pci_bridge_get_base(PCIDevice *bridge, uint8_t type)
-{
-pcibus_t base;
-if (type PCI_BASE_ADDRESS_SPACE_IO) {
-base = pci_config_get_io_base(bridge,
- PCI_IO_BASE, PCI_IO_BASE_UPPER16);
-} else {
-if (type PCI_BASE_ADDRESS_MEM_PREFETCH) {
-base = pci_config_get_pref_base(
-bridge, PCI_PREF_MEMORY_BASE, PCI_PREF_BASE_UPPER32);
-} else {
-base = pci_config_get_memory_base(bridge, PCI_MEMORY_BASE);
-}
-}
-
-return base;
-}
-
-static pcibus_t pci_bridge_get_limit(PCIDevice *bridge, uint8_t type)
-{
-pcibus_t limit;
-if (type PCI_BASE_ADDRESS_SPACE_IO) {
-limit = pci_config_get_io_base(bridge,
- PCI_IO_LIMIT, PCI_IO_LIMIT_UPPER16);
-limit |= 0xfff; /* PCI bridge spec 3.2.5.6. */
-} else {
-if (type
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
On Mon, Jul 12, 2010 at 9:17 AM, Justin P. Mattock justinmatt...@gmail.com wrote: On 07/12/2010 12:09 AM, Michael Tokarev wrote: This looks quite similar to a problem with ext4 and O_SYNC which I reported earlier but no one cared to answer (or read?) - there: http://permalink.gmane.org/gmane.linux.file-systems/42758 (sent to qemu-devel and linux-fsdevel lists - Cc'd too). You can try a few other options, esp. cache=none and re-writing some guest files to verify. /mjt cool a solution... glad to see... no chance at a bisect with this? (getting this down too a commit or two makes things easier) Justin P. Mattock I didn't even say what kernel version I was using, sorry! Kernel 2.6.34.1+patches in stable queue for next stable release. I tried this some time ago with 2.6.33.x(don't remember which version exactly) and it had the same problem, but at the time I stopped trying thinking that it was a kvm problem. So basically there's no known(to me) good version and no, I can't bisect this because this is my production system. Anyway, I suspect this is reproducible. Am I the only one who created a virtual hd file on a Btrfs and then used it with kvm/qemu? I mean, it's not a particularly exotic test-case! -- Giangiacomo
[Qemu-devel] Re: [PATCH v2 2/5] pci/bridge: split out pci bridge code into pci_bridge.c from pci.c
On Mon, Jul 12, 2010 at 03:16:02PM +0300, Michael S. Tsirkin wrote: On Mon, Jul 12, 2010 at 07:36:41PM +0900, Isaku Yamahata wrote: Move pci bridge related code into pci_bridge.c from pci.c for further enhancement. pci.c is big enough now, so split it out. No code change but exporting some accesser functions. In fact, few pci bridge functions stays in pci.c. Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp Got conflicts starting with this patch. Could you please rebase to my pci tree and repost patches 2-4? Okay, will do tomorrow. -- yamahata
[Qemu-devel] Re: [PATCH v2 5/5] pci_bridge: introduce pci bridge library.
On Mon, Jul 12, 2010 at 03:10:00PM +0300, Michael S. Tsirkin wrote: On Mon, Jul 12, 2010 at 07:36:44PM +0900, Isaku Yamahata wrote: diff --git a/hw/pci_bridge.h b/hw/pci_bridge.h index ddb2c82..4697c7a 100644 --- a/hw/pci_bridge.h +++ b/hw/pci_bridge.h @@ -29,13 +29,27 @@ #include pci.h PCIDevice *pci_bridge_get_device(PCIBus *bus); +PCIBus *pci_bridge_get_sec_bus(PCIBridge *br); -pcibus_t pci_bridge_get_base(PCIDevice *bridge, uint8_t type); -pcibus_t pci_bridge_get_limit(PCIDevice *bridge, uint8_t type); +pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type); +pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type); -PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool multifunction, -uint16_t vid, uint16_t did, -pci_map_irq_fn map_irq, const char *name); +void pci_bridge_write_config(PCIDevice *d, + uint32_t address, uint32_t val, int len); +void pci_bridge_reset_reg(PCIDevice *dev); +void pci_bridge_reset(DeviceState *qdev); + +int pci_bridge_initfn(PCIDevice *pci_dev); +int pci_bridge_exitfn(PCIDevice *pci_dev); + +void pci_bridge_qdev_register(PCIDeviceInfo *info); + +PCIBridge *pci_bridge_create(PCIBus *bus, int devfn, bool multifunction, + pci_map_irq_fn map_irq, + const char *name, const char *bus_name); +PCIBridge *pci_bridge_create_simple(PCIBus *bus, int devfn, bool multifunction, +pci_map_irq_fn map_irq, +const char *name, const char *bus_name); The APIs leave much to be desired. _simple and regular are same? What does _register do? We really should just use qdev: Can't we use pci_qdev_register_many and pci_create to create the bridge? Long term, all pci_create variants should go and get replaced with qdev_create. If struct PCIBridge is exported, those three can be eliminated. I think it is okay to export struct PCIBridge, but it would not be a good idea to export PCIBus which is embedded in PCIBridge::sec_bus. So how should we go? - export both PCIBus and PCIBridge. - make PCIBridge::sec_bus pointer, and export PCIBridge. And kill register, create, create_simple. v1 patch. Although you rejected it, I suppose you didn't see this issue. - introduce wrapper functions to convert types. This patch. - better alternatives? -- yamahata
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
On Mon, Jul 12, 2010 at 9:09 AM, Michael Tokarev m...@tls.msk.ru wrote: This looks quite similar to a problem with ext4 and O_SYNC which I reported earlier but no one cared to answer (or read?) - there: http://permalink.gmane.org/gmane.linux.file-systems/42758 (sent to qemu-devel and linux-fsdevel lists - Cc'd too). You can try a few other options, esp. cache=none and re-writing some guest files to verify. /mjt Either way, changing to cache=none I suspect wouldn't tell me much, because if it's as slow as before, it's still unusable and if instead it's even slower, well it'd be even more unusable, so I wouldn't be able to tell the difference. What I can say for certain is that with the exact same virtual hd file, same options, same system, but on an ext3 fs there's no problem at all, on a Btrfs is not just slower, it takes ages. -- Giangiacomo
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
On Mon, Jul 12, 2010 at 03:34:44PM +0200, Giangiacomo Mariotti wrote: On Mon, Jul 12, 2010 at 9:09 AM, Michael Tokarev m...@tls.msk.ru wrote: This looks quite similar to a problem with ext4 and O_SYNC which I reported earlier but no one cared to answer (or read?) - there: http://permalink.gmane.org/gmane.linux.file-systems/42758 (sent to qemu-devel and linux-fsdevel lists - Cc'd too). You can try a few other options, esp. cache=none and re-writing some guest files to verify. /mjt Either way, changing to cache=none I suspect wouldn't tell me much, because if it's as slow as before, it's still unusable and if instead it's even slower, well it'd be even more unusable, so I wouldn't be able to tell the difference. What I can say for certain is that with the exact same virtual hd file, same options, same system, but on an ext3 fs there's no problem at all, on a Btrfs is not just slower, it takes ages. O_DIRECT support was just introduced recently, please try on the latest kernel with the normal settings (which IIRC uses O_DIRECT), that should make things suck alot less. Thanks, Josef
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
Giangiacomo Mariotti wrote: On Mon, Jul 12, 2010 at 9:09 AM, Michael Tokarev m...@tls.msk.ru wrote: This looks quite similar to a problem with ext4 and O_SYNC which I reported earlier but no one cared to answer (or read?) - there: http://permalink.gmane.org/gmane.linux.file-systems/42758 (sent to qemu-devel and linux-fsdevel lists - Cc'd too). You can try a few other options, esp. cache=none and re-writing some guest files to verify. /mjt Either way, changing to cache=none I suspect wouldn't tell me much, because if it's as slow as before, it's still unusable and if instead it's even slower, well it'd be even more unusable, so I wouldn't be able to tell the difference. Actually it's not that simple. What I can say for certain is that with the exact same virtual hd file, same options, same system, but on an ext3 fs there's no problem at all, on a Btrfs is not just slower, it takes ages. It is exactly the same with ext4 vs ext3. But only on metadata-intensitive operations (for qcow2 image). Once you allocate space, it becomes fast, and _especially_ fast with cache=none. Actually, it looks like O_SYNC (default cache mode) is _slower_ on ext4 than O_DIRECT (cache=none). (And yes, I know O_DIRECT does NOT imply O_SYNC and vise versa). /mjt
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
Josef Bacik wrote: [] O_DIRECT support was just introduced recently, please try on the latest kernel with the normal settings (which IIRC uses O_DIRECT), that should make things suck alot less. Thanks, Um. Do you mean it were introduced in BTRFS or general? :) Because, wel, O_DIRECT is here and supported since some 2.2 times... ;) /mjt
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
On Mon, Jul 12, 2010 at 05:42:04PM +0400, Michael Tokarev wrote: Josef Bacik wrote: [] O_DIRECT support was just introduced recently, please try on the latest kernel with the normal settings (which IIRC uses O_DIRECT), that should make things suck alot less. Thanks, Um. Do you mean it were introduced in BTRFS or general? :) Because, wel, O_DIRECT is here and supported since some 2.2 times... ;) Btrfs obviously. Josef
[Qemu-devel] Re: [PATCH v2 5/5] pci_bridge: introduce pci bridge library.
On Mon, Jul 12, 2010 at 10:28:24PM +0900, Isaku Yamahata wrote: On Mon, Jul 12, 2010 at 03:10:00PM +0300, Michael S. Tsirkin wrote: On Mon, Jul 12, 2010 at 07:36:44PM +0900, Isaku Yamahata wrote: diff --git a/hw/pci_bridge.h b/hw/pci_bridge.h index ddb2c82..4697c7a 100644 --- a/hw/pci_bridge.h +++ b/hw/pci_bridge.h @@ -29,13 +29,27 @@ #include pci.h PCIDevice *pci_bridge_get_device(PCIBus *bus); +PCIBus *pci_bridge_get_sec_bus(PCIBridge *br); -pcibus_t pci_bridge_get_base(PCIDevice *bridge, uint8_t type); -pcibus_t pci_bridge_get_limit(PCIDevice *bridge, uint8_t type); +pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type); +pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type); -PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool multifunction, -uint16_t vid, uint16_t did, -pci_map_irq_fn map_irq, const char *name); +void pci_bridge_write_config(PCIDevice *d, + uint32_t address, uint32_t val, int len); +void pci_bridge_reset_reg(PCIDevice *dev); +void pci_bridge_reset(DeviceState *qdev); + +int pci_bridge_initfn(PCIDevice *pci_dev); +int pci_bridge_exitfn(PCIDevice *pci_dev); + +void pci_bridge_qdev_register(PCIDeviceInfo *info); + +PCIBridge *pci_bridge_create(PCIBus *bus, int devfn, bool multifunction, + pci_map_irq_fn map_irq, + const char *name, const char *bus_name); +PCIBridge *pci_bridge_create_simple(PCIBus *bus, int devfn, bool multifunction, +pci_map_irq_fn map_irq, +const char *name, const char *bus_name); The APIs leave much to be desired. _simple and regular are same? What does _register do? We really should just use qdev: Can't we use pci_qdev_register_many and pci_create to create the bridge? Long term, all pci_create variants should go and get replaced with qdev_create. If struct PCIBridge is exported, those three can be eliminated. I think it is okay to export struct PCIBridge, but it would not be a good idea to export PCIBus which is embedded in PCIBridge::sec_bus. So how should we go? - export both PCIBus and PCIBridge. - make PCIBridge::sec_bus pointer, and export PCIBridge. And kill register, create, create_simple. v1 patch. Although you rejected it, I suppose you didn't see this issue. - introduce wrapper functions to convert types. This patch. - better alternatives? Let's export and see where this leads us. -- yamahata
[Qemu-devel] KVM Call agenda for July 13th
Please send in any agenda items you are interested in covering. Thanks, Juan.
[Qemu-devel] [PATCH] virtio-9p: getattr server implementation for 9P2000.L protocol.
From: M. Mohan Kumar mo...@in.ibm.com This is a new version of getattr patch for 9P2000.L that I posted some time ago. This version adds 3 fields to the on-the-wire data: file creation time generation number data version It also adds a bit field to indicate which fields of the structure have valid data. Usually the server fills in at least all the basic fields, but it may fill in the additional fields if possible. The server will use the bit field to tell the client which fields it has populated. Currently there is no clean way for the server to obtain these additional fields, so it sends back just the basic fields. The client (Linux kernel) patch corresponding to this is at http://sourceforge.net/mailarchive/forum.php?thread_name=20100712143815.6665.35892.stgit%40localhost.localdomainforum_name=v9fs-developer Comments welcome. SYNOPSIS size[4] Tgetattr tag[2] fid[4] request_mask[8] size[4] Rgetattr tag[2] lstat[n] DESCRIPTION The getattr transaction inquires about the file identified by fid. request_mask is a bit mask that specifies which fields of the stat structure is the client interested in. The reply will contain a machine-independent directory entry, laid out as follows: st_result_mask[8] Bit mask that indicates which fields in the stat structure have been populated by the server qid.type[1] the type of the file (directory, etc.), represented as a bit vector corresponding to the high 8 bits of the file's mode word. qid.vers[4] version number for given path qid.path[8] the file server's unique identification for the file st_mode[4] Permission and flags st_uid[4] User id of owner st_gid[4] Group ID of owner st_nlink[8] Number of hard links st_rdev[8] Device ID (if special file) st_size[8] Size, in bytes st_blksize[8] Block size for file system IO st_blocks[8] Number of file system blocks allocated st_atime_sec[8] Time of last access, seconds st_atime_nsec[8] Time of last access, nanoseconds st_mtime_sec[8] Time of last modification, seconds st_mtime_nsec[8] Time of last modification, nanoseconds st_ctime_sec[8] Time of last status change, seconds st_ctime_nsec[8] Time of last status change, nanoseconds st_btime_sec[8] Time of creation (birth) of file, seconds st_btime_nsec[8] Time of creation (birth) of file, nanoseconds st_gen[8] Inode generation st_data_version[8] Data version number request_mask and result_mask bit masks contain the following bits #define P9_STATS_MODE 0x0001ULL #define P9_STATS_NLINK 0x0002ULL #define P9_STATS_UID 0x0004ULL #define P9_STATS_GID 0x0008ULL #define P9_STATS_RDEV 0x0010ULL #define P9_STATS_ATIME 0x0020ULL #define P9_STATS_MTIME 0x0040ULL #define P9_STATS_CTIME 0x0080ULL #define P9_STATS_INO 0x0100ULL #define P9_STATS_SIZE 0x0200ULL #define P9_STATS_BLOCKS0x0400ULL #define P9_STATS_BTIME 0x0800ULL #define P9_STATS_GEN 0x1000ULL #define P9_STATS_DATA_VERSION 0x2000ULL #define P9_STATS_BASIC 0x07ffULL #define P9_STATS_ALL 0x3fffULL This patch implements the client side of getattr implementation for 9P2000.L. It introduces a new structure p9_stat_dotl for getting Linux stat information along with QID. The data layout is similar to stat structure in Linux user space with the following major differences: inode (st_ino) is not part of data. Instead qid is. device (st_dev) is not part of data because this doesn't make sense on the client. All time variables are 64 bit wide on the wire. The kernel seems to use
Re: [Qemu-devel] [PATCH v2] pci/multi function bit: fix v582c686.c.
On Mon, Jul 12, 2010 at 08:53:57PM +0900, Isaku Yamahata wrote:
The file, v582c686.c, was added after the change set of
b80d4a9887fa4b6cc63f8c3a13ab2a45054d3e5c and
fecb93c45c749a4c994d8d12bdee17ce2012de9e
are created, but before the patch series was commit.
So similar fix is needed to v582c686.c.
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Michael S. Tsirkin m...@redhat.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
changes v1 - v2:
- added hw/ide/via.c
This is only compile tested.
Thanks, applied (after doing s/v582c/vt82c/).
---
hw/ide/via.c |1 -
hw/vt82c686.c |5 +
2 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/hw/ide/via.c b/hw/ide/via.c
index a403e8c..b2c7cad 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -150,7 +150,6 @@ static int vt82c686b_ide_initfn(PCIDevice *dev)
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy ATA mode */
pci_config_set_revision(pci_conf,0x06); /* Revision 0.6 */
-pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; /* header_type */
pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x00c0);
qemu_register_reset(via_reset, d);
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index a0c5747..cacc217 100644
--- a/hw/vt82c686.c
+++ b/hw/vt82c686.c
@@ -468,7 +468,6 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_ACPI);
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
pci_config_set_revision(pci_conf, 0x40);
-pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
pci_set_word(pci_conf + PCI_COMMAND, 0);
pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK |
@@ -556,8 +555,6 @@ static int vt82c686b_initfn(PCIDevice *d)
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
pci_config_set_prog_interface(pci_conf, 0x0);
pci_config_set_revision(pci_conf,0x40); /* Revision 4.0 */
-pci_conf[PCI_HEADER_TYPE] =
-PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION;
wmask = d-wmask;
for (i = 0x00; i 0xff; i++) {
@@ -575,7 +572,7 @@ int vt82c686b_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
-d = pci_create_simple(bus, devfn, VT82C686B);
+d = pci_create_simple_multifunction(bus, devfn, true, VT82C686B);
return d-devfn;
}
--
1.7.1.1
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
[Qemu-devel] [PATCH RFC] e1000: fix access 4 bytes beyond buffer end
We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
Anthony, Alex, please review.
hw/e1000.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index 0da65f9..70aba11 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -649,7 +649,6 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
}
rdh_start = s-mac_reg[RDH];
-size += 4; // for the header
do {
if (s-mac_reg[RDH] == s-mac_reg[RDT] s-check_rxov) {
set_ics(s, 0, E1000_ICS_RXO);
@@ -663,7 +662,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size);
+desc.length = cpu_to_le16(size + 4 /* for FCS */);
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
--
1.7.2.rc0.14.g41c1c
[Qemu-devel] [PATCH RFC] e1000: secrc support
Add support for secrc field. Reportedly needed by old RHEL guests.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
hw/e1000.c | 11 ++-
1 files changed, 10 insertions(+), 1 deletions(-)
Anthony, Alex, please review.
diff --git a/hw/e1000.c b/hw/e1000.c
index 70aba11..8d87492 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -344,6 +344,15 @@ is_vlan_txd(uint32_t txd_lower)
return ((txd_lower E1000_TXD_CMD_VLE) != 0);
}
+/* FCS aka Ethernet CRC-32. We don't get it from backends and can't
+ * fill it in, just pad descriptor length by 4 bytes unless guest
+ * told us to trip it off the packet. */
+static inline int
+fcs_len(E1000State *s)
+{
+return (s-mac_reg[RCTL] E1000_RCTL_SECRC) ? 0 : 4;
+}
+
static void
xmit_seg(E1000State *s)
{
@@ -662,7 +671,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size + 4 /* for FCS */);
+desc.length = cpu_to_le16(size + fcs_len(s));
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
--
1.7.2.rc0.14.g41c1c
[Qemu-devel] [PATCH v2 00/15] pci: handle BAR mapping at PCI level
In this version, map_func is retained for compatibility, so the patch
set shouldn't break anything anymore. At least i386, Sparc64 and PPC
seem to work. The original patch is now in small pieces.
Compatibility also means that at this point I did not touch the harder
stuff (virtio-pci/MSI-X, VGA, map_func which update state). One
possible way is to change map_func to post_map_func, meaning that the
mapping is handled by pci.c but the update information is passed to
the post mapping handler which can then update coalesced_mmio, MSI-X
stuff or just the register base.
I considered a few possible alternative directions:
* Merge CPURead/WriteFunc and IOPortRead/WriteFunc. Should be doable.
The functions should be changed to a common signature. We could also
have a combined PCIRead/WriteFunc, which would use PCIDevice * instead
of void *. Perhaps it's better to do this at a later phase.
* Add pci_bar_map_ioio(PCIDevice *, int bar, int subregion,
IOPortReadFunc *, int size) and pci_bar_map_mmio(), which would do
cpu_register_memory/io (so that bus level can adjust the mappings with
later patches) This was my original motivation of the patch set, but I
think the required logic is already with this set in pci.c. However
especially pci_bar_map_mmio() seems to be tricky. See for example
macio.c, which combines several non-PCI devices to one, there the
memory functions are not available but memory index is.
* Add simple replacements (like in my original patch set) for
cpu_register_physical_memory/io(): pci_register_memory/io(). In the
macio case, non-PCI devices would not use pci_register_memory, which
would probably be OK, but ugly.
* Move BAR registration to qdev structure, something like:
static PCIDeviceInfo rtl8139_info = {
.qdev.name = rtl8139,
[cut]
.bars = (PCIBar[][]) {
[0][0] = { 0x100, PCI_BASE_ADDRESS_SPACE_IO, rtl8139_io_reads,
rtl8139_io_writes}
[1][0] = { 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY,
rtl8139_mmio_read, rtl8139_mmio_write}
};
But again the memory functions may not be so easily available, like in
pci_bar_map_mmio() case.
Comments? Would it be useful to push this?
Blue Swirl (15):
ioport: separate registration from mapping
pci: handle BAR mapping at PCI level
es1370: convert to pci_bar_map
ebus: convert to pci_bar_map
macio: convert to pci_bar_map
ne2000: convert to pci_bar_map
via: convert to pci_bar_map
piix: convert to pci_bar_map
cmd646: convert to pci_bar_map
openpic: convert to pci_bar_map
pcnet: convert to pci_bar_map
rtl8139: convert to pci_bar_map
usb-ohci: convert to pci_bar_map
usb-uhci: convert to pci_bar_map
wdt_i6300esb: convert to pci_bar_map
hw/es1370.c | 32 +--
hw/ide/cmd646.c | 149 +--
hw/ide/piix.c | 72 ++-
hw/ide/via.c | 65 +
hw/isa.h |1 +
hw/isa_mmio.c | 17 +-
hw/macio.c| 107 +++
hw/ne2000.c | 66 ++---
hw/openpic.c | 36 ++--
hw/pci.c | 166 ++--
hw/pci.h | 14 -
hw/pcnet.c| 62 ++--
hw/ppc_mac.h |5 +-
hw/ppc_newworld.c |2 +-
hw/ppc_oldworld.c |4 +-
hw/rtl8139.c | 42 +
hw/sun4u.c| 29 +++--
hw/usb-ohci.c | 10 +---
hw/usb-uhci.c | 31 +-
hw/wdt_i6300esb.c | 38 +
ioport.c | 117 +
ioport.h |6 ++
22 files changed, 616 insertions(+), 455 deletions(-)
[Qemu-devel] [PATCH 01/15] ioport: separate registration from mapping
Add I/O port registration functions which separate registration
from the mapping stage.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
ioport.c | 117 +++--
ioport.h |6 +++
2 files changed, 111 insertions(+), 12 deletions(-)
diff --git a/ioport.c b/ioport.c
index 53dd87a..54fff7e 100644
--- a/ioport.c
+++ b/ioport.c
@@ -54,29 +54,39 @@ static IOPortWriteFunc *ioport_write_table[3][MAX_IOPORTS];
static IOPortReadFunc default_ioport_readb, default_ioport_readw,
default_ioport_readl;
static IOPortWriteFunc default_ioport_writeb, default_ioport_writew,
default_ioport_writel;
+#define IO_NB_ENTRIES 256
+
+static IOPortWriteFunc *io_writes[IO_NB_ENTRIES][3];
+static IOPortReadFunc *io_reads[IO_NB_ENTRIES][3];
+static void *io_opaques[IO_NB_ENTRIES];
+static int io_sizes[IO_NB_ENTRIES];
+static char io_used[IO_NB_ENTRIES];
+
+static IOPortReadFunc * const default_read_func[3] = {
+default_ioport_readb,
+default_ioport_readw,
+default_ioport_readl
+};
+
static uint32_t ioport_read(int index, uint32_t address)
{
-static IOPortReadFunc * const default_func[3] = {
-default_ioport_readb,
-default_ioport_readw,
-default_ioport_readl
-};
IOPortReadFunc *func = ioport_read_table[index][address];
if (!func)
-func = default_func[index];
+func = default_read_func[index];
return func(ioport_opaque[address], address);
}
+static IOPortWriteFunc * const default_write_func[3] = {
+default_ioport_writeb,
+default_ioport_writew,
+default_ioport_writel
+};
+
static void ioport_write(int index, uint32_t address, uint32_t data)
{
-static IOPortWriteFunc * const default_func[3] = {
-default_ioport_writeb,
-default_ioport_writew,
-default_ioport_writel
-};
IOPortWriteFunc *func = ioport_write_table[index][address];
if (!func)
-func = default_func[index];
+func = default_write_func[index];
func(ioport_opaque[address], address, data);
}
@@ -173,6 +183,84 @@ int register_ioport_write(pio_addr_t start, int
length, int size,
return 0;
}
+static int get_free_io_mem_idx(void)
+{
+int i;
+
+for (i = 0; i IO_NB_ENTRIES; i++) {
+if (!io_used[i]) {
+io_used[i] = 1;
+return i;
+}
+}
+fprintf(stderr, RAN out out io_mem_idx, max %d !\n, IO_NB_ENTRIES);
+return -1;
+}
+
+/* io_read and io_write are arrays of functions containing the
+ function to access byte (index 0), word (index 1) and dword (index
+ 2). Functions can be omitted with a NULL function pointer. (-1) is
+ returned if error. */
+int cpu_register_io(IOPortReadFunc * const *io_read,
+IOPortWriteFunc * const *io_write,
+int size, void *opaque)
+{
+unsigned int i;
+int io_index;
+
+io_index = get_free_io_mem_idx();
+if (io_index == -1) {
+return io_index;
+}
+
+if (io_read) {
+for (i = 0; i 3; i++) {
+io_reads[io_index][i] = io_read[i];
+}
+}
+if (io_write) {
+for (i = 0; i 3; i++) {
+io_writes[io_index][i] = io_write[i];
+}
+}
+io_opaques[io_index] = opaque;
+io_sizes[io_index] = size;
+
+return io_index;
+}
+
+void cpu_unregister_io(int io_index)
+{
+unsigned int i;
+
+for (i = 0; i 3; i++) {
+io_reads[io_index][i] = NULL;
+io_writes[io_index][i] = NULL;
+}
+io_opaques[io_index] = NULL;
+io_sizes[io_index] = 0;
+io_used[io_index] = 0;
+}
+
+void cpu_map_io(pio_addr_t start, int io_index)
+{
+unsigned int i;
+
+assert(io_index = 0);
+for (i = 0; i 3; i++) {
+if (io_reads[io_index][i]) {
+register_ioport_read(start, io_sizes[io_index], 1 i,
+ io_reads[io_index][i],
+ io_opaques[io_index]);
+}
+if (io_writes[io_index][i]) {
+register_ioport_write(start, io_sizes[io_index], 1 i,
+ io_writes[io_index][i],
+ io_opaques[io_index]);
+}
+}
+}
+
void isa_unassign_ioport(pio_addr_t start, int length)
{
int i;
@@ -190,6 +278,11 @@ void isa_unassign_ioport(pio_addr_t start, int length)
}
}
+void cpu_unmap_io(pio_addr_t start, int io_index)
+{
+isa_unassign_ioport(start, io_sizes[io_index]);
+}
+
/***/
void cpu_outb(pio_addr_t addr, uint8_t val)
diff --git a/ioport.h b/ioport.h
index 3d3c8a3..4ba78ed 100644
--- a/ioport.h
+++ b/ioport.h
@@ -40,6 +40,12 @@ int register_ioport_read(pio_addr_t start, int
length, int size,
IOPortReadFunc *func, void *opaque);
int register_ioport_write(pio_addr_t start, int length, int size,
IOPortWriteFunc *func, void *opaque);
+int
[Qemu-devel] [PATCH 04/15] ebus: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/isa.h |1 +
hw/isa_mmio.c | 17 +++--
hw/sun4u.c| 29 ++---
3 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/hw/isa.h b/hw/isa.h
index aaf0272..6fba4ac 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -33,6 +33,7 @@ ISADevice *isa_create_simple(const char *name);
extern target_phys_addr_t isa_mem_base;
void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be);
+int pci_isa_mmio_init(int be);
/* dma.c */
int DMA_get_channel_mode (int nchan);
diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c
index 66bdd2c..3b2de4a 100644
--- a/hw/isa_mmio.c
+++ b/hw/isa_mmio.c
@@ -125,7 +125,7 @@ static CPUReadMemoryFunc * const isa_mmio_read_le[] = {
static int isa_mmio_iomemtype = 0;
-void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be)
+static int isa_mmio_memtype(int be)
{
if (!isa_mmio_iomemtype) {
if (be) {
@@ -138,5 +138,18 @@ void isa_mmio_init(target_phys_addr_t base,
target_phys_addr_t size, int be)
NULL);
}
}
-cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
+return isa_mmio_iomemtype;
+}
+
+void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be)
+{
+int isa;
+
+isa = isa_mmio_memtype(be);
+cpu_register_physical_memory(base, size, isa);
+}
+
+int pci_isa_mmio_init(int be)
+{
+return isa_mmio_memtype(be);
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 31c0c4c..8565243 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -517,21 +517,6 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit)
}
}
-static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
-EBUS_DPRINTF(Mapping region %d registers at % FMT_PCIBUS \n,
- region_num, addr);
-switch (region_num) {
-case 0:
-isa_mmio_init(addr, 0x100, 1);
-break;
-case 1:
-isa_mmio_init(addr, 0x80, 1);
-break;
-}
-}
-
static void dummy_isa_irq_handler(void *opaque, int n, int level)
{
}
@@ -550,6 +535,8 @@ pci_ebus_init(PCIBus *bus, int devfn)
static int
pci_ebus_init1(PCIDevice *s)
{
+int io_index;
+
isa_bus_new(s-qdev);
pci_config_set_vendor_id(s-config, PCI_VENDOR_ID_SUN);
@@ -563,10 +550,14 @@ pci_ebus_init1(PCIDevice *s)
pci_config_set_class(s-config, PCI_CLASS_BRIDGE_OTHER);
s-config[0x0D] = 0x0a; // latency_timer
-pci_register_bar(s, 0, 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY,
- ebus_mmio_mapfunc);
-pci_register_bar(s, 1, 0x80, PCI_BASE_ADDRESS_SPACE_MEMORY,
- ebus_mmio_mapfunc);
+pci_register_bar(s, 0, 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+io_index = pci_isa_mmio_init(1);
+pci_bar_map(s, 0, 0, 0, 0x100, io_index);
+
+pci_register_bar(s, 1, 0x80, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+io_index = pci_isa_mmio_init(1);
+pci_bar_map(s, 1, 0, 0, 0x80, io_index);
+
return 0;
}
--
1.7.1
[Qemu-devel] [PATCH 06/15] ne2000: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/ne2000.c | 66 +++---
1 files changed, 44 insertions(+), 22 deletions(-)
diff --git a/hw/ne2000.c b/hw/ne2000.c
index 126e7cf..2b1e1ad 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -464,6 +464,18 @@ uint32_t ne2000_ioport_read(void *opaque, uint32_t addr)
return ret;
}
+static IOPortWriteFunc * const ne2000_io_writes[] = {
+ne2000_ioport_write,
+NULL,
+NULL,
+};
+
+static IOPortReadFunc * const ne2000_io_reads[] = {
+ne2000_ioport_read,
+NULL,
+NULL,
+};
+
static inline void ne2000_mem_writeb(NE2000State *s, uint32_t addr,
uint32_t val)
{
@@ -611,6 +623,18 @@ static uint32_t ne2000_asic_ioport_readl(void
*opaque, uint32_t addr)
return ret;
}
+static IOPortWriteFunc * const ne2000_asic_io_writes[] = {
+ne2000_asic_ioport_write,
+ne2000_asic_ioport_write,
+ne2000_asic_ioport_writel,
+};
+
+static IOPortReadFunc * const ne2000_asic_io_reads[] = {
+ne2000_asic_ioport_read,
+ne2000_asic_ioport_read,
+ne2000_asic_ioport_readl,
+};
+
void ne2000_reset_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
/* nothing to do (end of reset pulse) */
@@ -623,6 +647,18 @@ uint32_t ne2000_reset_ioport_read(void *opaque,
uint32_t addr)
return 0;
}
+static IOPortWriteFunc * const ne2000_reset_io_writes[] = {
+ne2000_reset_ioport_write,
+NULL,
+NULL,
+};
+
+static IOPortReadFunc * const ne2000_reset_io_reads[] = {
+ne2000_reset_ioport_read,
+NULL,
+NULL,
+};
+
static int ne2000_post_load(void* opaque, int version_id)
{
NE2000State* s = opaque;
@@ -678,26 +714,6 @@ static const VMStateDescription vmstate_pci_ne2000 = {
/***/
/* PCI NE2000 definitions */
-static void ne2000_map(PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
-PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev);
-NE2000State *s = d-ne2000;
-
-register_ioport_write(addr, 16, 1, ne2000_ioport_write, s);
-register_ioport_read(addr, 16, 1, ne2000_ioport_read, s);
-
-register_ioport_write(addr + 0x10, 1, 1, ne2000_asic_ioport_write, s);
-register_ioport_read(addr + 0x10, 1, 1, ne2000_asic_ioport_read, s);
-register_ioport_write(addr + 0x10, 2, 2, ne2000_asic_ioport_write, s);
-register_ioport_read(addr + 0x10, 2, 2, ne2000_asic_ioport_read, s);
-register_ioport_write(addr + 0x10, 4, 4, ne2000_asic_ioport_writel, s);
-register_ioport_read(addr + 0x10, 4, 4, ne2000_asic_ioport_readl, s);
-
-register_ioport_write(addr + 0x1f, 1, 1, ne2000_reset_ioport_write, s);
-register_ioport_read(addr + 0x1f, 1, 1, ne2000_reset_ioport_read, s);
-}
-
static void ne2000_cleanup(VLANClientState *nc)
{
NE2000State *s = DO_UPCAST(NICState, nc, nc)-opaque;
@@ -718,6 +734,7 @@ static int pci_ne2000_init(PCIDevice *pci_dev)
PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev);
NE2000State *s;
uint8_t *pci_conf;
+int io_index;
pci_conf = d-dev.config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK);
@@ -726,9 +743,14 @@ static int pci_ne2000_init(PCIDevice *pci_dev)
/* TODO: RST# value should be 0. PCI spec 6.2.4 */
pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0
-pci_register_bar(d-dev, 0, 0x100,
- PCI_BASE_ADDRESS_SPACE_IO, ne2000_map);
s = d-ne2000;
+pci_register_bar(d-dev, 0, 0x100, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+io_index = cpu_register_io(ne2000_io_reads, ne2000_io_writes, 16, s);
+pci_bar_map(d-dev, 0, 0, 0, 16, io_index);
+io_index = cpu_register_io(ne2000_asic_io_reads,
ne2000_asic_io_writes, 4, s);
+pci_bar_map(d-dev, 0, 1, 0x10, 4, io_index);
+io_index = cpu_register_io(ne2000_reset_io_reads,
ne2000_reset_io_writes, 1, s);
+pci_bar_map(d-dev, 0, 2, 0x1f, 1, io_index);
s-irq = d-dev.irq[0];
qemu_macaddr_default_if_unset(s-c.macaddr);
--
1.7.1
[Qemu-devel] [PATCH 02/15] pci: handle BAR mapping at PCI level
Move IOIO and MMIO BAR mapping to pci.c.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pci.c | 166 --
hw/pci.h | 14 +-
2 files changed, 121 insertions(+), 59 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index a3c2873..2234717 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -735,19 +735,28 @@ static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus,
static void pci_unregister_io_regions(PCIDevice *pci_dev)
{
PCIIORegion *r;
-int i;
+PCIIOSubRegion *s;
+int i, j;
for(i = 0; i PCI_NUM_REGIONS; i++) {
r = pci_dev-io_regions[i];
if (!r-size || r-addr == PCI_BAR_UNMAPPED)
continue;
-if (r-type == PCI_BASE_ADDRESS_SPACE_IO) {
-isa_unassign_ioport(r-addr, r-filtered_size);
-} else {
-cpu_register_physical_memory(pci_to_cpu_addr(pci_dev-bus,
- r-addr),
- r-filtered_size,
- IO_MEM_UNASSIGNED);
+
+for (j = 0; j PCI_NUM_SUBREGIONS; j++) {
+s = r-subregions[j];
+
+if (!s-size) {
+continue;
+}
+if (r-type == PCI_BASE_ADDRESS_SPACE_IO) {
+isa_unassign_ioport(r-addr + s-offset, s-filtered_size);
+} else {
+cpu_register_physical_memory(pci_to_cpu_addr(pci_dev-bus,
+ r-addr + s-offset),
+ s-filtered_size,
+ IO_MEM_UNASSIGNED);
+}
}
}
}
@@ -789,7 +798,6 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
r = pci_dev-io_regions[region_num];
r-addr = PCI_BAR_UNMAPPED;
r-size = size;
-r-filtered_size = size;
r-type = type;
r-map_func = map_func;
@@ -808,6 +816,25 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
pci_set_long(pci_dev-wmask + addr, wmask 0x);
pci_set_long(pci_dev-cmask + addr, 0x);
}
+pci_bar_map(pci_dev, region_num, 0, 0, size, -1);
+}
+
+void pci_bar_map(PCIDevice *pci_dev, int region_num, int subregion_num,
+ pcibus_t offset, pcibus_t size, int ix)
+{
+PCIIOSubRegion *s;
+
+if ((unsigned int)region_num = PCI_NUM_REGIONS ||
+(unsigned int)subregion_num = PCI_NUM_SUBREGIONS) {
+return;
+}
+
+s = pci_dev-io_regions[region_num].subregions[subregion_num];
+
+s-offset = offset;
+s-size = size;
+s-filtered_size = size;
+s-ix = ix;
}
static uint32_t pci_config_get_io_base(PCIDevice *d,
@@ -982,8 +1009,9 @@ static pcibus_t pci_bar_address(PCIDevice *d,
static void pci_update_mappings(PCIDevice *d)
{
PCIIORegion *r;
-int i;
-pcibus_t new_addr, filtered_size;
+PCIIOSubRegion *s;
+int i, j;
+pcibus_t bar_addr, new_addr, filtered_size;
for(i = 0; i PCI_NUM_REGIONS; i++) {
r = d-io_regions[i];
@@ -992,54 +1020,81 @@ static void pci_update_mappings(PCIDevice *d)
if (!r-size)
continue;
-new_addr = pci_bar_address(d, i, r-type, r-size);
+bar_addr = pci_bar_address(d, i, r-type, r-size);
-/* bridge filtering */
-filtered_size = r-size;
-if (new_addr != PCI_BAR_UNMAPPED) {
-pci_bridge_filter(d, new_addr, filtered_size, r-type);
-}
+for (j = 0; j PCI_NUM_SUBREGIONS; j++) {
+s = r-subregions[j];
-/* This bar isn't changed */
-if (new_addr == r-addr filtered_size == r-filtered_size)
-continue;
+/* this subregion isn't registered */
+if (!s-size) {
+continue;
+}
+
+new_addr = bar_addr + s-offset;
-/* now do the real mapping */
-if (r-addr != PCI_BAR_UNMAPPED) {
-if (r-type PCI_BASE_ADDRESS_SPACE_IO) {
-int class;
-/* NOTE: specific hack for IDE in PC case:
- only one byte must be mapped. */
-class = pci_get_word(d-config + PCI_CLASS_DEVICE);
-if (class == 0x0101 r-size == 4) {
-isa_unassign_ioport(r-addr + 2, 1);
+/* bridge filtering */
+filtered_size = s-size;
+if (bar_addr != PCI_BAR_UNMAPPED) {
+pci_bridge_filter(d, new_addr, filtered_size, r-type);
+}
+
+/* this subregion hasn't changed */
+if (bar_addr == r-addr new_addr == bar_addr + s-offset
+filtered_size == s-filtered_size) {
+continue;
+}
+/* now do the real mapping */
+if (r-addr != PCI_BAR_UNMAPPED) {
+if (r-type PCI_BASE_ADDRESS_SPACE_IO) {
+int class;
+
[Qemu-devel] [PATCH 12/15] rtl8139: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/rtl8139.c | 42 --
1 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index 441f0a9..18721dd 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -3269,28 +3269,17 @@ static const VMStateDescription vmstate_rtl8139 = {
/***/
/* PCI RTL8139 definitions */
-static void rtl8139_mmio_map(PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
-RTL8139State *s = DO_UPCAST(RTL8139State, dev, pci_dev);
-
-cpu_register_physical_memory(addr + 0, 0x100, s-rtl8139_mmio_io_addr);
-}
-
-static void rtl8139_ioport_map(PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
-RTL8139State *s = DO_UPCAST(RTL8139State, dev, pci_dev);
-
-register_ioport_write(addr, 0x100, 1, rtl8139_ioport_writeb, s);
-register_ioport_read( addr, 0x100, 1, rtl8139_ioport_readb, s);
-
-register_ioport_write(addr, 0x100, 2, rtl8139_ioport_writew, s);
-register_ioport_read( addr, 0x100, 2, rtl8139_ioport_readw, s);
+static IOPortWriteFunc * const rtl8139_io_writes[] = {
+rtl8139_ioport_writeb,
+rtl8139_ioport_writew,
+rtl8139_ioport_writel,
+};
-register_ioport_write(addr, 0x100, 4, rtl8139_ioport_writel, s);
-register_ioport_read( addr, 0x100, 4, rtl8139_ioport_readl, s);
-}
+static IOPortReadFunc * const rtl8139_io_reads[] = {
+rtl8139_ioport_readb,
+rtl8139_ioport_readw,
+rtl8139_ioport_readl,
+};
static CPUReadMemoryFunc * const rtl8139_mmio_read[3] = {
rtl8139_mmio_readb,
@@ -3353,6 +3342,7 @@ static int pci_rtl8139_init(PCIDevice *dev)
{
RTL8139State * s = DO_UPCAST(RTL8139State, dev, dev);
uint8_t *pci_conf;
+int io_index;
pci_conf = s-dev.config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK);
@@ -3371,11 +3361,11 @@ static int pci_rtl8139_init(PCIDevice *dev)
s-rtl8139_mmio_io_addr =
cpu_register_io_memory(rtl8139_mmio_read, rtl8139_mmio_write, s);
-pci_register_bar(s-dev, 0, 0x100,
- PCI_BASE_ADDRESS_SPACE_IO, rtl8139_ioport_map);
-
-pci_register_bar(s-dev, 1, 0x100,
- PCI_BASE_ADDRESS_SPACE_MEMORY, rtl8139_mmio_map);
+pci_register_bar(s-dev, 0, 0x100, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+io_index = cpu_register_io(rtl8139_io_reads, rtl8139_io_writes, 0x100, s);
+pci_bar_map(s-dev, 0, 0, 0, 0x100, io_index);
+pci_register_bar(s-dev, 1, 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+pci_bar_map(s-dev, 1, 0, 0, 0x100, s-rtl8139_mmio_io_addr);
qemu_macaddr_default_if_unset(s-conf.macaddr);
--
1.7.1
[Qemu-devel] [PATCH 03/15] es1370: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/es1370.c | 32 +++-
1 files changed, 15 insertions(+), 17 deletions(-)
diff --git a/hw/es1370.c b/hw/es1370.c
index 40cb48c..df6b4d1 100644
--- a/hw/es1370.c
+++ b/hw/es1370.c
@@ -906,23 +906,17 @@ static void es1370_adc_callback (void *opaque, int avail)
es1370_run_channel (s, ADC_CHANNEL, avail);
}
-static void es1370_map (PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-ES1370State *s = DO_UPCAST (ES1370State, dev, pci_dev);
-
-(void) region_num;
-(void) size;
-(void) type;
-
-register_ioport_write (addr, 0x40 * 4, 1, es1370_writeb, s);
-register_ioport_write (addr, 0x40 * 2, 2, es1370_writew, s);
-register_ioport_write (addr, 0x40, 4, es1370_writel, s);
+static IOPortWriteFunc * const es1370_writes[] = {
+es1370_writeb,
+es1370_writew,
+es1370_writel,
+};
-register_ioport_read (addr, 0x40 * 4, 1, es1370_readb, s);
-register_ioport_read (addr, 0x40 * 2, 2, es1370_readw, s);
-register_ioport_read (addr, 0x40, 4, es1370_readl, s);
-}
+static IOPortReadFunc * const es1370_reads[] = {
+es1370_readb,
+es1370_readw,
+es1370_readl,
+};
static const VMStateDescription vmstate_es1370_channel = {
.name = es1370_channel,
@@ -997,6 +991,7 @@ static int es1370_initfn (PCIDevice *dev)
{
ES1370State *s = DO_UPCAST (ES1370State, dev, dev);
uint8_t *c = s-dev.config;
+int io_index;
pci_config_set_vendor_id (c, PCI_VENDOR_ID_ENSONIQ);
pci_config_set_device_id (c, PCI_DEVICE_ID_ENSONIQ_ES1370);
@@ -1023,7 +1018,10 @@ static int es1370_initfn (PCIDevice *dev)
c[PCI_MIN_GNT] = 0x0c;
c[PCI_MAX_LAT] = 0x80;
-pci_register_bar (s-dev, 0, 256, PCI_BASE_ADDRESS_SPACE_IO, es1370_map);
+pci_register_bar(s-dev, 0, 256, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+io_index = cpu_register_io(es1370_reads, es1370_writes, 256, s);
+pci_bar_map(s-dev, 0, 0, 0, 256, io_index);
+
qemu_register_reset (es1370_on_reset, s);
AUD_register_card (es1370, s-card);
--
1.7.1
[Qemu-devel] [PATCH 13/15] usb-ohci: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/usb-ohci.c | 10 ++
1 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index c60fd8d..992400e 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -1717,13 +1717,6 @@ typedef struct {
OHCIState state;
} OHCIPCIState;
-static void ohci_mapfunc(PCIDevice *pci_dev, int i,
-pcibus_t addr, pcibus_t size, int type)
-{
-OHCIPCIState *ohci = DO_UPCAST(OHCIPCIState, pci_dev, pci_dev);
-cpu_register_physical_memory(addr, size, ohci-state.mem);
-}
-
static int usb_ohci_initfn_pci(struct PCIDevice *dev)
{
OHCIPCIState *ohci = DO_UPCAST(OHCIPCIState, pci_dev, dev);
@@ -1742,7 +1735,8 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev)
/* TODO: avoid cast below by using dev */
pci_register_bar((struct PCIDevice *)ohci, 0, 256,
- PCI_BASE_ADDRESS_SPACE_MEMORY, ohci_mapfunc);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+pci_bar_map((struct PCIDevice *)ohci, 0, 0, 256, 0, ohci-state.mem);
return 0;
}
--
1.7.1
[Qemu-devel] [PATCH 05/15] macio: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/macio.c| 107
hw/ppc_mac.h |5 +-
hw/ppc_newworld.c |2 +-
hw/ppc_oldworld.c |4 +-
4 files changed, 39 insertions(+), 79 deletions(-)
diff --git a/hw/macio.c b/hw/macio.c
index 789ca55..8717bc0 100644
--- a/hw/macio.c
+++ b/hw/macio.c
@@ -27,83 +27,16 @@
#include pci.h
#include escc.h
-typedef struct macio_state_t macio_state_t;
-struct macio_state_t {
-int is_oldworld;
-int pic_mem_index;
-int dbdma_mem_index;
-int cuda_mem_index;
-int escc_mem_index;
-void *nvram;
-int nb_ide;
-int ide_mem_index[4];
-};
-
-static void macio_map (PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
-macio_state_t *macio_state;
-int i;
-
-macio_state = (macio_state_t *)(pci_dev + 1);
-if (macio_state-pic_mem_index = 0) {
-if (macio_state-is_oldworld) {
-/* Heathrow PIC */
-cpu_register_physical_memory(addr + 0x0, 0x1000,
- macio_state-pic_mem_index);
-} else {
-/* OpenPIC */
-cpu_register_physical_memory(addr + 0x4, 0x4,
- macio_state-pic_mem_index);
-}
-}
-if (macio_state-dbdma_mem_index = 0) {
-cpu_register_physical_memory(addr + 0x08000, 0x1000,
- macio_state-dbdma_mem_index);
-}
-if (macio_state-escc_mem_index = 0) {
-cpu_register_physical_memory(addr + 0x13000, ESCC_SIZE 4,
- macio_state-escc_mem_index);
-}
-if (macio_state-cuda_mem_index = 0) {
-cpu_register_physical_memory(addr + 0x16000, 0x2000,
- macio_state-cuda_mem_index);
-}
-for (i = 0; i macio_state-nb_ide; i++) {
-if (macio_state-ide_mem_index[i] = 0) {
-cpu_register_physical_memory(addr + 0x1f000 + (i * 0x1000), 0x1000,
- macio_state-ide_mem_index[i]);
-}
-}
-if (macio_state-nvram != NULL)
-macio_nvram_map(macio_state-nvram, addr + 0x6);
-}
-
void macio_init (PCIBus *bus, int device_id, int is_oldworld, int
pic_mem_index,
- int dbdma_mem_index, int cuda_mem_index, void *nvram,
- int nb_ide, int *ide_mem_index, int escc_mem_index)
+ int dbdma_mem_index, int cuda_mem_index, int nvram_size,
+ int nvram_mem_index, int nb_ide, int *ide_mem_index,
+ int escc_mem_index)
{
PCIDevice *d;
-macio_state_t *macio_state;
int i;
-d = pci_register_device(bus, macio,
-sizeof(PCIDevice) + sizeof(macio_state_t),
--1, NULL, NULL);
-macio_state = (macio_state_t *)(d + 1);
-macio_state-is_oldworld = is_oldworld;
-macio_state-pic_mem_index = pic_mem_index;
-macio_state-dbdma_mem_index = dbdma_mem_index;
-macio_state-cuda_mem_index = cuda_mem_index;
-macio_state-escc_mem_index = escc_mem_index;
-macio_state-nvram = nvram;
-if (nb_ide 4)
-nb_ide = 4;
-macio_state-nb_ide = nb_ide;
-for (i = 0; i nb_ide; i++)
-macio_state-ide_mem_index[i] = ide_mem_index[i];
-for (; i 4; i++)
-macio_state-ide_mem_index[i] = -1;
+d = pci_register_device(bus, macio, sizeof(PCIDevice), -1, NULL, NULL);
+
/* Note: this code is strongly inspirated from the corresponding code
in PearPC */
@@ -113,6 +46,32 @@ void macio_init (PCIBus *bus, int device_id, int
is_oldworld, int pic_mem_index,
d-config[0x3d] = 0x01; // interrupt on pin 1
-pci_register_bar(d, 0, 0x8,
- PCI_BASE_ADDRESS_SPACE_MEMORY, macio_map);
+pci_register_bar(d, 0, 0x8, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+if (pic_mem_index = 0) {
+if (is_oldworld) {
+/* Heathrow PIC */
+pci_bar_map(d, 0, 0, 0x1000, 0, pic_mem_index);
+} else {
+/* OpenPIC */
+pci_bar_map(d, 0, 0, 0x4, 0x4, pic_mem_index);
+}
+}
+if (dbdma_mem_index = 0) {
+pci_bar_map(d, 0, 1, 0x8000, 0x1000, dbdma_mem_index);
+}
+if (escc_mem_index = 0) {
+pci_bar_map(d, 0, 2, 0x13000, ESCC_SIZE 4, escc_mem_index);
+}
+if (cuda_mem_index = 0) {
+pci_bar_map(d, 0, 3, 0x16000, 0x2000, cuda_mem_index);
+}
+for (i = 0; i nb_ide; i++) {
+if (ide_mem_index[i] = 0) {
+pci_bar_map(d, 0, 4 + i, 0x1f000 + (i * 0x1000), 0x1000,
+ide_mem_index[i]);
+}
+}
+if (nvram_mem_index = 0) {
+pci_bar_map(d, 0, 4 + nb_ide, 0x6, nvram_size, nvram_mem_index);
+}
}
diff --git a/hw/ppc_mac.h b/hw/ppc_mac.h
index
[Qemu-devel] [PATCH 15/15] wdt_i6300esb: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/wdt_i6300esb.c | 38 ++
1 files changed, 14 insertions(+), 24 deletions(-)
diff --git a/hw/wdt_i6300esb.c b/hw/wdt_i6300esb.c
index 46e1df8..24409ec 100644
--- a/hw/wdt_i6300esb.c
+++ b/hw/wdt_i6300esb.c
@@ -342,29 +342,17 @@ static void i6300esb_mem_writel(void *vp,
target_phys_addr_t addr, uint32_t val)
}
}
-static void i6300esb_map(PCIDevice *dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
-static CPUReadMemoryFunc * const mem_read[3] = {
-i6300esb_mem_readb,
-i6300esb_mem_readw,
-i6300esb_mem_readl,
-};
-static CPUWriteMemoryFunc * const mem_write[3] = {
-i6300esb_mem_writeb,
-i6300esb_mem_writew,
-i6300esb_mem_writel,
-};
-I6300State *d = DO_UPCAST(I6300State, dev, dev);
-int io_mem;
-
-i6300esb_debug(addr = %FMT_PCIBUS, size = %FMT_PCIBUS, type = %d\n,
- addr, size, type);
+static CPUReadMemoryFunc * const mem_read[3] = {
+i6300esb_mem_readb,
+i6300esb_mem_readw,
+i6300esb_mem_readl,
+};
-io_mem = cpu_register_io_memory(mem_read, mem_write, d);
-cpu_register_physical_memory (addr, 0x10, io_mem);
-/* qemu_register_coalesced_mmio (addr, 0x10); ? */
-}
+static CPUWriteMemoryFunc * const mem_write[3] = {
+i6300esb_mem_writeb,
+i6300esb_mem_writew,
+i6300esb_mem_writel,
+};
static const VMStateDescription vmstate_i6300esb = {
.name = i6300esb_wdt,
@@ -393,6 +381,7 @@ static int i6300esb_init(PCIDevice *dev)
{
I6300State *d = DO_UPCAST(I6300State, dev, dev);
uint8_t *pci_conf;
+int io_mem;
d-reboot_enabled = 1;
d-clock_scale = CLOCK_SCALE_1KHZ;
@@ -412,8 +401,9 @@ static int i6300esb_init(PCIDevice *dev)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_ESB_9);
pci_config_set_class(pci_conf, PCI_CLASS_SYSTEM_OTHER);
-pci_register_bar(d-dev, 0, 0x10,
-PCI_BASE_ADDRESS_SPACE_MEMORY, i6300esb_map);
+pci_register_bar(d-dev, 0, 0x10, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+io_mem = cpu_register_io_memory(mem_read, mem_write, d);
+pci_bar_map(d-dev, 0, 0, 0, 0x10, io_mem);
return 0;
}
--
1.7.1
[Qemu-devel] [PATCH 07/15] via: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/ide/via.c | 65 -
1 files changed, 41 insertions(+), 24 deletions(-)
diff --git a/hw/ide/via.c b/hw/ide/via.c
index b2c7cad..36901b3 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -70,32 +70,35 @@ static void bmdma_writeb(void *opaque, uint32_t
addr, uint32_t val)
}
}
-static void bmdma_map(PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, pci_dev);
-int i;
+static IOPortWriteFunc * const bmdma_cmd_io_writes[] = {
+bmdma_cmd_writeb,
+NULL,
+NULL,
+};
-for(i = 0;i 2; i++) {
-BMDMAState *bm = d-bmdma[i];
-d-bus[i].bmdma = bm;
-bm-bus = d-bus+i;
-qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
+static IOPortWriteFunc * const bmdma_io_writes[] = {
+bmdma_writeb,
+NULL,
+NULL,
+};
-register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
+static IOPortReadFunc * const bmdma_io_reads[] = {
+bmdma_readb,
+NULL,
+NULL,
+};
-register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm);
-register_ioport_read(addr, 4, 1, bmdma_readb, bm);
+static IOPortWriteFunc * const bmdma_addr_writes[] = {
+bmdma_addr_writeb,
+bmdma_addr_writew,
+bmdma_addr_writel,
+};
-register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm);
-register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm);
-register_ioport_write(addr + 4, 4, 2, bmdma_addr_writew, bm);
-register_ioport_read(addr + 4, 4, 2, bmdma_addr_readw, bm);
-register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
-register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
-addr += 8;
-}
-}
+static IOPortReadFunc * const bmdma_addr_reads[] = {
+bmdma_addr_readb,
+bmdma_addr_readw,
+bmdma_addr_readl,
+};
static void via_reset(void *opaque)
{
@@ -144,6 +147,8 @@ static int vt82c686b_ide_initfn(PCIDevice *dev)
{
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);;
uint8_t *pci_conf = d-dev.config;
+unsigned int i;
+int io_index;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_VIA);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_IDE);
@@ -153,8 +158,20 @@ static int vt82c686b_ide_initfn(PCIDevice *dev)
pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x00c0);
qemu_register_reset(via_reset, d);
-pci_register_bar((PCIDevice *)d, 4, 0x10,
- PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
+pci_register_bar((PCIDevice *)d, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+for (i = 0; i 2; i++) {
+BMDMAState *bm = d-bmdma[i];
+
+d-bus[i].bmdma = bm;
+bm-bus = d-bus + i;
+qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
+io_index = cpu_register_io(bmdma_io_reads, bmdma_cmd_io_writes, 1, bm);
+pci_bar_map(d-dev, 4, i * 3 + 0, i * 8 + 0, 1, io_index);
+io_index = cpu_register_io(bmdma_io_reads, bmdma_io_writes, 3, bm);
+pci_bar_map(d-dev, 4, i * 3 + 1, i * 8 + 1, 3, io_index);
+io_index = cpu_register_io(bmdma_addr_reads, bmdma_addr_writes, 4, bm);
+pci_bar_map(d-dev, 4, i * 3 + 2, i * 8 + 4, 4, io_index);
+}
vmstate_register(dev-qdev, 0, vmstate_ide_pci, d);
--
1.7.1
[Qemu-devel] [PATCH 10/15] openpic: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/openpic.c | 36 +---
1 files changed, 5 insertions(+), 31 deletions(-)
diff --git a/hw/openpic.c b/hw/openpic.c
index 01bf15f..3f97afd 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -1013,34 +1013,6 @@ static CPUReadMemoryFunc * const openpic_read[] = {
openpic_readl,
};
-static void openpic_map(PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-openpic_t *opp;
-
-DPRINTF(Map OpenPIC\n);
-opp = (openpic_t *)pci_dev;
-/* Global registers */
-DPRINTF(Register OPENPIC gbl %08x = %08x\n,
-addr + 0x1000, addr + 0x1000 + 0x100);
-/* Timer registers */
-DPRINTF(Register OPENPIC timer %08x = %08x\n,
-addr + 0x1100, addr + 0x1100 + 0x40 * MAX_TMR);
-/* Interrupt source registers */
-DPRINTF(Register OPENPIC src %08x = %08x\n,
-addr + 0x1, addr + 0x1 + 0x20 * (OPENPIC_EXT_IRQ + 2));
-/* Per CPU registers */
-DPRINTF(Register OPENPIC dst %08x = %08x\n,
-addr + 0x2, addr + 0x2 + 0x1000 * MAX_CPU);
-cpu_register_physical_memory(addr, 0x4, opp-mem_index);
-#if 0 // Don't implement ISU for now
-opp_io_memory = cpu_register_io_memory(openpic_src_read,
- openpic_src_write);
-cpu_register_physical_memory(isu_base, 0x20 * (EXT_IRQ + 2),
- opp_io_memory);
-#endif
-}
-
static void openpic_save_IRQ_queue(QEMUFile* f, IRQ_queue_t *q)
{
unsigned int i;
@@ -1198,12 +1170,14 @@ qemu_irq *openpic_init (PCIBus *bus, int
*pmem_index, int nb_cpus,
/* Register I/O spaces */
pci_register_bar((PCIDevice *)opp, 0, 0x4,
- PCI_BASE_ADDRESS_SPACE_MEMORY, openpic_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
} else {
opp = qemu_mallocz(sizeof(openpic_t));
}
-opp-mem_index = cpu_register_io_memory(openpic_read,
-openpic_write, opp);
+opp-mem_index = cpu_register_io_memory(openpic_read, openpic_write, opp);
+if (bus) {
+pci_bar_map((PCIDevice *)opp, 0, 0, 0x4, 0, opp-mem_index);
+}
//isu_base = 0xFFFC;
opp-nb_cpus = nb_cpus;
--
1.7.1
[Qemu-devel] [PATCH 08/15] piix: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/ide/piix.c | 72 +++-
1 files changed, 45 insertions(+), 27 deletions(-)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 07483e8..959e061 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -68,32 +68,35 @@ static void bmdma_writeb(void *opaque, uint32_t
addr, uint32_t val)
}
}
-static void bmdma_map(PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, pci_dev);
-int i;
+static IOPortWriteFunc * const bmdma_cmd_io_writes[] = {
+bmdma_cmd_writeb,
+NULL,
+NULL,
+};
-for(i = 0;i 2; i++) {
-BMDMAState *bm = d-bmdma[i];
-d-bus[i].bmdma = bm;
-bm-bus = d-bus+i;
-qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
+static IOPortWriteFunc * const bmdma_io_writes[] = {
+bmdma_writeb,
+NULL,
+NULL,
+};
-register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
+static IOPortReadFunc * const bmdma_io_reads[] = {
+bmdma_readb,
+NULL,
+NULL,
+};
-register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm);
-register_ioport_read(addr, 4, 1, bmdma_readb, bm);
+static IOPortWriteFunc * const bmdma_addr_writes[] = {
+bmdma_addr_writeb,
+bmdma_addr_writew,
+bmdma_addr_writel,
+};
-register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm);
-register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm);
-register_ioport_write(addr + 4, 4, 2, bmdma_addr_writew, bm);
-register_ioport_read(addr + 4, 4, 2, bmdma_addr_readw, bm);
-register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
-register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
-addr += 8;
-}
-}
+static IOPortReadFunc * const bmdma_addr_reads[] = {
+bmdma_addr_readb,
+bmdma_addr_readw,
+bmdma_addr_readl,
+};
static void piix3_reset(void *opaque)
{
@@ -119,13 +122,28 @@ static void piix3_reset(void *opaque)
static int pci_piix_ide_initfn(PCIIDEState *d)
{
uint8_t *pci_conf = d-dev.config;
+unsigned int i;
+int io_index;
pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
qemu_register_reset(piix3_reset, d);
-pci_register_bar(d-dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
+pci_register_bar(d-dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+for (i = 0; i 2; i++) {
+BMDMAState *bm = d-bmdma[i];
+
+d-bus[i].bmdma = bm;
+bm-bus = d-bus + i;
+qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
+io_index = cpu_register_io(bmdma_io_reads, bmdma_cmd_io_writes, 1, bm);
+pci_bar_map(d-dev, 4, i * 3 + 0, i * 8 + 0, 1, io_index);
+io_index = cpu_register_io(bmdma_io_reads, bmdma_io_writes, 3, bm);
+pci_bar_map(d-dev, 4, i * 3 + 1, i * 8 + 1, 3, io_index);
+io_index = cpu_register_io(bmdma_addr_reads, bmdma_addr_writes, 4, bm);
+pci_bar_map(d-dev, 4, i * 3 + 2, i * 8 + 4, 4, io_index);
+}
vmstate_register(d-dev.qdev, 0, vmstate_ide_pci, d);
--
1.7.1
[Qemu-devel] [PATCH 11/15] pcnet: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/pcnet.c | 62 +--
1 files changed, 30 insertions(+), 32 deletions(-)
diff --git a/hw/pcnet.c b/hw/pcnet.c
index 5e75930..deb6f6a 100644
--- a/hw/pcnet.c
+++ b/hw/pcnet.c
@@ -1615,6 +1615,18 @@ static uint32_t pcnet_aprom_readb(void *opaque,
uint32_t addr)
return val;
}
+static IOPortWriteFunc * const pcnet_aprom_writes[] = {
+pcnet_aprom_writeb,
+NULL,
+NULL,
+};
+
+static IOPortReadFunc * const pcnet_aprom_reads[] = {
+pcnet_aprom_readb,
+NULL,
+NULL,
+};
+
void pcnet_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
{
PCNetState *s = opaque;
@@ -1726,24 +1738,17 @@ static uint32_t pcnet_ioport_readl(void
*opaque, uint32_t addr)
return val;
}
-static void pcnet_ioport_map(PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
-PCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev, pci_dev)-state;
-
-#ifdef PCNET_DEBUG_IO
-printf(pcnet_ioport_map addr=0x%04FMT_PCIBUS size=0x%04FMT_PCIBUS\n,
- addr, size);
-#endif
-
-register_ioport_write(addr, 16, 1, pcnet_aprom_writeb, d);
-register_ioport_read(addr, 16, 1, pcnet_aprom_readb, d);
+static IOPortWriteFunc * const pcnet_ioport_writes[] = {
+NULL,
+pcnet_ioport_writew,
+pcnet_ioport_writel,
+};
-register_ioport_write(addr + 0x10, 0x10, 2, pcnet_ioport_writew, d);
-register_ioport_read(addr + 0x10, 0x10, 2, pcnet_ioport_readw, d);
-register_ioport_write(addr + 0x10, 0x10, 4, pcnet_ioport_writel, d);
-register_ioport_read(addr + 0x10, 0x10, 4, pcnet_ioport_readl, d);
-}
+static IOPortReadFunc * const pcnet_ioport_reads[] = {
+NULL,
+pcnet_ioport_readw,
+pcnet_ioport_readl,
+};
static void pcnet_mmio_writeb(void *opaque, target_phys_addr_t addr,
uint32_t val)
{
@@ -1915,19 +1920,6 @@ static CPUReadMemoryFunc * const pcnet_mmio_read[] = {
pcnet_mmio_readl
};
-static void pcnet_mmio_map(PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-PCIPCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev, pci_dev);
-
-#ifdef PCNET_DEBUG_IO
-printf(pcnet_mmio_map addr=0x%08FMT_PCIBUS 0x%08FMT_PCIBUS\n,
- addr, size);
-#endif
-
-cpu_register_physical_memory(addr, PCNET_PNPMMIO_SIZE,
d-state.mmio_index);
-}
-
static void pci_physical_memory_write(void *dma_opaque,
target_phys_addr_t addr,
uint8_t *buf, int len, int do_bswap)
{
@@ -1971,6 +1963,7 @@ static int pci_pcnet_init(PCIDevice *pci_dev)
PCIPCNetState *d = DO_UPCAST(PCIPCNetState, pci_dev, pci_dev);
PCNetState *s = d-state;
uint8_t *pci_conf;
+int io_index;
#if 0
printf(sizeof(RMD)=%d, sizeof(TMD)=%d\n,
@@ -2010,10 +2003,15 @@ static int pci_pcnet_init(PCIDevice *pci_dev)
/* TODO: use pci_dev, avoid cast below. */
pci_register_bar((PCIDevice *)d, 0, PCNET_IOPORT_SIZE,
- PCI_BASE_ADDRESS_SPACE_IO, pcnet_ioport_map);
+ PCI_BASE_ADDRESS_SPACE_IO, NULL);
+io_index = cpu_register_io(pcnet_aprom_reads, pcnet_aprom_writes, 16, s);
+pci_bar_map((PCIDevice *)d, 0, 0, 0, 16, io_index);
+io_index = cpu_register_io(pcnet_ioport_reads, pcnet_ioport_writes, 16, s);
+pci_bar_map((PCIDevice *)d, 0, 1, 16, 16, io_index);
pci_register_bar((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE,
- PCI_BASE_ADDRESS_SPACE_MEMORY, pcnet_mmio_map);
+ PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+pci_bar_map((PCIDevice *)d, 1, 0, 0, PCNET_PNPMMIO_SIZE, s-mmio_index);
s-irq = pci_dev-irq[0];
s-phys_mem_read = pci_physical_memory_read;
--
1.7.1
[Qemu-devel] [PATCH 14/15] usb-uhci: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/usb-uhci.c | 31 +++
1 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 1d83400..2e1f5ee 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1088,23 +1088,22 @@ static void uhci_frame_timer(void *opaque)
qemu_mod_timer(s-frame_timer, s-expire_time);
}
-static void uhci_map(PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-UHCIState *s = (UHCIState *)pci_dev;
-
-register_ioport_write(addr, 32, 2, uhci_ioport_writew, s);
-register_ioport_read(addr, 32, 2, uhci_ioport_readw, s);
-register_ioport_write(addr, 32, 4, uhci_ioport_writel, s);
-register_ioport_read(addr, 32, 4, uhci_ioport_readl, s);
-register_ioport_write(addr, 32, 1, uhci_ioport_writeb, s);
-register_ioport_read(addr, 32, 1, uhci_ioport_readb, s);
-}
+static IOPortWriteFunc * const uhci_io_writes[] = {
+uhci_ioport_writeb,
+uhci_ioport_writew,
+uhci_ioport_writel,
+};
+
+static IOPortReadFunc * const uhci_io_reads[] = {
+uhci_ioport_readb,
+uhci_ioport_readw,
+uhci_ioport_readl,
+};
static int usb_uhci_common_initfn(UHCIState *s)
{
uint8_t *pci_conf = s-dev.config;
-int i;
+int i, io_index;
pci_conf[PCI_REVISION_ID] = 0x01; // revision number
pci_conf[PCI_CLASS_PROG] = 0x00;
@@ -1126,9 +1125,9 @@ static int usb_uhci_common_initfn(UHCIState *s)
/* Use region 4 for consistency with real hardware. BSD guests seem
to rely on this. */
-pci_register_bar(s-dev, 4, 0x20,
- PCI_BASE_ADDRESS_SPACE_IO, uhci_map);
-
+pci_register_bar(s-dev, 4, 0x20, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+io_index = cpu_register_io(uhci_io_reads, uhci_io_writes, 32, s);
+pci_bar_map(s-dev, 4, 0, 0, 32, io_index);
return 0;
}
--
1.7.1
Re: [Qemu-devel] [PATCH 04/15] ebus: convert to pci_bar_map
2010/7/12 Blue Swirl blauwir...@gmail.com:
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/isa.h | 1 +
hw/isa_mmio.c | 17 +++--
hw/sun4u.c | 29 ++---
3 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/hw/isa.h b/hw/isa.h
index aaf0272..6fba4ac 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -33,6 +33,7 @@ ISADevice *isa_create_simple(const char *name);
extern target_phys_addr_t isa_mem_base;
void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be);
+int pci_isa_mmio_init(int be);
/* dma.c */
int DMA_get_channel_mode (int nchan);
diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c
index 66bdd2c..3b2de4a 100644
--- a/hw/isa_mmio.c
+++ b/hw/isa_mmio.c
@@ -125,7 +125,7 @@ static CPUReadMemoryFunc * const isa_mmio_read_le[] = {
static int isa_mmio_iomemtype = 0;
-void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be)
+static int isa_mmio_memtype(int be)
{
if (!isa_mmio_iomemtype) {
if (be) {
@@ -138,5 +138,18 @@ void isa_mmio_init(target_phys_addr_t base,
target_phys_addr_t size, int be)
NULL);
}
}
- cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
+ return isa_mmio_iomemtype;
+}
+
+void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be)
+{
+ int isa;
+
+ isa = isa_mmio_memtype(be);
+ cpu_register_physical_memory(base, size, isa);
+}
+
+int pci_isa_mmio_init(int be)
+{
+ return isa_mmio_memtype(be);
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 31c0c4c..8565243 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -517,21 +517,6 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit)
}
}
-static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
- EBUS_DPRINTF(Mapping region %d registers at % FMT_PCIBUS \n,
- region_num, addr);
- switch (region_num) {
- case 0:
- isa_mmio_init(addr, 0x100, 1);
- break;
- case 1:
- isa_mmio_init(addr, 0x80, 1);
- break;
- }
-}
-
static void dummy_isa_irq_handler(void *opaque, int n, int level)
{
}
@@ -550,6 +535,8 @@ pci_ebus_init(PCIBus *bus, int devfn)
static int
pci_ebus_init1(PCIDevice *s)
{
+ int io_index;
+
isa_bus_new(s-qdev);
pci_config_set_vendor_id(s-config, PCI_VENDOR_ID_SUN);
@@ -563,10 +550,14 @@ pci_ebus_init1(PCIDevice *s)
pci_config_set_class(s-config, PCI_CLASS_BRIDGE_OTHER);
s-config[0x0D] = 0x0a; // latency_timer
- pci_register_bar(s, 0, 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY,
- ebus_mmio_mapfunc);
- pci_register_bar(s, 1, 0x80, PCI_BASE_ADDRESS_SPACE_MEMORY,
- ebus_mmio_mapfunc);
+ pci_register_bar(s, 0, 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+ io_index = pci_isa_mmio_init(1);
+ pci_bar_map(s, 0, 0, 0, 0x100, io_index);
+
+ pci_register_bar(s, 1, 0x80, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+ io_index = pci_isa_mmio_init(1);
+ pci_bar_map(s, 1, 0, 0, 0x80, io_index);
Are these well-known constants?
+
return 0;
}
--
1.7.1
--
Regards,
Artyom Tarasenko
solaris/sparc under qemu blog: http://tyom.blogspot.com/
[Qemu-devel] [PATCH 09/15] cmd646: convert to pci_bar_map
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/ide/cmd646.c | 149 ++-
1 files changed, 92 insertions(+), 57 deletions(-)
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index ff80dd5..ec080e0 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -44,29 +44,29 @@
static void cmd646_update_irq(PCIIDEState *d);
-static void ide_map(PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, pci_dev);
-IDEBus *bus;
-
-if (region_num = 3) {
-bus = d-bus[(region_num 1)];
-if (region_num 1) {
-register_ioport_read(addr + 2, 1, 1, ide_status_read, bus);
-register_ioport_write(addr + 2, 1, 1, ide_cmd_write, bus);
-} else {
-register_ioport_write(addr, 8, 1, ide_ioport_write, bus);
-register_ioport_read(addr, 8, 1, ide_ioport_read, bus);
-
-/* data ports */
-register_ioport_write(addr, 2, 2, ide_data_writew, bus);
-register_ioport_read(addr, 2, 2, ide_data_readw, bus);
-register_ioport_write(addr, 4, 4, ide_data_writel, bus);
-register_ioport_read(addr, 4, 4, ide_data_readl, bus);
-}
-}
-}
+static IOPortWriteFunc * const ide_cmd_writes[] = {
+ide_cmd_write,
+NULL,
+NULL,
+};
+
+static IOPortReadFunc * const ide_status_reads[] = {
+ide_status_read,
+NULL,
+NULL,
+};
+
+static IOPortWriteFunc * const ide_ioport_writes[] = {
+ide_ioport_write,
+ide_data_writew,
+ide_data_writel,
+};
+
+static IOPortReadFunc * const ide_ioport_reads[] = {
+ide_ioport_read,
+ide_data_readw,
+ide_data_readl,
+};
static uint32_t bmdma_readb_common(PCIIDEState *pci_dev, BMDMAState *bm,
uint32_t addr)
@@ -159,35 +159,41 @@ static void bmdma_writeb_1(void *opaque,
uint32_t addr, uint32_t val)
bmdma_writeb_common(pci_dev, bm, addr, val);
}
-static void bmdma_map(PCIDevice *pci_dev, int region_num,
-pcibus_t addr, pcibus_t size, int type)
-{
-PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, pci_dev);
-int i;
+static IOPortWriteFunc * const bmdma_io_writes_0[] = {
+bmdma_writeb_0,
+NULL,
+NULL,
+};
-for(i = 0;i 2; i++) {
-BMDMAState *bm = d-bmdma[i];
-d-bus[i].bmdma = bm;
-bm-bus = d-bus+i;
-qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
+static IOPortReadFunc * const bmdma_io_reads_0[] = {
+bmdma_readb_0,
+NULL,
+NULL,
+};
-if (i == 0) {
-register_ioport_write(addr, 4, 1, bmdma_writeb_0, d);
-register_ioport_read(addr, 4, 1, bmdma_readb_0, d);
-} else {
-register_ioport_write(addr, 4, 1, bmdma_writeb_1, d);
-register_ioport_read(addr, 4, 1, bmdma_readb_1, d);
-}
+static IOPortWriteFunc * const bmdma_io_writes_1[] = {
+bmdma_writeb_1,
+NULL,
+NULL,
+};
-register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm);
-register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm);
-register_ioport_write(addr + 4, 4, 2, bmdma_addr_writew, bm);
-register_ioport_read(addr + 4, 4, 2, bmdma_addr_readw, bm);
-register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
-register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
-addr += 8;
-}
-}
+static IOPortReadFunc * const bmdma_io_reads_1[] = {
+bmdma_readb_1,
+NULL,
+NULL,
+};
+
+static IOPortWriteFunc * const bmdma_addr_writes[] = {
+bmdma_addr_writeb,
+bmdma_addr_writew,
+bmdma_addr_writel,
+};
+
+static IOPortReadFunc * const bmdma_addr_reads[] = {
+bmdma_addr_readb,
+bmdma_addr_readw,
+bmdma_addr_readl,
+};
/* XXX: call it also when the MRDMODE is changed from the PCI config
registers */
@@ -232,6 +238,8 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
uint8_t *pci_conf = d-dev.config;
qemu_irq *irq;
+unsigned int i;
+int io_index;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CMD);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_CMD_646);
@@ -247,11 +255,38 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
pci_conf[0x51] |= 0x08; /* enable IDE1 */
}
-pci_register_bar(dev, 0, 0x8, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
-pci_register_bar(dev, 1, 0x4, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
-pci_register_bar(dev, 2, 0x8, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
-pci_register_bar(dev, 3, 0x4, PCI_BASE_ADDRESS_SPACE_IO, ide_map);
-pci_register_bar(dev, 4, 0x10, PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
+pci_register_bar(dev, 0, 8, PCI_BASE_ADDRESS_SPACE_IO, NULL);
+io_index = cpu_register_io(ide_ioport_reads, ide_ioport_writes,
8, d-bus[0]);
+
Re: [Qemu-devel] [PATCH 04/15] ebus: convert to pci_bar_map
On Mon, Jul 12, 2010 at 7:03 PM, Artyom Tarasenko
atar4q...@googlemail.com wrote:
2010/7/12 Blue Swirl blauwir...@gmail.com:
Use pci_bar_map() instead of a mapping function.
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/isa.h | 1 +
hw/isa_mmio.c | 17 +++--
hw/sun4u.c | 29 ++---
3 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/hw/isa.h b/hw/isa.h
index aaf0272..6fba4ac 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -33,6 +33,7 @@ ISADevice *isa_create_simple(const char *name);
extern target_phys_addr_t isa_mem_base;
void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int
be);
+int pci_isa_mmio_init(int be);
/* dma.c */
int DMA_get_channel_mode (int nchan);
diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c
index 66bdd2c..3b2de4a 100644
--- a/hw/isa_mmio.c
+++ b/hw/isa_mmio.c
@@ -125,7 +125,7 @@ static CPUReadMemoryFunc * const isa_mmio_read_le[] = {
static int isa_mmio_iomemtype = 0;
-void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be)
+static int isa_mmio_memtype(int be)
{
if (!isa_mmio_iomemtype) {
if (be) {
@@ -138,5 +138,18 @@ void isa_mmio_init(target_phys_addr_t base,
target_phys_addr_t size, int be)
NULL);
}
}
- cpu_register_physical_memory(base, size, isa_mmio_iomemtype);
+ return isa_mmio_iomemtype;
+}
+
+void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be)
+{
+ int isa;
+
+ isa = isa_mmio_memtype(be);
+ cpu_register_physical_memory(base, size, isa);
+}
+
+int pci_isa_mmio_init(int be)
+{
+ return isa_mmio_memtype(be);
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 31c0c4c..8565243 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -517,21 +517,6 @@ void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit)
}
}
-static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
- pcibus_t addr, pcibus_t size, int type)
-{
- EBUS_DPRINTF(Mapping region %d registers at % FMT_PCIBUS \n,
- region_num, addr);
- switch (region_num) {
- case 0:
- isa_mmio_init(addr, 0x100, 1);
- break;
- case 1:
- isa_mmio_init(addr, 0x80, 1);
- break;
- }
-}
-
static void dummy_isa_irq_handler(void *opaque, int n, int level)
{
}
@@ -550,6 +535,8 @@ pci_ebus_init(PCIBus *bus, int devfn)
static int
pci_ebus_init1(PCIDevice *s)
{
+ int io_index;
+
isa_bus_new(s-qdev);
pci_config_set_vendor_id(s-config, PCI_VENDOR_ID_SUN);
@@ -563,10 +550,14 @@ pci_ebus_init1(PCIDevice *s)
pci_config_set_class(s-config, PCI_CLASS_BRIDGE_OTHER);
s-config[0x0D] = 0x0a; // latency_timer
- pci_register_bar(s, 0, 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY,
- ebus_mmio_mapfunc);
- pci_register_bar(s, 1, 0x80, PCI_BASE_ADDRESS_SPACE_MEMORY,
- ebus_mmio_mapfunc);
+ pci_register_bar(s, 0, 0x100, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+ io_index = pci_isa_mmio_init(1);
+ pci_bar_map(s, 0, 0, 0, 0x100, io_index);
+
+ pci_register_bar(s, 1, 0x80, PCI_BASE_ADDRESS_SPACE_MEMORY, NULL);
+ io_index = pci_isa_mmio_init(1);
+ pci_bar_map(s, 1, 0, 0, 0x80, io_index);
Are these well-known constants?
IIRC I picked them from device tree range sizes:
ranges:
0010..82010810..f000.0100.0014..82010814..f100.0080
It's a bit annoying to repeat the constants, but this is a simple case
where the subregion size is equal to the whole BAR size.
[Qemu-devel] [PATCH 0/8] vlan cleanup
This series removes the vlan stuff without mercy. I've tried to make the steps as small as possible, but the last one is huge. I did some basic tests and networking is still working, so reviews are welcome :-D A next step would be to rename VLANClientState and other structures to more proper names. Regards, Miguel --- Miguel Di Ciurcio Filho (8): vlan cleanup: update documentation vlan cleanup: update options vlan cleanup: do not depend on socket and dump vlan cleanup: do not build socket and dump vlan cleanup: remove socket.h and socket.c vlan cleanup: remove dump.h and dump.c vlan cleanup: remove legacy monitor commands vlan cleanup: remove usage of VLANState Makefile.objs|2 - hw/qdev-properties.c | 39 hw/qdev.c|2 - hw/qdev.h|5 - hw/xen_devconfig.c |8 +- hw/xen_nic.c |1 - net.c| 425 +++-- net.h| 12 - net/dump.c | 159 -- net/dump.h | 33 --- net/slirp.c | 54 ++ net/slirp.h |3 +- net/socket.c | 573 -- net/socket.h | 33 --- net/tap.c|9 +- net/tap.h|2 +- net/vde.c|8 +- net/vde.h|2 +- qemu-common.h|1 - qemu-doc.texi| 24 +-- qemu-monitor.hx | 36 +--- qemu-options.hx | 120 ++- 22 files changed, 89 insertions(+), 1462 deletions(-) delete mode 100644 net/dump.c delete mode 100644 net/dump.h delete mode 100644 net/socket.c delete mode 100644 net/socket.h
[Qemu-devel] [PATCH 1/8] vlan cleanup: update documentation
---
qemu-doc.texi | 24 +++-
1 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index e2c8e56..d5bf318 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -624,19 +624,7 @@ qemu linux2.img -hdb nbd:unix:/tmp/my_socket
@section Network emulation
QEMU can simulate several network cards (PCI or ISA cards on the PC
-target) and can connect them to an arbitrary number of Virtual Local
-Area Networks (VLANs). Host TAP devices can be connected to any QEMU
-VLAN. VLAN can be connected between separate instances of QEMU to
-simulate large networks. For simpler usage, a non privileged user mode
-network stack can replace the TAP device to have a basic network
-connection.
-
-...@subsection VLANs
-
-QEMU simulates several VLANs. A VLAN can be symbolised as a virtual
-connection between several network devices. These devices can be for
-example QEMU virtual Ethernet cards or virtual Host ethernet devices
-(TAP devices).
+target) and can connect them to an arbitrary number of host devices.
@subsection Using TAP network interfaces
@@ -672,7 +660,7 @@ network). The virtual network configuration is the
following:
@example
- QEMU VLAN -- Firewall/DHCP server - Internet
+ QEMU -- Firewall/DHCP server - Internet
| (10.0.2.2)
|
DNS server (10.0.2.3)
@@ -700,12 +688,6 @@ When using the @option{-redir} option, TCP or UDP
connections can be
redirected from the host to the guest. It allows for example to
redirect X11, telnet or SSH connections.
-...@subsection Connecting VLANs between QEMU instances
-
-Using the @option{-net socket} option, it is possible to make VLANs
-that span several QEMU instances. See @ref{sec_invocation} to have a
-basic example.
-
@node direct_linux_boot
@section Direct Linux Boot
@@ -794,7 +776,7 @@ Network adapter that supports CDC ethernet and RNDIS
protocols. @var{options}
specifies NIC options as with @code{-net nic,}...@var{options} (see
description).
For instance, user-mode networking can be used with
@example
-qemu [...OPTIONS...] -net user,vlan=0 -usbdevice net:vlan=0
+qemu [...OPTIONS...] -net user -usbdevice net
@end example
Currently this cannot be used in machines that support PCI NICs.
@item bt[:@var{hci-type}]
--
1.7.1
[Qemu-devel] [PATCH 5/8] vlan cleanup: remove socket.h and socket.c
---
net/socket.c | 573 --
net/socket.h | 33
2 files changed, 0 insertions(+), 606 deletions(-)
diff --git a/net/socket.c b/net/socket.c
deleted file mode 100644
index 1c4e153..000
--- a/net/socket.c
+++ /dev/null
@@ -1,573 +0,0 @@
-/*
- * QEMU System Emulator
- *
- * Copyright (c) 2003-2008 Fabrice Bellard
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the Software), to
deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-#include net/socket.h
-
-#include config-host.h
-
-#include net.h
-#include qemu-char.h
-#include qemu-common.h
-#include qemu-error.h
-#include qemu-option.h
-#include qemu_socket.h
-
-typedef struct NetSocketState {
-VLANClientState nc;
-int fd;
-int state; /* 0 = getting length, 1 = getting data */
-unsigned int index;
-unsigned int packet_len;
-uint8_t buf[4096];
-struct sockaddr_in dgram_dst; /* contains inet host and port destination
iff connectionless (SOCK_DGRAM) */
-} NetSocketState;
-
-typedef struct NetSocketListenState {
-VLANState *vlan;
-char *model;
-char *name;
-int fd;
-} NetSocketListenState;
-
-/* XXX: we consider we can send the whole packet without blocking */
-static ssize_t net_socket_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
-{
-NetSocketState *s = DO_UPCAST(NetSocketState, nc, nc);
-uint32_t len;
-len = htonl(size);
-
-send_all(s-fd, (const uint8_t *)len, sizeof(len));
-return send_all(s-fd, buf, size);
-}
-
-static ssize_t net_socket_receive_dgram(VLANClientState *nc, const uint8_t
*buf, size_t size)
-{
-NetSocketState *s = DO_UPCAST(NetSocketState, nc, nc);
-
-return sendto(s-fd, (const void *)buf, size, 0,
- (struct sockaddr *)s-dgram_dst, sizeof(s-dgram_dst));
-}
-
-static void net_socket_send(void *opaque)
-{
-NetSocketState *s = opaque;
-int size, err;
-unsigned l;
-uint8_t buf1[4096];
-const uint8_t *buf;
-
-size = recv(s-fd, (void *)buf1, sizeof(buf1), 0);
-if (size 0) {
-err = socket_error();
-if (err != EWOULDBLOCK)
-goto eoc;
-} else if (size == 0) {
-/* end of connection */
-eoc:
-qemu_set_fd_handler(s-fd, NULL, NULL, NULL);
-closesocket(s-fd);
-return;
-}
-buf = buf1;
-while (size 0) {
-/* reassemble a packet from the network */
-switch(s-state) {
-case 0:
-l = 4 - s-index;
-if (l size)
-l = size;
-memcpy(s-buf + s-index, buf, l);
-buf += l;
-size -= l;
-s-index += l;
-if (s-index == 4) {
-/* got length */
-s-packet_len = ntohl(*(uint32_t *)s-buf);
-s-index = 0;
-s-state = 1;
-}
-break;
-case 1:
-l = s-packet_len - s-index;
-if (l size)
-l = size;
-if (s-index + l = sizeof(s-buf)) {
-memcpy(s-buf + s-index, buf, l);
-} else {
-fprintf(stderr, serious error: oversized packet received,
-connection terminated.\n);
-s-state = 0;
-goto eoc;
-}
-
-s-index += l;
-buf += l;
-size -= l;
-if (s-index = s-packet_len) {
-qemu_send_packet(s-nc, s-buf, s-packet_len);
-s-index = 0;
-s-state = 0;
-}
-break;
-}
-}
-}
-
-static void net_socket_send_dgram(void *opaque)
-{
-NetSocketState *s = opaque;
-int size;
-
-size = recv(s-fd, (void *)s-buf, sizeof(s-buf), 0);
-if (size 0)
-return;
-if (size == 0) {
-/* end of connection */
-qemu_set_fd_handler(s-fd, NULL, NULL, NULL);
-return;
-}
-qemu_send_packet(s-nc, s-buf, size);
-}
-
-static int
[Qemu-devel] [PATCH 3/8] vlan cleanup: do not depend on socket and dump
---
net.c | 42 --
1 files changed, 0 insertions(+), 42 deletions(-)
diff --git a/net.c b/net.c
index 8ddf872..addd167 100644
--- a/net.c
+++ b/net.c
@@ -26,8 +26,6 @@
#include config-host.h
#include net/tap.h
-#include net/socket.h
-#include net/dump.h
#include net/slirp.h
#include net/vde.h
#include net/util.h
@@ -988,30 +986,6 @@ static const struct {
#endif /* _WIN32 */
{ /* end of list */ }
},
-}, {
-.type = socket,
-.init = net_init_socket,
-.desc = {
-NET_COMMON_PARAMS_DESC,
-{
-.name = fd,
-.type = QEMU_OPT_STRING,
-.help = file descriptor of an already opened socket,
-}, {
-.name = listen,
-.type = QEMU_OPT_STRING,
-.help = port number, and optional hostname, to listen on,
-}, {
-.name = connect,
-.type = QEMU_OPT_STRING,
-.help = port number, and optional hostname, to connect to,
-}, {
-.name = mcast,
-.type = QEMU_OPT_STRING,
-.help = UDP multicast address and port number,
-},
-{ /* end of list */ }
-},
#ifdef CONFIG_VDE
}, {
.type = vde,
@@ -1038,22 +1012,6 @@ static const struct {
{ /* end of list */ }
},
#endif
-}, {
-.type = dump,
-.init = net_init_dump,
-.desc = {
-NET_COMMON_PARAMS_DESC,
-{
-.name = len,
-.type = QEMU_OPT_SIZE,
-.help = per-packet size limit (64k default),
-}, {
-.name = file,
-.type = QEMU_OPT_STRING,
-.help = dump file path (default is qemu-vlan0.pcap),
-},
-{ /* end of list */ }
-},
},
{ /* end of list */ }
};
--
1.7.1
[Qemu-devel] [PATCH 6/8] vlan cleanup: remove dump.h and dump.c
---
net/dump.c | 159
net/dump.h | 33
2 files changed, 0 insertions(+), 192 deletions(-)
diff --git a/net/dump.c b/net/dump.c
deleted file mode 100644
index 6db7ecf..000
--- a/net/dump.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * QEMU System Emulator
- *
- * Copyright (c) 2003-2008 Fabrice Bellard
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the Software), to
deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include dump.h
-#include qemu-common.h
-#include sysemu.h
-#include qemu-error.h
-#include qemu-log.h
-
-typedef struct DumpState {
-VLANClientState nc;
-int fd;
-int pcap_caplen;
-} DumpState;
-
-#define PCAP_MAGIC 0xa1b2c3d4
-
-struct pcap_file_hdr {
-uint32_t magic;
-uint16_t version_major;
-uint16_t version_minor;
-int32_t thiszone;
-uint32_t sigfigs;
-uint32_t snaplen;
-uint32_t linktype;
-};
-
-struct pcap_sf_pkthdr {
-struct {
-int32_t tv_sec;
-int32_t tv_usec;
-} ts;
-uint32_t caplen;
-uint32_t len;
-};
-
-static ssize_t dump_receive(VLANClientState *nc, const uint8_t *buf, size_t
size)
-{
-DumpState *s = DO_UPCAST(DumpState, nc, nc);
-struct pcap_sf_pkthdr hdr;
-int64_t ts;
-int caplen;
-
-/* Early return in case of previous error. */
-if (s-fd 0) {
-return size;
-}
-
-ts = muldiv64(qemu_get_clock(vm_clock), 100, get_ticks_per_sec());
-caplen = size s-pcap_caplen ? s-pcap_caplen : size;
-
-hdr.ts.tv_sec = ts / 100;
-hdr.ts.tv_usec = ts % 100;
-hdr.caplen = caplen;
-hdr.len = size;
-if (write(s-fd, hdr, sizeof(hdr)) != sizeof(hdr) ||
-write(s-fd, buf, caplen) != caplen) {
-qemu_log(-net dump write error - stop dump\n);
-close(s-fd);
-s-fd = -1;
-}
-
-return size;
-}
-
-static void dump_cleanup(VLANClientState *nc)
-{
-DumpState *s = DO_UPCAST(DumpState, nc, nc);
-
-close(s-fd);
-}
-
-static NetClientInfo net_dump_info = {
-.type = NET_CLIENT_TYPE_DUMP,
-.size = sizeof(DumpState),
-.receive = dump_receive,
-.cleanup = dump_cleanup,
-};
-
-static int net_dump_init(VLANState *vlan, const char *device,
- const char *name, const char *filename, int len)
-{
-struct pcap_file_hdr hdr;
-VLANClientState *nc;
-DumpState *s;
-int fd;
-
-fd = open(filename, O_CREAT | O_WRONLY | O_BINARY, 0644);
-if (fd 0) {
-error_report(-net dump: can't open %s, filename);
-return -1;
-}
-
-hdr.magic = PCAP_MAGIC;
-hdr.version_major = 2;
-hdr.version_minor = 4;
-hdr.thiszone = 0;
-hdr.sigfigs = 0;
-hdr.snaplen = len;
-hdr.linktype = 1;
-
-if (write(fd, hdr, sizeof(hdr)) sizeof(hdr)) {
-error_report(-net dump write error: %s, strerror(errno));
-close(fd);
-return -1;
-}
-
-nc = qemu_new_net_client(net_dump_info, vlan, NULL, device, name);
-
-snprintf(nc-info_str, sizeof(nc-info_str),
- dump to %s (len=%d), filename, len);
-
-s = DO_UPCAST(DumpState, nc, nc);
-
-s-fd = fd;
-s-pcap_caplen = len;
-
-return 0;
-}
-
-int net_init_dump(QemuOpts *opts, Monitor *mon, const char *name, VLANState
*vlan)
-{
-int len;
-const char *file;
-char def_file[128];
-
-assert(vlan);
-
-file = qemu_opt_get(opts, file);
-if (!file) {
-snprintf(def_file, sizeof(def_file), qemu-vlan%d.pcap, vlan-id);
-file = def_file;
-}
-
-len = qemu_opt_get_size(opts, len, 65536);
-
-return net_dump_init(vlan, dump, name, file, len);
-}
diff --git a/net/dump.h b/net/dump.h
deleted file mode 100644
index fdc91ad..000
--- a/net/dump.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * QEMU System Emulator
- *
- * Copyright (c) 2003-2008 Fabrice Bellard
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the
[Qemu-devel] [PATCH 7/8] vlan cleanup: remove legacy monitor commands
---
net.c | 60 ---
net.h |2 -
qemu-monitor.hx | 28 -
3 files changed, 0 insertions(+), 90 deletions(-)
diff --git a/net.c b/net.c
index addd167..2c1c50f 100644
--- a/net.c
+++ b/net.c
@@ -1095,66 +1095,6 @@ int net_client_init(Monitor *mon, QemuOpts *opts, int
is_netdev)
return -1;
}
-static int net_host_check_device(const char *device)
-{
-int i;
-const char *valid_param_list[] = { tap, socket, dump
-#ifdef CONFIG_SLIRP
- ,user
-#endif
-#ifdef CONFIG_VDE
- ,vde
-#endif
-};
-for (i = 0; i sizeof(valid_param_list) / sizeof(char *); i++) {
-if (!strncmp(valid_param_list[i], device,
- strlen(valid_param_list[i])))
-return 1;
-}
-
-return 0;
-}
-
-void net_host_device_add(Monitor *mon, const QDict *qdict)
-{
-const char *device = qdict_get_str(qdict, device);
-const char *opts_str = qdict_get_try_str(qdict, opts);
-QemuOpts *opts;
-
-if (!net_host_check_device(device)) {
-monitor_printf(mon, invalid host network device %s\n, device);
-return;
-}
-
-opts = qemu_opts_parse(qemu_net_opts, opts_str ? opts_str : , 0);
-if (!opts) {
-return;
-}
-
-qemu_opt_set(opts, type, device);
-
-if (net_client_init(mon, opts, 0) 0) {
-monitor_printf(mon, adding host network device %s failed\n, device);
-}
-}
-
-void net_host_device_remove(Monitor *mon, const QDict *qdict)
-{
-VLANClientState *vc;
-int vlan_id = qdict_get_int(qdict, vlan_id);
-const char *device = qdict_get_str(qdict, device);
-
-vc = qemu_find_vlan_client_by_name(mon, vlan_id, device);
-if (!vc) {
-return;
-}
-if (!net_host_check_device(vc-model)) {
-monitor_printf(mon, invalid host network device %s\n, device);
-return;
-}
-qemu_del_vlan_client(vc);
-}
-
int do_netdev_add(Monitor *mon, const QDict *qdict, QObject **ret_data)
{
QemuOpts *opts;
diff --git a/net.h b/net.h
index 518cf9c..b3c5ca3 100644
--- a/net.h
+++ b/net.h
@@ -161,8 +161,6 @@ int net_client_parse(QemuOptsList *opts_list, const char
*str);
int net_init_clients(void);
void net_check_clients(void);
void net_cleanup(void);
-void net_host_device_add(Monitor *mon, const QDict *qdict);
-void net_host_device_remove(Monitor *mon, const QDict *qdict);
int do_netdev_add(Monitor *mon, const QDict *qdict, QObject **ret_data);
int do_netdev_del(Monitor *mon, const QDict *qdict, QObject **ret_data);
diff --git a/qemu-monitor.hx b/qemu-monitor.hx
index 2af3de6..275f3bc 100644
--- a/qemu-monitor.hx
+++ b/qemu-monitor.hx
@@ -1154,34 +1154,6 @@ Hot remove PCI device.
ETEXI
{
-.name = host_net_add,
-.args_type = device:s,opts:s?,
-.params = tap|user|socket|vde|dump [options],
-.help = add host VLAN client,
-.mhandler.cmd = net_host_device_add,
-},
-
-STEXI
-...@item host_net_add
-...@findex host_net_add
-Add host VLAN client.
-ETEXI
-
-{
-.name = host_net_remove,
-.args_type = vlan_id:i,device:s,
-.params = vlan_id name,
-.help = remove host VLAN client,
-.mhandler.cmd = net_host_device_remove,
-},
-
-STEXI
-...@item host_net_remove
-...@findex host_net_remove
-Remove host VLAN client.
-ETEXI
-
-{
.name = netdev_add,
.args_type = netdev:O,
.params = [user|tap|socket],id=str[,prop=value][,...],
--
1.7.1
[Qemu-devel] [PATCH 2/8] vlan cleanup: update options
---
qemu-options.hx | 120 ---
1 files changed, 17 insertions(+), 103 deletions(-)
diff --git a/qemu-options.hx b/qemu-options.hx
index d1d2272..1cf2bf2 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -956,24 +956,24 @@ DEF(smb, HAS_ARG, QEMU_OPTION_smb, , QEMU_ARCH_ALL)
#endif
DEF(net, HAS_ARG, QEMU_OPTION_net,
--net
nic[,vlan=n][,macaddr=mac][,model=type][,name=str][,addr=str][,vectors=v]\n
-create a new Network Interface Card and connect it to
VLAN 'n'\n
+-net nic[,macaddr=mac][,model=type][,name=str][,addr=str][,vectors=v]\n
+create a new Network Interface Card\n
#ifdef CONFIG_SLIRP
--net
user[,vlan=n][,name=str][,net=addr[/mask]][,host=addr][,restrict=y|n]\n
+-net user[,name=str][,net=addr[/mask]][,host=addr][,restrict=y|n]\n
[,hostname=host][,dhcpstart=addr][,dns=addr][,tftp=dir][,bootfile=f]\n
[,hostfwd=rule][,guestfwd=rule]
#ifndef _WIN32
[,smb=dir[,smbserver=addr]]\n
#endif
-connect the user mode network stack to VLAN 'n',
configure its\n
+create an user mode network stack, configure its\n
DHCP server and enabled optional services\n
#endif
#ifdef _WIN32
--net tap[,vlan=n][,name=str],ifname=name\n
-connect the host TAP network interface to VLAN 'n'\n
+-net tap[,name=str],ifname=name\n
+create a host TAP network interface\n
#else
--net
tap[,vlan=n][,name=str][,fd=h][,ifname=name][,script=file][,downscript=dfile][,sndbuf=nbytes][,vnet_hdr=on|off][,vhost=on|off][,vhostfd=h]\n
-connect the host TAP network interface to VLAN 'n' and
use the\n
+-net
tap[,name=str][,fd=h][,ifname=name][,script=file][,downscript=dfile][,sndbuf=nbytes][,vnet_hdr=on|off][,vhost=on|off][,vhostfd=h]\n
+create a host TAP network interface and use the\n
network scripts 'file' (default= DEFAULT_NETWORK_SCRIPT
)\n
and 'dfile' (default= DEFAULT_NETWORK_DOWN_SCRIPT )\n
use '[down]script=no' to disable script execution\n
@@ -985,19 +985,13 @@ DEF(net, HAS_ARG, QEMU_OPTION_net,
use vhost=on to enable experimental in kernel
accelerator\n
use 'vhostfd=h' to connect to an already opened vhost net
device\n
#endif
--net
socket[,vlan=n][,name=str][,fd=h][,listen=[host]:port][,connect=host:port]\n
-connect the vlan 'n' to another VLAN using a socket
connection\n
--net socket[,vlan=n][,name=str][,fd=h][,mcast=maddr:port]\n
-connect the vlan 'n' to multicast maddr and port\n
#ifdef CONFIG_VDE
--net
vde[,vlan=n][,name=str][,sock=socketpath][,port=n][,group=groupname][,mode=octalmode]\n
-connect the vlan 'n' to port 'n' of a vde switch
running\n
+-net
vde[,name=str][,sock=socketpath][,port=n][,group=groupname][,mode=octalmode]\n
+connect port 'n' of a vde switch running\n
on host and listening for incoming connections on
'socketpath'.\n
Use group 'groupname' and mode 'octalmode' to change
default\n
ownership and permissions for communication port.\n
#endif
--net dump[,vlan=n][,file=f][,len=n]\n
-dump traffic on vlan 'n' to file 'f' (max n bytes per
packet)\n
-net none use it alone to have zero network devices. If no -net
option\n
is provided, the default is '-net nic -net user'\n,
QEMU_ARCH_ALL)
DEF(netdev, HAS_ARG, QEMU_OPTION_netdev,
@@ -1011,10 +1005,9 @@ DEF(netdev, HAS_ARG, QEMU_OPTION_netdev,
#endif
socket],id=str[,option][,option][,...]\n, QEMU_ARCH_ALL)
STEXI
-...@item -net nic[,vl...@var{n}][,macad...@var{mac}][,mod...@var{type}]
[,na...@var{name}][,ad...@var{addr}][,vecto...@var{v}]
+...@item -net nic[,macad...@var{mac}][,mod...@var{type}]
[,na...@var{name}][,ad...@var{addr}][,vecto...@var{v}]
@findex -net
-Create a new Network Interface Card and connect it to VLAN @var{n} (@var{n}
-= 0 is the default). The NIC is an e1000 by default on the PC
+Create a new Network Interface Card. The NIC is an e1000 by default on the PC
target. Optionally, the MAC address can be changed to @var{mac}, the
device address set to @var{addr} (PCI cards only),
and a @var{name} can be assigned for use in monitor commands.
@@ -1034,8 +1027,6 @@ Use the user mode network stack which requires no
administrator
privilege to run. Valid options are:
@table @option
-...@item vl...@var{n}
-Connect user mode stack to VLAN @var{n} (@var{n} = 0 is the default).
@item na...@var{name}
Assign symbolic name for use in monitor commands.
@@ -1142,8 +1133,8 @@ processed and applied to -net user. Mixing them with the
new configuration
syntax gives undefined
[Qemu-devel] [PATCH 8/8] vlan cleanup: remove usage of VLANState
---
hw/qdev-properties.c | 39 --
hw/qdev.c|2 -
hw/qdev.h|5 -
hw/xen_devconfig.c |8 +-
hw/xen_nic.c |1 -
net.c| 323 +
net.h| 10 --
net/slirp.c | 54 +++--
net/slirp.h |3 +-
net/tap.c|9 +-
net/tap.h|2 +-
net/vde.c|8 +-
net/vde.h|2 +-
qemu-common.h|1 -
qemu-monitor.hx |8 +-
15 files changed, 69 insertions(+), 406 deletions(-)
diff --git a/hw/qdev-properties.c b/hw/qdev-properties.c
index 7e3e99e..72ad229 100644
--- a/hw/qdev-properties.c
+++ b/hw/qdev-properties.c
@@ -408,40 +408,6 @@ PropertyInfo qdev_prop_netdev = {
.print = print_netdev,
};
-/* --- vlan --- */
-
-static int parse_vlan(DeviceState *dev, Property *prop, const char *str)
-{
-VLANState **ptr = qdev_get_prop_ptr(dev, prop);
-int id;
-
-if (sscanf(str, %d, id) != 1)
-return -EINVAL;
-*ptr = qemu_find_vlan(id, 1);
-if (*ptr == NULL)
-return -ENOENT;
-return 0;
-}
-
-static int print_vlan(DeviceState *dev, Property *prop, char *dest, size_t len)
-{
-VLANState **ptr = qdev_get_prop_ptr(dev, prop);
-
-if (*ptr) {
-return snprintf(dest, len, %d, (*ptr)-id);
-} else {
-return snprintf(dest, len, null);
-}
-}
-
-PropertyInfo qdev_prop_vlan = {
-.name = vlan,
-.type = PROP_TYPE_VLAN,
-.size = sizeof(VLANClientState*),
-.parse = parse_vlan,
-.print = print_vlan,
-};
-
/* --- pointer --- */
/* Not a proper property, just for dirty hacks. TODO Remove it! */
@@ -695,11 +661,6 @@ void qdev_prop_set_netdev(DeviceState *dev, const char
*name, VLANClientState *v
qdev_prop_set(dev, name, value, PROP_TYPE_NETDEV);
}
-void qdev_prop_set_vlan(DeviceState *dev, const char *name, VLANState *value)
-{
-qdev_prop_set(dev, name, value, PROP_TYPE_VLAN);
-}
-
void qdev_prop_set_macaddr(DeviceState *dev, const char *name, uint8_t *value)
{
qdev_prop_set(dev, name, value, PROP_TYPE_MACADDR);
diff --git a/hw/qdev.c b/hw/qdev.c
index e99c73f..c139952 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -412,8 +412,6 @@ void qdev_connect_gpio_out(DeviceState * dev, int n,
qemu_irq pin)
void qdev_set_nic_properties(DeviceState *dev, NICInfo *nd)
{
qdev_prop_set_macaddr(dev, mac, nd-macaddr);
-if (nd-vlan)
-qdev_prop_set_vlan(dev, vlan, nd-vlan);
if (nd-netdev)
qdev_prop_set_netdev(dev, netdev, nd-netdev);
if (nd-nvectors != DEV_NVECTORS_UNSPECIFIED
diff --git a/hw/qdev.h b/hw/qdev.h
index 3e22eec..f775d7c 100644
--- a/hw/qdev.h
+++ b/hw/qdev.h
@@ -90,7 +90,6 @@ enum PropertyType {
PROP_TYPE_CHR,
PROP_TYPE_STRING,
PROP_TYPE_NETDEV,
-PROP_TYPE_VLAN,
PROP_TYPE_PTR,
PROP_TYPE_BIT,
};
@@ -204,7 +203,6 @@ extern PropertyInfo qdev_prop_ptr;
extern PropertyInfo qdev_prop_macaddr;
extern PropertyInfo qdev_prop_drive;
extern PropertyInfo qdev_prop_netdev;
-extern PropertyInfo qdev_prop_vlan;
extern PropertyInfo qdev_prop_pci_devfn;
#define DEFINE_PROP(_name, _state, _field, _prop, _type) { \
@@ -254,8 +252,6 @@ extern PropertyInfo qdev_prop_pci_devfn;
DEFINE_PROP(_n, _s, _f, qdev_prop_string, char*)
#define DEFINE_PROP_NETDEV(_n, _s, _f) \
DEFINE_PROP(_n, _s, _f, qdev_prop_netdev, VLANClientState*)
-#define DEFINE_PROP_VLAN(_n, _s, _f) \
-DEFINE_PROP(_n, _s, _f, qdev_prop_vlan, VLANState*)
#define DEFINE_PROP_DRIVE(_n, _s, _f) \
DEFINE_PROP(_n, _s, _f, qdev_prop_drive, BlockDriverState *)
#define DEFINE_PROP_MACADDR(_n, _s, _f) \
@@ -277,7 +273,6 @@ void qdev_prop_set_uint64(DeviceState *dev, const char
*name, uint64_t value);
void qdev_prop_set_string(DeviceState *dev, const char *name, char *value);
void qdev_prop_set_chr(DeviceState *dev, const char *name, CharDriverState
*value);
void qdev_prop_set_netdev(DeviceState *dev, const char *name, VLANClientState
*value);
-void qdev_prop_set_vlan(DeviceState *dev, const char *name, VLANState *value);
int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState
*value) QEMU_WARN_UNUSED_RESULT;
void qdev_prop_set_drive_nofail(DeviceState *dev, const char *name,
BlockDriverState *value);
void qdev_prop_set_macaddr(DeviceState *dev, const char *name, uint8_t *value);
diff --git a/hw/xen_devconfig.c b/hw/xen_devconfig.c
index ea8f8c4..f395d01 100644
--- a/hw/xen_devconfig.c
+++ b/hw/xen_devconfig.c
@@ -126,15 +126,15 @@ int xen_config_dev_nic(NICInfo *nic)
snprintf(mac, sizeof(mac), %02x:%02x:%02x:%02x:%02x:%02x,
nic-macaddr[0], nic-macaddr[1], nic-macaddr[2],
nic-macaddr[3], nic-macaddr[4], nic-macaddr[5]);
-xen_be_printf(NULL, 1, config nic %d: mac=\%s\\n, nic-vlan-id, mac);
-xen_config_dev_dirs(vif, qnic, nic-vlan-id, fe, be, sizeof(fe));
+xen_be_printf(NULL, 1,
[Qemu-devel] [PATCH 4/8] vlan cleanup: do not build socket and dump
--- Makefile.objs |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/Makefile.objs b/Makefile.objs index 67f1b21..5442901 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -23,8 +23,6 @@ block-obj-y += $(addprefix block/, $(block-nested-y)) net-obj-y = net.o net-nested-y = queue.o checksum.o util.o -net-nested-y += socket.o -net-nested-y += dump.o net-nested-$(CONFIG_POSIX) += tap.o net-nested-$(CONFIG_LINUX) += tap-linux.o net-nested-$(CONFIG_WIN32) += tap-win32.o -- 1.7.1
[Qemu-devel] Re: [PATCH RFC] e1000: fix access 4 bytes beyond buffer end
On Mon, 2010-07-12 at 20:48 +0300, Michael S. Tsirkin wrote:
We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
Anthony, Alex, please review.
Looks fine to me.
Acked-by: Alex Williamson alex.william...@redhat.com
hw/e1000.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index 0da65f9..70aba11 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -649,7 +649,6 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
}
rdh_start = s-mac_reg[RDH];
-size += 4; // for the header
do {
if (s-mac_reg[RDH] == s-mac_reg[RDT] s-check_rxov) {
set_ics(s, 0, E1000_ICS_RXO);
@@ -663,7 +662,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size);
+desc.length = cpu_to_le16(size + 4 /* for FCS */);
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
[Qemu-devel] Re: [PATCH RFC] e1000: secrc support
On Mon, 2010-07-12 at 20:49 +0300, Michael S. Tsirkin wrote:
Add support for secrc field. Reportedly needed by old RHEL guests.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
hw/e1000.c | 11 ++-
1 files changed, 10 insertions(+), 1 deletions(-)
Anthony, Alex, please review.
Acked-by: Alex Williamson alex.william...@redhat.com
diff --git a/hw/e1000.c b/hw/e1000.c
index 70aba11..8d87492 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -344,6 +344,15 @@ is_vlan_txd(uint32_t txd_lower)
return ((txd_lower E1000_TXD_CMD_VLE) != 0);
}
+/* FCS aka Ethernet CRC-32. We don't get it from backends and can't
+ * fill it in, just pad descriptor length by 4 bytes unless guest
+ * told us to trip it off the packet. */
+static inline int
+fcs_len(E1000State *s)
+{
+return (s-mac_reg[RCTL] E1000_RCTL_SECRC) ? 0 : 4;
+}
+
static void
xmit_seg(E1000State *s)
{
@@ -662,7 +671,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size + 4 /* for FCS */);
+desc.length = cpu_to_le16(size + fcs_len(s));
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
On Mon, Jul 12, 2010 at 3:43 PM, Josef Bacik jo...@redhat.com wrote: O_DIRECT support was just introduced recently, please try on the latest kernel with the normal settings (which IIRC uses O_DIRECT), that should make things suck alot less. Thanks, Josef With latest kernel do you mean the current Linus' git tree? Because if instead you're talking about the current stable kernel, that's the one I used on my test. -- Giangiacomo
[Qemu-devel] Re: BTRFS: Unbelievably slow with kvm/qemu
On Mon, Jul 12, 2010 at 10:23:14PM +0200, Giangiacomo Mariotti wrote: On Mon, Jul 12, 2010 at 3:43 PM, Josef Bacik jo...@redhat.com wrote: O_DIRECT support was just introduced recently, please try on the latest kernel with the normal settings (which IIRC uses O_DIRECT), that should make things suck alot less. Thanks, Josef With latest kernel do you mean the current Linus' git tree? Because if instead you're talking about the current stable kernel, that's the one I used on my test. Yes Linus' git tree. Thanks, Josef
[Qemu-devel] Re: [PATCH RFC] e1000: fix access 4 bytes beyond buffer end
On 07/12/2010 12:48 PM, Michael S. Tsirkin wrote:
We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: Michael S. Tsirkinm...@redhat.com
I think I'd feel slightly better if we zero'd out the FCS before writing
it to the guest. It is potentially a data leak.
Regards,
Anthony Liguori
---
Anthony, Alex, please review.
hw/e1000.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index 0da65f9..70aba11 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -649,7 +649,6 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
}
rdh_start = s-mac_reg[RDH];
-size += 4; // for the header
do {
if (s-mac_reg[RDH] == s-mac_reg[RDT] s-check_rxov) {
set_ics(s, 0, E1000_ICS_RXO);
@@ -663,7 +662,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size);
+desc.length = cpu_to_le16(size + 4 /* for FCS */);
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
[Qemu-devel] Re: [PATCH RFC] e1000: fix access 4 bytes beyond buffer end
On Mon, Jul 12, 2010 at 04:07:21PM -0500, Anthony Liguori wrote:
On 07/12/2010 12:48 PM, Michael S. Tsirkin wrote:
We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: Michael S. Tsirkinm...@redhat.com
I think I'd feel slightly better if we zero'd out the FCS before
writing it to the guest. It is potentially a data leak.
It's the buffer guest allocated, and we leave it untouched.
How does this leak data?
Regards,
Anthony Liguori
---
Anthony, Alex, please review.
hw/e1000.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index 0da65f9..70aba11 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -649,7 +649,6 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
}
rdh_start = s-mac_reg[RDH];
-size += 4; // for the header
do {
if (s-mac_reg[RDH] == s-mac_reg[RDT] s-check_rxov) {
set_ics(s, 0, E1000_ICS_RXO);
@@ -663,7 +662,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size);
+desc.length = cpu_to_le16(size + 4 /* for FCS */);
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
[Qemu-devel] Re: [PATCH RFC] e1000: fix access 4 bytes beyond buffer end
On 07/12/2010 04:30 PM, Michael S. Tsirkin wrote:
On Mon, Jul 12, 2010 at 04:07:21PM -0500, Anthony Liguori wrote:
On 07/12/2010 12:48 PM, Michael S. Tsirkin wrote:
We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: Michael S. Tsirkinm...@redhat.com
I think I'd feel slightly better if we zero'd out the FCS before
writing it to the guest. It is potentially a data leak.
It's the buffer guest allocated, and we leave it untouched.
How does this leak data?
Sorry, you're right.
Reviewed-by: Anthony Liguori aligu...@us.ibm.com
Regards,
Anthony Liguori
Regards,
Anthony Liguori
---
Anthony, Alex, please review.
hw/e1000.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index 0da65f9..70aba11 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -649,7 +649,6 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
}
rdh_start = s-mac_reg[RDH];
-size += 4; // for the header
do {
if (s-mac_reg[RDH] == s-mac_reg[RDT] s-check_rxov) {
set_ics(s, 0, E1000_ICS_RXO);
@@ -663,7 +662,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size);
+desc.length = cpu_to_le16(size + 4 /* for FCS */);
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
[Qemu-devel] Re: KVM Call agenda for July 13th
* Juan Quintela (quint...@redhat.com) wrote: Please send in any agenda items you are interested in covering. 0.13 ;-)
[Qemu-devel] Re: KVM Call agenda for July 13th
On 07/12/2010 04:57 PM, Chris Wright wrote: * Juan Quintela (quint...@redhat.com) wrote: Please send in any agenda items you are interested in covering. 0.13 ;-) - vCPU limits; how much testing has anyone done of 64-way guests? - Finding a way to enable virtio by default; any clever ideas? Regards, Anthony Liguori -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[Qemu-devel] Re: KVM Call agenda for July 13th
On 07/12/2010 05:07 PM, Anthony Liguori wrote: On 07/12/2010 04:57 PM, Chris Wright wrote: * Juan Quintela (quint...@redhat.com) wrote: Please send in any agenda items you are interested in covering. 0.13 ;-) - vCPU limits; how much testing has anyone done of 64-way guests? - Finding a way to enable virtio by default; any clever ideas? Both of these are really in the category of, getting good performance out of KVM when running it as a casual user (like via virt-manager). Regards, Anthony Liguori Regards, Anthony Liguori -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[Qemu-devel] Re: [PATCH RFC] e1000: fix access 4 bytes beyond buffer end
On Mon, Jul 12, 2010 at 04:07:21PM -0500, Anthony Liguori wrote:
On 07/12/2010 12:48 PM, Michael S. Tsirkin wrote:
We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: Michael S. Tsirkinm...@redhat.com
I think I'd feel slightly better if we zero'd out the FCS before
writing it to the guest. It is potentially a data leak.
Regards,
Anthony Liguori
I am guessing there's no chance guest actually looks
at this data, otherwise it won't match and we'd get errors, right?
---
Anthony, Alex, please review.
hw/e1000.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index 0da65f9..70aba11 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -649,7 +649,6 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
}
rdh_start = s-mac_reg[RDH];
-size += 4; // for the header
do {
if (s-mac_reg[RDH] == s-mac_reg[RDT] s-check_rxov) {
set_ics(s, 0, E1000_ICS_RXO);
@@ -663,7 +662,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size);
+desc.length = cpu_to_le16(size + 4 /* for FCS */);
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
[Qemu-devel] Re: [PATCH RFC] e1000: fix access 4 bytes beyond buffer end
On 07/12/2010 05:42 PM, Michael S. Tsirkin wrote:
On Mon, Jul 12, 2010 at 04:07:21PM -0500, Anthony Liguori wrote:
On 07/12/2010 12:48 PM, Michael S. Tsirkin wrote:
We do range check for size, and get size as buffer,
but copy size + 4 bytes (4 is for FCS).
Let's copy size bytes but put size + 4 in length.
Signed-off-by: Michael S. Tsirkinm...@redhat.com
I think I'd feel slightly better if we zero'd out the FCS before
writing it to the guest. It is potentially a data leak.
Regards,
Anthony Liguori
I am guessing there's no chance guest actually looks
at this data, otherwise it won't match and we'd get errors, right?
That's my assumption too. Although I believe there are some known
issues with e1000 and certain versions of Windows and the Microsoft
built-in driver. Maybe this is why those drivers don't work and the
Intel drivers do?
Regards,
Anthony Liguori
---
Anthony, Alex, please review.
hw/e1000.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index 0da65f9..70aba11 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -649,7 +649,6 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
}
rdh_start = s-mac_reg[RDH];
-size += 4; // for the header
do {
if (s-mac_reg[RDH] == s-mac_reg[RDT] s-check_rxov) {
set_ics(s, 0, E1000_ICS_RXO);
@@ -663,7 +662,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf,
size_t size)
if (desc.buffer_addr) {
cpu_physical_memory_write(le64_to_cpu(desc.buffer_addr),
(void *)(buf + vlan_offset), size);
-desc.length = cpu_to_le16(size);
+desc.length = cpu_to_le16(size + 4 /* for FCS */);
desc.status |= E1000_RXD_STAT_EOP|E1000_RXD_STAT_IXSM;
} else // as per intel docs; skip descriptors with null buf addr
DBGOUT(RX, Null RX descriptor!!\n);
[Qemu-devel] Re: [SeaBIOS] [PATCH 0/7] abstract chipset(i440fx) specific register operation.
On Mon, Jul 12, 2010 at 08:47:45PM +0900, Isaku Yamahata wrote: This patch set abstract out chipset specific operation, and spit out i440fx specific operation into dev-i440fx.c with it. Thus q35 specific register value/operation will be added easily. Hi Isaku, Can you give a brief overview on what patch series are remaining, and what the final q35 support will entail? -Kevin
[Qemu-devel] Re: [SeaBIOS] [PATCH 2/7] seabios: shadow: make device finding more generic.
On Mon, Jul 12, 2010 at 08:47:47PM +0900, Isaku Yamahata wrote: pam register offset is north bridge specific. So determine the offset based on found north bridge. Is it really just the offset that is north bridge specific? I thought the entire process was very north bridge specific. If so, I don't think it makes sense to pass back the pam0 register - instead the north bridge specific code should do the necessary work (using helper functions if possible). I have the same concern with part 3 and 4 of this series. -Kevin
[Qemu-devel] Re: [SeaBIOS] [PATCH 6/7] seabios: acpi: split out piix4 pm logic.
On Mon, Jul 12, 2010 at 08:47:51PM +0900, Isaku Yamahata wrote:
split out piix4 pm logic.
[...]
@@ -202,11 +203,6 @@ static inline u16 cpu_to_le16(u16 x)
return x;
}
-static inline u32 cpu_to_le32(u32 x)
-{
-return x;
-}
This is a nitpick, but if cpu_to_le32() is moved to a header then
cpu_to_le16() needs to be moved to. It should also be moved to where
ntohl() is defined (util.h).
-Kevin
[Qemu-devel] Re: [PATCH] set proper migration status on -write error (v3)
On Fri, 9 Jul 2010 15:18:51 -0300
Marcelo Tosatti mtosa...@redhat.com wrote:
If -write fails, declare migration status as MIG_STATE_ERROR.
Also, in buffered_file.c, -close the object in case of an
error.
Fixes migrate -d exec:dd of=file, where dd fails to open file.
Signed-off-by: Marcelo Tosatti mtosa...@redhat.com
diff --git a/buffered_file.c b/buffered_file.c
index 54dc6c2..be147d6 100644
--- a/buffered_file.c
+++ b/buffered_file.c
@@ -222,8 +222,10 @@ static void buffered_rate_tick(void *opaque)
{
QEMUFileBuffered *s = opaque;
-if (s-has_error)
+if (s-has_error) {
+buffered_close(s);
return;
+}
qemu_mod_timer(s-timer, qemu_get_clock(rt_clock) + 100);
diff --git a/migration.c b/migration.c
index b49964c..862dc4f 100644
--- a/migration.c
+++ b/migration.c
@@ -316,8 +316,12 @@ ssize_t migrate_fd_put_buffer(void *opaque, const void
*data, size_t size)
if (ret == -1)
ret = -(s-get_error(s));
-if (ret == -EAGAIN)
+if (ret == -EAGAIN) {
qemu_set_fd_handler2(s-fd, NULL, NULL, migrate_fd_put_notify, s);
+} else if (ret 0) {
+monitor_resume(s);
You have to pass s-mon, but I forgot to mention that you also have to
check for NULL like migrate_fd_cleanup():
if (s-mon) {
monitor_resume(s-mon);
}
Also, there's a comment in migrate_fd_cleanup() saying that we should only
resume the monitor when all buffers have been flushed. I assume
buffred_close() will do that.
+s-state = MIG_STATE_ERROR;
+}
return ret;
}
[Qemu-devel] Re: [SeaBIOS] [PATCH 0/7] abstract chipset(i440fx) specific register operation.
On Mon, Jul 12, 2010 at 08:50:55PM -0400, Kevin O'Connor wrote:
On Mon, Jul 12, 2010 at 08:47:45PM +0900, Isaku Yamahata wrote:
This patch set abstract out chipset specific operation,
and spit out i440fx specific operation into dev-i440fx.c with it.
Thus q35 specific register value/operation will be added easily.
Hi Isaku,
Can you give a brief overview on what patch series are remaining, and
what the final q35 support will entail?
Oh yes, I should have depict the overview.
You can get my local seabios repo from the below.
git clone http://people.valinux.co.jp/~yamahata/qemu/q35/seabios
This is not for review, but for those who want to try qemu q35/pcie.
So it contains change sets which won't be accepted to the upstream.
I have 3 patches in my posting with what I already posted.
overriding DSDT: I already posted it.
seabios: acpi: allow qemu to load dsdt as external acpi table.
Due to rom size limit, it isn't an option to have 2 DSDT in seabios,
one for i440fx, one for q35.
split out i440fx specific part: This patch series.
I suppose, you want redesign.
acpi MCFG support: single patch
seabios: acpi: add mcfg table.
q35 device specific part: single patch
seabios: add q35 initialization functions.
This patch adds 2 files(dev-q35.[ch]) and inserts q35 specific entries
into initialization tables.
q35 DSDT: single patch
seabios: q35: add dsdt.
I'm not sure this should go into seabios or qemu because it isn't
complied into seabios.
I have other patches, but they would need discussion about how they
should work. So I don't plan to push those soon.
I have 3 issues.
- paravirtualize pci bus numbering
Currently pci bus is numbered continuously.
i.e. (*pci_bus)++ in change set of f441666dbdf0e9f78442a6b33b086699ff6f5a21.
On the other hand in real hardware case, bus numbers might be
assigned non-contiguously. And some surely does. Probably those
numbers are hard-coded in bios.
It is also convenient for DSDT writers to assign pci bus number
without the constraint that bus numbers be contiguously assigned.
So I'd like to pass the bus numbering hits from qemu to seabios.
This requires qemu enhancement which would require discussion.
- PCI bar assignment clean up
Clean up of pci_bios_{io, mem, prefmem}_addr.
This isn't a big issue.
- vga bios
remove hard coded VBE physical address
Gerd sent patches to address this, but there seems no progress yet.
This is for the original vgabios. vgabios in seabioa seem under
development.
--
yamahata
[Qemu-devel] [Bug 604872] Re: qemu-system-arm segfaults emulating versatile machine after running debootstrap --second-stage inside vm
If you're at Lucid or Maverick, you can also create the rootfs img by running the attached rootstock script. Please install all rootstock dependencies by installing the official version provided by the distro: sudo apt-get install rootstock Using the attached script: sudo bash ./rootstock --fqdn beagleboard --login ubuntu --password temppwd --imagesize 512M --seed ubuntu-minimal --dist lucid --serial ttyS2 --components main universe multiverse You'll get the rootfs img and the command that rootstock would call, that gives the seg fault, e.g: qemu-system-arm -M versatilepb -cpu cortex-a8 -kernel /tmp/tmp.OxxUOBq4B0/qemu-vmlinuz -no-reboot -nographic -pidfile /tmp/tmp.OxxUOBq4B0/qemu.pid -drive file=/tmp/tmp.OxxUOBq4B0/qemu-armel-201007122016.img,aio=native,cache=none -m 256 -append 'console=ttyAMA0,115200n8 root=/dev/sda rw mem=256M devtmpfs.mount=0 init=/bin/installer quiet' ** Attachment added: Modified rootstock http://launchpadlibrarian.net/51835052/rootstock -- qemu-system-arm segfaults emulating versatile machine after running debootstrap --second-stage inside vm https://bugs.launchpad.net/bugs/604872 You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. Status in QEMU: New Status in “qemu-kvm” package in Ubuntu: New Bug description: Binary package hint: qemu-kvm As I'm now implementing the support for creating a rootstock rootfs without requiring root, I need to run the deboostrap' second stage inside a VM, to correctly install the packages into the rootfs. qemu-system-arm fails right after debootstrap finish the second stage, giving a segmentation fault. Command: qemu-system-arm -M versatilepb -cpu cortex-a8 -kernel vmlinuz -no-reboot -nographic -drive file=qemu-armel-201007122016.img,aio=native,cache=none -m 256 -append 'console=ttyAMA0,115200n8 root=/dev/sda rw mem=256M devtmpfs.mount=0 init=/bin/installer' Uncompressing Linux. done, booting the kernel. [0.00] Initializing cgroup subsys cpuset [0.00] Initializing cgroup subsys cpu [0.00] Linux version 2.6.32-21-versatile (bui...@cushaw) (gcc version 4.4.3 (Ubuntu 4.4.3-4ubuntu5) ) #32-Ubuntu Fri Apr 16 08:14:53 UTC 2010 (Ubuntu 2.6.32-21.32-versatile 2.6.32.11+drm33.2) ... I: Base system installed successfully. I: Starting basic services in VM Segmentation fault (core dumped) [492816.197352] qemu-system-arm[16024]: segfault at cf6ba8fc ip cf6ba8fc sp 7fffd0e68680 error 14 Image: * rootfs: http://rsalveti.net/pub/ubuntu/rootstock/qemu-armel-201007122016.img (md5 1d063ac8a65c798bb004cd1c4c7970c5) * kernel: http://ports.ubuntu.com/ubuntu-ports/dists/lucid/main/installer-armel/current/images/versatile/netboot/vmlinuz I'm able to reproduce the bug on Maverick (amd64) and Lucid (x86). Maverick qemu-kvm-extras: 0.12.4+noroms-0ubuntu4 Lucid qemu-kvm-extras: 0.12.3+noroms-0ubuntu9.2 ProblemType: Bug DistroRelease: Ubuntu 10.10 Package: qemu-kvm-extras 0.12.4+noroms-0ubuntu4 ProcVersionSignature: Ubuntu 2.6.35-6.9-generic 2.6.35-rc3 Uname: Linux 2.6.35-6-generic x86_64 Architecture: amd64 Date: Mon Jul 12 18:55:35 2010 InstallationMedia: Ubuntu 10.04 LTS Lucid Lynx - Release amd64 (20100427.1) KvmCmdLine: Error: command ['ps', '-C', 'kvm', '-F'] failed with exit code 1: UIDPID PPID CSZ RSS PSR STIME TTY TIME CMD MachineType: LENOVO 2764CTO PccardctlIdent: Socket 0: no product info available PccardctlStatus: Socket 0: no card ProcCmdLine: BOOT_IMAGE=/vmlinuz-2.6.35-6-generic root=/dev/mapper/primary-root ro crashkernel=384M-2G:64M,2G-:128M quiet splash ProcEnviron: LANG=en_US.utf8 SHELL=/bin/bash SourcePackage: qemu-kvm dmi.bios.date: 04/19/2010 dmi.bios.vendor: LENOVO dmi.bios.version: 7UET86WW (3.16 ) dmi.board.name: 2764CTO dmi.board.vendor: LENOVO dmi.board.version: Not Available dmi.chassis.asset.tag: No Asset Information dmi.chassis.type: 10 dmi.chassis.vendor: LENOVO dmi.chassis.version: Not Available dmi.modalias: dmi:bvnLENOVO:bvr7UET86WW(3.16):bd04/19/2010:svnLENOVO:pn2764CTO:pvrThinkPadT400:rvnLENOVO:rn2764CTO:rvrNotAvailable:cvnLENOVO:ct10:cvrNotAvailable: dmi.product.name: 2764CTO dmi.product.version: ThinkPad T400 dmi.sys.vendor: LENOVO
[Qemu-devel] [PATCH v3 2/4] pci_bridge: rename PCIBridge::bus - PCIBridge::sec_bus.
To avoid confusion of primary bus with secondary bus,
rename PCIBridge::bus to PCIBridge::sec_bus.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci_bridge.c| 10 --
hw/pci_internals.h |2 +-
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index 7f27870..63052fe 100644
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -138,8 +138,7 @@ static void pci_bridge_write_config(PCIDevice *d,
io base/limit upper 16 */
ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) {
PCIBridge *s = container_of(d, PCIBridge, dev);
-PCIBus *secondary_bus = s-bus;
-pci_bridge_update_mappings(secondary_bus);
+pci_bridge_update_mappings(s-sec_bus);
}
}
@@ -164,8 +163,7 @@ static int pci_bridge_initfn(PCIDevice *dev)
static int pci_bridge_exitfn(PCIDevice *pci_dev)
{
PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev);
-PCIBus *bus = s-bus;
-pci_unregister_secondary_bus(bus);
+pci_unregister_secondary_bus(s-sec_bus);
return 0;
}
@@ -182,8 +180,8 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool
multifunction,
qdev_init_nofail(dev-qdev);
s = DO_UPCAST(PCIBridge, dev, dev);
-pci_register_secondary_bus(bus, s-bus, s-dev, map_irq, name);
-return s-bus;
+pci_register_secondary_bus(bus, s-sec_bus, s-dev, map_irq, name);
+return s-sec_bus;
}
static PCIDeviceInfo bridge_info = {
diff --git a/hw/pci_internals.h b/hw/pci_internals.h
index 8a3026b..fa844ab 100644
--- a/hw/pci_internals.h
+++ b/hw/pci_internals.h
@@ -32,7 +32,7 @@ struct PCIBus {
typedef struct {
PCIDevice dev;
-PCIBus bus;
+PCIBus sec_bus;
uint32_t vid;
uint32_t did;
} PCIBridge;
--
1.7.1.1
[Qemu-devel] [Bug 532733] Re: apt/dpkg in qemu-system-arm hangs if a big task is installed
For the seg fault bug I've created the bug 604872. Meanwhile I'll try to reproduce the hang problem with Maverick and upstream Qemu. -- apt/dpkg in qemu-system-arm hangs if a big task is installed https://bugs.launchpad.net/bugs/532733 You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. Status in QEMU: Invalid Status in “qemu-kvm” package in Ubuntu: Incomplete Status in “qemu-kvm” source package in Lucid: Incomplete Bug description: Binary package hint: qemu-kvm running rootstock and installing ubuntu-netbook^ makes the VM hang in unpacking iso-codes this is reproducable every time in rootstock as well as in a standard qemu-system-arm vm that contains a minimal ubuntu with running apt-get install ubuntu-netbook
[Qemu-devel] [PATCH v3 3/4] pci_bridge: clean up: remove pci_{register, unregister}_secondary_bus()
Remove pci_{register, unregister}_secondary_bus() by open code.
They are old stype API and aren't used any more by others. So eliminate it.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci_bridge.c | 32 ++--
1 files changed, 10 insertions(+), 22 deletions(-)
diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index 63052fe..2f13c7d 100644
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -37,26 +37,6 @@ PCIDevice *pci_bridge_get_device(PCIBus *bus)
return bus-parent_dev;
}
-static void pci_register_secondary_bus(PCIBus *parent,
- PCIBus *bus,
- PCIDevice *dev,
- pci_map_irq_fn map_irq,
- const char *name)
-{
-qbus_create_inplace(bus-qbus, pci_bus_info, dev-qdev, name);
-bus-map_irq = map_irq;
-bus-parent_dev = dev;
-
-QLIST_INIT(bus-child);
-QLIST_INSERT_HEAD(parent-child, bus, sibling);
-}
-
-static void pci_unregister_secondary_bus(PCIBus *bus)
-{
-assert(QLIST_EMPTY(bus-child));
-QLIST_REMOVE(bus, sibling);
-}
-
static uint32_t pci_config_get_io_base(PCIDevice *d,
uint32_t base, uint32_t base_upper16)
{
@@ -163,7 +143,8 @@ static int pci_bridge_initfn(PCIDevice *dev)
static int pci_bridge_exitfn(PCIDevice *pci_dev)
{
PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev);
-pci_unregister_secondary_bus(s-sec_bus);
+assert(QLIST_EMPTY(s-sec_bus.child));
+QLIST_REMOVE(s-sec_bus, sibling);
return 0;
}
@@ -173,6 +154,7 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool
multifunction,
{
PCIDevice *dev;
PCIBridge *s;
+PCIBus *sec_bus;
dev = pci_create_multifunction(bus, devfn, multifunction, pci-bridge);
qdev_prop_set_uint32(dev-qdev, vendorid, vid);
@@ -180,7 +162,13 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool
multifunction,
qdev_init_nofail(dev-qdev);
s = DO_UPCAST(PCIBridge, dev, dev);
-pci_register_secondary_bus(bus, s-sec_bus, s-dev, map_irq, name);
+sec_bus = s-sec_bus;
+qbus_create_inplace(sec_bus-qbus, pci_bus_info, dev-qdev, name);
+sec_bus-parent_dev = dev;
+sec_bus-map_irq = map_irq;
+
+QLIST_INIT(sec_bus-child);
+QLIST_INSERT_HEAD(bus-child, sec_bus, sibling);
return s-sec_bus;
}
--
1.7.1.1
