Re: [Qemu-devel] [PATCH v7] rtl8139: add vlan support

2011-03-26 Thread Blue Swirl 
Thanks, applied all.

On Wed, Mar 23, 2011 at 1:11 AM, Benjamin Poirier
benjamin.poir...@gmail.com wrote:
 Hello,

 Here is version 7 of my patchset to add vlan support to the emulated rtl8139
 nic.

 Changes since v6:
        * added check against guest requesting tagging on frames with len  12
        * simplified tag extraction in receive function. dot1q_buf arg removed
          from rtl8139_do_receive(). Frame is linearized in transfer_frame()
          when loopback mode is on.
        * added an entry to file header

 I've ran the same tests as usual on linux and this time also freebsd 8.2, with
 and without vlanhwtso in the latter case. Jason, you're right that loopback
 mode is seldom used! It seems the bsd driver only uses it at probe time to
 identify a defect in some 8169 [1,2] and even then, that check has been
 disabled [3]. The linux driver doesn't support loopback mode (unless it's well
 hidden.)

 [1] 
 http://lists.freebsd.org/pipermail/freebsd-emulation/2006-May/thread.html#2055
 [2] 
 http://www.freebsd.org/cgi/cvsweb.cgi/src/sys/dev/re/if_re.c?rev=1.196;content-type=text%2Fplain
 [3] http://www.freebsd.org/cgi/cvsweb.cgi/src/sys/dev/re/if_re.c#rev1.68

 Changes since v5:
        * moved all receive changes to add vlan tag extraction
        * fixed checkpatch.pl style issues
        * fixed bugs in receive case related to small buffers and loopback
          mode. Moved too small buffer code back where it used to be, though
          it is changed in content.

 Changes since v4:
        * removed alloca(), for real. Thanks to the reviewers for their
          patience. This patchset now has more versions than the vlan header
          has bytes!
        * corrected the unlikely, debug printf and long lines, as per comments
        * cleaned out ifdef's pertaining to ethernet checksum calculation.
          According to a comment since removed they were related to an
          optimization:
           RTL8139 provides frame CRC with received packet, this feature
           seems to be ignored by most drivers, disabled by default
          see commit ccf1d14

 I've tested v5 using x86_64 host/guest with the usual procedure. I've also ran
 the clang analyzer on the qemu code base, just for fun.

 Changes since v3:
        * removed alloca() and #include net/ethernet.h as per comments
        * reordered patches to put extraction before insertion. Extraction
          touches only the receive path but insertion touches both. The two
          patches are now needed to have vlan functionnality.

 I've tested v4 with x86_64 host/guest. I used the same testing procedure as
 before. I've tested a plain configuration as well as one with tso + vlan
 offload, successfully.

 I had to hack around the Linux 8139cp driver to be able to enable tso on vlan
 which leads me to wonder, can someone with access to the C+ spec or a real
 card confirm that it can do tso and vlan offload at the same time? The patch
 I used for the kernel is at https://gist.github.com/851895.

 Changes since v2:
 insertion:
        * moved insertion later in the process, to handle tso
        * use qemu_sendv_packet() to insert the tag for us
        * added dot1q_buf parameter to rtl8139_do_receive() to avoid some
          memcpy() in loopback mode. Note that the code path through that
          function is unchanged when dot1q_buf is NULL.

 extraction:
        * reduced the amount of copying by moving the frame too short logic
          after the removal of the vlan tag (as is done in e1000.c for
          example). Unfortunately, that logic can no longer be shared betwen
          C+ and C mode.

 I've posted v2 of these patches back in November
 http://article.gmane.org/gmane.comp.emulators.qemu/84252

 I've tested v3 on the following combinations of guest and hosts:
 host: x86_64, guest: x86_64
 host: x86_64, guest: ppc32
 host: ppc32, guest: ppc32

 Testing on the x86_64 host used '-net tap' and consisted of:
 * making an http transfert on the untagged interface.
 * ping -s 0-1472 to another host on a vlan.
 * making an scp upload to another host on a vlan.

 Testing on the ppc32 host used '-net socket' connected to an x86_64 qemu-kvm
 running the virtio nic and consisted of:
 * establishing an ssh connection between the two using an untagged interface.
 * ping -s 0-1472 between the two using a vlan.
 * making an scp transfer in both directions using a vlan.

 All that was successful. Nevertheless, it doesn't exercise all code paths so
 care is in order.

 Please note that the lack of vlan support in rtl8139 has taken a few people
 aback:
 https://bugzilla.redhat.com/show_bug.cgi?id=516587
 http://article.gmane.org/gmane.linux.network.general/14266

 Thanks,
 -Ben

Re: [Qemu-devel] [PATCH 0/2] Let boards state maximum RAM limits in QEMUMachine struct

2011-03-26 Thread Blue Swirl 
On Mon, Mar 21, 2011 at 7:47 PM, Peter Maydell peter.mayd...@linaro.org wrote:
 This fairly simple patchset adds a new 'max_ram' field to the QEMUMachine
 structure so that a board model can specify the maximum RAM it will accept.
 We can then produce a friendly diagnostic message when the user tries to
 start qemu with a '-m' option asking for more RAM than that. (Currently
 most of the ARM devboard models respond with an obscure guest crash when
 the guest tries to access RAM and finds device registers instead.)

 If no maximum size is specified we default to the old behaviour of
 do not impose any limit.

 The advantage of doing this in vl.c rather than in each board (apart
 from avoiding code duplication) is that we can distinguish between
 the user asked for more RAM than we support (an error) and the global
 default RAM size is more than our maximum (just cap the RAM size to
 the board maximum).

This could replace the field max_mem in hwdef structures in sun4m.c.

Another candidate for refactoring would be default_cpu_model.

Re: [Qemu-devel] [PATCHv3] report that QEMU process was killed by a signal

2011-03-26 Thread Blue Swirl 
On Fri, Mar 25, 2011 at 2:04 PM, Gleb Natapov g...@redhat.com wrote:
 Ping?

Does not work:
INT:
Got signal 951049944 from pid 0
TERM:
Got signal -1553068904 from pid 0
HUP:
Got signal 1 from pid 16185
Even here the pid is not correct, it should be 3098.

Re: [Qemu-devel] [PATCHv3] report that QEMU process was killed by a signal

2011-03-26 Thread Gleb Natapov 
On Sat, Mar 26, 2011 at 03:50:46PM +0200, Blue Swirl wrote:
 On Fri, Mar 25, 2011 at 2:04 PM, Gleb Natapov g...@redhat.com wrote:
  Ping?
 
 Does not work:
 INT:
 Got signal 951049944 from pid 0
 TERM:
 Got signal -1553068904 from pid 0
You use SDL correct? This is SDL problem and I fixed it in SDL upstream.

 HUP:
 Got signal 1 from pid 16185
 Even here the pid is not correct, it should be 3098.
HUP should work. Why do you think that pid should be 3098? Bash has its
own build in kill command IIRC.

--
Gleb.

Re: [Qemu-devel] [PATCHv3] report that QEMU process was killed by a signal

2011-03-26 Thread Blue Swirl 
On Sat, Mar 26, 2011 at 3:55 PM, Gleb Natapov g...@redhat.com wrote:
 On Sat, Mar 26, 2011 at 03:50:46PM +0200, Blue Swirl wrote:
 On Fri, Mar 25, 2011 at 2:04 PM, Gleb Natapov g...@redhat.com wrote:
  Ping?

 Does not work:
 INT:
 Got signal 951049944 from pid 0
 TERM:
 Got signal -1553068904 from pid 0
 You use SDL correct? This is SDL problem and I fixed it in SDL upstream.

OK, with VNC it works.

 HUP:
 Got signal 1 from pid 16185
 Even here the pid is not correct, it should be 3098.
 HUP should work. Why do you think that pid should be 3098? Bash has its
 own build in kill command IIRC.

Right, I used killall which isn't a builtin, sorry. Thanks, applied.

Re: [Qemu-devel] [PATCH 1/3] arm: basic support for ARMv4/ARMv4T emulation

2011-03-26 Thread Dmitry Eremin-Solenikov 
On 3/25/11, Peter Maydell peter.mayd...@linaro.org wrote:
 On 24 March 2011 22:07, Dmitry Eremin-Solenikov dbarysh...@gmail.com
 wrote:
 Currently target-arm/ assumes at least ARMv5 core. Add support for
 handling also ARMv4/ARMv4T. This changes the following instructions:

 Mostly looks good; comments below.

 @@ -161,6 +179,8 @@ static void cpu_reset_model_id(CPUARMState *env,
 uint32_t id)
 break;
 case ARM_CPUID_TI915T:
 case ARM_CPUID_TI925T:
 +set_feature(env, ARM_FEATURE_V4T);
 +set_feature(env, ARM_FEATURE_V5);
 set_feature(env, ARM_FEATURE_OMAPCP);
 env-cp15.c0_cpuid = ARM_CPUID_TI925T; /* Depends on wiring.  */
 env-cp15.c0_cachetype = 0x5109149;

 As far as I can tell from google these are based on the ARM9TDMI
 which means they're ARMv4T and so shouldn't have the V5 feature set.
 (You can legitimately feel disgruntled that whoever added these didn't
 do the v4T stuff properly :-))

Oops. According to cpuid they indeed are V4T.


 @@ -6129,6 +6131,7 @@ static void disas_arm_insn(CPUState * env,
 DisasContext *s)
 }
 }
 /* Otherwise PLD; v5TE+ */
 +ARCH(5);
 return;
 }
 if (((insn  0x0f70f000) == 0x0450f000) ||

 Rather than adding ARCH() lines here and in some of the following
 hunks it would be simpler to change the

 if (cond == 0xf){
 /* Unconditional instructions.  */

 to:

 if (cond == 0xf) {
  /* In ARMv3 and v4 the NV condition is UNPREDICTABLE; we
   * choose to UNDEF. In ARMv5 and above the space is used
   * for miscellaneous unconditional instructions.
   */
  ARCH(5);

Ack. I just wanted to be insn-by-insn clear, rather than disabling
full blocks.

 Some bits that are missing from this patch:

 You need to guard the Thumb BKPT and BLX decodes
 with ARCH(5) as they're not in v4T.

... and fix the V4T PUSH containing PC.

 The CPSR Q bit needs to RAZ/WI on v4 and v4T.

Can we assume (maybe temporarily) that all v5 are also v5TE?
It seems it's currently done so, and I don't want to be too intrusive.

I'll need to dig more into this...

-- 
With best wishes
Dmitry

Re: [Qemu-devel] [PATCH 1/3] arm: basic support for ARMv4/ARMv4T emulation

2011-03-26 Thread Peter Maydell 
On 26 March 2011 17:23, Dmitry Eremin-Solenikov dbarysh...@gmail.com wrote:
 Can we assume (maybe temporarily) that all v5 are also v5TE?
 It seems it's currently done so, and I don't want to be too intrusive.

All the cores we currently model that are v5 are v5TE, I think.
The current (v7) ARM ARM says the valid v5 variants are
v5T, v5TE and v5TEJ (with plain ARMv5 only being in an
obsolete variants list), so I think we should distinguish v5T
and v5TE (the only difference being that a handful of instructions
are v5TE only, so that isn't a very intrusive change, it's just
saying ARCH(5TE) in a few of the places where your patch has ARCH(5)).

So I think we should have ENABLE_ARCH_5T and ENABLE_ARCH_5TE macros
so we can use ARCH(5T) and ARCH(5TE), and not bother with a plain
ARCH(5) since it's obsolete...

(Mostly what I'd like is for us to use the right value of 'foo'
where we add ARCH(foo) checks, just so we can trust them in future
and don't have to go back and recheck them. I don't mind if they
all turn out to be checking the same actual feature flag.)

-- PMM

[Qemu-devel] [PATCH] e1000: Mask out lower bits of RDBAL/TDBAL

2011-03-26 Thread Kevin Wolf 
Rx and Tx descriptors are 16 byte aligned, so the lower bits are
ignored by real hardware. In fact, they always read back as zero on real
hardware, but probably nobody relies on that.

Signed-off-by: Kevin Wolf m...@kevin-wolf.de
---
 hw/e1000.c |   21 ++---
 1 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/hw/e1000.c b/hw/e1000.c
index 2a4d5c7..a65fc7a 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -517,6 +517,14 @@ txdesc_writeback(target_phys_addr_t base, struct 
e1000_tx_desc *dp)
 return E1000_ICR_TXDW;
 }
 
+static uint64_t tx_desc_base(E1000State *s)
+{
+uint64_t bah = s-mac_reg[TDBAH];
+uint64_t bal = s-mac_reg[TDBAL]  ~0xf;
+
+return (bah  32) + bal;
+}
+
 static void
 start_xmit(E1000State *s)
 {
@@ -530,7 +538,7 @@ start_xmit(E1000State *s)
 }
 
 while (s-mac_reg[TDH] != s-mac_reg[TDT]) {
-base = ((uint64_t)s-mac_reg[TDBAH]  32) + s-mac_reg[TDBAL] +
+base = tx_desc_base(s) +
sizeof(struct e1000_tx_desc) * s-mac_reg[TDH];
 cpu_physical_memory_read(base, (void *)desc, sizeof(desc));
 
@@ -651,6 +659,14 @@ static bool e1000_has_rxbufs(E1000State *s, size_t 
total_size)
 return total_size = bufs * s-rxbuf_size;
 }
 
+static uint64_t rx_desc_base(E1000State *s)
+{
+uint64_t bah = s-mac_reg[RDBAH];
+uint64_t bal = s-mac_reg[RDBAL]  ~0xf;
+
+return (bah  32) + bal;
+}
+
 static ssize_t
 e1000_receive(VLANClientState *nc, const uint8_t *buf, size_t size)
 {
@@ -700,8 +716,7 @@ e1000_receive(VLANClientState *nc, const uint8_t *buf, 
size_t size)
 if (desc_size  s-rxbuf_size) {
 desc_size = s-rxbuf_size;
 }
-base = ((uint64_t)s-mac_reg[RDBAH]  32) + s-mac_reg[RDBAL] +
-   sizeof(desc) * s-mac_reg[RDH];
+base = rx_desc_base(s) + sizeof(desc) * s-mac_reg[RDH];
 cpu_physical_memory_read(base, (void *)desc, sizeof(desc));
 desc.special = vlan_special;
 desc.status |= (vlan_status | E1000_RXD_STAT_DD);
-- 
1.6.0.2

[Qemu-devel] [PATCH 1/3] cpu-common: Modify cpu_physical_memory_read and cpu_physical_memory_write

2011-03-26 Thread Stefan Weil 
A lot of calls don't operate on bytes but on words or on structured data.
So instead of a pointer to uint8_t, a void pointer is the better choice.

This allows removing many type casts.

(Some very early implementations of memcpy used char pointers
which were replaced by void pointers for the same reason).

Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Stefan Weil w...@mail.berlios.de
---
 cpu-common.h |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/cpu-common.h b/cpu-common.h
index ef4e8da..f44a2b0 100644
--- a/cpu-common.h
+++ b/cpu-common.h
@@ -68,12 +68,12 @@ void cpu_unregister_io_memory(int table_address);
 void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
 int len, int is_write);
 static inline void cpu_physical_memory_read(target_phys_addr_t addr,
-uint8_t *buf, int len)
+void *buf, int len)
 {
 cpu_physical_memory_rw(addr, buf, len, 0);
 }
 static inline void cpu_physical_memory_write(target_phys_addr_t addr,
- const uint8_t *buf, int len)
+ const void *buf, int len)
 {
 cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
 }
-- 
1.7.2.5

[Qemu-devel] [PATCH 3/3] exec: Remove some type casts which are no longer needed

2011-03-26 Thread Stefan Weil 
All other type casts in calls of cpu_physical_memory_read are
used by hardware emulations and will be fixed by separate patches.

Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Stefan Weil w...@mail.berlios.de
---
 monitor.c |   48 ++--
 1 files changed, 18 insertions(+), 30 deletions(-)

diff --git a/monitor.c b/monitor.c
index 76a8207..7653e0b 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2026,7 +2026,7 @@ static void tlb_info_32(Monitor *mon, CPUState *env)
 
 pgd = env-cr[3]  ~0xfff;
 for(l1 = 0; l1  1024; l1++) {
-cpu_physical_memory_read(pgd + l1 * 4, (uint8_t *)pde, 4);
+cpu_physical_memory_read(pgd + l1 * 4, pde, 4);
 pde = le32_to_cpu(pde);
 if (pde  PG_PRESENT_MASK) {
 if ((pde  PG_PSE_MASK)  (env-cr[4]  CR4_PSE_MASK)) {
@@ -2034,8 +2034,7 @@ static void tlb_info_32(Monitor *mon, CPUState *env)
 print_pte(mon, (l1  22), pde, ~((1  21) - 1));
 } else {
 for(l2 = 0; l2  1024; l2++) {
-cpu_physical_memory_read((pde  ~0xfff) + l2 * 4,
- (uint8_t *)pte, 4);
+cpu_physical_memory_read((pde  ~0xfff) + l2 * 4, pte, 4);
 pte = le32_to_cpu(pte);
 if (pte  PG_PRESENT_MASK) {
 print_pte(mon, (l1  22) + (l2  12),
@@ -2056,13 +2055,12 @@ static void tlb_info_pae32(Monitor *mon, CPUState *env)
 
 pdp_addr = env-cr[3]  ~0x1f;
 for (l1 = 0; l1  4; l1++) {
-cpu_physical_memory_read(pdp_addr + l1 * 8, (uint8_t *)pdpe, 8);
+cpu_physical_memory_read(pdp_addr + l1 * 8, pdpe, 8);
 pdpe = le64_to_cpu(pdpe);
 if (pdpe  PG_PRESENT_MASK) {
 pd_addr = pdpe  0x3f000ULL;
 for (l2 = 0; l2  512; l2++) {
-cpu_physical_memory_read(pd_addr + l2 * 8,
- (uint8_t *)pde, 8);
+cpu_physical_memory_read(pd_addr + l2 * 8, pde, 8);
 pde = le64_to_cpu(pde);
 if (pde  PG_PRESENT_MASK) {
 if (pde  PG_PSE_MASK) {
@@ -2072,8 +2070,7 @@ static void tlb_info_pae32(Monitor *mon, CPUState *env)
 } else {
 pt_addr = pde  0x3f000ULL;
 for (l3 = 0; l3  512; l3++) {
-cpu_physical_memory_read(pt_addr + l3 * 8,
- (uint8_t *)pte, 8);
+cpu_physical_memory_read(pt_addr + l3 * 8, pte, 
8);
 pte = le64_to_cpu(pte);
 if (pte  PG_PRESENT_MASK) {
 print_pte(mon, (l1  30 ) + (l2  21)
@@ -2098,13 +2095,12 @@ static void tlb_info_64(Monitor *mon, CPUState *env)
 
 pml4_addr = env-cr[3]  0x3f000ULL;
 for (l1 = 0; l1  512; l1++) {
-cpu_physical_memory_read(pml4_addr + l1 * 8, (uint8_t *)pml4e, 8);
+cpu_physical_memory_read(pml4_addr + l1 * 8, pml4e, 8);
 pml4e = le64_to_cpu(pml4e);
 if (pml4e  PG_PRESENT_MASK) {
 pdp_addr = pml4e  0x3f000ULL;
 for (l2 = 0; l2  512; l2++) {
-cpu_physical_memory_read(pdp_addr + l2 * 8, (uint8_t *)pdpe,
- 8);
+cpu_physical_memory_read(pdp_addr + l2 * 8, pdpe, 8);
 pdpe = le64_to_cpu(pdpe);
 if (pdpe  PG_PRESENT_MASK) {
 if (pdpe  PG_PSE_MASK) {
@@ -2114,8 +2110,7 @@ static void tlb_info_64(Monitor *mon, CPUState *env)
 } else {
 pd_addr = pdpe  0x3f000ULL;
 for (l3 = 0; l3  512; l3++) {
-cpu_physical_memory_read(pd_addr + l3 * 8,
- (uint8_t *)pde, 8);
+cpu_physical_memory_read(pd_addr + l3 * 8, pde, 
8);
 pde = le64_to_cpu(pde);
 if (pde  PG_PRESENT_MASK) {
 if (pde  PG_PSE_MASK) {
@@ -2128,8 +2123,7 @@ static void tlb_info_64(Monitor *mon, CPUState *env)
 for (l4 = 0; l4  512; l4++) {
 cpu_physical_memory_read(pt_addr
  + l4 * 8,
- (uint8_t 
*)pte,
- 8);
+ pte, 8);
 pte = le64_to_cpu(pte);
 if (pte  PG_PRESENT_MASK) {
 print_pte(mon, (l1  39) +
@@ -2207,7 +2201,7 @@ static void

[Qemu-devel] [PATCH 2/3] exec: Remove a type cast which is no longer needed

2011-03-26 Thread Stefan Weil 
All other type casts in calls of cpu_physical_memory_write are
used by hardware emulations and will be fixed by separate patches.

Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Stefan Weil w...@mail.berlios.de
---
 exec.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/exec.c b/exec.c
index 964ce31..d7afe30 100644
--- a/exec.c
+++ b/exec.c
@@ -4249,7 +4249,7 @@ void stw_phys(target_phys_addr_t addr, uint32_t val)
 void stq_phys(target_phys_addr_t addr, uint64_t val)
 {
 val = tswap64(val);
-cpu_physical_memory_write(addr, (const uint8_t *)val, 8);
+cpu_physical_memory_write(addr, val, 8);
 }
 
 /* virtual memory access for debug (includes writing to ROM) */
-- 
1.7.2.5

[Qemu-devel] [PATCH 3/3] monitor: Remove some type casts which are no longer needed

2011-03-26 Thread Stefan Weil 
All other type casts in calls of cpu_physical_memory_read are
used by hardware emulations and will be fixed by separate patches.

v2: Fixed subject line

Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Stefan Weil w...@mail.berlios.de
---
 monitor.c |   48 ++--
 1 files changed, 18 insertions(+), 30 deletions(-)

diff --git a/monitor.c b/monitor.c
index 76a8207..7653e0b 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2026,7 +2026,7 @@ static void tlb_info_32(Monitor *mon, CPUState *env)
 
 pgd = env-cr[3]  ~0xfff;
 for(l1 = 0; l1  1024; l1++) {
-cpu_physical_memory_read(pgd + l1 * 4, (uint8_t *)pde, 4);
+cpu_physical_memory_read(pgd + l1 * 4, pde, 4);
 pde = le32_to_cpu(pde);
 if (pde  PG_PRESENT_MASK) {
 if ((pde  PG_PSE_MASK)  (env-cr[4]  CR4_PSE_MASK)) {
@@ -2034,8 +2034,7 @@ static void tlb_info_32(Monitor *mon, CPUState *env)
 print_pte(mon, (l1  22), pde, ~((1  21) - 1));
 } else {
 for(l2 = 0; l2  1024; l2++) {
-cpu_physical_memory_read((pde  ~0xfff) + l2 * 4,
- (uint8_t *)pte, 4);
+cpu_physical_memory_read((pde  ~0xfff) + l2 * 4, pte, 4);
 pte = le32_to_cpu(pte);
 if (pte  PG_PRESENT_MASK) {
 print_pte(mon, (l1  22) + (l2  12),
@@ -2056,13 +2055,12 @@ static void tlb_info_pae32(Monitor *mon, CPUState *env)
 
 pdp_addr = env-cr[3]  ~0x1f;
 for (l1 = 0; l1  4; l1++) {
-cpu_physical_memory_read(pdp_addr + l1 * 8, (uint8_t *)pdpe, 8);
+cpu_physical_memory_read(pdp_addr + l1 * 8, pdpe, 8);
 pdpe = le64_to_cpu(pdpe);
 if (pdpe  PG_PRESENT_MASK) {
 pd_addr = pdpe  0x3f000ULL;
 for (l2 = 0; l2  512; l2++) {
-cpu_physical_memory_read(pd_addr + l2 * 8,
- (uint8_t *)pde, 8);
+cpu_physical_memory_read(pd_addr + l2 * 8, pde, 8);
 pde = le64_to_cpu(pde);
 if (pde  PG_PRESENT_MASK) {
 if (pde  PG_PSE_MASK) {
@@ -2072,8 +2070,7 @@ static void tlb_info_pae32(Monitor *mon, CPUState *env)
 } else {
 pt_addr = pde  0x3f000ULL;
 for (l3 = 0; l3  512; l3++) {
-cpu_physical_memory_read(pt_addr + l3 * 8,
- (uint8_t *)pte, 8);
+cpu_physical_memory_read(pt_addr + l3 * 8, pte, 
8);
 pte = le64_to_cpu(pte);
 if (pte  PG_PRESENT_MASK) {
 print_pte(mon, (l1  30 ) + (l2  21)
@@ -2098,13 +2095,12 @@ static void tlb_info_64(Monitor *mon, CPUState *env)
 
 pml4_addr = env-cr[3]  0x3f000ULL;
 for (l1 = 0; l1  512; l1++) {
-cpu_physical_memory_read(pml4_addr + l1 * 8, (uint8_t *)pml4e, 8);
+cpu_physical_memory_read(pml4_addr + l1 * 8, pml4e, 8);
 pml4e = le64_to_cpu(pml4e);
 if (pml4e  PG_PRESENT_MASK) {
 pdp_addr = pml4e  0x3f000ULL;
 for (l2 = 0; l2  512; l2++) {
-cpu_physical_memory_read(pdp_addr + l2 * 8, (uint8_t *)pdpe,
- 8);
+cpu_physical_memory_read(pdp_addr + l2 * 8, pdpe, 8);
 pdpe = le64_to_cpu(pdpe);
 if (pdpe  PG_PRESENT_MASK) {
 if (pdpe  PG_PSE_MASK) {
@@ -2114,8 +2110,7 @@ static void tlb_info_64(Monitor *mon, CPUState *env)
 } else {
 pd_addr = pdpe  0x3f000ULL;
 for (l3 = 0; l3  512; l3++) {
-cpu_physical_memory_read(pd_addr + l3 * 8,
- (uint8_t *)pde, 8);
+cpu_physical_memory_read(pd_addr + l3 * 8, pde, 
8);
 pde = le64_to_cpu(pde);
 if (pde  PG_PRESENT_MASK) {
 if (pde  PG_PSE_MASK) {
@@ -2128,8 +2123,7 @@ static void tlb_info_64(Monitor *mon, CPUState *env)
 for (l4 = 0; l4  512; l4++) {
 cpu_physical_memory_read(pt_addr
  + l4 * 8,
- (uint8_t 
*)pte,
- 8);
+ pte, 8);
 pte = le64_to_cpu(pte);
 if (pte  PG_PRESENT_MASK) {
 print_pte(mon, (l1  39) +
@@ -2207,7

[Qemu-devel] Relative/Absolute timing snapshot problem

2011-03-26 Thread Clemens Kolbitsch 
Hi list,

strange situation: When I create a snapshot using Qemu 0.14.0 stable, 
everything works smoothly and resuming the CPU takes about 1-2 seconds. If I 
don't use the snapshot file for some time, the time it takes to resume grows 
by 2-3 seconds per day. At the moment, I'm looking at a snapshot file from 
last week and it takes nearly 30 seconds to load.

Funny thing about it: if I turn my system time back to the date when the 
snapshot was created (or before that), resuming CPU works within the expected 
1-2 seconds. I have _very briefly_ looked into it and it seems like Qemu 
spends an aweful long amount of time catching up with timer execution -- is it 
possible that these are stored using absolute time instead of relative timing?

I am using qcow2 file format, because I absolutely rely on CPU-snapshots and 
support for base-files. I have read here and there that it is more or less 
broken (or at least very slow), but with the correct cache-options it works 
for me (except for this bug, of course).

Has anyone encountered this or should I start looking into it (although I have 
some experience with the core source, I'm not very experienced with the 
snapshotting code).

Thanks,
Clemens

[Qemu-devel] [PATCH] cirrus_vga: Remove unneeded reset

2011-03-26 Thread Stefan Weil 
cirrus_reset is also called by the pci framework,
so there is no need to call it in cirrus_init_common.

Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Stefan Weil w...@mail.berlios.de
---
 hw/cirrus_vga.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index 2724f7b..bdf4c8b 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -3024,7 +3024,6 @@ static void cirrus_init_common(CirrusVGAState * s, int 
device_id, int is_pci)
 s-vga.cursor_draw_line = cirrus_cursor_draw_line;
 
 qemu_register_reset(cirrus_reset, s);
-cirrus_reset(s);
 }
 
 /***
-- 
1.7.2.5

Re: [Qemu-devel] Re: KVM call agenda for Jan 25

2011-03-26 Thread Dushyant Bansal 



On the other hand, I think the starting point for a generic in-place
converter would be a loop that does something like bdrv_is_allocated()
but translates the guest position in the block device into an offset
into the image file.  That, together with some sort of free map or
space allocation bitmap would allow a generic approach to figuring out
the data mapping and which parts of the file can be safely used.
 

We can discuss the detailed API later, but I agree that the critical
thing to convert is the mapping.

You would probably open the file with the source format driver read-only
and with the destination driver read-write. For qcow2 you would start
with writing a refcount table that marks the whole file as used, other
formats use the file size anyway. Then you can start creating L1 and L2
tables and copy the mapping over. Once this is done, you do an fsck to
free the metadata of the old format.

One thing that may become tricky is the image header which both drivers
may want to use and which is fixed at offset 0. And of course, you must
make sure that the image is safe at any point if the converter crashes.
   

For image header issue, this is the approach that comes to mind.
Lets say, destination format is qcow2.
BDRVQcowState is responsible for header fields inside BlockDriverState. 
We need qcow2 image header to initiliaze all the fields of 
BDRVQcowState, which is done by bdrv_open(qcow2_open()).


So initially, for the qcow2 driver, we do not copy the qcow2 image 
header (we keep the source header). We can then manually set fields of 
BDRVQcowState with the desired header fields.
And after all other metadata has been copied for the qcow2 format, we 
can replace the source image header with the qcow2 header.



Thanks,
Dushyant

[Qemu-devel] [PATCH, RFC 0/4] Introduce host, VM and machine states

2011-03-26 Thread Blue Swirl 
The states at this point are just header files with various stuff
thrown in from sysemu.h, but structures could be introduced later,
functions named more consistently and other header files examined.

The patches touch a lot of files, but most of the changes are just one
line adjustments to #include directives.

Blue Swirl (4):
  Introduce host state
  Introduce VM state
  Introduce machine state
  Remove sysemu.h

 acl.c |1 -
 arch_init.c   |3 +-
 arm-semi.c|1 -
 audio/audio.c |2 +-
 audio/winwaveaudio.c  |1 -
 balloon.c |1 -
 block/vdi.c   |1 -
 blockdev.c|2 +-
 bt-host.c |1 -
 bt-vhci.c |1 -
 buffered_file.c   |1 -
 cpus.c|3 +-
 cpus.h|4 +
 device_tree.c |1 -
 gdbstub.c |2 +-
 host-state.h  |   40 
 hw/acpi_piix4.c   |2 +-
 hw/an5206.c   |1 -
 hw/apb_pci.c  |2 +-
 hw/arm_boot.c |2 +-
 hw/arm_sysctl.c   |2 +-
 hw/armv7m.c   |1 -
 hw/axis_dev88.c   |1 -
 hw/blizzard.c |1 -
 hw/bonito.c   |2 +-
 hw/bt-hci-csr.c   |1 -
 hw/cbus.c |2 +-
 hw/cris-boot.c|1 -
 hw/cuda.c |2 +-
 hw/dummy_m68k.c   |1 -
 hw/e1000.c|2 +-
 hw/eepro100.c |2 +-
 hw/etraxfs.c  |1 -
 hw/etraxfs_dma.c  |2 +-
 hw/etraxfs_timer.c|2 +-
 hw/fdc.c  |2 +-
 hw/fw_cfg.c   |4 +-
 hw/gumstix.c  |1 -
 hw/ide/cmd646.c   |2 +-
 hw/ide/core.c |3 +-
 hw/ide/ich.c  |1 -
 hw/ide/isa.c  |1 -
 hw/ide/macio.c|1 -
 hw/ide/microdrive.c   |1 -
 hw/ide/mmio.c |1 -
 hw/ide/pci.c  |1 -
 hw/ide/piix.c |2 +-
 hw/ide/qdev.c |2 +-
 hw/ide/via.c  |2 +-
 hw/integratorcp.c |1 -
 hw/isa-bus.c  |1 -
 hw/kvmclock.c |1 -
 hw/lan9118.c  |2 +-
 hw/leon3.c|2 +-
 hw/lm32_boards.c  |1 -
 hw/lm32_sys.c |2 +-
 hw/loader.c   |2 +-
 hw/m48t59.c   |2 +-
 hw/mac_nvram.c|2 +-
 hw/mainstone.c|1 -
 hw/mc146818rtc.c  |2 +-
 hw/mcf5206.c  |2 +-
 hw/mcf5208.c  |2 +-
 hw/mips_fulong2e.c|2 +-
 hw/mips_jazz.c|2 +-
 hw/mips_malta.c   |2 +-
 hw/mips_mipssim.c |2 +-
 hw/mips_r4k.c |2 +-
 hw/multiboot.c|2 +-
 hw/musicpal.c |2 +-
 hw/ne2000.c   |2 +-
 hw/nseries.c  |2 +-
 hw/omap1.c|2 +-
 hw/omap2.c|2 +-
 hw/omap_sx1.c |1 -
 hw/palm.c |2 +-
 hw/parallel.c |2 +-
 hw/pc.c   |2 +-
 hw/pc_piix.c  |2 +-
 hw/pci-hotplug.c  |1 +
 hw/pci-stub.c |2 +-
 hw/pci.c  |2 +-
 hw/pcie.c |2 +-
 hw/pcie_aer.c |2 +-
 hw/pckbd.c|2 +-
 hw/pcnet.c|2 +-
 hw/petalogix_ml605_mmu.c  |2 +-
 hw/petalogix_s3adsp1800_mmu.c |1 -
 hw/ppc.c  |2 +-
 hw/ppc405_boards.c|2 +-
 hw/ppc405_uc.c|2 +-
 hw/ppc440.c   |2 +-
 hw/ppc440_bamboo.c|1 -
 hw/ppc4xx_devs.c  |1 -
 hw/ppc_newworld.c |2 +-
 hw/ppc_oldworld.c |2 +-
 hw/ppc_prep.c |2 +-
 hw/ppce500_mpc8544ds.c|2 +-
 hw/pxa2xx.c   |2 +-
 hw/pxa2xx_lcd.c   |4 +-
 hw/pxa2xx_timer.c |2 +-
 hw/qdev.c |2 +-
 hw/qxl.c  |1 -
 hw/r2d.c  |2 +-
 hw/realview.c |2 +-
 hw/rtl8139.c  |2 +-
 hw/s390-virtio-bus.c  |1 -
 hw/s390-virtio.c  |1 -
 hw/scsi-disk.c|3 +-
 hw/serial.c   |2 +-
 hw/sh7750.c   |2 +-
 hw/shix.c |2 +-
 hw/slavio_misc.c

[Qemu-devel] [PATCH 1/4] Introduce host state

2011-03-26 Thread Blue Swirl 
Move host specific state (not guest visible except for PV, unrelated to
any specific target machine, VM, VCPU or devices) declarations
to host-state.h.

Move macro TFR to qemu-common.h, so that qemu-char.c does not need
to include sysemu.h.

Signed-off-by: Blue Swirl blauwir...@gmail.com
---
 host-state.h |   40 
 hw/fw_cfg.c  |1 +
 hw/usb-bus.c |2 +-
 hw/xen_devconfig.c   |1 +
 hw/xen_domainbuild.c |1 +
 monitor.c|1 +
 os-posix.c   |1 +
 oslib-win32.c|2 +-
 qemu-char.c  |2 +-
 qemu-common.h|1 +
 sysemu.h |   31 ---
 ui/curses.c  |2 +-
 ui/sdl.c |1 +
 ui/vnc.c |2 +-
 usb-linux.c  |2 +-
 vl.c |1 +
 16 files changed, 54 insertions(+), 37 deletions(-)
 create mode 100644 host-state.h

diff --git a/host-state.h b/host-state.h
new file mode 100644
index 000..0974405
--- /dev/null
+++ b/host-state.h
@@ -0,0 +1,40 @@
+#ifndef QEMU_HOST_STATE_H
+#define QEMU_HOST_STATE_H
+/*
+ * Host state: All state which is not guest visible except for PV,
+ * unrelated to any specific target machine, VM, VCPU or devices.
+ */
+
+#include notify.h
+
+typedef enum DisplayType
+{
+DT_DEFAULT,
+DT_CURSES,
+DT_SDL,
+DT_NOGRAPHIC,
+DT_NONE,
+} DisplayType;
+
+extern DisplayType display_type;
+extern int alt_grab;
+extern int ctrl_grab;
+extern int cursor_hide;
+extern int no_quit;
+extern int no_shutdown;
+extern const char *qemu_name;
+extern const char *keyboard_layout;
+
+void qemu_add_exit_notifier(Notifier *notify);
+void qemu_remove_exit_notifier(Notifier *notify);
+void qemu_system_killed(int signal, pid_t pid);
+void qemu_kill_report(void);
+
+/* SLIRP */
+void do_info_slirp(Monitor *mon);
+
+void do_usb_add(Monitor *mon, const QDict *qdict);
+void do_usb_del(Monitor *mon, const QDict *qdict);
+void usb_info(Monitor *mon);
+
+#endif
diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c
index 85c8c3c..3c191d0 100644
--- a/hw/fw_cfg.c
+++ b/hw/fw_cfg.c
@@ -26,6 +26,7 @@
 #include isa.h
 #include fw_cfg.h
 #include sysbus.h
+#include host-state.h

 /* debug firmware config */
 //#define DEBUG_FW_CFG
diff --git a/hw/usb-bus.c b/hw/usb-bus.c
index abc7e61..7c769ae 100644
--- a/hw/usb-bus.c
+++ b/hw/usb-bus.c
@@ -1,8 +1,8 @@
 #include hw.h
 #include usb.h
 #include qdev.h
-#include sysemu.h
 #include monitor.h
+#include host-state.h

 static void usb_bus_dev_print(Monitor *mon, DeviceState *qdev, int indent);

diff --git a/hw/xen_devconfig.c b/hw/xen_devconfig.c
index 8d50216..b99d504 100644
--- a/hw/xen_devconfig.c
+++ b/hw/xen_devconfig.c
@@ -1,6 +1,7 @@
 #include xen_backend.h
 #include blockdev.h
 #include block_int.h /* XXX */
+#include host-state.h

 /* - */

diff --git a/hw/xen_domainbuild.c b/hw/xen_domainbuild.c
index 371c562..9440864 100644
--- a/hw/xen_domainbuild.c
+++ b/hw/xen_domainbuild.c
@@ -4,6 +4,7 @@
 #include sysemu.h
 #include qemu-timer.h
 #include qemu-log.h
+#include host-state.h

 #include xenguest.h

diff --git a/monitor.c b/monitor.c
index 76a8207..d8cf21d 100644
--- a/monitor.c
+++ b/monitor.c
@@ -61,6 +61,7 @@
 #include trace.h
 #endif
 #include ui/qemu-spice.h
+#include host-state.h

 //#define DEBUG
 //#define DEBUG_COMPLETION
diff --git a/os-posix.c b/os-posix.c
index eb49e2f..e6097c6 100644
--- a/os-posix.c
+++ b/os-posix.c
@@ -38,6 +38,7 @@
 #include sysemu.h
 #include net/slirp.h
 #include qemu-options.h
+#include host-state.h

 #ifdef CONFIG_LINUX
 #include sys/prctl.h
diff --git a/oslib-win32.c b/oslib-win32.c
index 5f0759f..c542a39 100644
--- a/oslib-win32.c
+++ b/oslib-win32.c
@@ -27,9 +27,9 @@
  */
 #include windows.h
 #include config-host.h
-#include sysemu.h
 #include trace.h
 #include qemu_socket.h
+#include host-state.h

 void *qemu_oom_check(void *ptr)
 {
diff --git a/qemu-char.c b/qemu-char.c
index 03858d4..6f2156d 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -25,7 +25,6 @@
 #include net.h
 #include monitor.h
 #include console.h
-#include sysemu.h
 #include qemu-timer.h
 #include qemu-char.h
 #include hw/usb.h
@@ -98,6 +97,7 @@

 #include qemu_socket.h
 #include ui/qemu-spice.h
+#include host-state.h

 #define READ_BUF_LEN 4096

diff --git a/qemu-common.h b/qemu-common.h
index 7a96dd1..8a52f14 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -12,6 +12,7 @@
 #endif

 #define QEMU_BUILD_BUG_ON(x) typedef char __build_bug_on__##__LINE__[(x)?-1:1];
+#define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR)

 typedef struct QEMUTimer QEMUTimer;
 typedef struct QEMUFile QEMUFile;
diff --git a/sysemu.h b/sysemu.h
index bbbd0fd..8e54a01 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -25,7 +25,6 @@ extern const char *bios_name;
 char *qemu_find_file(int type, const char *name);

 extern int vm_running;
-extern const char *qemu_name;
 extern uint8_t qemu_uuid[];

Re: [Qemu-devel] [PATCH 1/3] arm: basic support for ARMv4/ARMv4T emulation

2011-03-26 Thread Dmitry Eremin-Solenikov 
On 3/26/11, Peter Maydell peter.mayd...@linaro.org wrote:
 On 26 March 2011 17:23, Dmitry Eremin-Solenikov dbarysh...@gmail.com
 wrote:
 Can we assume (maybe temporarily) that all v5 are also v5TE?
 It seems it's currently done so, and I don't want to be too intrusive.

 All the cores we currently model that are v5 are v5TE, I think.
 The current (v7) ARM ARM says the valid v5 variants are
 v5T, v5TE and v5TEJ (with plain ARMv5 only being in an
 obsolete variants list), so I think we should distinguish v5T

Isn't there also the v5TExP? For which I know no chips in the wild.

 and v5TE (the only difference being that a handful of instructions
 are v5TE only, so that isn't a very intrusive change, it's just
 saying ARCH(5TE) in a few of the places where your patch has ARCH(5)).

 So I think we should have ENABLE_ARCH_5T and ENABLE_ARCH_5TE macros
 so we can use ARCH(5T) and ARCH(5TE), and not bother with a plain
 ARCH(5) since it's obsolete...

 (Mostly what I'd like is for us to use the right value of 'foo'
 where we add ARCH(foo) checks, just so we can trust them in future
 and don't have to go back and recheck them. I don't mind if they
 all turn out to be checking the same actual feature flag.)

OK. I can then try to check all ARCH(5), substituting them if necessary with
ARCH(5TE) or (5T), but for now this will just end with check for ARM_FEATURE_V5.
Did I get your idea correct? But this (most probably) will be more or
less with low
priority patch idea for me.

-- 
With best wishes
Dmitry

[Qemu-devel] [PATCH 2/4] Introduce VM state

2011-03-26 Thread Blue Swirl 
Move all state related to current VM and migration to vm-state.h.

Signed-off-by: Blue Swirl blauwir...@gmail.com
---
 arch_init.c  |1 +
 audio/audio.c|2 +-
 blockdev.c   |2 +-
 cpus.c   |1 +
 gdbstub.c|2 +-
 hw/fw_cfg.c  |1 +
 hw/ide/cmd646.c  |2 +-
 hw/ide/core.c|1 +
 hw/ide/piix.c|2 +-
 hw/ide/via.c |2 +-
 hw/scsi-disk.c   |1 +
 hw/smbios.c  |1 +
 hw/sun4m.c   |1 +
 hw/usb-msd.c |1 +
 hw/virtio.h  |1 +
 hw/watchdog.c|1 +
 hw/xen_domainbuild.c |2 +-
 hw/xenfb.c   |2 +-
 kvm-all.c|1 +
 migration.c  |2 +-
 monitor.c|1 +
 qemu-timer.c |1 +
 savevm.c |1 +
 sysemu.h |   49 -
 target-i386/kvm.c|1 +
 ui/sdl.c |1 +
 vl.c |1 +
 vm-state.h   |   59 ++
 28 files changed, 85 insertions(+), 58 deletions(-)
 create mode 100644 vm-state.h

diff --git a/arch_init.c b/arch_init.c
index 0c09f91..2dac75c 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -41,6 +41,7 @@
 #include net.h
 #include gdbstub.h
 #include hw/smbios.h
+#include vm-state.h

 #ifdef TARGET_SPARC
 int graphic_width = 1024;
diff --git a/audio/audio.c b/audio/audio.c
index 50d2b64..c9fcbba 100644
--- a/audio/audio.c
+++ b/audio/audio.c
@@ -25,7 +25,7 @@
 #include audio.h
 #include monitor.h
 #include qemu-timer.h
-#include sysemu.h
+#include vm-state.h

 #define AUDIO_CAP audio
 #include audio_int.h
diff --git a/blockdev.c b/blockdev.c
index ecf2252..8a38c6b 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -13,9 +13,9 @@
 #include qerror.h
 #include qemu-option.h
 #include qemu-config.h
-#include sysemu.h
 #include hw/qdev.h
 #include block_int.h
+#include vm-state.h

 static QTAILQ_HEAD(drivelist, DriveInfo) drives =
QTAILQ_HEAD_INITIALIZER(drives);

diff --git a/cpus.c b/cpus.c
index 41bec7c..0dce227 100644
--- a/cpus.c
+++ b/cpus.c
@@ -35,6 +35,7 @@
 #include qemu-thread.h
 #include cpus.h
 #include compatfd.h
+#include vm-state.h

 #ifdef SIGRTMIN
 #define SIG_IPI (SIGRTMIN+4)
diff --git a/gdbstub.c b/gdbstub.c
index 1e9f931..c1745a9 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -31,8 +31,8 @@
 #else
 #include monitor.h
 #include qemu-char.h
-#include sysemu.h
 #include gdbstub.h
+#include vm-state.h
 #endif

 #define MAX_PACKET_LENGTH 4096
diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c
index 3c191d0..0eb862f 100644
--- a/hw/fw_cfg.c
+++ b/hw/fw_cfg.c
@@ -27,6 +27,7 @@
 #include fw_cfg.h
 #include sysbus.h
 #include host-state.h
+#include vm-state.h

 /* debug firmware config */
 //#define DEBUG_FW_CFG
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 5d5464a..91f5082 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -28,8 +28,8 @@
 #include hw/isa.h
 #include block.h
 #include block_int.h
-#include sysemu.h
 #include dma.h
+#include vm-state.h

 #include hw/ide/pci.h

diff --git a/hw/ide/core.c b/hw/ide/core.c
index 007a4ee..342feb1 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -33,6 +33,7 @@
 #include blockdev.h

 #include hw/ide/internal.h
+#include vm-state.h

 /* These values were based on a Seagate ST3500418AS but have been modified
to make more sense in QEMU */
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index c349644..7594bca 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -28,8 +28,8 @@
 #include hw/isa.h
 #include block.h
 #include block_int.h
-#include sysemu.h
 #include dma.h
+#include vm-state.h

 #include hw/ide/pci.h

diff --git a/hw/ide/via.c b/hw/ide/via.c
index 04f3290..e260bc5 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -29,8 +29,8 @@
 #include hw/isa.h
 #include block.h
 #include block_int.h
-#include sysemu.h
 #include dma.h
+#include vm-state.h

 #include hw/ide/pci.h

diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c
index b05e654..c3f60e0 100644
--- a/hw/scsi-disk.c
+++ b/hw/scsi-disk.c
@@ -37,6 +37,7 @@ do { fprintf(stderr, scsi-disk:  fmt , ##
__VA_ARGS__); } while (0)
 #include scsi-defs.h
 #include sysemu.h
 #include blockdev.h
+#include vm-state.h

 #define SCSI_DMA_BUF_SIZE131072
 #define SCSI_MAX_INQUIRY_LEN 256
diff --git a/hw/smbios.c b/hw/smbios.c
index a3ae1de..95f9935 100644
--- a/hw/smbios.c
+++ b/hw/smbios.c
@@ -14,6 +14,7 @@
 #include sysemu.h
 #include smbios.h
 #include loader.h
+#include vm-state.h

 /*
  * Structures shared with the BIOS
diff --git a/hw/sun4m.c b/hw/sun4m.c
index df3aa32..6719bdf 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -42,6 +42,7 @@
 #include elf.h
 #include blockdev.h
 #include trace.h
+#include host-state.h

 /*
  * Sun4m architecture was used in the following machines:
diff --git a/hw/usb-msd.c b/hw/usb-msd.c
index 76f5b02..edd3f3b 100644
--- a/hw/usb-msd.c
+++ b/hw/usb-msd.c
@@ -17,6 +17,7 @@
 #include monitor.h
 #include sysemu.h
 #include blockdev.h

Re: [Qemu-devel] [PATCH 1/3] arm: basic support for ARMv4/ARMv4T emulation

2011-03-26 Thread Peter Maydell 
I've just gone through this distinguishing v5 sublevels.
I've also gone back and looked up an older ARM ARM for any v5 vs
v5T differences, and it looks like the only difference really is
whether Thumb mode works: the ARM instruction set is exactly the
same including the existence of BX/BLX.

So I'm going to go back on what I suggested earlier, and say
that I think leaving it as ARCH(5) is better than ARCH(5T).
Sorry for the flip-flopping here.

I've marked up all the ARCH() uses in this patch, even the bits
which are correct as they stand, just for clarity. The rough
summary is that five lines need to change to 5TE.

On v5TExP -- yes, that's another one in the v7 ARM ARM's
list of obsolete variants.


On 24 March 2011 22:07, Dmitry Eremin-Solenikov dbarysh...@gmail.com wrote:

 @@ -6129,6 +6131,7 @@ static void disas_arm_insn(CPUState * env, DisasContext 
 *s)
                 }
             }
             /* Otherwise PLD; v5TE+ */
 +            ARCH(5);

5TE.

             return;
         }
         if (((insn  0x0f70f000) == 0x0450f000) ||
 @@ -6255,6 +6258,7 @@ static void disas_arm_insn(CPUState * env, DisasContext 
 *s)
             /* branch link and change to thumb (blx offset) */
             int32_t offset;

 +            ARCH(5);

5, so delete as covered by the top level ARCH(5) for any unconditional insn.

             val = (uint32_t)s-pc;
             tmp = tcg_temp_new_i32();
             tcg_gen_movi_i32(tmp, val);
 @@ -6268,6 +6272,7 @@ static void disas_arm_insn(CPUState * env, DisasContext 
 *s)
             gen_bx_im(s, val);
             return;
         } else if ((insn  0x0e000f00) == 0x0c000100) {
 +            ARCH(5);

Can remove, IWMMXT implies 5 anyway.

             if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
                 /* iWMMXt register transfer.  */
                 if (env-cp15.c15_cpar  (1  1))
 @@ -6276,8 +6281,10 @@ static void disas_arm_insn(CPUState * env, 
 DisasContext *s)
             }
         } else if ((insn  0x0fe0) == 0x0c40) {
             /* Coprocessor double register transfer.  */
 +            ARCH(5);

5TE.

         } else if ((insn  0x0f10) == 0x0e10) {
             /* Additional coprocessor register transfer.  */
 +            ARCH(5);

5 (so deletable).

         } else if ((insn  0x0ff10020) == 0x0100) {
             uint32_t mask;
             uint32_t val;


 @@ -6376,10 +6383,12 @@ static void disas_arm_insn(CPUState * env, 
 DisasContext *s)
         case 0x1:
             if (op1 == 1) {
                 /* branch/exchange thumb (bx).  */
 +                ARCH(4T);

4T.

                 tmp = load_reg(s, rm);
                 gen_bx(s, tmp);
             } else if (op1 == 3) {
                 /* clz */
 +                ARCH(5);

5.

                 rd = (insn  12)  0xf;
                 tmp = load_reg(s, rm);
                 gen_helper_clz(tmp, tmp);
 @@ -6402,6 +6411,7 @@ static void disas_arm_insn(CPUState * env, DisasContext 
 *s)
             if (op1 != 1)
               goto illegal_op;

 +            ARCH(5);

5. (the v5 ARM ARM says BLX works on a non-T v5, it just means
you go into a state where everything undefs).

             /* branch link/exchange thumb (blx) */
             tmp = load_reg(s, rm);
             tmp2 = tcg_temp_new_i32();
 @@ -6410,6 +6420,7 @@ static void disas_arm_insn(CPUState * env, DisasContext 
 *s)
             gen_bx(s, tmp);
             break;
         case 0x5: /* saturating add/subtract */
 +            ARCH(5);

5TE.

             rd = (insn  12)  0xf;
             rn = (insn  16)  0xf;
             tmp = load_reg(s, rm);
 @@ -6431,12 +6442,14 @@ static void disas_arm_insn(CPUState * env, 
 DisasContext *s)
                 goto illegal_op;
             }
             /* bkpt */
 +            ARCH(5);

5.

             gen_exception_insn(s, 4, EXCP_BKPT);
             break;
         case 0x8: /* signed multiply */
         case 0xa:
         case 0xc:
         case 0xe:
 +            ARCH(5);

5TE.

             rs = (insn  8)  0xf;
             rn = (insn  12)  0xf;
             rd = (insn  16)  0xf;
 @@ -6832,6 +6845,7 @@ static void disas_arm_insn(CPUState * env, DisasContext 
 *s)
                     }
                     load = 1;
                 } else if (sh  2) {
 +                    ARCH(5);

5TE.

                     /* doubleword */
                     if (sh  1) {
                         /* store */

-- PMM