Re: [Qemu-devel] [PATCH 0/2] Lost VNC patches

[Corentin Chary]

On Wed, Mar 14, 2012 at 11:16 PM, Stefan Weil  wrote:
> Am 14.03.2012 22:46, schrieb Anthony Liguori:
>
>> On 03/14/2012 01:58 AM, Corentin Chary wrote:
>>>
>>> Hi Anthony,
>>>
>>> Please merge these two patchs from another age, they fix crash in the VNC
>>> server (the iohandler one is only for the threaded server).
>>
>>
>> Applied.  Thanks.
>>
>> Regards,
>>
>> Anthony Liguori
>>
>
> The commit time of my patch was modified here. I had sent the patch on
> March 15, 2011, 6:45 p.m., so you could also have waited a day longer
> until its first birthday :-)
>
> There is a more serious background why I write this mail: commit
> requests should not modify the time when a patch was written.
>
> See http://patchwork.ozlabs.org/patch/87029/ for the original.

Hello Stefan,

Sorry for that, but date was correct on the patch I've sent, it seems
that some smtp server (or the list ?) took the liberty to change it.
I should have sent a pull link instead.

Thanks,

-- 
Corentin Chary
http://xf.iksaif.net

Re: [Qemu-devel] Debug single program in QEMU

[Mulyadi Santosa]

On Thu, Mar 15, 2012 at 09:12, Yue Chen  wrote:
> Hi!~
>
> Now I'd like to see what the micro-ops (intermediate operations generated by
> TCG) of a single Linux or Windows program, any approach to do this under
> QEMU? Thanks.

are you referring to you Qemu system emulation or Qemu user mode?

-- 
regards,

Mulyadi Santosa
Freelance Linux trainer and consultant

blog: the-hydra.blogspot.com
training: mulyaditraining.blogspot.com

Re: [Qemu-devel] [V4 PATCH 2/5] net: announce self after vm start

[Jason Wang]

On 03/13/2012 10:23 PM, Michael S. Tsirkin wrote:

On Tue, Mar 13, 2012 at 04:56:22PM +0800, Jason Wang wrote:

This patch moves qemu_announce_self() to vm_start() and add a new parameters to
control whether sending gratuitous packet is needed. There are several reasons
to do this:

- Gratuitous packet is also needed when we resume a stopped vm or successfully
   load a state.

Why is it needed when we continue a stopped vm?


If we stop a vm for a little long time, the mac table entry in the 
switch would also be expired. So we need to announce again.



- Sending gratuitous packets may be done through co-operation with guest, so
   this work should be done after vm is started.

Signed-off-by: Jason Wang
---
  gdbstub.c   |2 +-
  migration.c |5 ++---
  monitor.c   |2 +-
  qmp.c   |2 +-
  savevm.c|2 +-
  sysemu.h|2 +-
  vl.c|7 +--
  7 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/gdbstub.c b/gdbstub.c
index ef95ac2..f4d22e5 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -371,7 +371,7 @@ static inline void gdb_continue(GDBState *s)
  #ifdef CONFIG_USER_ONLY
  s->running_state = 1;
  #else
-vm_start();
+vm_start(false);
  #endif
  }

diff --git a/migration.c b/migration.c
index 00fa1e3..40332d2 100644
--- a/migration.c
+++ b/migration.c
@@ -88,14 +88,13 @@ void process_incoming_migration(QEMUFile *f)
  fprintf(stderr, "load of migration failed\n");
  exit(0);
  }
-qemu_announce_self();
  DPRINTF("successfully loaded vm state\n");

  /* Make sure all file formats flush their mutable metadata */
  bdrv_invalidate_cache_all();

  if (autostart) {
-vm_start();
+vm_start(true);
  } else {
  runstate_set(RUN_STATE_PRELAUNCH);
  }
@@ -274,7 +273,7 @@ static void migrate_fd_put_ready(void *opaque)
  }
  if (s->state != MIG_STATE_COMPLETED) {
  if (old_vm_running) {
-vm_start();
+vm_start(false);
  }
  }
  }
diff --git a/monitor.c b/monitor.c
index cbdfbad..0b63c11 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2260,7 +2260,7 @@ static void do_loadvm(Monitor *mon, const QDict *qdict)
  vm_stop(RUN_STATE_RESTORE_VM);

  if (load_vmstate(name) == 0&&  saved_vm_running) {
-vm_start();
+vm_start(true);
  }
  }

diff --git a/qmp.c b/qmp.c
index a182b51..252c842 100644
--- a/qmp.c
+++ b/qmp.c
@@ -160,7 +160,7 @@ void qmp_cont(Error **errp)
  return;
  }

-vm_start();
+vm_start(true);
  }

  void qmp_system_wakeup(Error **errp)
diff --git a/savevm.c b/savevm.c
index 5b59826..82b9d3a 100644
--- a/savevm.c
+++ b/savevm.c
@@ -2107,7 +2107,7 @@ void do_savevm(Monitor *mon, const QDict *qdict)

   the_end:
  if (saved_vm_running)
-vm_start();
+vm_start(false);
  }

  int load_vmstate(const char *name)
diff --git a/sysemu.h b/sysemu.h
index 98118cc..787edd4 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -34,7 +34,7 @@ void vm_state_notify(int running, RunState state);
  #define VMRESET_SILENT   false
  #define VMRESET_REPORT   true

-void vm_start(void);
+void vm_start(bool announce);
  void vm_stop(RunState state);
  void vm_stop_force_state(RunState state);

diff --git a/vl.c b/vl.c
index 65f11f2..4e04f82 100644
--- a/vl.c
+++ b/vl.c
@@ -1258,7 +1258,7 @@ void vm_state_notify(int running, RunState state)
  }
  }

-void vm_start(void)
+void vm_start(bool announce)
  {
  if (!runstate_is_running()) {
  cpu_enable_ticks();
@@ -1266,6 +1266,9 @@ void vm_start(void)
  vm_state_notify(1, RUN_STATE_RUNNING);
  resume_all_vcpus();
  monitor_protocol_event(QEVENT_RESUME, NULL);
+if (announce) {
+qemu_announce_self();
+}
  }
  }

@@ -3619,7 +3622,7 @@ int main(int argc, char **argv, char **envp)
  exit(ret);
  }
  } else if (autostart) {
-vm_start();
+vm_start(false);
  }

  os_setup_post();

Re: [Qemu-devel] [V4 PATCH 2/5] net: announce self after vm start

[Jason Wang]

On 03/13/2012 05:18 PM, Paolo Bonzini wrote:

Il 13/03/2012 09:56, Jason Wang ha scritto:

This patch moves qemu_announce_self() to vm_start() and add a new parameters to
control whether sending gratuitous packet is needed. There are several reasons
to do this:

- Gratuitous packet is also needed when we resume a stopped vm or successfully
   load a state.
- Sending gratuitous packets may be done through co-operation with guest, so
   this work should be done after vm is started.

Signed-off-by: Jason Wang
---
  gdbstub.c   |2 +-
  migration.c |5 ++---
  monitor.c   |2 +-
  qmp.c   |2 +-
  savevm.c|2 +-
  sysemu.h|2 +-
  vl.c|7 +--
  7 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/gdbstub.c b/gdbstub.c
index ef95ac2..f4d22e5 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -371,7 +371,7 @@ static inline void gdb_continue(GDBState *s)
  #ifdef CONFIG_USER_ONLY
  s->running_state = 1;
  #else
-vm_start();
+vm_start(false);
  #endif

Here we're switching from RUNSTATE_DEBUG.


  }

diff --git a/migration.c b/migration.c
index 00fa1e3..40332d2 100644
--- a/migration.c
+++ b/migration.c
@@ -88,14 +88,13 @@ void process_incoming_migration(QEMUFile *f)
  fprintf(stderr, "load of migration failed\n");
  exit(0);
  }
-qemu_announce_self();
  DPRINTF("successfully loaded vm state\n");

  /* Make sure all file formats flush their mutable metadata */
  bdrv_invalidate_cache_all();

  if (autostart) {
-vm_start();
+vm_start(true);

Here from RUN_STATE_INMIGRATE.


  } else {
  runstate_set(RUN_STATE_PRELAUNCH);
  }
@@ -274,7 +273,7 @@ static void migrate_fd_put_ready(void *opaque)
  }
  if (s->state != MIG_STATE_COMPLETED) {
  if (old_vm_running) {
-vm_start();
+vm_start(false);

Here from RUN_STATE_FINISH_MIGRATE.


  }
  }
  }
diff --git a/monitor.c b/monitor.c
index cbdfbad..0b63c11 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2260,7 +2260,7 @@ static void do_loadvm(Monitor *mon, const QDict *qdict)
  vm_stop(RUN_STATE_RESTORE_VM);

  if (load_vmstate(name) == 0&&  saved_vm_running) {
-vm_start();
+vm_start(true);

Here from RUN_STATE_RESTORE_VM.


  }
  }

diff --git a/qmp.c b/qmp.c
index a182b51..252c842 100644
--- a/qmp.c
+++ b/qmp.c
@@ -160,7 +160,7 @@ void qmp_cont(Error **errp)
  return;
  }

-vm_start();
+vm_start(true);

Here from RUN_STATE_PAUSED or RUN_STATE_PRELAUNCH.

This introduces a difference here with "qemu -S" + cont, and "qemu".
The former will send a gratuitous ARP, the latter won't.  Is this
desired/harmless/...?


Not desired but harmless I think.

And indeed there're two possibilities:

- start a fresh vm with -S, and then continue the vm.
- migrate a guest with -S option used in destination, and then continue 
the vm.


It's a little hard to differentiate one from another just in vm_stop().



  }

  void qmp_system_wakeup(Error **errp)
diff --git a/savevm.c b/savevm.c
index 5b59826..82b9d3a 100644
--- a/savevm.c
+++ b/savevm.c
@@ -2107,7 +2107,7 @@ void do_savevm(Monitor *mon, const QDict *qdict)

   the_end:
  if (saved_vm_running)
-vm_start();
+vm_start(false);
  }

This is RUN_STATE_SAVE_VM.



  int load_vmstate(const char *name)
diff --git a/sysemu.h b/sysemu.h
index 98118cc..787edd4 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -34,7 +34,7 @@ void vm_state_notify(int running, RunState state);
  #define VMRESET_SILENT   false
  #define VMRESET_REPORT   true

-void vm_start(void);
+void vm_start(bool announce);
  void vm_stop(RunState state);
  void vm_stop_force_state(RunState state);

diff --git a/vl.c b/vl.c
index 65f11f2..4e04f82 100644
--- a/vl.c
+++ b/vl.c
@@ -1258,7 +1258,7 @@ void vm_state_notify(int running, RunState state)
  }
  }

-void vm_start(void)
+void vm_start(bool announce)
  {
  if (!runstate_is_running()) {
  cpu_enable_ticks();
@@ -1266,6 +1266,9 @@ void vm_start(void)
  vm_state_notify(1, RUN_STATE_RUNNING);
  resume_all_vcpus();
  monitor_protocol_event(QEVENT_RESUME, NULL);
+if (announce) {
+qemu_announce_self();
+}
  }
  }

@@ -3619,7 +3622,7 @@ int main(int argc, char **argv, char **envp)
  exit(ret);
  }
  } else if (autostart) {
-vm_start();
+vm_start(false);
  }

This is RUN_STATE_PRELAUNCH.

To some up, it seems like whether to send an announcement depends on the
previous runstate: it should be sent only for RUN_STATE_INMIGRATE,
RUN_STATE_RESTORE_VM and (new with your patch) RUN_STATE_PAUSED.  So
perhaps the new argument to vm_start is not needed.

Paolo


Make sense, thanks.


  os_setup_post();

[Qemu-devel] [Bug 938431] Re: Reproducible crash in slirp_remque (qemu 1.0.1)

[Craig Ringer]

Correction, the bug is still present in qemu-git. It seems to be
slightly harder to trigger, but that might just be luck too. Here's the
crash in qemu master 217bfb445b54db618a30f3a39170bebd9fd9dbf2 .


Program received signal SIGSEGV, Segmentation fault.
[Switching to Thread 0xb63d36e0 (LWP 32412)]
0xb7679517 in slirp_remque (a=0xb9119cf0) at slirp/misc.c:39
39((struct quehead *)(element->qh_rlink))->qh_link = element->qh_link;
(gdb) bt
#0  0xb7679517 in slirp_remque (a=0xb9119cf0) at slirp/misc.c:39
#1  0xb7677489 in if_start (slirp=0xb87a6eb8) at slirp/if.c:189
#2  0xb767738f in if_output (so=0xb8f6e348, ifm=0xb911a348) at slirp/if.c:138
#3  0xb7678b91 in ip_output (so=0xb8f6e348, m0=0xb911a348) at 
slirp/ip_output.c:84
#4  0xb7681578 in tcp_output (tp=0xb8eacb48) at slirp/tcp_output.c:456
#5  0xb7683b77 in tcp_timers (tp=0xb8eacb48, timer=0) at slirp/tcp_timer.c:242
#6  0xb76838b0 in tcp_slowtimo (slirp=0xb87a6eb8) at slirp/tcp_timer.c:88
#7  0xb767b636 in slirp_select_poll (readfds=0xbfb3a1ec, writefds=0xbfb3a26c, 
xfds=0xbfb3a2ec, select_error=0) at slirp/slirp.c:433
#8  0xb7630028 in main_loop_wait (nonblocking=0) at main-loop.c:465
#9  0xb7624dca in main_loop () at /home/craig/projects/QEMU/vl.c:1481
#10 0xb762a628 in main (argc=20, argv=0xbfb3a6f4, envp=0xbfb3a748) at 
/home/craig/projects/QEMU/vl.c:3485
(gdb) 


Thread 18 (Thread 0xb29cfb70 (LWP 32487)):
#0  0xb74d3424 in __kernel_vsyscall ()
No symbol table info available.
#1  0xb7321e04 in pthread_cond_timedwait@@GLIBC_2.3.2 () at 
../nptl/sysdeps/unix/sysv/linux/i386/i686/../i486/pthread_cond_timedwait.S:236
No locals.
#2  0xb7641112 in cond_timedwait (cond=0xb7d201e0, mutex=0xb7d201c0, 
ts=0xb29cf35c) at posix-aio-compat.c:104
ret = 0
#3  0xb76418f4 in aio_thread (unused=0x0) at posix-aio-compat.c:334
aiocb = 0xb8dd9f68
ret = 0
tv = {tv_sec = 1331787612, tv_usec = 760876}
ts = {tv_sec = 1331787622, tv_nsec = 0}
#4  0xb731dd31 in start_thread (arg=0xb29cfb70) at pthread_create.c:304
__res = 
pd = 0xb29cfb70
now = 
unwind_buf = {cancel_jmp_buf = {{jmp_buf = {-1221398540, 0, 4001536, 
-1298336648, -1135928557, -434751208}, mask_was_saved = 0}}, priv = {pad = 
{0x0, 0x0, 0x0, 0x0}, data = {
  prev = 0x0, cleanup = 0x0, canceltype = 0}}}
not_first_call = 
robust = 
pagesize_m1 = 
sp = 
freesize = 
__PRETTY_FUNCTION__ = "start_thread"
#5  0xb6d8e0ce in clone () at ../sysdeps/unix/sysv/linux/i386/clone.S:130
No locals.
Backtrace stopped: Not enough registers or memory available to unwind further

Thread 2 (Thread 0xaadbbb70 (LWP 32428)):
#0  0xb74d3424 in __kernel_vsyscall ()
No symbol table info available.
#1  0xb7324619 in __lll_lock_wait () at 
../nptl/sysdeps/unix/sysv/linux/i386/i686/../i486/lowlevellock.S:142
No locals.
#2  0xb73277a0 in _L_cond_lock_704 () from /lib/i386-linux-gnu/libpthread.so.0
libgcc_s_getcfa = 0
libgcc_s_resume = 0
libgcc_s_forcedunwind = 0
libgcc_s_personality = 0
libgcc_s_handle = 0x0
#3  0xb7327521 in __pthread_mutex_cond_lock (mutex=0xb7ef4c00) at 
../nptl/pthread_mutex_lock.c:61
__PRETTY_FUNCTION__ = "__pthread_mutex_cond_lock"
type = 3085913088
id = 32428
#4  0xb7321b0e in pthread_cond_wait@@GLIBC_2.3.2 () at 
../nptl/sysdeps/unix/sysv/linux/i386/i686/../i486/pthread_cond_wait.S:255
No locals.
#5  0xb7660526 in qemu_cond_wait (cond=0xb7d30aa0, mutex=0xb7ef4c00) at 
qemu-thread-posix.c:113
err = -1191168176
__func__ = "qemu_cond_wait"
#6  0xb76ee271 in qemu_tcg_wait_io_event () at 
/home/craig/projects/QEMU/cpus.c:699
env = 0x1
#7  0xb76ee537 in qemu_tcg_cpu_thread_fn (arg=0xb9003750) at 
/home/craig/projects/QEMU/cpus.c:778
env = 0x0
#8  0xb731dd31 in start_thread (arg=0xaadbbb70) at pthread_create.c:304
__res = 
pd = 0xaadbbb70
now = 
unwind_buf = {cancel_jmp_buf = {{jmp_buf = {-1221398540, 0, 4001536, 
-1428441992, 852171555, -434751208}, mask_was_saved = 0}}, priv = {pad = {0x0, 
0x0, 0x0, 0x0}, data = {
  prev = 0x0, cleanup = 0x0, canceltype = 0}}}
not_first_call = 
robust = 
pagesize_m1 = 
sp = 
freesize = 
__PRETTY_FUNCTION__ = "start_thread"
#9  0xb6d8e0ce in clone () at ../sysdeps/unix/sysv/linux/i386/clone.S:130
No locals.
Backtrace stopped: Not enough registers or memory available to unwind further

Thread 1 (Thread 0xb63d36e0 (LWP 32412)):
#0  0xb7679517 in slirp_remque (a=0xb9119cf0) at slirp/misc.c:39
element = 0xb9119cf0
#1  0xb7677489 in if_start (slirp=0xb87a6eb8) at slirp/if.c:189
now = 118754910412798
requeued = 0
ifm = 0xb9119cf0
ifqt = 0x0
#2  0xb767738f in if_output (so=0xb8f6e348, ifm=0xb911a348) at slirp/if.c:138
slirp = 0xb87a6eb8
ifq = 0xb9119cf0
on_fastq = 1
#3  0xb7678b91 in ip_output (so=0xb8f6e348,

Re: [Qemu-devel] [PATCH 2/6] Redesign of pciinit.c (take 2)

[Alexey Korolev]

On 14/03/12 13:48, Kevin O'Connor wrote:
> On Tue, Mar 13, 2012 at 05:45:19PM +1300, Alexey Korolev wrote:
>> Added pci_region_entry structure and list operations to pciinit.c
>> List is filled with entries during pci_check_devices.
>> List is used just for printing space allocation if we were using lists. 
>> Next step will resource allocation using mapping functions.
> [...]
>> +struct pci_bus;
>> +struct pci_region_entry {
>> +struct pci_device *dev;
>> +int bar;
>> +u32 base;
>> +u32 size;
>> +int is64bit;
>> +enum pci_region_type type;
>> +struct pci_bus *this_bus;
>> +struct pci_bus *parent_bus;
>> +struct pci_region_entry *next;
>> +struct pci_region_entry **pprev;
>> +};
> It's fine to introduce a new struct, but a patch that does this should
> have something like the following in the same patch:
>
> --- a/src/pci.h
> +++ b/src/pci.h
> @@ -51,11 +51,6 @@ struct pci_device {
>  u8 prog_if, revision;
>  u8 header_type;
>  u8 secondary_bus;
> -struct {
> -u32 addr;
> -u32 size;
> -int is64;
> -} bars[PCI_NUM_REGIONS];
>  
>  // Local information on device.
>  int have_driver;
>
> And it should compile and work fine after applying just that one
> patch.  That is, you're not introducing a new struct, you're moving
> the contents from one struct to another. 
Yes I see what you mean here.
Basically I kept pci_device->bars and pci_region_entry altogether because they 
are for different things.
The pci_region_entry describes bridge regions in addition to bars and contains 
information to build topology.

In your proposal for patches splitting the pci_device->bars are removed and 
pci_region_entry data
is used to program pci bars. This is reasonable so I've made the changes.  See 
patch below in this message.

Of course further patches [3-6] won't apply on top of this, so the series 
should be reposted.

>  The code is being changed -
> it's not new code being added and old code being deleted - the patches
> need to reflect that.
Because of structural changes it is not possible to completely avoid this 
scenario where
new code is added and old deleted.
In this patch series I tried my best to make migration as obvious and safe as 
possible.
So the existing approach (with your suggestions) for pciinit.c redesign is this:

1. Introduce list operations
2. Introduce pci_region_entry structure and add code which fills this new 
structure.
We don't modify resource addresses calculations, but we use pci_region_entry 
data to do resource assignment.
3. Modify resource addresses calculations to be based on linked lists of region 
entries.
4. Remove code which fills the arrays, remove use of arrays for mapping.
(note 3&4 could be combined altogether but it will be harder to read then)

Could you please have a look at the other parts in this series and let me know 
if you are happy about this approach,
so I won't have to redo patchwork too many times?


---
 src/pci.h |5 --
 src/pciinit.c |  122 ++---
 2 files changed, 90 insertions(+), 37 deletions(-)

diff --git a/src/pci.h b/src/pci.h
index a2a5a4c..5598100 100644
--- a/src/pci.h
+++ b/src/pci.h
@@ -51,11 +51,6 @@ struct pci_device {
 u8 prog_if, revision;
 u8 header_type;
 u8 secondary_bus;
-struct {
-u32 addr;
-u32 size;
-int is64;
-} bars[PCI_NUM_REGIONS];
 
 // Local information on device.
 int have_driver;
diff --git a/src/pciinit.c b/src/pciinit.c
index 9f3fdd4..f75f393 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -31,6 +31,20 @@ static const char *region_type_name[] = {
 [ PCI_REGION_TYPE_PREFMEM ] = "prefmem",
 };
 
+struct pci_bus;
+struct pci_region_entry {
+struct pci_device *dev;
+int bar;
+u32 base;
+u32 size;
+int is64bit;
+enum pci_region_type type;
+struct pci_bus *this_bus;
+struct pci_bus *parent_bus;
+struct pci_region_entry *next;
+struct pci_region_entry **pprev;
+};
+
 struct pci_bus {
 struct {
 /* pci region stats */
@@ -41,6 +55,7 @@ struct pci_bus {
 /* pci region assignments */
 u32 bases[32 - PCI_MEM_INDEX_SHIFT];
 u32 base;
+struct pci_region_entry *list;
 } r[PCI_REGION_TYPE_COUNT];
 struct pci_device *bus_dev;
 };
@@ -352,6 +367,31 @@ pci_bios_get_bar(struct pci_device *pci, int bar, u32 
*val, u32 *size)
 *size = (~(*val & mask)) + 1;
 }
 
+/
+ * Build topology and calculate size of entries
+ /
+
+struct pci_region_entry *
+pci_region_create_entry(struct pci_bus *bus, struct pci_device *dev,
+   u32 size, int type, int is64bit)
+{
+struct pci_region_entry *entry= malloc_tmp(sizeof(*entry));
+if (!entry) {
+warn_noalloc();
+return NULL;
+}
+memset(e

[Qemu-devel] [Bug 938431] Re: Reproducible crash in slirp_remque (qemu 1.0.1)

[Craig Ringer]

Thanks Jan. I was pulling git master as I saw your comment. When
configured using the same command line and built with the same tools in
the same environment, git master does not appear to crash the way 1.0.1
does. Given that there have been fixes in the area merged between 1.0.1
and master it seems safe to say they've done the trick.

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https://bugs.launchpad.net/bugs/938431

Title:
  Reproducible crash in slirp_remque (qemu 1.0.1)

Status in QEMU:
  New

Bug description:
  Heya

  I've been testing some automated data conversion scripts with qemu
  1.0.1. They work fine with qemu-kvm 0.15.1, but on qemu 1.0.1 (from
  the website, built from source using gcc 4.6.1, i686 host), when the
  script runs qemu I see qemu crash in slirp_remque a few seconds after
  it's launched. This crash is consistent and reproducible.

  The qemu guest is SCO OpenServer 5.0.5. I'm using it for some data
  conversion from a legacy application. qemu is launched "-display none
  -monitor stdio" and controlled from a Python script that then connects
  to the VM over usermode port forwards to ftp data to/from the VM and
  send commands over telnet.

  qemu is launched fine with the following command:

  /usr/local/qemu/bin/qemu-system-i386 -display none -vga cirrus -M pc
  -no-acpi -no-hpet -monitor stdio -net
  
user,net=10.0.2.0/24,host=10.0.2.2,dns=10.0.2.3,hostfwd=tcp:127.0.0.1:-10.0.2.1:22,hostfwd=tcp:127.0.0.1:2323-10.0.2.1:23,hostfwd=tcp:127.0.0.1:2121-10.0.2.1:21,hostfwd=tcp:127.0.0.1:2020-10.0.2.1:20
  -net nic,model=pcnet -drive
  file=sco/sco.qcow2,format=qcow2,cache=unsafe,snapshot=on -drive
  file=sco/booksys.qcow2,format=qcow2,cache=unsafe,snapshot=on -snapshot
  > qemu-log

  and images:

  $ for f in *.qcow2; do qemu-img info $f; echo; done
  image: booksys-blank-compressed.qcow2
  file format: qcow2
  virtual size: 4.0G (4294967296 bytes)
  disk size: 696K
  cluster_size: 65536

  image: booksys.qcow2
  file format: qcow2
  virtual size: 4.0G (4294967296 bytes)
  disk size: 140K
  cluster_size: 65536
  backing file: booksys-blank-compressed.qcow2 (actual path: 
booksys-blank-compressed.qcow2)

  image: sco-base-compressed.qcow2
  file format: qcow2
  virtual size: 512M (536870912 bytes)
  disk size: 142M
  cluster_size: 65536

  image: sco.qcow2
  file format: qcow2
  virtual size: 512M (536870912 bytes)
  disk size: 140K
  cluster_size: 65536
  backing file: sco-base-compressed.qcow2 (actual path: 
sco-base-compressed.qcow2)


  
  The VM guest begins booting fine, and nothing of interest appears in the 
monitor log:

  QEMU 1.0,1 monitor - type 'help' for more information
  (qemu)

  After a few seconds the controlling scripts begins trying to ftp into
  the guest over the user-mode port forward on port 2121, and it's at
  this point that qemu crashes with the following backtrace:

  Program received signal SIGSEGV, Segmentation fault.
  [Switching to Thread 0xb63e46e0 (LWP 25453)]
  0xb768753b in slirp_remque (a=0xb90ee408) at slirp/misc.c:39
  39  ((struct quehead *)(element->qh_rlink))->qh_link = element->qh_link;
  (gdb) bt
  #0  0xb768753b in slirp_remque (a=0xb90ee408) at slirp/misc.c:39
  #1  0xb76854ad in if_start (slirp=0xb879beb0) at slirp/if.c:189
  #2  0xb76853b3 in if_output (so=0xb8eb1380, ifm=0xb90eea60) at slirp/if.c:138
  #3  0xb7686bb5 in ip_output (so=0xb8eb1380, m0=0xb90eea60)
  at slirp/ip_output.c:84
  #4  0xb768f59c in tcp_output (tp=0xb906fd48) at slirp/tcp_output.c:456
  #5  0xb7691b9b in tcp_timers (tp=0xb906fd48, timer=0) at slirp/tcp_timer.c:242
  #6  0xb76918d4 in tcp_slowtimo (slirp=0xb879beb0) at slirp/tcp_timer.c:88
  #7  0xb768965a in slirp_select_poll (readfds=0xbf9e3dcc, writefds=0xbf9e3e4c, 
  xfds=0xbf9e3ecc, select_error=0) at slirp/slirp.c:433
  #8  0xb763e2a0 in main_loop_wait (nonblocking=0) at main-loop.c:465
  #9  0xb7633042 in main_loop () at /home/craig/build/qemu-1.0.1/vl.c:1481
  #10 0xb76388a0 in main (argc=20, argv=0xbf9e42d4, envp=0xbf9e4328)
  at /home/craig/build/qemu-1.0.1/vl.c:3485

  (gdb) frame 0
  #0  0xb768753b in slirp_remque (a=0xb90ee408) at slirp/misc.c:39
  39  ((struct quehead *)(element->qh_rlink))->qh_link = element->qh_link;

  A more detailed backtrace, as supplied by "thread apply all bt full",
  follows at the end of this post.

  In case it matters, stdout is redirected to a logfile and stdin is
  attached to the Python script, which hasn't yet written anything to
  the stdin pipe.

  I'll happily post the script, but isn't much good without the OS image
  which is about 150MB and can't be legally redistributed. I'm happy to
  test patches, though, or try anything that's suggested.

  Host info and full backtrace follows:


  $ gcc --version
  gcc (Ubuntu/Linaro 4.6.1-9ubuntu3) 4.6.1
  Copyright (C) 2011 Free Software Foundation, Inc.
  This is free software; see the source for copying conditions.  There is NO

Re: [Qemu-devel] [RFC][PATCH 11/14 v9] introduce a new monitor command 'dump' to dump guest's memory

[Wen Congyang]

At 03/15/2012 01:18 AM, Luiz Capitulino Wrote:
> On Wed, 14 Mar 2012 10:11:35 +0800
> Wen Congyang  wrote:
> 



> 
> You just dropped a few asynchronous bits and resent this as a synchronous
> command, letting all the asynchronous infrastructure in. This is bad, as the
> command is more complex then it should be and doesn't make full use of the
> added infrastructure.
> 
> For example, does the synchronous version really uses DumpState? If it 
> doesn't,
> let's just drop it and everything else which is not necessary.
> 
> *However*, note that while it's fine with me to have this as a synchronous
> command we need a few more ACKs (from libvirt and Anthony and/or Jan). So, I
> wouldn't go too far on making changes before we get those ACKs.
> 


Hi, Anthony, Luiz, Eric, Jan

At 03/15/2012 01:49 AM, Anthony Liguori Wrote:
> 
> Can we start by posting a non-RFC because we start discussing committing
> this.

At 03/15/2012 01:37 AM, Eric Blake Wrote:
> are sufficient that I'm okay with a synchronous-only version for qemu
> 1.1.

So I think Anthony and Eric may ACK to it.

Jan reviewed the early version, and give many comments. So I think he also ACKs 
to it.

Is it OK to post non-RFC version?

Thanks
Wen Congyang

[Qemu-devel] Debug single program in QEMU

[Yue Chen]

Hi!~

Now I'd like to see what the micro-ops (intermediate operations generated
by TCG) of a single Linux or Windows program, any approach to do this under
QEMU? Thanks.

[Qemu-devel] [Bug 938431] Re: Reproducible crash in slirp_remque (qemu 1.0.1)

[Jan Kiszka]

Please re-test over git head. There were related fixes merged recently.

-- 
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/938431

Title:
  Reproducible crash in slirp_remque (qemu 1.0.1)

Status in QEMU:
  New

Bug description:
  Heya

  I've been testing some automated data conversion scripts with qemu
  1.0.1. They work fine with qemu-kvm 0.15.1, but on qemu 1.0.1 (from
  the website, built from source using gcc 4.6.1, i686 host), when the
  script runs qemu I see qemu crash in slirp_remque a few seconds after
  it's launched. This crash is consistent and reproducible.

  The qemu guest is SCO OpenServer 5.0.5. I'm using it for some data
  conversion from a legacy application. qemu is launched "-display none
  -monitor stdio" and controlled from a Python script that then connects
  to the VM over usermode port forwards to ftp data to/from the VM and
  send commands over telnet.

  qemu is launched fine with the following command:

  /usr/local/qemu/bin/qemu-system-i386 -display none -vga cirrus -M pc
  -no-acpi -no-hpet -monitor stdio -net
  
user,net=10.0.2.0/24,host=10.0.2.2,dns=10.0.2.3,hostfwd=tcp:127.0.0.1:-10.0.2.1:22,hostfwd=tcp:127.0.0.1:2323-10.0.2.1:23,hostfwd=tcp:127.0.0.1:2121-10.0.2.1:21,hostfwd=tcp:127.0.0.1:2020-10.0.2.1:20
  -net nic,model=pcnet -drive
  file=sco/sco.qcow2,format=qcow2,cache=unsafe,snapshot=on -drive
  file=sco/booksys.qcow2,format=qcow2,cache=unsafe,snapshot=on -snapshot
  > qemu-log

  and images:

  $ for f in *.qcow2; do qemu-img info $f; echo; done
  image: booksys-blank-compressed.qcow2
  file format: qcow2
  virtual size: 4.0G (4294967296 bytes)
  disk size: 696K
  cluster_size: 65536

  image: booksys.qcow2
  file format: qcow2
  virtual size: 4.0G (4294967296 bytes)
  disk size: 140K
  cluster_size: 65536
  backing file: booksys-blank-compressed.qcow2 (actual path: 
booksys-blank-compressed.qcow2)

  image: sco-base-compressed.qcow2
  file format: qcow2
  virtual size: 512M (536870912 bytes)
  disk size: 142M
  cluster_size: 65536

  image: sco.qcow2
  file format: qcow2
  virtual size: 512M (536870912 bytes)
  disk size: 140K
  cluster_size: 65536
  backing file: sco-base-compressed.qcow2 (actual path: 
sco-base-compressed.qcow2)


  
  The VM guest begins booting fine, and nothing of interest appears in the 
monitor log:

  QEMU 1.0,1 monitor - type 'help' for more information
  (qemu)

  After a few seconds the controlling scripts begins trying to ftp into
  the guest over the user-mode port forward on port 2121, and it's at
  this point that qemu crashes with the following backtrace:

  Program received signal SIGSEGV, Segmentation fault.
  [Switching to Thread 0xb63e46e0 (LWP 25453)]
  0xb768753b in slirp_remque (a=0xb90ee408) at slirp/misc.c:39
  39  ((struct quehead *)(element->qh_rlink))->qh_link = element->qh_link;
  (gdb) bt
  #0  0xb768753b in slirp_remque (a=0xb90ee408) at slirp/misc.c:39
  #1  0xb76854ad in if_start (slirp=0xb879beb0) at slirp/if.c:189
  #2  0xb76853b3 in if_output (so=0xb8eb1380, ifm=0xb90eea60) at slirp/if.c:138
  #3  0xb7686bb5 in ip_output (so=0xb8eb1380, m0=0xb90eea60)
  at slirp/ip_output.c:84
  #4  0xb768f59c in tcp_output (tp=0xb906fd48) at slirp/tcp_output.c:456
  #5  0xb7691b9b in tcp_timers (tp=0xb906fd48, timer=0) at slirp/tcp_timer.c:242
  #6  0xb76918d4 in tcp_slowtimo (slirp=0xb879beb0) at slirp/tcp_timer.c:88
  #7  0xb768965a in slirp_select_poll (readfds=0xbf9e3dcc, writefds=0xbf9e3e4c, 
  xfds=0xbf9e3ecc, select_error=0) at slirp/slirp.c:433
  #8  0xb763e2a0 in main_loop_wait (nonblocking=0) at main-loop.c:465
  #9  0xb7633042 in main_loop () at /home/craig/build/qemu-1.0.1/vl.c:1481
  #10 0xb76388a0 in main (argc=20, argv=0xbf9e42d4, envp=0xbf9e4328)
  at /home/craig/build/qemu-1.0.1/vl.c:3485

  (gdb) frame 0
  #0  0xb768753b in slirp_remque (a=0xb90ee408) at slirp/misc.c:39
  39  ((struct quehead *)(element->qh_rlink))->qh_link = element->qh_link;

  A more detailed backtrace, as supplied by "thread apply all bt full",
  follows at the end of this post.

  In case it matters, stdout is redirected to a logfile and stdin is
  attached to the Python script, which hasn't yet written anything to
  the stdin pipe.

  I'll happily post the script, but isn't much good without the OS image
  which is about 150MB and can't be legally redistributed. I'm happy to
  test patches, though, or try anything that's suggested.

  Host info and full backtrace follows:


  $ gcc --version
  gcc (Ubuntu/Linaro 4.6.1-9ubuntu3) 4.6.1
  Copyright (C) 2011 Free Software Foundation, Inc.
  This is free software; see the source for copying conditions.  There is NO
  warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

  $ lsb_release -a
  No LSB modules are available.
  Distributor ID:   Ubuntu
  Description:  Ubuntu 11.10
  Release:  11.10
  Codename: oneiric

  $ uname -a
  Linux wallac

[Qemu-devel] [Bug 938431] Re: Reproducible crash in slirp_remque (qemu 1.0.1)

[Craig Ringer]

Another crash site appears to be:


#0  0xb760f0d0 in ifs_insque (ifm=0xba711478, ifmhead=0x0) at slirp/if.c:16
#1  0xb760f2dd in if_output (so=0xba60db70, ifm=0xba711478) at slirp/if.c:98
#2  0xb7610bb5 in ip_output (so=0xba60db70, m0=0xba711478) at 
slirp/ip_output.c:84
#3  0xb761959c in tcp_output (tp=0xba4b4540) at slirp/tcp_output.c:456
#4  0xb761bb9b in tcp_timers (tp=0xba4b4540, timer=0) at slirp/tcp_timer.c:242
#5  0xb761b8d4 in tcp_slowtimo (slirp=0xb9d9eeb0) at slirp/tcp_timer.c:88
#6  0xb761365a in slirp_select_poll (readfds=0xbff7a78c, writefds=0xbff7a80c, 
xfds=0xbff7a88c, select_error=0) at slirp/slirp.c:433
#7  0xb75c82a0 in main_loop_wait (nonblocking=0) at main-loop.c:465
#8  0xb75bd042 in main_loop () at /home/craig/build/qemu-1.0.1/vl.c:1481
#9  0xb75c28a0 in main (argc=20, argv=0xbff7ac94, envp=0xbff7ace8) at 
/home/craig/build/qemu-1.0.1/vl.c:3485


Full trace:


Thread 5 (Thread 0xb1f68b70 (LWP 6148)):
#0  0xb746e424 in __kernel_vsyscall ()
No symbol table info available.
#1  0xb72bce04 in pthread_cond_timedwait@@GLIBC_2.3.2 () at 
../nptl/sysdeps/unix/sysv/linux/i386/i686/../i486/pthread_cond_timedwait.S:236
No locals.
#2  0xb75d938a in cond_timedwait (cond=0xb7cb81e0, mutex=0xb7cb81c0, 
ts=0xb1f6835c) at posix-aio-compat.c:104
ret = 0
#3  0xb75d9b6c in aio_thread (unused=0x0) at posix-aio-compat.c:334
aiocb = 0xba432348
ret = 0
tv = {tv_sec = 1331775274, tv_usec = 188038}
ts = {tv_sec = 1331775284, tv_nsec = 0}
#4  0xb72b8d31 in start_thread (arg=0xb1f68b70) at pthread_create.c:304
__res = 
pd = 0xb1f68b70
now = 
unwind_buf = {cancel_jmp_buf = {{jmp_buf = {-1221812236, 0, 4001536, 
-1309244296, -366533283, 1345980240}, mask_was_saved = 0}}, priv = {pad = {0x0, 
0x0, 0x0, 0x0}, data = {
  prev = 0x0, cleanup = 0x0, canceltype = 0}}}
not_first_call = 
robust = 
pagesize_m1 = 
sp = 
freesize = 
__PRETTY_FUNCTION__ = "start_thread"
#5  0xb6d290ce in clone () at ../sysdeps/unix/sysv/linux/i386/clone.S:130
No locals.
Backtrace stopped: Not enough registers or memory available to unwind further

Thread 4 (Thread 0xb0d62b70 (LWP 6149)):
#0  0xb746e424 in __kernel_vsyscall ()
No symbol table info available.
#1  0xb72bf619 in __lll_lock_wait () at 
../nptl/sysdeps/unix/sysv/linux/i386/i686/../i486/lowlevellock.S:142
No locals.
#2  0xb72c27a0 in _L_cond_lock_704 () from /lib/i386-linux-gnu/libpthread.so.0
libgcc_s_getcfa = 0
libgcc_s_resume = 0
libgcc_s_forcedunwind = 0
libgcc_s_personality = 0
libgcc_s_handle = 0x0
#3  0xb72c2521 in __pthread_mutex_cond_lock (mutex=0xb7e8cc00) at 
../nptl/pthread_mutex_lock.c:61
__PRETTY_FUNCTION__ = "__pthread_mutex_cond_lock"
type = 3085487104
id = 6149
#4  0xb72bcb0e in pthread_cond_wait@@GLIBC_2.3.2 () at 
../nptl/sysdeps/unix/sysv/linux/i386/i686/../i486/pthread_cond_wait.S:255
No locals.
#5  0xb75f854a in qemu_cond_wait (cond=0xb7cc8aa0, mutex=0xb7e8cc00) at 
qemu-thread-posix.c:113
err = -1168134704
__func__ = "qemu_cond_wait"
#6  0xb7686409 in qemu_tcg_wait_io_event () at 
/home/craig/build/qemu-1.0.1/cpus.c:699
env = 0x1
#7  0xb76866cf in qemu_tcg_cpu_thread_fn (arg=0xba5fadd0) at 
/home/craig/build/qemu-1.0.1/cpus.c:778
env = 0x0
#8  0xb72b8d31 in start_thread (arg=0xb0d62b70) at pthread_create.c:304
__res = 
pd = 0xb0d62b70
now = 
unwind_buf = {cancel_jmp_buf = {{jmp_buf = {-1221812236, 0, 4001536, 
-1328143240, -1419303585, 1345980240}, mask_was_saved = 0}}, priv = {pad = 
{0x0, 0x0, 0x0, 0x0}, data = {
  prev = 0x0, cleanup = 0x0, canceltype = 0}}}
not_first_call = 
robust = 
pagesize_m1 = 
sp = 
freesize = 
__PRETTY_FUNCTION__ = "start_thread"
#9  0xb6d290ce in clone () at ../sysdeps/unix/sysv/linux/i386/clone.S:130
No locals.
Backtrace stopped: Not enough registers or memory available to unwind further

Thread 3 (Thread 0xb296ab70 (LWP 6147)):
#0  0xb746e424 in __kernel_vsyscall ()
No symbol table info available.
#1  0xb72bce04 in pthread_cond_timedwait@@GLIBC_2.3.2 () at 
../nptl/sysdeps/unix/sysv/linux/i386/i686/../i486/pthread_cond_timedwait.S:236
No locals.
#2  0xb75d938a in cond_timedwait (cond=0xb7cb81e0, mutex=0xb7cb81c0, 
ts=0xb296a35c) at posix-aio-compat.c:104
ret = 0
#3  0xb75d9b6c in aio_thread (unused=0x0) at posix-aio-compat.c:334
aiocb = 0xba432348
ret = 0
tv = {tv_sec = 1331775274, tv_usec = 185444}
ts = {tv_sec = 1331775284, tv_nsec = 0}
#4  0xb72b8d31 in start_thread (arg=0xb296ab70) at pthread_create.c:304
__res = 
pd = 0xb296ab70
now = 
unwind_buf = {cancel_jmp_buf = {{jmp_buf = {-1221812236, 0, 4001536, 
-1298750344, 711402843, 1345980240}, mask_was_saved = 0}}, priv = {pad = {0x0, 
0x0, 0x0, 0x0}, data = {
  prev = 0x0, cl

Re: [Qemu-devel] [PATCH 3/7] target-unicore32: QOM'ify CPU

[Guan Xuetao]

On Wed, 2012-03-14 at 11:56 +0100, Andreas Färber wrote:
> Am 14.03.2012 08:56, schrieb Guan Xuetao:
> > On Wed, 2012-03-14 at 02:39 +0100, Andreas Färber wrote:
> >> Embed CPUUniCore32State into UniCore32CPU.
> >>
> >> Contributed under GPLv2+.
> >>
> >> Signed-off-by: Andreas Färber 
> >> ---
> >>  Makefile.target|1 +
> >>  target-unicore32/cpu-qom.h |   72 ++
> >>  target-unicore32/cpu.c |   91 
> >> 
> > I hope the gpl information for cpu.c and cpu-qom.h could be consistent
> > with other files.
> 
> Copy&paste from other cpu-qom.h files. :) I can change it to match the
> rest of target-unicore32.
> 
> But speaking of matching licenses, your previous text has "as published
> by the Free Software Foundation", which I think is a bit safer in theory
> (no company X can publish a "GPL" v4 of their own and change it to their
> liking) and would make the change smaller. For example:
> 
>   * This program is free software; you can redistribute it and/or modify
>   * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> + * published by the Free Software Foundation, or (at your option) any
> + * later version. See the COPYING file in the top-level directory.
> 
> What do you think?
> 
> Andreas
> 
GPLv2+ is ok.

Thanks and Regards

Guan Xuetao

Re: [Qemu-devel] [PATCH urgent] target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef

[Anthony Liguori]

On 03/14/2012 07:19 PM, Andreas Färber wrote:

Commit 9b9a970a23625de4ae6b7461906a9a0d98d3ca95
(target-lm32/microblaze: Typedef struct CPU{MB,LM32}State)
introduced necessary typedefs for cpu_mmu_index() and mmu.h
respectively.

On some GCC versions this leads to "error: redefinition of typedef".

Drop the original typedef to hopefully fix the build.

Signed-off-by: Andreas Färber


Applied.  Thanks.

Regards,

Anthony Liguori


---
  target-lm32/cpu.h   |4 ++--
  target-microblaze/cpu.h |4 ++--
  2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 0902a24..a7d9546 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -149,7 +149,7 @@ enum {
  LM32_FLAG_IGNORE_MSB = 1,
  };

-typedef struct CPULM32State {
+struct CPULM32State {
  /* general registers */
  uint32_t regs[32];

@@ -182,7 +182,7 @@ typedef struct CPULM32State {
  uint8_t num_bps;
  uint8_t num_wps;

-} CPULM32State;
+};


  CPULM32State *cpu_lm32_init(const char *cpu_model);
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 3b52421..33b23c2 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -230,7 +230,7 @@ typedef struct CPUMBState CPUMBState;
  #define STREAM_CONTROL   (1<<  3)
  #define STREAM_NONBLOCK  (1<<  4)

-typedef struct CPUMBState {
+struct CPUMBState {
  uint32_t debug;
  uint32_t btaken;
  uint32_t btarget;
@@ -264,7 +264,7 @@ typedef struct CPUMBState {
  #endif

  CPU_COMMON
-} CPUMBState;
+};

  CPUMBState *cpu_mb_init(const char *cpu_model);
  int cpu_mb_exec(CPUMBState *s);

[Qemu-devel] buildbot failure in qemu on disable_kvm_i386_out_of_tree

[qemu]

The Buildbot has detected a new failure on builder disable_kvm_i386_out_of_tree 
while building qemu.
Full details are available at:
 
http://buildbot.b1-systems.de/qemu/builders/disable_kvm_i386_out_of_tree/builds/401

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: yuzuki

Build Reason: The Nightly scheduler named 'nightly_disable_kvm' triggered this 
build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

Re: [Qemu-devel] [PULL] QOM CPUState v5

[Anthony Liguori]

On 03/14/2012 04:42 PM, Andreas Färber wrote:

Hello Anthony,

Please pull the second QOM CPU series,
which frees the identifiers cpu_reset and CPUState and introduces TYPE_CPU.

Cc: Anthony Liguori

The following changes since commit 418ba9e5d6849ef2e8512d8853628ce4bf37937a:

   qom: Introduce object_class_get_list() (2012-03-14 15:30:39 -0500)

are available in the git repository at:
   git://repo.or.cz/qemu/afaerber.git qom-cpu


Pulled.  Thanks.

Regards,

Anthony Liguori



Alexander Graf (1):
   PPC: 405: Use proper CPU reset

Andreas Färber (42):
   Rename cpu_reset() to cpu_state_reset()
   monitor: Don't access registers through CPUState
   monitor: Avoid CPUState in read/write functions
   target-lm32/microblaze: Typedef struct CPU{MB,LM32}State
   target-sparc: Typedef struct CPUSPARCState early
   target-unicore32: Rename to CPUUniCore32State
   hw/mc146818: Drop unneeded #includes
   linux-user: Don't overuse CPUState
   darwin-user: Don't overuse CPUState
   bsd-user: Don't overuse CPUState
   target-alpha: Don't overuse CPUState
   target-arm: Don't overuse CPUState
   target-cris: Don't overuse CPUState
   target-i386: Don't overuse CPUState
   target-lm32: Don't overuse CPUState
   target-m68k: Don't overuse CPUState
   target-microblaze: Don't overuse CPUState
   target-mips: Don't overuse CPUState
   target-ppc: Don't overuse CPUState
   target-s390x: Don't overuse CPUState
   target-sh4: Don't overuse CPUState
   target-sparc: Don't overuse CPUState
   target-unicore32: Don't overuse CPUState
   target-xtensa: Don't overuse CPUState
   arm-semi: Don't use CPUState
   m68k-semi: Don't use CPUState
   xtensa-semi: Don't use CPUState
   alpha hw/: Don't use CPUState
   arm hw/: Don't use CPUState
   cris hw/: Don't use CPUState
   i386 hw/: Don't use CPUState
   lm32 hw/: Don't use CPUState
   m68k hw/: Don't use CPUState
   microblaze hw/: Don't use CPUState
   mips hw/: Don't use CPUState
   ppc hw/: Don't use CPUState
   s390x hw/: Don't use CPUState
   sh4 hw/: Don't use CPUState
   sparc hw/: Don't use CPUState
   xtensa hw/: Don't use CPUState
   Rename CPUState ->  CPUArchState
   qom: Introduce CPU class

  Makefile.objs |3 +
  arm-semi.c|   10 +-
  bsd-user/main.c   |   14 +-
  bsd-user/qemu.h   |   12 +-
  bsd-user/signal.c |2 +-
  configure |1 +
  cpu-all.h |   56 ++--
  cpu-defs.h|2 +-
  cpu-exec.c|   20 +-
  cpus.c|   76 +++---
  darwin-user/main.c|   22 +-
  darwin-user/qemu.h|6 +-
  darwin-user/signal.c  |8 +-
  def-helper.h  |2 +-
  disas.c   |4 +-
  disas.h   |2 +-
  dyngen-exec.h |4 +-
  exec-all.h|   38 ++--
  exec.c|  114 +-
  gdbstub.c |  100 
  gdbstub.h |   16 +-
  gen-icount.h  |8 +-
  hw/alpha_dp264.c  |2 +-
  hw/alpha_sys.h|2 +-
  hw/alpha_typhoon.c|   14 +-
  hw/an5206.c   |2 +-
  hw/apic.h |2 +-
  hw/arm-misc.h |8 +-
  hw/arm_boot.c |   10 +-
  hw/arm_pic.c  |4 +-
  hw/armv7m.c   |4 +-
  hw/axis_dev88.c   |2 +-
  hw/cris-boot.c|6 +-
  hw/cris-boot.h|2 +-
  hw/cris_pic_cpu.c |4 +-
  hw/dummy_m68k.c   |2 +-
  hw/etraxfs.h  |2 +-
  hw/etraxfs_ser.c  |4 +-
  hw/exynos4210.h   |2 +-
  hw/grlib.h|2 +-
  hw/highbank.c |8 +-
  hw/integratorcp.c |2 +-
  hw/kvm/apic.c |2 +-
  hw/kvmvapic.c |   22 +-
  hw/leon3.c|   10 +-
  hw/lm32_boards.c  |   12 +-
  hw/mc146818rtc.c  |2 -
  hw/mcf.h  |4 +-
  hw/mcf5206.c  |4 +-
  hw/mcf5208.c  |2 +-
  hw/mcf_intc.c |4 +-
  hw/microblaze_boot.c  |   10 +-
  hw/microblaze_boot.h  |4 +-
  hw/microblaze_pic_cpu.c   |4 +-
  hw/microblaze_pic_cpu.h   |2 +-
  hw/milkymist.c|   10 +-
  hw/mips_cpudevs.h |4 +-
  hw/mips_fulong2e.c|   12 +-
  hw/mips_int.c |6 +-
  hw/mips_jazz.c|8 +-
  hw/mips_malta.c   |   12 +-
  hw/mips_mipssim.c |8 +-
  hw/mips_r4k.c |  

[Qemu-devel] buildbot failure in qemu on disable_kvm_x86_64_debian_6_0

[qemu]

The Buildbot has detected a new failure on builder 
disable_kvm_x86_64_debian_6_0 while building qemu.
Full details are available at:
 
http://buildbot.b1-systems.de/qemu/builders/disable_kvm_x86_64_debian_6_0/builds/213

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: yuzuki

Build Reason: The Nightly scheduler named 'nightly_disable_kvm' triggered this 
build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

Re: [Qemu-devel] [RFC PATCH 06/17] block: use bdrv_{co, aio}_discard for write_zeroes operations

[Richard Laager]

On Wed, 2012-03-14 at 08:41 +0100, Paolo Bonzini wrote:
> Il 13/03/2012 20:13, Richard Laager ha scritto:
> >>> > >   * For SCSI, report an unmap_granularity to the guest as follows:
> >>> > >   max(logical_block_size, discard_granularity) / 
> >>> > > logical_block_size
> >> > 
> >> > This is more or less already in place later in the series.
> > I didn't see it. Which patch number?
> 
> Patch 11:

I was saying QEMU should pass the discard_granularity to the guest as
OPTIMAL UNMAP GRANULARITY. This would almost surely need to be done in
hw/scsi-disk.c, roughly around this change from your patch 10:

--- a/hw/scsi-disk.c
+++ b/hw/scsi-disk.c
@@ -1295,8 +1295,11 @@ static int scsi_disk_emulate_command(SCSIDiskReq *r)
 outbuf[13] = get_physical_block_exp(&s->qdev.conf);
 
 /* set TPE bit if the format supports discard */
-if (s->qdev.conf.discard_granularity) {
+if (s->qdev.type == TYPE_DISK && s->qdev.conf.discard_granularity) 
{
 outbuf[14] = 0x80;
+if (s->qdev.conf.discard_zeroes_data) {
+outbuf[14] |= 0x40;
+}
 }
 
 /* Protection, exponent and lowest lba field left blank. */

The code from patch 11 is more along the lines of what I think QEMU
should have in the block layer:

> +} else if (discard_granularity < s->qdev.conf.logical_block_size) {
> +error_report("scsi-block: invalid discard_granularity");
> +return -1;
>
> +} else if (discard_granularity & (discard_granularity - 1)) {
> +error_report("scsi-block: discard_granularity not a power of two");
> +return -1;
> +}

However, I think the first check is unnecessarily restrictive. As long
as discard_granularity is a power of two, if it's less than the block
size (which is also a power of two), the block size will always be a
multiple of discard_granularity, so there's no problem.

I'd also like to explicitly allow discard_granularity = 1, which is what
fallocate() provides.

> It is worse in that we do not want the hardware parameters exposed to the
> guest to change behind the scenes, except if you change the machine type
> or if you use the default unversioned type.

You're saying that discard_granularity and discard_zeros_data need to be
properties of the machine type? If you start with that as a requirement,
I can see why you want to always report discard_granularity=512 &
discard_zeros_data=1. But that design has many downsides. I'm not
convinced that discard_granularity and discard_zeros_data need to be
properties of the machine type. Why do you feel that's necessary? What's
the harm in those properties changing across QEMU startups (i.e. guest
boots)?

-- 
Richard


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[Qemu-devel] buildbot failure in qemu on disable_kvm_i386_debian_6_0

[qemu]

The Buildbot has detected a new failure on builder disable_kvm_i386_debian_6_0 
while building qemu.
Full details are available at:
 
http://buildbot.b1-systems.de/qemu/builders/disable_kvm_i386_debian_6_0/builds/214

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: yuzuki

Build Reason: The Nightly scheduler named 'nightly_disable_kvm' triggered this 
build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] [PATCH urgent] target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef

[Andreas Färber]

Commit 9b9a970a23625de4ae6b7461906a9a0d98d3ca95
(target-lm32/microblaze: Typedef struct CPU{MB,LM32}State)
introduced necessary typedefs for cpu_mmu_index() and mmu.h
respectively.

On some GCC versions this leads to "error: redefinition of typedef".

Drop the original typedef to hopefully fix the build.

Signed-off-by: Andreas Färber 
---
 target-lm32/cpu.h   |4 ++--
 target-microblaze/cpu.h |4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 0902a24..a7d9546 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -149,7 +149,7 @@ enum {
 LM32_FLAG_IGNORE_MSB = 1,
 };
 
-typedef struct CPULM32State {
+struct CPULM32State {
 /* general registers */
 uint32_t regs[32];
 
@@ -182,7 +182,7 @@ typedef struct CPULM32State {
 uint8_t num_bps;
 uint8_t num_wps;
 
-} CPULM32State;
+};
 
 
 CPULM32State *cpu_lm32_init(const char *cpu_model);
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 3b52421..33b23c2 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -230,7 +230,7 @@ typedef struct CPUMBState CPUMBState;
 #define STREAM_CONTROL   (1 << 3)
 #define STREAM_NONBLOCK  (1 << 4)
 
-typedef struct CPUMBState {
+struct CPUMBState {
 uint32_t debug;
 uint32_t btaken;
 uint32_t btarget;
@@ -264,7 +264,7 @@ typedef struct CPUMBState {
 #endif
 
 CPU_COMMON
-} CPUMBState;
+};
 
 CPUMBState *cpu_mb_init(const char *cpu_model);
 int cpu_mb_exec(CPUMBState *s);
-- 
1.7.7

Re: [Qemu-devel] buildbot failure in qemu on default_s390

[Michael Roth]

On Thu, Mar 15, 2012 at 01:01:04AM +0100, Andreas Färber wrote:
> Am 15.03.2012 01:16, schrieb q...@buildbot.b1-systems.de:
> > The Buildbot has detected a new failure on builder default_s390 while 
> > building qemu.
> > Full details are available at:
> >  http://buildbot.b1-systems.de/qemu/builders/default_s390/builds/190
> > 
> > Buildbot URL: http://buildbot.b1-systems.de/qemu/
> > 
> > Buildslave for this Build: qemu-s390.opensuse.org
> > 
> > Build Reason: The Nightly scheduler named 'nightly_default' triggered this 
> > build
> > Build Source Stamp: [branch master] HEAD
> > Blamelist: 
> > 
> > BUILD FAILED: failed compile
> 
> Sorry...
> 
>   CClm32-softmmu/arch_init.o
> In file included from /home/build/qemu/default_s390/build/qemu-common.h:123,
>  from /home/build/qemu/default_s390/build/monitor.h:4,
>  from /home/build/qemu/default_s390/build/arch_init.c:32:
> /home/build/qemu/default_s390/build/target-lm32/cpu.h:185: error:
> redefinition of typedef 'CPULM32State'
> /home/build/qemu/default_s390/build/target-lm32/cpu.h:31: error:
> previous declaration of 'CPULM32State' was here
> make[1]: *** [arch_init.o] Error 1
> make: *** [subdir-lm32-softmmu] Error 2
> 
> My GCC handles the following code fine:
> 
> typedef struct CPULM32State CPULM32State;
> 
> typedef struct CPULM32State {
> // ...
> } CPULM32State;
> 
> Solutions would be to
> a) drop the second typedef,
> b) use struct CPULM32State,
> c) move the function using it to after the second typedef.

I vote for a)

Multiple/unecessary typedefs is funky.

> 
> Andreas
> 
> -- 
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
> 

Re: [Qemu-devel] [PATCH v3 0/7] RTC: New logic to emulate RTC

[Zhang, Yang Z]

> -Original Message-
> From: Paolo Bonzini [mailto:pbonz...@redhat.com]
> Sent: Wednesday, March 14, 2012 4:54 PM
> To: Zhang, Yang Z
> Cc: qemu-devel@nongnu.org; Jan Kiszka; k...@vger.kernel.org;
> aligu...@us.ibm.com; Marcelo Tosatti
> Subject: Re: [PATCH v3 0/7] RTC: New logic to emulate RTC
> 
> Il 14/03/2012 09:52, Zhang, Yang Z ha scritto:
> > Is there any comments with the version 3?
> >>>
> >>> Can you explain why you dropped the logic to set the timer to the
> >>> next event?
> > Do you mean why I change the rtc logic? The reason is that: When a
> > guest is idle, the main activity inside qemu is the rtc update
> > timer(2 per second). In our experience(running 64 rhel6u1 guests), it
> > will decrease pkg C6 residency about 6%(6% means 2 watts in my box).
> > And normally, the guest will not use the update-end interrupt and
> > alarm. So there has no need to run a periodic timer when guest isn't
> > using it.
> 
> No, why you're keeping roughly the same logic as current QEMU, instead
> of the more radical changes that were in v2.
You are right. Actually, the v4 is ready and it uses the same logic with v2. 
Since I have other high priority task in hand, I don't test v4 too much. So i 
plan to delay it for a while and hope v3 can be accepted before v4 is ready.
If you really doesn't like the v3, I will pay more effort in v4 and will send 
out it ASAP. :)

best regards
yang

Re: [Qemu-devel] buildbot failure in qemu on default_s390

[Andreas Färber]

Am 15.03.2012 01:16, schrieb q...@buildbot.b1-systems.de:
> The Buildbot has detected a new failure on builder default_s390 while 
> building qemu.
> Full details are available at:
>  http://buildbot.b1-systems.de/qemu/builders/default_s390/builds/190
> 
> Buildbot URL: http://buildbot.b1-systems.de/qemu/
> 
> Buildslave for this Build: qemu-s390.opensuse.org
> 
> Build Reason: The Nightly scheduler named 'nightly_default' triggered this 
> build
> Build Source Stamp: [branch master] HEAD
> Blamelist: 
> 
> BUILD FAILED: failed compile

Sorry...

  CClm32-softmmu/arch_init.o
In file included from /home/build/qemu/default_s390/build/qemu-common.h:123,
 from /home/build/qemu/default_s390/build/monitor.h:4,
 from /home/build/qemu/default_s390/build/arch_init.c:32:
/home/build/qemu/default_s390/build/target-lm32/cpu.h:185: error:
redefinition of typedef 'CPULM32State'
/home/build/qemu/default_s390/build/target-lm32/cpu.h:31: error:
previous declaration of 'CPULM32State' was here
make[1]: *** [arch_init.o] Error 1
make: *** [subdir-lm32-softmmu] Error 2

My GCC handles the following code fine:

typedef struct CPULM32State CPULM32State;

typedef struct CPULM32State {
// ...
} CPULM32State;

Solutions would be to
a) drop the second typedef,
b) use struct CPULM32State,
c) move the function using it to after the second typedef.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

[Qemu-devel] buildbot failure in qemu on default_i386_debian_6_0

[qemu]

The Buildbot has detected a new failure on builder default_i386_debian_6_0 
while building qemu.
Full details are available at:
 http://buildbot.b1-systems.de/qemu/builders/default_i386_debian_6_0/builds/213

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: yuzuki

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] buildbot failure in qemu on default_mingw32

[qemu]

The Buildbot has detected a new failure on builder default_mingw32 while 
building qemu.
Full details are available at:
 http://buildbot.b1-systems.de/qemu/builders/default_mingw32/builds/207

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: kraxel_rhel61

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] [PATCH v5 27/43] m68k-semi: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUM68KState/g" m68k-semi.c

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 m68k-semi.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/m68k-semi.c b/m68k-semi.c
index bab01ee..3bb30cd 100644
--- a/m68k-semi.c
+++ b/m68k-semi.c
@@ -104,7 +104,7 @@ static int translate_openflags(int flags)
 return hf;
 }
 
-static void translate_stat(CPUState *env, target_ulong addr, struct stat *s)
+static void translate_stat(CPUM68KState *env, target_ulong addr, struct stat 
*s)
 {
 struct m68k_gdb_stat *p;
 
@@ -135,7 +135,7 @@ static void translate_stat(CPUState *env, target_ulong 
addr, struct stat *s)
 
 static int m68k_semi_is_fseek;
 
-static void m68k_semi_cb(CPUState *env, target_ulong ret, target_ulong err)
+static void m68k_semi_cb(CPUM68KState *env, target_ulong ret, target_ulong err)
 {
 target_ulong args;
 
-- 
1.7.7

[Qemu-devel] buildbot failure in qemu on default_i386_out_of_tree

[qemu]

The Buildbot has detected a new failure on builder default_i386_out_of_tree 
while building qemu.
Full details are available at:
 http://buildbot.b1-systems.de/qemu/builders/default_i386_out_of_tree/builds/399

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: yuzuki

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] [PATCH v5 41/43] xtensa hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/xtensa_*.[hc]; do
sed -i "s/CPUState/CPUXtensaState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/xtensa_lx60.c |4 ++--
 hw/xtensa_pic.c  |   16 
 hw/xtensa_sim.c  |2 +-
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/hw/xtensa_lx60.c b/hw/xtensa_lx60.c
index 80ba4d7..afdef49 100644
--- a/hw/xtensa_lx60.c
+++ b/hw/xtensa_lx60.c
@@ -148,7 +148,7 @@ static uint64_t translate_phys_addr(void *env, uint64_t 
addr)
 
 static void lx60_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUXtensaState *env = opaque;
 
 cpu_state_reset(env);
 }
@@ -164,7 +164,7 @@ static void lx_init(const LxBoardDesc *board,
 int be = 0;
 #endif
 MemoryRegion *system_memory = get_system_memory();
-CPUState *env = NULL;
+CPUXtensaState *env = NULL;
 MemoryRegion *ram, *rom, *system_io;
 DriveInfo *dinfo;
 pflash_t *flash = NULL;
diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
index 71d5fc8..653ded6 100644
--- a/hw/xtensa_pic.c
+++ b/hw/xtensa_pic.c
@@ -29,7 +29,7 @@
 #include "qemu-log.h"
 #include "qemu-timer.h"
 
-void xtensa_advance_ccount(CPUState *env, uint32_t d)
+void xtensa_advance_ccount(CPUXtensaState *env, uint32_t d)
 {
 uint32_t old_ccount = env->sregs[CCOUNT];
 
@@ -45,7 +45,7 @@ void xtensa_advance_ccount(CPUState *env, uint32_t d)
 }
 }
 
-void check_interrupts(CPUState *env)
+void check_interrupts(CPUXtensaState *env)
 {
 int minlevel = xtensa_get_cintlevel(env);
 uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE];
@@ -84,7 +84,7 @@ void check_interrupts(CPUState *env)
 
 static void xtensa_set_irq(void *opaque, int irq, int active)
 {
-CPUState *env = opaque;
+CPUXtensaState *env = opaque;
 
 if (irq >= env->config->ninterrupt) {
 qemu_log("%s: bad IRQ %d\n", __func__, irq);
@@ -101,12 +101,12 @@ static void xtensa_set_irq(void *opaque, int irq, int 
active)
 }
 }
 
-void xtensa_timer_irq(CPUState *env, uint32_t id, uint32_t active)
+void xtensa_timer_irq(CPUXtensaState *env, uint32_t id, uint32_t active)
 {
 qemu_set_irq(env->irq_inputs[env->config->timerint[id]], active);
 }
 
-void xtensa_rearm_ccompare_timer(CPUState *env)
+void xtensa_rearm_ccompare_timer(CPUXtensaState *env)
 {
 int i;
 uint32_t wake_ccount = env->sregs[CCOUNT] - 1;
@@ -125,7 +125,7 @@ void xtensa_rearm_ccompare_timer(CPUState *env)
 
 static void xtensa_ccompare_cb(void *opaque)
 {
-CPUState *env = opaque;
+CPUXtensaState *env = opaque;
 
 if (env->halted) {
 env->halt_clock = qemu_get_clock_ns(vm_clock);
@@ -137,7 +137,7 @@ static void xtensa_ccompare_cb(void *opaque)
 }
 }
 
-void xtensa_irq_init(CPUState *env)
+void xtensa_irq_init(CPUXtensaState *env)
 {
 env->irq_inputs = (void **)qemu_allocate_irqs(
 xtensa_set_irq, env, env->config->ninterrupt);
@@ -148,7 +148,7 @@ void xtensa_irq_init(CPUState *env)
 }
 }
 
-void *xtensa_get_extint(CPUState *env, unsigned extint)
+void *xtensa_get_extint(CPUXtensaState *env, unsigned extint)
 {
 if (extint < env->config->nextint) {
 unsigned irq = env->config->extint[extint];
diff --git a/hw/xtensa_sim.c b/hw/xtensa_sim.c
index 445cfde..c7e05dc 100644
--- a/hw/xtensa_sim.c
+++ b/hw/xtensa_sim.c
@@ -47,7 +47,7 @@ static void sim_init(ram_addr_t ram_size,
 const char *kernel_filename, const char *kernel_cmdline,
 const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env = NULL;
+CPUXtensaState *env = NULL;
 MemoryRegion *ram, *rom;
 int n;
 
-- 
1.7.7

[Qemu-devel] buildbot failure in qemu on default_x86_64_out_of_tree

[qemu]

The Buildbot has detected a new failure on builder default_x86_64_out_of_tree 
while building qemu.
Full details are available at:
 
http://buildbot.b1-systems.de/qemu/builders/default_x86_64_out_of_tree/builds/398

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: yuzuki

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] [PATCH v5 31/43] cris hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/cris-boot.[hc] hw/cris_pic_cpu.c hw/axis_dev88.c hw/etraxfs.h 
hw/etraxfs_ser.c; do
sed -i "s/CPUState/CPUCRISState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/axis_dev88.c   |2 +-
 hw/cris-boot.c|4 ++--
 hw/cris-boot.h|2 +-
 hw/cris_pic_cpu.c |4 ++--
 hw/etraxfs.h  |2 +-
 hw/etraxfs_ser.c  |4 ++--
 6 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c
index c9301fd..2304e35 100644
--- a/hw/axis_dev88.c
+++ b/hw/axis_dev88.c
@@ -247,7 +247,7 @@ void axisdev88_init (ram_addr_t ram_size,
  const char *kernel_filename, const char *kernel_cmdline,
  const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPUCRISState *env;
 DeviceState *dev;
 SysBusDevice *s;
 DriveInfo *nand;
diff --git a/hw/cris-boot.c b/hw/cris-boot.c
index ade517d..ca6c52f 100644
--- a/hw/cris-boot.c
+++ b/hw/cris-boot.c
@@ -29,7 +29,7 @@
 
 static void main_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUCRISState *env = opaque;
 struct cris_load_info *li;
 
 li = env->load_info;
@@ -60,7 +60,7 @@ static uint64_t translate_kernel_address(void *opaque, 
uint64_t addr)
 return addr - 0x8000LL;
 }
 
-void cris_load_image(CPUState *env, struct cris_load_info *li)
+void cris_load_image(CPUCRISState *env, struct cris_load_info *li)
 {
 uint64_t entry, high;
 int kcmdline_len;
diff --git a/hw/cris-boot.h b/hw/cris-boot.h
index e9caf8d..ecb9779 100644
--- a/hw/cris-boot.h
+++ b/hw/cris-boot.h
@@ -8,4 +8,4 @@ struct cris_load_info
 target_phys_addr_t entry;
 };
 
-void cris_load_image(CPUState *env, struct cris_load_info *li);
+void cris_load_image(CPUCRISState *env, struct cris_load_info *li);
diff --git a/hw/cris_pic_cpu.c b/hw/cris_pic_cpu.c
index 06ae484..3da0e86 100644
--- a/hw/cris_pic_cpu.c
+++ b/hw/cris_pic_cpu.c
@@ -30,7 +30,7 @@
 
 static void cris_pic_cpu_handler(void *opaque, int irq, int level)
 {
-CPUState *env = (CPUState *)opaque;
+CPUCRISState *env = (CPUCRISState *)opaque;
 int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
 
 if (level)
@@ -39,7 +39,7 @@ static void cris_pic_cpu_handler(void *opaque, int irq, int 
level)
 cpu_reset_interrupt(env, type);
 }
 
-qemu_irq *cris_pic_init_cpu(CPUState *env)
+qemu_irq *cris_pic_init_cpu(CPUCRISState *env)
 {
 return qemu_allocate_irqs(cris_pic_cpu_handler, env, 2);
 }
diff --git a/hw/etraxfs.h b/hw/etraxfs.h
index 24e8fd8..c62f94b 100644
--- a/hw/etraxfs.h
+++ b/hw/etraxfs.h
@@ -25,7 +25,7 @@
 #include "net.h"
 #include "etraxfs_dma.h"
 
-qemu_irq *cris_pic_init_cpu(CPUState *env);
+qemu_irq *cris_pic_init_cpu(CPUCRISState *env);
 
 /* Instantiate an ETRAXFS Ethernet MAC.  */
 static inline DeviceState *
diff --git a/hw/etraxfs_ser.c b/hw/etraxfs_ser.c
index cecd819..5f16b17 100644
--- a/hw/etraxfs_ser.c
+++ b/hw/etraxfs_ser.c
@@ -78,7 +78,7 @@ static uint64_t
 ser_read(void *opaque, target_phys_addr_t addr, unsigned int size)
 {
 struct etrax_serial *s = opaque;
-D(CPUState *env = s->env);
+D(CPUCRISState *env = s->env);
 uint32_t r = 0;
 
 addr >>= 2;
@@ -116,7 +116,7 @@ ser_write(void *opaque, target_phys_addr_t addr,
 struct etrax_serial *s = opaque;
 uint32_t value = val64;
 unsigned char ch = val64;
-D(CPUState *env = s->env);
+D(CPUCRISState *env = s->env);
 
 D(qemu_log("%s " TARGET_FMT_plx "=%x\n",  __func__, addr, value));
 addr >>= 2;
-- 
1.7.7

[Qemu-devel] [PATCH v5 08/43] hw/mc146818: Drop unneeded #includes

[Andreas Färber]

pc.h and apic.h are not needed; apic.h would drag in x86 CPUState and
is now included directly for TARGET_I386.

isa.h is already #included from mc146818rtc.h.

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 hw/mc146818rtc.c |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 8b5cf8c..2b59c36 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -24,8 +24,6 @@
 #include "hw.h"
 #include "qemu-timer.h"
 #include "sysemu.h"
-#include "pc.h"
-#include "isa.h"
 #include "mc146818rtc.h"
 
 #ifdef TARGET_I386
-- 
1.7.7

[Qemu-devel] buildbot failure in qemu on default_s390

[qemu]

The Buildbot has detected a new failure on builder default_s390 while building 
qemu.
Full details are available at:
 http://buildbot.b1-systems.de/qemu/builders/default_s390/builds/190

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: qemu-s390.opensuse.org

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] [PATCH v5 17/43] target-m68k: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUM68KState/g" target-m68k/*.[hc]
  sed -i "s/#define CPUM68KState/#define CPUState/" target-m68k/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-m68k/cpu.h   |   16 +-
 target-m68k/helper.c|   78 +++---
 target-m68k/op_helper.c |   20 ++--
 target-m68k/translate.c |   16 +-
 4 files changed, 65 insertions(+), 65 deletions(-)

diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 4cc3a35..2c83b89 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -120,8 +120,8 @@ void m68k_tcg_init(void);
 CPUM68KState *cpu_m68k_init(const char *cpu_model);
 int cpu_m68k_exec(CPUM68KState *s);
 void cpu_m68k_close(CPUM68KState *s);
-void do_interrupt(CPUState *env1);
-void do_interrupt_m68k_hardirq(CPUState *env1);
+void do_interrupt(CPUM68KState *env1);
+void do_interrupt_m68k_hardirq(CPUM68KState *env1);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU.  */
@@ -226,17 +226,17 @@ void register_m68k_insns (CPUM68KState *env);
 #define MMU_MODE0_SUFFIX _kernel
 #define MMU_MODE1_SUFFIX _user
 #define MMU_USER_IDX 1
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index (CPUM68KState *env)
 {
 return (env->sr & SR_S) == 0 ? 1 : 0;
 }
 
-int cpu_m68k_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int cpu_m68k_handle_mmu_fault(CPUM68KState *env, target_ulong address, int rw,
   int mmu_idx);
 #define cpu_handle_mmu_fault cpu_m68k_handle_mmu_fault
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp)
 {
 if (newsp)
 env->aregs[7] = newsp;
@@ -246,7 +246,7 @@ static inline void cpu_clone_regs(CPUState *env, 
target_ulong newsp)
 
 #include "cpu-all.h"
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->pc;
@@ -256,14 +256,14 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 | ((env->macsr >> 4) & 0xf);/* Bits 0-3 */
 }
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUM68KState *env)
 {
 return env->interrupt_request & CPU_INTERRUPT_HARD;
 }
 
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPUM68KState *env, TranslationBlock *tb)
 {
 env->pc = tb->pc;
 }
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 3647366..1feed9b 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -56,7 +56,7 @@ void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
 }
 }
 
-static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, int n)
+static int fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
 {
 if (n < 8) {
 stfq_p(mem_buf, env->fregs[n]);
@@ -70,7 +70,7 @@ static int fpu_gdb_get_reg(CPUState *env, uint8_t *mem_buf, 
int n)
 return 0;
 }
 
-static int fpu_gdb_set_reg(CPUState *env, uint8_t *mem_buf, int n)
+static int fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
 {
 if (n < 8) {
 env->fregs[n] = ldfq_p(mem_buf);
@@ -338,7 +338,7 @@ void m68k_switch_sp(CPUM68KState *env)
 
 #if defined(CONFIG_USER_ONLY)
 
-int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw,
int mmu_idx)
 {
 env->exception_index = EXCP_ACCESS;
@@ -351,12 +351,12 @@ int cpu_m68k_handle_mmu_fault (CPUState *env, 
target_ulong address, int rw,
 /* MMU */
 
 /* TODO: This will need fixing once the MMU is implemented.  */
-target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
+target_phys_addr_t cpu_get_phys_page_debug(CPUM68KState *env, target_ulong 
addr)
 {
 return addr;
 }
 
-int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw,
int mmu_idx)
 {
 int prot;
@@ -407,7 +407,7 @@ uint32_t HELPER(sats)(uint32_t val, uint32_t ccr)
 return val;
 }
 
-uint32_t HELPER(subx_cc)(CPUState *env, uint32_t op1, uint32_t op2)
+uint32_t HELPER(subx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2)
 {
 uint32_t res;
 uint32_t old_flags;
@@ -430,7 +430,7 @@ uint32_t HELPER(subx_cc)(CPUState *env, uint32_t op1, 
uint32_t op2)
 return res;
 }
 
-uint32_t HELPER(addx_cc)(CPUState *env, uint32_t op1, uint32_t op2)
+uint32_t HELPER(add

[Qemu-devel] buildbot failure in qemu on default_x86_64_rhel61

[qemu]

The Buildbot has detected a new failure on builder default_x86_64_rhel61 while 
building qemu.
Full details are available at:
 http://buildbot.b1-systems.de/qemu/builders/default_x86_64_rhel61/builds/207

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: kraxel_rhel61

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] buildbot failure in qemu on default_i386_rhel61

[qemu]

The Buildbot has detected a new failure on builder default_i386_rhel61 while 
building qemu.
Full details are available at:
 http://buildbot.b1-systems.de/qemu/builders/default_i386_rhel61/builds/206

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: kraxel_rhel61_32bit

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] buildbot failure in qemu on default_x86_64_debian_6_0

[qemu]

The Buildbot has detected a new failure on builder default_x86_64_debian_6_0 
while building qemu.
Full details are available at:
 
http://buildbot.b1-systems.de/qemu/builders/default_x86_64_debian_6_0/builds/213

Buildbot URL: http://buildbot.b1-systems.de/qemu/

Buildslave for this Build: yuzuki

Build Reason: The Nightly scheduler named 'nightly_default' triggered this build
Build Source Stamp: [branch master] HEAD
Blamelist: 

BUILD FAILED: failed compile

sincerely,
 -The Buildbot

[Qemu-devel] [PATCH v5 26/43] arm-semi: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUARMState/g" arm-semi.c

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 arm-semi.c |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arm-semi.c b/arm-semi.c
index 873518a..8debd19 100644
--- a/arm-semi.c
+++ b/arm-semi.c
@@ -108,7 +108,7 @@ static inline uint32_t set_swi_errno(TaskState *ts, 
uint32_t code)
 return code;
 }
 #else
-static inline uint32_t set_swi_errno(CPUState *env, uint32_t code)
+static inline uint32_t set_swi_errno(CPUARMState *env, uint32_t code)
 {
 return code;
 }
@@ -122,7 +122,7 @@ static target_ulong arm_semi_syscall_len;
 static target_ulong syscall_err;
 #endif
 
-static void arm_semi_cb(CPUState *env, target_ulong ret, target_ulong err)
+static void arm_semi_cb(CPUARMState *env, target_ulong ret, target_ulong err)
 {
 #ifdef CONFIG_USER_ONLY
 TaskState *ts = env->opaque;
@@ -152,7 +152,7 @@ static void arm_semi_cb(CPUState *env, target_ulong ret, 
target_ulong err)
 }
 }
 
-static void arm_semi_flen_cb(CPUState *env, target_ulong ret, target_ulong err)
+static void arm_semi_flen_cb(CPUARMState *env, target_ulong ret, target_ulong 
err)
 {
 /* The size is always stored in big-endian order, extract
the value. We assume the size always fit in 32 bits.  */
@@ -174,7 +174,7 @@ static void arm_semi_flen_cb(CPUState *env, target_ulong 
ret, target_ulong err)
 __arg; \
 })
 #define SET_ARG(n, val) put_user_ual(val, args + (n) * 4)
-uint32_t do_arm_semihosting(CPUState *env)
+uint32_t do_arm_semihosting(CPUARMState *env)
 {
 target_ulong args;
 char * s;
@@ -184,7 +184,7 @@ uint32_t do_arm_semihosting(CPUState *env)
 #ifdef CONFIG_USER_ONLY
 TaskState *ts = env->opaque;
 #else
-CPUState *ts = env;
+CPUARMState *ts = env;
 #endif
 
 nr = env->regs[0];
-- 
1.7.7

[Qemu-devel] [PATCH v5 24/43] target-unicore32: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUUniCore32State/g" target-unicore32/*.[hc]
  sed -i "s/#define CPUUniCore32State/#define CPUState/" target-unicore32/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-unicore32/cpu.h   |   24 
 target-unicore32/helper.c|   62 +-
 target-unicore32/op_helper.c |8 +++---
 target-unicore32/translate.c |   60 
 4 files changed, 77 insertions(+), 77 deletions(-)

diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 923db05..171f0a9 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -92,9 +92,9 @@ typedef struct CPUUniCore32State {
 #define UC32_EXCP_TRAP  (ASR_MODE_TRAP)
 
 /* Return the current ASR value.  */
-target_ulong cpu_asr_read(CPUState *env1);
+target_ulong cpu_asr_read(CPUUniCore32State *env1);
 /* Set the ASR.  Note that some bits of mask must be all-set or all-clear.  */
-void cpu_asr_write(CPUState *env1, target_ulong val, target_ulong mask);
+void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong 
mask);
 
 /* UniCore-F64 system registers.  */
 #define UC32_UCF64_FPSCR(31)
@@ -128,10 +128,10 @@ void cpu_asr_write(CPUState *env1, target_ulong val, 
target_ulong mask);
 #define cpu_signal_handler  uc32_cpu_signal_handler
 #define cpu_handle_mmu_faultuc32_cpu_handle_mmu_fault
 
-CPUState *uc32_cpu_init(const char *cpu_model);
-int uc32_cpu_exec(CPUState *s);
+CPUUniCore32State *uc32_cpu_init(const char *cpu_model);
+int uc32_cpu_exec(CPUUniCore32State *s);
 int uc32_cpu_signal_handler(int host_signum, void *pinfo, void *puc);
-int uc32_cpu_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int uc32_cpu_handle_mmu_fault(CPUUniCore32State *env, target_ulong address, 
int rw,
   int mmu_idx);
 
 #define CPU_SAVE_VERSION 2
@@ -140,12 +140,12 @@ int uc32_cpu_handle_mmu_fault(CPUState *env, target_ulong 
address, int rw,
 #define MMU_MODE0_SUFFIX _kernel
 #define MMU_MODE1_SUFFIX _user
 #define MMU_USER_IDX 1
-static inline int cpu_mmu_index(CPUState *env)
+static inline int cpu_mmu_index(CPUUniCore32State *env)
 {
 return (env->uncached_asr & ASR_M) == ASR_MODE_USER ? 1 : 0;
 }
 
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUUniCore32State *env, target_ulong newsp)
 {
 if (newsp) {
 env->regs[29] = newsp;
@@ -153,7 +153,7 @@ static inline void cpu_clone_regs(CPUState *env, 
target_ulong newsp)
 env->regs[0] = 0;
 }
 
-static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
+static inline void cpu_set_tls(CPUUniCore32State *env, target_ulong newtls)
 {
 env->regs[16] = newtls;
 }
@@ -161,12 +161,12 @@ static inline void cpu_set_tls(CPUState *env, 
target_ulong newtls)
 #include "cpu-all.h"
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPUUniCore32State *env, TranslationBlock *tb)
 {
 env->regs[31] = tb->pc;
 }
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulong 
*pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->regs[31];
@@ -178,10 +178,10 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 }
 
 void uc32_translate_init(void);
-void do_interrupt(CPUState *);
+void do_interrupt(CPUUniCore32State *);
 void switch_mode(CPUUniCore32State *, int);
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUUniCore32State *env)
 {
 return env->interrupt_request &
 (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c
index ee7f82b..6af492d 100644
--- a/target-unicore32/helper.c
+++ b/target-unicore32/helper.c
@@ -11,7 +11,7 @@
 #include "helper.h"
 #include "host-utils.h"
 
-static inline void set_feature(CPUState *env, int feature)
+static inline void set_feature(CPUUniCore32State *env, int feature)
 {
 env->features |= feature;
 }
@@ -43,13 +43,13 @@ static uint32_t uc32_cpu_find_by_name(const char *name)
 return id;
 }
 
-CPUState *uc32_cpu_init(const char *cpu_model)
+CPUUniCore32State *uc32_cpu_init(const char *cpu_model)
 {
-CPUState *env;
+CPUUniCore32State *env;
 uint32_t id;
 static int inited = 1;
 
-env = g_malloc0(sizeof(CPUState));
+env = g_malloc0(sizeof(CPUUniCore32State));
 cpu_exec_init(env);
 
 id = uc32_cpu_find_by_name(cpu_model);
@@ -94,12 +94,12 @@ uint32_t HELPER(clz)(uint32_t x)
 return clz32(x);
 }
 
-void do_interrupt(CPUState *env)
+void do_interrupt(CPUUniCore32State *env)
 {
 env->exception_index = -1;
 }
 
-int uc32_cpu_handle_mmu_fault(CPUState *env, target_ulong address

[Qemu-devel] [PATCH v5 29/43] alpha hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/alpha_*.[hc]; do
sed -i "s/CPUState/CPUAlphaState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/alpha_dp264.c   |2 +-
 hw/alpha_sys.h |2 +-
 hw/alpha_typhoon.c |   14 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/hw/alpha_dp264.c b/hw/alpha_dp264.c
index ea0fd95..9eb939f 100644
--- a/hw/alpha_dp264.c
+++ b/hw/alpha_dp264.c
@@ -49,7 +49,7 @@ static void clipper_init(ram_addr_t ram_size,
  const char *initrd_filename,
  const char *cpu_model)
 {
-CPUState *cpus[4];
+CPUAlphaState *cpus[4];
 PCIBus *pci_bus;
 ISABus *isa_bus;
 qemu_irq rtc_irq;
diff --git a/hw/alpha_sys.h b/hw/alpha_sys.h
index f9506c6..de40f8b 100644
--- a/hw/alpha_sys.h
+++ b/hw/alpha_sys.h
@@ -11,7 +11,7 @@
 #include "irq.h"
 
 
-PCIBus *typhoon_init(ram_addr_t, ISABus **, qemu_irq *, CPUState *[4],
+PCIBus *typhoon_init(ram_addr_t, ISABus **, qemu_irq *, CPUAlphaState *[4],
  pci_map_irq_fn);
 
 /* alpha_pci.c.  */
diff --git a/hw/alpha_typhoon.c b/hw/alpha_typhoon.c
index b539416..872e112 100644
--- a/hw/alpha_typhoon.c
+++ b/hw/alpha_typhoon.c
@@ -21,7 +21,7 @@ typedef struct TyphoonCchip {
 uint64_t drir;
 uint64_t dim[4];
 uint32_t iic[4];
-CPUState *cpu[4];
+CPUAlphaState *cpu[4];
 } TyphoonCchip;
 
 typedef struct TyphoonWindow {
@@ -52,7 +52,7 @@ typedef struct TyphoonState {
 } TyphoonState;
 
 /* Called when one of DRIR or DIM changes.  */
-static void cpu_irq_change(CPUState *env, uint64_t req)
+static void cpu_irq_change(CPUAlphaState *env, uint64_t req)
 {
 /* If there are any non-masked interrupts, tell the cpu.  */
 if (env) {
@@ -66,7 +66,7 @@ static void cpu_irq_change(CPUState *env, uint64_t req)
 
 static uint64_t cchip_read(void *opaque, target_phys_addr_t addr, unsigned 
size)
 {
-CPUState *env = cpu_single_env;
+CPUAlphaState *env = cpu_single_env;
 TyphoonState *s = opaque;
 uint64_t ret = 0;
 
@@ -347,7 +347,7 @@ static void cchip_write(void *opaque, target_phys_addr_t 
addr,
 if ((newval ^ oldval) & 0xff0) {
 int i;
 for (i = 0; i < 4; ++i) {
-CPUState *env = s->cchip.cpu[i];
+CPUAlphaState *env = s->cchip.cpu[i];
 if (env) {
 /* IPI can be either cleared or set by the write.  */
 if (newval & (1 << (i + 8))) {
@@ -655,7 +655,7 @@ static void typhoon_set_timer_irq(void *opaque, int irq, 
int level)
 
 /* Deliver the interrupt to each CPU, considering each CPU's IIC.  */
 for (i = 0; i < 4; ++i) {
-CPUState *env = s->cchip.cpu[i];
+CPUAlphaState *env = s->cchip.cpu[i];
 if (env) {
 uint32_t iic = s->cchip.iic[i];
 
@@ -693,7 +693,7 @@ static void typhoon_alarm_timer(void *opaque)
 
 PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
  qemu_irq *p_rtc_irq,
- CPUState *cpus[4], pci_map_irq_fn sys_map_irq)
+ CPUAlphaState *cpus[4], pci_map_irq_fn sys_map_irq)
 {
 const uint64_t MB = 1024 * 1024;
 const uint64_t GB = 1024 * MB;
@@ -713,7 +713,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus,
 
 /* Remember the CPUs so that we can deliver interrupts to them.  */
 for (i = 0; i < 4; i++) {
-CPUState *env = cpus[i];
+CPUAlphaState *env = cpus[i];
 s->cchip.cpu[i] = env;
 if (env) {
 env->alarm_timer = qemu_new_timer_ns(rtc_clock,
-- 
1.7.7

[Qemu-devel] [PATCH v2 2/5] vga_hw_screen_dump: add Error** param

[Alon Levy]

Signed-off-by: Alon Levy 
---
 console.c   |5 +++--
 console.h   |6 --
 hw/blizzard.c   |3 ++-
 hw/g364fb.c |4 +++-
 hw/omap_lcdc.c  |4 +++-
 hw/qxl.c|6 --
 hw/tcx.c|   13 +
 hw/vga.c|7 +--
 hw/vmware_vga.c |6 --
 monitor.c   |4 +++-
 10 files changed, 40 insertions(+), 18 deletions(-)

diff --git a/console.c b/console.c
index 6a463f5..d3fccf3 100644
--- a/console.c
+++ b/console.c
@@ -24,6 +24,7 @@
 #include "qemu-common.h"
 #include "console.h"
 #include "qemu-timer.h"
+#include "error.h"
 
 //#define DEBUG_CONSOLE
 #define DEFAULT_BACKSCROLL 512
@@ -173,7 +174,7 @@ void vga_hw_invalidate(void)
 active_console->hw_invalidate(active_console->hw);
 }
 
-void vga_hw_screen_dump(const char *filename)
+void vga_hw_screen_dump(const char *filename, Error **errp)
 {
 TextConsole *previous_active_console;
 bool cswitch;
@@ -187,7 +188,7 @@ void vga_hw_screen_dump(const char *filename)
 console_select(0);
 }
 if (consoles[0] && consoles[0]->hw_screen_dump) {
-consoles[0]->hw_screen_dump(consoles[0]->hw, filename, cswitch);
+consoles[0]->hw_screen_dump(consoles[0]->hw, filename, cswitch, errp);
 } else {
 error_report("screen dump not implemented");
 }
diff --git a/console.h b/console.h
index 4334db5..caf13f5 100644
--- a/console.h
+++ b/console.h
@@ -6,6 +6,7 @@
 #include "notify.h"
 #include "monitor.h"
 #include "trace.h"
+#include "error.h"
 
 /* keyboard/mouse support */
 
@@ -343,7 +344,8 @@ static inline void console_write_ch(console_ch_t *dest, 
uint32_t ch)
 
 typedef void (*vga_hw_update_ptr)(void *);
 typedef void (*vga_hw_invalidate_ptr)(void *);
-typedef void (*vga_hw_screen_dump_ptr)(void *, const char *, bool cswitch);
+typedef void (*vga_hw_screen_dump_ptr)(void *, const char *, bool cswitch,
+   Error **errp);
 typedef void (*vga_hw_text_update_ptr)(void *, console_ch_t *);
 
 DisplayState *graphic_console_init(vga_hw_update_ptr update,
@@ -354,7 +356,7 @@ DisplayState *graphic_console_init(vga_hw_update_ptr update,
 
 void vga_hw_update(void);
 void vga_hw_invalidate(void);
-void vga_hw_screen_dump(const char *filename);
+void vga_hw_screen_dump(const char *filename, Error **errp);
 void vga_hw_text_update(console_ch_t *chardata);
 
 int is_graphic_console(void);
diff --git a/hw/blizzard.c b/hw/blizzard.c
index c7d844d..76df78c 100644
--- a/hw/blizzard.c
+++ b/hw/blizzard.c
@@ -23,6 +23,7 @@
 #include "devices.h"
 #include "vga_int.h"
 #include "pixel_ops.h"
+#include "error.h"
 
 typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int);
 
@@ -933,7 +934,7 @@ static void blizzard_update_display(void *opaque)
 }
 
 static void blizzard_screen_dump(void *opaque, const char *filename,
- bool cswitch)
+ bool cswitch, Error **errp)
 {
 BlizzardState *s = (BlizzardState *) opaque;
 
diff --git a/hw/g364fb.c b/hw/g364fb.c
index 3a0b68f..7774d05 100644
--- a/hw/g364fb.c
+++ b/hw/g364fb.c
@@ -22,6 +22,7 @@
 #include "pixel_ops.h"
 #include "trace.h"
 #include "sysbus.h"
+#include "error.h"
 
 typedef struct G364State {
 /* hardware */
@@ -289,7 +290,8 @@ static void g364fb_reset(G364State *s)
 g364fb_invalidate_display(s);
 }
 
-static void g364fb_screen_dump(void *opaque, const char *filename, bool 
cswitch)
+static void g364fb_screen_dump(void *opaque, const char *filename, bool 
cswitch,
+   Error **errp)
 {
 G364State *s = opaque;
 int y, x;
diff --git a/hw/omap_lcdc.c b/hw/omap_lcdc.c
index f172093..aec7210 100644
--- a/hw/omap_lcdc.c
+++ b/hw/omap_lcdc.c
@@ -20,6 +20,7 @@
 #include "console.h"
 #include "omap.h"
 #include "framebuffer.h"
+#include "error.h"
 
 struct omap_lcd_panel_s {
 MemoryRegion *sysmem;
@@ -264,7 +265,8 @@ static int ppm_save(const char *filename, uint8_t *data,
 return 0;
 }
 
-static void omap_screen_dump(void *opaque, const char *filename, bool cswitch)
+static void omap_screen_dump(void *opaque, const char *filename, bool cswitch,
+ Error **errp)
 {
 struct omap_lcd_panel_s *omap_lcd = opaque;
 if (cswitch) {
diff --git a/hw/qxl.c b/hw/qxl.c
index e17b0e3..27f27f5 100644
--- a/hw/qxl.c
+++ b/hw/qxl.c
@@ -23,6 +23,7 @@
 #include "qemu-queue.h"
 #include "monitor.h"
 #include "sysemu.h"
+#include "error.h"
 
 #include "qxl.h"
 
@@ -1492,7 +1493,8 @@ static void qxl_hw_invalidate(void *opaque)
 vga->invalidate(vga);
 }
 
-static void qxl_hw_screen_dump(void *opaque, const char *filename, bool 
cswitch)
+static void qxl_hw_screen_dump(void *opaque, const char *filename, bool 
cswitch,
+   Error **errp)
 {
 PCIQXLDevice *qxl = opaque;
 VGACommonState *vga = &qxl->vga;
@@ -1504,7 +1506,7 @@ static void qxl_hw_screen_dump(void *opaque, const char 
*filename, bool cswitch)
 

Re: [Qemu-devel] [PATCH 0/7] QOM'ify UniCore32 CPU

[Anthony Liguori]

On 03/14/2012 03:02 PM, Blue Swirl wrote:

On Wed, Mar 14, 2012 at 01:39, Andreas Färber  wrote:

Hello,

Based on qom-cpu v4 and object_class_get_list() v2, this series converts
the UniCore32 CPU to QOM. Code-wise, target-unicore32 is pretty close to
target-arm and faces a similar issue of CPU-dependent init code, so let's
tackle it next.

Patch 1 adds a UniCore32 CPU guest core (TCG) section to MAINTAINERS,
so that the target-unicore32 author gets notified of patches against his code.

Patch 2, based on feedback from Guan Xuetao, changes the license of most
target-unicore32 files from GPLv2 to GPLv2+. Anthony had contributed a
qemu_malloc() ->  g_malloc() substitution that he can't relicense at this time,
so leave that as GPLv2 and declare my following patches explicitly as GPLv2+.


Perhaps g_malloc() patch could be partially reverted and a new GPLv2+
patch applied which uses g_new()?


This is a bad idea IMHO.  We need clear rules about changing licenses.  I 
personally will not sign off on anything involving reverting code that cannot be 
relicensed.


Copyright law is just too complex when it comes to derivative works.  Just have 
some patience and let's collect the necessary SoBs.


Regards,

Anthony Liguori

[Qemu-devel] [PATCH v5 36/43] mips hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/mips_*.[hc]; do
sed -i "s/CPUState/CPUMIPSState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/mips_cpudevs.h  |4 ++--
 hw/mips_fulong2e.c |   10 +-
 hw/mips_int.c  |6 +++---
 hw/mips_jazz.c |6 +++---
 hw/mips_malta.c|   10 +-
 hw/mips_mipssim.c  |6 +++---
 hw/mips_r4k.c  |6 +++---
 hw/mips_timer.c|   20 ++--
 8 files changed, 34 insertions(+), 34 deletions(-)

diff --git a/hw/mips_cpudevs.h b/hw/mips_cpudevs.h
index db82b41..6bea24b 100644
--- a/hw/mips_cpudevs.h
+++ b/hw/mips_cpudevs.h
@@ -7,9 +7,9 @@ uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
 uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
 
 /* mips_int.c */
-void cpu_mips_irq_init_cpu(CPUState *env);
+void cpu_mips_irq_init_cpu(CPUMIPSState *env);
 
 /* mips_timer.c */
-void cpu_mips_clock_init(CPUState *);
+void cpu_mips_clock_init(CPUMIPSState *);
 
 #endif
diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c
index dae488a..37dc711 100644
--- a/hw/mips_fulong2e.c
+++ b/hw/mips_fulong2e.c
@@ -102,7 +102,7 @@ static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, 
int index,
 va_end(ap);
 }
 
-static int64_t load_kernel (CPUState *env)
+static int64_t load_kernel (CPUMIPSState *env)
 {
 int64_t kernel_entry, kernel_low, kernel_high;
 int index = 0;
@@ -168,7 +168,7 @@ static int64_t load_kernel (CPUState *env)
 return kernel_entry;
 }
 
-static void write_bootloader (CPUState *env, uint8_t *base, int64_t 
kernel_addr)
+static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t 
kernel_addr)
 {
 uint32_t *p;
 
@@ -198,7 +198,7 @@ static void write_bootloader (CPUState *env, uint8_t *base, 
int64_t kernel_addr)
 
 static void main_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUMIPSState *env = opaque;
 
 cpu_state_reset(env);
 /* TODO: 2E reset stuff */
@@ -248,7 +248,7 @@ static void network_init (void)
 
 static void cpu_request_exit(void *opaque, int irq, int level)
 {
-CPUState *env = cpu_single_env;
+CPUMIPSState *env = cpu_single_env;
 
 if (env && level) {
 cpu_exit(env);
@@ -272,7 +272,7 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const 
char *boot_device,
 i2c_bus *smbus;
 int i;
 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
-CPUState *env;
+CPUMIPSState *env;
 
 /* init CPUs */
 if (cpu_model == NULL) {
diff --git a/hw/mips_int.c b/hw/mips_int.c
index 477f6ab..6423fd0 100644
--- a/hw/mips_int.c
+++ b/hw/mips_int.c
@@ -26,7 +26,7 @@
 
 static void cpu_mips_irq_request(void *opaque, int irq, int level)
 {
-CPUState *env = (CPUState *)opaque;
+CPUMIPSState *env = (CPUMIPSState *)opaque;
 
 if (irq < 0 || irq > 7)
 return;
@@ -44,7 +44,7 @@ static void cpu_mips_irq_request(void *opaque, int irq, int 
level)
 }
 }
 
-void cpu_mips_irq_init_cpu(CPUState *env)
+void cpu_mips_irq_init_cpu(CPUMIPSState *env)
 {
 qemu_irq *qi;
 int i;
@@ -55,7 +55,7 @@ void cpu_mips_irq_init_cpu(CPUState *env)
 }
 }
 
-void cpu_mips_soft_irq(CPUState *env, int irq, int level)
+void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level)
 {
 if (irq < 0 || irq > 2) {
 return;
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index d5f1b34..a6bc7ba 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -50,7 +50,7 @@ enum jazz_model_e
 
 static void main_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUMIPSState *env = opaque;
 cpu_state_reset(env);
 }
 
@@ -97,7 +97,7 @@ static const MemoryRegionOps dma_dummy_ops = {
 
 static void cpu_request_exit(void *opaque, int irq, int level)
 {
-CPUState *env = cpu_single_env;
+CPUMIPSState *env = cpu_single_env;
 
 if (env && level) {
 cpu_exit(env);
@@ -112,7 +112,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
 {
 char *filename;
 int bios_size, n;
-CPUState *env;
+CPUMIPSState *env;
 qemu_irq *rc4030, *i8259;
 rc4030_dma *dmas;
 void* rc4030_opaque;
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 3335e11..5e26775 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -500,7 +500,7 @@ static void network_init(void)
  a3 - RAM size in bytes
 */
 
-static void write_bootloader (CPUState *env, uint8_t *base,
+static void write_bootloader (CPUMIPSState *env, uint8_t *base,
   int64_t kernel_entry)
 {
 uint32_t *p;
@@ -736,7 +736,7 @@ static int64_t load_kernel (void)
 return kernel_entry;
 }
 
-static void malta_mips_config(CPUState *env)
+static void malta_mips_config(CPUMIPSState *env)
 {
 env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) |
  ((smp_cpus * env->nr_threads - 1) << CP0MVPC0_PTC);
@@ -744,7 +744,7 @@ static void malta_mips_config(CPUState *env)
 
 static void main_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;

[Qemu-devel] [PATCH v5 04/43] monitor: Avoid CPUState in read/write functions

[Andreas Färber]

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 gdbstub.c |   56 
 1 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/gdbstub.c b/gdbstub.c
index ef95ac2..b5ec362 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -533,7 +533,7 @@ static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
 #define IDX_XMM_REGS(IDX_FP_REGS + 16)
 #define IDX_MXCSR_REG   (IDX_XMM_REGS + CPU_NB_REGS)
 
-static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n)
 {
 if (n < CPU_NB_REGS) {
 if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
@@ -590,7 +590,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t 
*mem_buf, int n)
 return 0;
 }
 
-static int cpu_x86_gdb_load_seg(CPUState *env, int sreg, uint8_t *mem_buf)
+static int cpu_x86_gdb_load_seg(CPUX86State *env, int sreg, uint8_t *mem_buf)
 {
 uint16_t selector = ldl_p(mem_buf);
 
@@ -615,7 +615,7 @@ static int cpu_x86_gdb_load_seg(CPUState *env, int sreg, 
uint8_t *mem_buf)
 return 4;
 }
 
-static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_write_register(CPUX86State *env, uint8_t *mem_buf, int n)
 {
 uint32_t tmp;
 
@@ -703,7 +703,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t 
*mem_buf, int n)
 #define GDB_CORE_XML "power-core.xml"
 #endif
 
-static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n)
 {
 if (n < 32) {
 /* gprs */
@@ -740,7 +740,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t 
*mem_buf, int n)
 return 0;
 }
 
-static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_write_register(CPUPPCState *env, uint8_t *mem_buf, int n)
 {
 if (n < 32) {
 /* gprs */
@@ -801,7 +801,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t 
*mem_buf, int n)
 #define GET_REGA(val) GET_REGL(val)
 #endif
 
-static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n)
 {
 if (n < 8) {
 /* g0..g7 */
@@ -860,7 +860,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t 
*mem_buf, int n)
 return 0;
 }
 
-static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_write_register(CPUSPARCState *env, uint8_t *mem_buf, int n)
 {
 #if defined(TARGET_ABI32)
 abi_ulong tmp;
@@ -944,7 +944,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t 
*mem_buf, int n)
 #define NUM_CORE_REGS 26
 #define GDB_CORE_XML "arm-core.xml"
 
-static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n)
 {
 if (n < 16) {
 /* Core integer register.  */
@@ -971,7 +971,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t 
*mem_buf, int n)
 return 0;
 }
 
-static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n)
 {
 uint32_t tmp;
 
@@ -1014,7 +1014,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t 
*mem_buf, int n)
 
 #define GDB_CORE_XML "cf-core.xml"
 
-static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n)
 {
 if (n < 8) {
 /* D0-D7 */
@@ -1033,7 +1033,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t 
*mem_buf, int n)
 return 0;
 }
 
-static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_write_register(CPUM68KState *env, uint8_t *mem_buf, int n)
 {
 uint32_t tmp;
 
@@ -1058,7 +1058,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t 
*mem_buf, int n)
 
 #define NUM_CORE_REGS 73
 
-static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
 {
 if (n < 32) {
 GET_REGL(env->active_tc.gpr[n]);
@@ -1104,7 +1104,7 @@ static unsigned int ieee_rm[] =
 #define RESTORE_ROUNDING_MODE \
 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], 
&env->active_fpu.fp_status)
 
-static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
 {
 target_ulong tmp;
 
@@ -1163,7 +1163,7 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t 
*mem_buf, int n)
 
 #define NUM_CORE_REGS 59
 
-static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n)
 {
 if (n < 8) {
 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
@@ -1197,

[Qemu-devel] [PATCH v5 10/43] darwin-user: Don't overuse CPUState

[Andreas Färber]

Use CPU*State where applicable.

Signed-off-by: Andreas Färber 
---
 darwin-user/main.c   |   14 +++---
 darwin-user/signal.c |4 ++--
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/darwin-user/main.c b/darwin-user/main.c
index 13c1f05..f5cadc7 100644
--- a/darwin-user/main.c
+++ b/darwin-user/main.c
@@ -77,38 +77,38 @@ int cpu_get_pic_interrupt(CPUState *env)
 }
 #ifdef TARGET_PPC
 
-static inline uint64_t cpu_ppc_get_tb (CPUState *env)
+static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
 {
 /* TO FIX */
 return 0;
 }
 
-uint64_t cpu_ppc_load_tbl (CPUState *env)
+uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
 {
 return cpu_ppc_get_tb(env);
 }
 
-uint32_t cpu_ppc_load_tbu (CPUState *env)
+uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
 {
 return cpu_ppc_get_tb(env) >> 32;
 }
 
-uint64_t cpu_ppc_load_atbl (CPUState *env)
+uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
 {
 return cpu_ppc_get_tb(env);
 }
 
-uint32_t cpu_ppc_load_atbu (CPUState *env)
+uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
 {
 return cpu_ppc_get_tb(env) >> 32;
 }
 
-uint32_t cpu_ppc601_load_rtcu (CPUState *env)
+uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
 {
 cpu_ppc_load_tbu(env);
 }
 
-uint32_t cpu_ppc601_load_rtcl (CPUState *env)
+uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
 {
 return cpu_ppc_load_tbl(env) & 0x3F80;
 }
diff --git a/darwin-user/signal.c b/darwin-user/signal.c
index 317ef92..8f9705d 100644
--- a/darwin-user/signal.c
+++ b/darwin-user/signal.c
@@ -315,7 +315,7 @@ get_sigframe(struct emulated_sigaction *ka, CPUX86State 
*env, size_t frame_size)
 }
 
 static void setup_frame(int sig, struct emulated_sigaction *ka,
-   void *set, CPUState *env)
+void *set, CPUX86State *env)
 {
void *frame;
 
@@ -336,7 +336,7 @@ give_sigsegv:
force_sig(SIGSEGV /* , current */);
 }
 
-long do_sigreturn(CPUState *env, int num)
+long do_sigreturn(CPUX86State *env, int num)
 {
 int i = 0;
 struct target_sigcontext *scp = get_int_arg(&i, env);
-- 
1.7.7

[Qemu-devel] [PATCH v5 14/43] target-cris: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUCRISState/g" target-cris/*.[hc]
  sed -i "s/#define CPUCRISState/#define CPUState/" target-cris/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-cris/cpu.h   |   12 +-
 target-cris/helper.c|   14 ++--
 target-cris/mmu.c   |   14 ++--
 target-cris/mmu.h   |6 ++--
 target-cris/op_helper.c |6 ++--
 target-cris/translate.c |   46 +-
 target-cris/translate_v10.c |   26 
 7 files changed, 62 insertions(+), 62 deletions(-)

diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 222a062..f38393a 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -225,17 +225,17 @@ enum {
 #define MMU_MODE0_SUFFIX _kernel
 #define MMU_MODE1_SUFFIX _user
 #define MMU_USER_IDX 1
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index (CPUCRISState *env)
 {
return !!(env->pregs[PR_CCS] & U_FLAG);
 }
 
-int cpu_cris_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int cpu_cris_handle_mmu_fault(CPUCRISState *env, target_ulong address, int rw,
   int mmu_idx);
 #define cpu_handle_mmu_fault cpu_cris_handle_mmu_fault
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUCRISState *env, target_ulong newsp)
 {
 if (newsp)
 env->regs[14] = newsp;
@@ -260,7 +260,7 @@ static inline void cpu_set_tls(CPUCRISState *env, 
target_ulong newtls)
 
 #include "cpu-all.h"
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->pc;
@@ -273,14 +273,14 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 #define cpu_list cris_cpu_list
 void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUCRISState *env)
 {
 return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
 }
 
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPUCRISState *env, TranslationBlock *tb)
 {
 env->pc = tb->pc;
 }
diff --git a/target-cris/helper.c b/target-cris/helper.c
index dd7f18e..8680f43 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -36,13 +36,13 @@
 
 #if defined(CONFIG_USER_ONLY)
 
-void do_interrupt (CPUState *env)
+void do_interrupt (CPUCRISState *env)
 {
env->exception_index = -1;
env->pregs[PR_ERP] = env->pc;
 }
 
-int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
+int cpu_cris_handle_mmu_fault(CPUCRISState * env, target_ulong address, int rw,
   int mmu_idx)
 {
env->exception_index = 0xaa;
@@ -54,7 +54,7 @@ int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong 
address, int rw,
 #else /* !CONFIG_USER_ONLY */
 
 
-static void cris_shift_ccs(CPUState *env)
+static void cris_shift_ccs(CPUCRISState *env)
 {
uint32_t ccs;
/* Apply the ccs shift.  */
@@ -63,7 +63,7 @@ static void cris_shift_ccs(CPUState *env)
env->pregs[PR_CCS] = ccs;
 }
 
-int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+int cpu_cris_handle_mmu_fault (CPUCRISState *env, target_ulong address, int rw,
int mmu_idx)
 {
struct cris_mmu_result res;
@@ -106,7 +106,7 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong 
address, int rw,
return r;
 }
 
-static void do_interruptv10(CPUState *env)
+static void do_interruptv10(CPUCRISState *env)
 {
int ex_vec = -1;
 
@@ -162,7 +162,7 @@ static void do_interruptv10(CPUState *env)
  env->pregs[PR_ERP]);
 }
 
-void do_interrupt(CPUState *env)
+void do_interrupt(CPUCRISState *env)
 {
int ex_vec = -1;
 
@@ -246,7 +246,7 @@ void do_interrupt(CPUState *env)
   env->pregs[PR_ERP]);
 }
 
-target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
+target_phys_addr_t cpu_get_phys_page_debug(CPUCRISState * env, target_ulong 
addr)
 {
uint32_t phy = addr;
struct cris_mmu_result res;
diff --git a/target-cris/mmu.c b/target-cris/mmu.c
index 5cd8f27..512e28b 100644
--- a/target-cris/mmu.c
+++ b/target-cris/mmu.c
@@ -31,7 +31,7 @@
 #define D_LOG(...) do { } while (0)
 #endif
 
-void cris_mmu_init(CPUState *env)
+void cris_mmu_init(CPUCRISState *env)
 {
env->mmu_rand_lfsr = 0x;
 }
@@ -49,7 +49,7 @@ static inline unsigned int compute_polynom(unsigned int sr)
return f;
 }
 
-static void cris_mmu_update_rand_lfsr(CPUState *env)
+static void cris_mmu_update_rand_lfsr(CPUCRISState *env)
 {

[Qemu-devel] [PATCH v5 20/43] target-ppc: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUPPCState/g" target-ppc/*.[hc]
  sed -i "s/#define CPUPPCState/#define CPUState/" target-ppc/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-ppc/cpu.h|   38 ++--
 target-ppc/helper.c |   80 +-
 target-ppc/kvm.c|   38 ++--
 target-ppc/kvm_ppc.h|   12 +++---
 target-ppc/machine.c|4 +-
 target-ppc/op_helper.c  |   12 +++---
 target-ppc/translate.c  |   78 +-
 target-ppc/translate_init.c |   42 +++---
 8 files changed, 152 insertions(+), 152 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index ac753f3..3508d8a 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1173,12 +1173,12 @@ void store_40x_dbcr0 (CPUPPCState *env, uint32_t val);
 void store_40x_sler (CPUPPCState *env, uint32_t val);
 void store_booke_tcr (CPUPPCState *env, target_ulong val);
 void store_booke_tsr (CPUPPCState *env, target_ulong val);
-void booke206_flush_tlb(CPUState *env, int flags, const int check_iprot);
-target_phys_addr_t booke206_tlb_to_page_size(CPUState *env, ppcmas_tlb_t *tlb);
-int ppcemb_tlb_check(CPUState *env, ppcemb_tlb_t *tlb,
+void booke206_flush_tlb(CPUPPCState *env, int flags, const int check_iprot);
+target_phys_addr_t booke206_tlb_to_page_size(CPUPPCState *env, ppcmas_tlb_t 
*tlb);
+int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
  target_phys_addr_t *raddrp, target_ulong address,
  uint32_t pid, int ext, int i);
-int ppcmas_tlb_check(CPUState *env, ppcmas_tlb_t *tlb,
+int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb,
  target_phys_addr_t *raddrp, target_ulong address,
  uint32_t pid);
 void ppc_tlb_invalidate_all (CPUPPCState *env);
@@ -1226,13 +1226,13 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, 
uint32_t val);
 #define MMU_MODE1_SUFFIX _kernel
 #define MMU_MODE2_SUFFIX _hypv
 #define MMU_USER_IDX 0
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index (CPUPPCState *env)
 {
 return env->mmu_idx;
 }
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUPPCState *env, target_ulong newsp)
 {
 if (newsp)
 env->gpr[1] = newsp;
@@ -2056,7 +2056,7 @@ enum {
 
 /*/
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->nip;
@@ -2064,7 +2064,7 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 *flags = env->hflags;
 }
 
-static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
+static inline void cpu_set_tls(CPUPPCState *env, target_ulong newtls)
 {
 #if defined(TARGET_PPC64)
 /* The kernel checks TIF_32BIT here; we don't support loading 32-bit
@@ -2076,7 +2076,7 @@ static inline void cpu_set_tls(CPUState *env, 
target_ulong newtls)
 }
 
 #if !defined(CONFIG_USER_ONLY)
-static inline int booke206_tlbm_id(CPUState *env, ppcmas_tlb_t *tlbm)
+static inline int booke206_tlbm_id(CPUPPCState *env, ppcmas_tlb_t *tlbm)
 {
 uintptr_t tlbml = (uintptr_t)tlbm;
 uintptr_t tlbl = (uintptr_t)env->tlb.tlbm;
@@ -2084,21 +2084,21 @@ static inline int booke206_tlbm_id(CPUState *env, 
ppcmas_tlb_t *tlbm)
 return (tlbml - tlbl) / sizeof(env->tlb.tlbm[0]);
 }
 
-static inline int booke206_tlb_size(CPUState *env, int tlbn)
+static inline int booke206_tlb_size(CPUPPCState *env, int tlbn)
 {
 uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn];
 int r = tlbncfg & TLBnCFG_N_ENTRY;
 return r;
 }
 
-static inline int booke206_tlb_ways(CPUState *env, int tlbn)
+static inline int booke206_tlb_ways(CPUPPCState *env, int tlbn)
 {
 uint32_t tlbncfg = env->spr[SPR_BOOKE_TLB0CFG + tlbn];
 int r = tlbncfg >> TLBnCFG_ASSOC_SHIFT;
 return r;
 }
 
-static inline int booke206_tlbm_to_tlbn(CPUState *env, ppcmas_tlb_t *tlbm)
+static inline int booke206_tlbm_to_tlbn(CPUPPCState *env, ppcmas_tlb_t *tlbm)
 {
 int id = booke206_tlbm_id(env, tlbm);
 int end = 0;
@@ -2115,14 +2115,14 @@ static inline int booke206_tlbm_to_tlbn(CPUState *env, 
ppcmas_tlb_t *tlbm)
 return 0;
 }
 
-static inline int booke206_tlbm_to_way(CPUState *env, ppcmas_tlb_t *tlb)
+static inline int booke206_tlbm_to_way(CPUPPCState *env, ppcmas_tlb_t *tlb)
 {
 int tlbn = booke206_tlbm_to_tlbn(env, tlb);
 int tlbid = booke206_tlbm_id(env, tlb);
 return tlbid & (booke206_tlb_ways(env, tlbn) - 1);
 }
 
-static inline ppcmas_tlb_t *booke206_get_tlbm(CPUState *env, const int tlbn,
+static inline ppcmas_tlb_t *booke206_get_tlbm(CP

[Qemu-devel] [PATCH v5 12/43] target-alpha: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUAlphaState/g" target-alpha/*.[hc]
  sed -i "s/#define CPUAlphaState/#define CPUState/" target-alpha/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-alpha/cpu.h   |   24 ++--
 target-alpha/helper.c|   18 +++---
 target-alpha/machine.c   |   44 ++--
 target-alpha/op_helper.c |6 ++--
 target-alpha/translate.c |   56 +++---
 5 files changed, 74 insertions(+), 74 deletions(-)

diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 5cd6fd8..ecc2a35 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -375,7 +375,7 @@ enum {
 PS_USER_MODE = 8
 };
 
-static inline int cpu_mmu_index(CPUState *env)
+static inline int cpu_mmu_index(CPUAlphaState *env)
 {
 if (env->pal_mode) {
 return MMU_KERNEL_IDX;
@@ -430,16 +430,16 @@ int cpu_alpha_exec(CPUAlphaState *s);
is returned if the signal was handled by the virtual CPU.  */
 int cpu_alpha_signal_handler(int host_signum, void *pinfo,
  void *puc);
-int cpu_alpha_handle_mmu_fault (CPUState *env, uint64_t address, int rw,
+int cpu_alpha_handle_mmu_fault (CPUAlphaState *env, uint64_t address, int rw,
 int mmu_idx);
 #define cpu_handle_mmu_fault cpu_alpha_handle_mmu_fault
-void do_interrupt (CPUState *env);
+void do_interrupt (CPUAlphaState *env);
 
-uint64_t cpu_alpha_load_fpcr (CPUState *env);
-void cpu_alpha_store_fpcr (CPUState *env, uint64_t val);
+uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env);
+void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
 #ifndef CONFIG_USER_ONLY
-void swap_shadow_regs(CPUState *env);
-QEMU_NORETURN void cpu_unassigned_access(CPUState *env1,
+void swap_shadow_regs(CPUAlphaState *env);
+QEMU_NORETURN void cpu_unassigned_access(CPUAlphaState *env1,
  target_phys_addr_t addr, int is_write,
  int is_exec, int unused, int size);
 #endif
@@ -459,7 +459,7 @@ enum {
 TB_FLAGS_AMASK_PREFETCH = AMASK_PREFETCH << TB_FLAGS_AMASK_SHIFT,
 };
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc,
 target_ulong *cs_base, int *pflags)
 {
 int flags = 0;
@@ -481,7 +481,7 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 }
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUAlphaState *env, target_ulong newsp)
 {
 if (newsp) {
 env->ir[IR_SP] = newsp;
@@ -490,13 +490,13 @@ static inline void cpu_clone_regs(CPUState *env, 
target_ulong newsp)
 env->ir[IR_A3] = 0;
 }
 
-static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
+static inline void cpu_set_tls(CPUAlphaState *env, target_ulong newtls)
 {
 env->unique = newtls;
 }
 #endif
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUAlphaState *env)
 {
 /* Here we are checking to see if the CPU should wake up from HALT.
We will have gotten into this state only for WTINT from PALmode.  */
@@ -513,7 +513,7 @@ static inline bool cpu_has_work(CPUState *env)
 
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPUAlphaState *env, TranslationBlock *tb)
 {
 env->pc = tb->pc;
 }
diff --git a/target-alpha/helper.c b/target-alpha/helper.c
index 06d2565..3f2e7c3 100644
--- a/target-alpha/helper.c
+++ b/target-alpha/helper.c
@@ -24,7 +24,7 @@
 #include "cpu.h"
 #include "softfloat.h"
 
-uint64_t cpu_alpha_load_fpcr (CPUState *env)
+uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env)
 {
 uint64_t r = 0;
 uint8_t t;
@@ -94,7 +94,7 @@ uint64_t cpu_alpha_load_fpcr (CPUState *env)
 return r;
 }
 
-void cpu_alpha_store_fpcr (CPUState *env, uint64_t val)
+void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val)
 {
 uint8_t t;
 
@@ -159,7 +159,7 @@ void cpu_alpha_store_fpcr (CPUState *env, uint64_t val)
 }
 
 #if defined(CONFIG_USER_ONLY)
-int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+int cpu_alpha_handle_mmu_fault (CPUAlphaState *env, target_ulong address, int 
rw,
 int mmu_idx)
 {
 env->exception_index = EXCP_MMFAULT;
@@ -167,7 +167,7 @@ int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong 
address, int rw,
 return 1;
 }
 #else
-void swap_shadow_regs(CPUState *env)
+void swap_shadow_regs(CPUAlphaState *env)
 {
 uint64_t i0, i1, i2, i3, i4, i5, i6, i7;
 
@@ -200,7 +200,7 @@ void swap_shadow_regs(CPUState *env)
 }
 
 /* Returns the OSF/1 entMM failure indication, or -1 on success.  */
-static int get_physical_address(CPUState *env, target_ulong addr,
+static

[Qemu-devel] [PATCH v5 09/43] linux-user: Don't overuse CPUState

[Andreas Färber]

In target-specific code use CPU*State.

While at it, fix indentation on those lines.

Signed-off-by: Andreas Färber 
---
 linux-user/elfload.c  |   24 +++---
 linux-user/m68k/syscall.h |2 +-
 linux-user/main.c |   28 +++---
 linux-user/signal.c   |  201 +++--
 4 files changed, 131 insertions(+), 124 deletions(-)

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 2fd4a93..48e3232 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -157,7 +157,7 @@ typedef target_elf_greg_t  target_elf_gregset_t[ELF_NREG];
  *
  * See linux kernel: arch/x86/include/asm/elf.h
  */
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State 
*env)
 {
 (*regs)[0] = env->regs[15];
 (*regs)[1] = env->regs[14];
@@ -229,7 +229,7 @@ typedef target_elf_greg_t  target_elf_gregset_t[ELF_NREG];
  *
  * See linux kernel: arch/x86/include/asm/elf.h
  */
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State 
*env)
 {
 (*regs)[0] = env->regs[R_EBX];
 (*regs)[1] = env->regs[R_ECX];
@@ -288,7 +288,7 @@ static inline void init_thread(struct target_pt_regs *regs,
 #define ELF_NREG18
 typedef target_elf_greg_t  target_elf_gregset_t[ELF_NREG];
 
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUARMState 
*env)
 {
 (*regs)[0] = tswapl(env->regs[0]);
 (*regs)[1] = tswapl(env->regs[1]);
@@ -307,7 +307,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, 
const CPUState *env)
 (*regs)[14] = tswapl(env->regs[14]);
 (*regs)[15] = tswapl(env->regs[15]);
 
-(*regs)[16] = tswapl(cpsr_read((CPUState *)env));
+(*regs)[16] = tswapl(cpsr_read((CPUARMState *)env));
 (*regs)[17] = tswapl(env->regs[0]); /* XXX */
 }
 
@@ -410,7 +410,7 @@ static inline void init_thread(struct target_pt_regs *regs,
 #define ELF_NREG34
 typedef target_elf_greg_t  target_elf_gregset_t[ELF_NREG];
 
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const 
CPUUniCore32State *env)
 {
 (*regs)[0] = env->regs[0];
 (*regs)[1] = env->regs[1];
@@ -445,7 +445,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, 
const CPUState *env)
 (*regs)[30] = env->regs[30];
 (*regs)[31] = env->regs[31];
 
-(*regs)[32] = cpu_asr_read((CPUState *)env);
+(*regs)[32] = cpu_asr_read((CPUUniCore32State *)env);
 (*regs)[33] = env->regs[0]; /* XXX */
 }
 
@@ -572,7 +572,7 @@ enum {
 
 static uint32_t get_elf_hwcap(void)
 {
-CPUState *e = thread_env;
+CPUPPCState *e = thread_env;
 uint32_t features = 0;
 
 /* We don't have to be terribly complete here; the high points are
@@ -628,7 +628,7 @@ static inline void init_thread(struct target_pt_regs 
*_regs, struct image_info *
 #define ELF_NREG 48
 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
 
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUPPCState 
*env)
 {
 int i;
 target_ulong ccr = 0;
@@ -697,7 +697,7 @@ enum {
 };
 
 /* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs.  */
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState 
*env)
 {
 int i;
 
@@ -749,7 +749,7 @@ static inline void init_thread(struct target_pt_regs *regs,
 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
 
 /* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs.  */
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState 
*env)
 {
 int i, pos = 0;
 
@@ -797,7 +797,7 @@ enum {
 };
 
 static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
-  const CPUState *env)
+  const CPUSH4State *env)
 {
 int i;
 
@@ -862,7 +862,7 @@ static inline void init_thread(struct target_pt_regs *regs,
 #define ELF_NREG 20
 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
 
-static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUState *env)
+static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUM68KState 
*env)
 {
 (*regs)[0] = tswapl(env->dregs[1]);
 (*regs)[1] = tswapl(env->dregs[2]);
diff --git a/linux-user/m68k/syscall.h b/linux-user/m68k/syscall.h
index 2fd85dd..2618793 100644
--- a/linux-user/m68k/syscall.h
+++ b/linux-user/m68k/syscall.h
@@ -18,4 +18,4 @@ struct target_pt_regs {
 
 #define UNAME_MACHINE "m68k"
 
-void do_m68k_simcall(CPU

[Qemu-devel] [PATCH v5 15/43] target-i386: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUX86State/g" target-i386/*.[hc]
  sed -i "s/#define CPUX86State/#define CPUState/" target-i386/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-i386/cpu.h   |   34 +-
 target-i386/helper.c|   38 +-
 target-i386/kvm.c   |   76 ++--
 target-i386/machine.c   |  172 +++---
 target-i386/op_helper.c |   34 +-
 target-i386/translate.c |   82 +++---
 6 files changed, 218 insertions(+), 218 deletions(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 36e3d29..6e26d21 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -788,7 +788,7 @@ int cpu_x86_exec(CPUX86State *s);
 void cpu_x86_close(CPUX86State *s);
 void x86_cpu_list (FILE *f, fprintf_function cpu_fprintf, const char *optarg);
 void x86_cpudef_setup(void);
-int cpu_x86_support_mca_broadcast(CPUState *env);
+int cpu_x86_support_mca_broadcast(CPUX86State *env);
 
 int cpu_get_pic_interrupt(CPUX86State *s);
 /* MSDOS compatibility mode FPU exception support */
@@ -970,7 +970,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
 #define MMU_MODE0_SUFFIX _kernel
 #define MMU_MODE1_SUFFIX _user
 #define MMU_USER_IDX 1
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index (CPUX86State *env)
 {
 return (env->hflags & HF_CPL_MASK) == 3 ? 1 : 0;
 }
@@ -1009,7 +1009,7 @@ static inline int cpu_mmu_index (CPUState *env)
 void optimize_flags_init(void);
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUX86State *env, target_ulong newsp)
 {
 if (newsp)
 env->regs[R_ESP] = newsp;
@@ -1024,7 +1024,7 @@ static inline void cpu_clone_regs(CPUState *env, 
target_ulong newsp)
 #include "hw/apic.h"
 #endif
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUX86State *env)
 {
 return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 (env->eflags & IF_MASK)) ||
@@ -1036,12 +1036,12 @@ static inline bool cpu_has_work(CPUState *env)
 
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPUX86State *env, TranslationBlock *tb)
 {
 env->eip = tb->pc - tb->cs_base;
 }
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUX86State *env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *cs_base = env->segs[R_CS].base;
@@ -1050,29 +1050,29 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 (env->eflags & (IOPL_MASK | TF_MASK | RF_MASK | VM_MASK));
 }
 
-void do_cpu_init(CPUState *env);
-void do_cpu_sipi(CPUState *env);
+void do_cpu_init(CPUX86State *env);
+void do_cpu_sipi(CPUX86State *env);
 
 #define MCE_INJECT_BROADCAST1
 #define MCE_INJECT_UNCOND_AO2
 
-void cpu_x86_inject_mce(Monitor *mon, CPUState *cenv, int bank,
+void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank,
 uint64_t status, uint64_t mcg_status, uint64_t addr,
 uint64_t misc, int flags);
 
 /* op_helper.c */
-void do_interrupt(CPUState *env);
-void do_interrupt_x86_hardirq(CPUState *env, int intno, int is_hw);
-void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
-void QEMU_NORETURN raise_exception_err_env(CPUState *nenv, int exception_index,
+void do_interrupt(CPUX86State *env);
+void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
+void QEMU_NORETURN raise_exception_env(int exception_index, CPUX86State *nenv);
+void QEMU_NORETURN raise_exception_err_env(CPUX86State *nenv, int 
exception_index,
int error_code);
 
-void do_smm_enter(CPUState *env1);
+void do_smm_enter(CPUX86State *env1);
 
-void svm_check_intercept(CPUState *env1, uint32_t type);
+void svm_check_intercept(CPUX86State *env1, uint32_t type);
 
-uint32_t cpu_cc_compute_all(CPUState *env1, int op);
+uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
 
-void cpu_report_tpr_access(CPUState *env, TPRAccess access);
+void cpu_report_tpr_access(CPUX86State *env, TPRAccess access);
 
 #endif /* CPU_I386_H */
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 140c696..83122bf 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -27,7 +27,7 @@
 //#define DEBUG_MMU
 
 /* NOTE: must be called outside the CPU execute loop */
-void cpu_state_reset(CPUState *env)
+void cpu_state_reset(CPUX86State *env)
 {
 int i;
 
@@ -106,7 +106,7 @@ void cpu_x86_close(CPUX86State *env)
 g_free(env);
 }
 
-static void cpu_x86_version(CPUState *env, int *family, int *model)
+static void cpu_x86_version(CPUX86State *env, int *family, int *model)
 {
 int cpuver = env->cpuid_version;
 
@@ -119,7 +119,7 @

[Qemu-devel] [PATCH v5 22/43] target-sh4: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUSH4State/g" target-sh4/*.[hc]
  sed -i "s/#define CPUSH4State/#define CPUState/" target-sh4/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-sh4/cpu.h   |   10 +-
 target-sh4/helper.c|   28 ++--
 target-sh4/op_helper.c |4 ++--
 target-sh4/translate.c |   46 +++---
 4 files changed, 44 insertions(+), 44 deletions(-)

diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 7d7fdde..b45e54f 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -240,13 +240,13 @@ void cpu_load_tlb(CPUSH4State * env);
 #define MMU_MODE0_SUFFIX _kernel
 #define MMU_MODE1_SUFFIX _user
 #define MMU_USER_IDX 1
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index (CPUSH4State *env)
 {
 return (env->sr & SR_MD) == 0 ? 1 : 0;
 }
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUSH4State *env, target_ulong newsp)
 {
 if (newsp)
 env->gregs[15] = newsp;
@@ -348,7 +348,7 @@ static inline int cpu_ptel_pr (uint32_t ptel)
 
 #define TB_FLAG_PENDING_MOVCA  (1 << 4)
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->pc;
@@ -361,14 +361,14 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
 }
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUSH4State *env)
 {
 return env->interrupt_request & CPU_INTERRUPT_HARD;
 }
 
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPUSH4State *env, TranslationBlock *tb)
 {
 env->pc = tb->pc;
 env->flags = tb->flags;
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 006d1a9..5c57380 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -31,12 +31,12 @@
 
 #if defined(CONFIG_USER_ONLY)
 
-void do_interrupt (CPUState *env)
+void do_interrupt (CPUSH4State *env)
 {
   env->exception_index = -1;
 }
 
-int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
+int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, int rw,
  int mmu_idx)
 {
 env->tea = address;
@@ -78,7 +78,7 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
 #define MMU_DADDR_ERROR_READ (-12)
 #define MMU_DADDR_ERROR_WRITE(-13)
 
-void do_interrupt(CPUState * env)
+void do_interrupt(CPUSH4State * env)
 {
 int do_irq = env->interrupt_request & CPU_INTERRUPT_HARD;
 int do_exp, irq_vector = env->exception_index;
@@ -202,7 +202,7 @@ void do_interrupt(CPUState * env)
 }
 }
 
-static void update_itlb_use(CPUState * env, int itlbnb)
+static void update_itlb_use(CPUSH4State * env, int itlbnb)
 {
 uint8_t or_mask = 0, and_mask = (uint8_t) - 1;
 
@@ -227,7 +227,7 @@ static void update_itlb_use(CPUState * env, int itlbnb)
 env->mmucr |= (or_mask << 24);
 }
 
-static int itlb_replacement(CPUState * env)
+static int itlb_replacement(CPUSH4State * env)
 {
 if ((env->mmucr & 0xe000) == 0xe000)
return 0;
@@ -243,7 +243,7 @@ static int itlb_replacement(CPUState * env)
 /* Find the corresponding entry in the right TLB
Return entry, MMU_DTLB_MISS or MMU_DTLB_MULTIPLE
 */
-static int find_tlb_entry(CPUState * env, target_ulong address,
+static int find_tlb_entry(CPUSH4State * env, target_ulong address,
  tlb_t * entries, uint8_t nbtlb, int use_asid)
 {
 int match = MMU_DTLB_MISS;
@@ -269,7 +269,7 @@ static int find_tlb_entry(CPUState * env, target_ulong 
address,
 return match;
 }
 
-static void increment_urc(CPUState * env)
+static void increment_urc(CPUSH4State * env)
 {
 uint8_t urb, urc;
 
@@ -285,7 +285,7 @@ static void increment_urc(CPUState * env)
 /* Copy and utlb entry into itlb
Return entry
 */
-static int copy_utlb_entry_itlb(CPUState *env, int utlb)
+static int copy_utlb_entry_itlb(CPUSH4State *env, int utlb)
 {
 int itlb;
 
@@ -303,7 +303,7 @@ static int copy_utlb_entry_itlb(CPUState *env, int utlb)
 /* Find itlb entry
Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE
 */
-static int find_itlb_entry(CPUState * env, target_ulong address,
+static int find_itlb_entry(CPUSH4State * env, target_ulong address,
int use_asid)
 {
 int e;
@@ -321,7 +321,7 @@ static int find_itlb_entry(CPUState * env, target_ulong 
address,
 
 /* Find utlb entry
Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */
-static int find_utlb_entry(CPUState * env, target_ulong address, int use_asid)
+static int find_utlb_entry(CPUSH4State

[Qemu-devel] [PATCH v5 25/43] target-xtensa: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUXtensaState/g" target-xtensa/*.[hc]
  sed -i "s/#define CPUXtensaState/#define CPUState/" target-xtensa/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-xtensa/cpu.h   |   44 ++--
 target-xtensa/helper.c|   40 
 target-xtensa/op_helper.c |   30 +++---
 target-xtensa/translate.c |   22 +++---
 4 files changed, 68 insertions(+), 68 deletions(-)

diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index fb8a727..b7723ca 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -356,27 +356,27 @@ int cpu_xtensa_exec(CPUXtensaState *s);
 void xtensa_register_core(XtensaConfigList *node);
 void do_interrupt(CPUXtensaState *s);
 void check_interrupts(CPUXtensaState *s);
-void xtensa_irq_init(CPUState *env);
-void *xtensa_get_extint(CPUState *env, unsigned extint);
-void xtensa_advance_ccount(CPUState *env, uint32_t d);
-void xtensa_timer_irq(CPUState *env, uint32_t id, uint32_t active);
-void xtensa_rearm_ccompare_timer(CPUState *env);
+void xtensa_irq_init(CPUXtensaState *env);
+void *xtensa_get_extint(CPUXtensaState *env, unsigned extint);
+void xtensa_advance_ccount(CPUXtensaState *env, uint32_t d);
+void xtensa_timer_irq(CPUXtensaState *env, uint32_t id, uint32_t active);
+void xtensa_rearm_ccompare_timer(CPUXtensaState *env);
 int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc);
 void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf);
-void xtensa_sync_window_from_phys(CPUState *env);
-void xtensa_sync_phys_from_window(CPUState *env);
-uint32_t xtensa_tlb_get_addr_mask(const CPUState *env, bool dtlb, uint32_t 
way);
-void split_tlb_entry_spec_way(const CPUState *env, uint32_t v, bool dtlb,
+void xtensa_sync_window_from_phys(CPUXtensaState *env);
+void xtensa_sync_phys_from_window(CPUXtensaState *env);
+uint32_t xtensa_tlb_get_addr_mask(const CPUXtensaState *env, bool dtlb, 
uint32_t way);
+void split_tlb_entry_spec_way(const CPUXtensaState *env, uint32_t v, bool dtlb,
 uint32_t *vpn, uint32_t wi, uint32_t *ei);
-int xtensa_tlb_lookup(const CPUState *env, uint32_t addr, bool dtlb,
+int xtensa_tlb_lookup(const CPUXtensaState *env, uint32_t addr, bool dtlb,
 uint32_t *pwi, uint32_t *pei, uint8_t *pring);
-void xtensa_tlb_set_entry(CPUState *env, bool dtlb,
+void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
 unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte);
-int xtensa_get_physical_addr(CPUState *env,
+int xtensa_get_physical_addr(CPUXtensaState *env,
 uint32_t vaddr, int is_write, int mmu_idx,
 uint32_t *paddr, uint32_t *page_size, unsigned *access);
-void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env);
-void debug_exception_env(CPUState *new_env, uint32_t cause);
+void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env);
+void debug_exception_env(CPUXtensaState *new_env, uint32_t cause);
 
 
 #define XTENSA_OPTION_BIT(opt) (((uint64_t)1) << (opt))
@@ -392,7 +392,7 @@ static inline bool xtensa_option_enabled(const XtensaConfig 
*config, int opt)
 return xtensa_option_bits_enabled(config, XTENSA_OPTION_BIT(opt));
 }
 
-static inline int xtensa_get_cintlevel(const CPUState *env)
+static inline int xtensa_get_cintlevel(const CPUXtensaState *env)
 {
 int level = (env->sregs[PS] & PS_INTLEVEL) >> PS_INTLEVEL_SHIFT;
 if ((env->sregs[PS] & PS_EXCM) && env->config->excm_level > level) {
@@ -401,7 +401,7 @@ static inline int xtensa_get_cintlevel(const CPUState *env)
 return level;
 }
 
-static inline int xtensa_get_ring(const CPUState *env)
+static inline int xtensa_get_ring(const CPUXtensaState *env)
 {
 if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
 return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT;
@@ -410,7 +410,7 @@ static inline int xtensa_get_ring(const CPUState *env)
 }
 }
 
-static inline int xtensa_get_cring(const CPUState *env)
+static inline int xtensa_get_cring(const CPUXtensaState *env)
 {
 if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) &&
 (env->sregs[PS] & PS_EXCM) == 0) {
@@ -420,7 +420,7 @@ static inline int xtensa_get_cring(const CPUState *env)
 }
 }
 
-static inline xtensa_tlb_entry *xtensa_tlb_get_entry(CPUState *env,
+static inline xtensa_tlb_entry *xtensa_tlb_get_entry(CPUXtensaState *env,
 bool dtlb, unsigned wi, unsigned ei)
 {
 return dtlb ?
@@ -434,7 +434,7 @@ static inline xtensa_tlb_entry 
*xtensa_tlb_get_entry(CPUState *env,
 #define MMU_MODE2_SUFFIX _ring2
 #define MMU_MODE3_SUFFIX _ring3
 
-static inline int cpu_mmu_index(CPUState *env)
+static inline int cpu_mmu_index(CPUXtensaState *env)
 {
 return xtensa_get_cring(env);
 }
@@ -445,7 +445,7 @@ static inline int cpu_mmu_index(CPUState *env)
 #define XTENSA_TBFLAG_DEBUG 0x10
 #define XTENSA_TBFLAG_ICOUNT 0x20
 
-static inline void cp

[Qemu-devel] [PATCH v5 21/43] target-s390x: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUS390XState/g" target-s390x/*.[hc]
  sed -i "s/#define CPUS390XState/#define CPUState/" target-s390x/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-s390x/cpu.h   |   46 +++---
 target-s390x/helper.c|   38 
 target-s390x/kvm.c   |   56 ++--
 target-s390x/op_helper.c |   70 +++---
 target-s390x/translate.c |   56 ++--
 5 files changed, 133 insertions(+), 133 deletions(-)

diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index e892bec..af6cc4e 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -106,7 +106,7 @@ typedef struct CPUS390XState {
 } CPUS390XState;
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUS390XState *env, target_ulong newsp)
 {
 if (newsp) {
 env->regs[15] = newsp;
@@ -233,7 +233,7 @@ static inline void cpu_clone_regs(CPUState *env, 
target_ulong newsp)
 #define FLAG_MASK_64(PSW_MASK_64 >> 32)
 #define FLAG_MASK_320x1000
 
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index (CPUS390XState *env)
 {
 if (env->psw.mask & PSW_MASK_PSTATE) {
 return 1;
@@ -242,7 +242,7 @@ static inline int cpu_mmu_index (CPUState *env)
 return 0;
 }
 
-static inline void cpu_get_tb_cpu_state(CPUState* env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->psw.addr;
@@ -275,7 +275,7 @@ CPUS390XState *cpu_s390x_init(const char *cpu_model);
 void s390x_translate_init(void);
 int cpu_s390x_exec(CPUS390XState *s);
 void cpu_s390x_close(CPUS390XState *s);
-void do_interrupt (CPUState *env);
+void do_interrupt (CPUS390XState *env);
 
 /* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
@@ -288,42 +288,42 @@ int cpu_s390x_handle_mmu_fault (CPUS390XState *env, 
target_ulong address, int rw
 
 
 #ifndef CONFIG_USER_ONLY
-int s390_virtio_hypercall(CPUState *env, uint64_t mem, uint64_t hypercall);
+int s390_virtio_hypercall(CPUS390XState *env, uint64_t mem, uint64_t 
hypercall);
 
 #ifdef CONFIG_KVM
-void kvm_s390_interrupt(CPUState *env, int type, uint32_t code);
-void kvm_s390_virtio_irq(CPUState *env, int config_change, uint64_t token);
-void kvm_s390_interrupt_internal(CPUState *env, int type, uint32_t parm,
+void kvm_s390_interrupt(CPUS390XState *env, int type, uint32_t code);
+void kvm_s390_virtio_irq(CPUS390XState *env, int config_change, uint64_t 
token);
+void kvm_s390_interrupt_internal(CPUS390XState *env, int type, uint32_t parm,
  uint64_t parm64, int vm);
 #else
-static inline void kvm_s390_interrupt(CPUState *env, int type, uint32_t code)
+static inline void kvm_s390_interrupt(CPUS390XState *env, int type, uint32_t 
code)
 {
 }
 
-static inline void kvm_s390_virtio_irq(CPUState *env, int config_change,
+static inline void kvm_s390_virtio_irq(CPUS390XState *env, int config_change,
uint64_t token)
 {
 }
 
-static inline void kvm_s390_interrupt_internal(CPUState *env, int type,
+static inline void kvm_s390_interrupt_internal(CPUS390XState *env, int type,
uint32_t parm, uint64_t parm64,
int vm)
 {
 }
 #endif
-CPUState *s390_cpu_addr2state(uint16_t cpu_addr);
-void s390_add_running_cpu(CPUState *env);
-unsigned s390_del_running_cpu(CPUState *env);
+CPUS390XState *s390_cpu_addr2state(uint16_t cpu_addr);
+void s390_add_running_cpu(CPUS390XState *env);
+unsigned s390_del_running_cpu(CPUS390XState *env);
 
 /* from s390-virtio-bus */
 extern const target_phys_addr_t virtio_size;
 
 #else
-static inline void s390_add_running_cpu(CPUState *env)
+static inline void s390_add_running_cpu(CPUS390XState *env)
 {
 }
 
-static inline unsigned s390_del_running_cpu(CPUState *env)
+static inline unsigned s390_del_running_cpu(CPUS390XState *env)
 {
 return 0;
 }
@@ -944,11 +944,11 @@ static inline void ebcdic_put(uint8_t *p, const char 
*ascii, int len)
 #define SIGP_STAT_INVALID_ORDER 0x0002UL
 #define SIGP_STAT_RECEIVER_CHECK0x0001UL
 
-void load_psw(CPUState *env, uint64_t mask, uint64_t addr);
-int mmu_translate(CPUState *env, target_ulong vaddr, int rw, uint64_t asc,
+void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr);
+int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
   target_ulong *raddr, int *flags);
-int sclp_service_call(CPUState *env, uint32_t sccb, uint64_t code);
-uint32_t calc_cc(CPUState *env, uint32_t cc_op, uint64_t src, uint6

[Qemu-devel] [PATCH v5 02/43] Rename cpu_reset() to cpu_state_reset()

[Andreas Färber]

Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 bsd-user/main.c   |2 +-
 cpu-all.h |2 +-
 cpu-exec.c|2 +-
 darwin-user/main.c|2 +-
 hw/arm_boot.c |2 +-
 hw/armv7m.c   |2 +-
 hw/cris-boot.c|2 +-
 hw/leon3.c|2 +-
 hw/lm32_boards.c  |2 +-
 hw/microblaze_boot.c  |2 +-
 hw/milkymist.c|2 +-
 hw/mips_fulong2e.c|2 +-
 hw/mips_jazz.c|2 +-
 hw/mips_malta.c   |2 +-
 hw/mips_mipssim.c |2 +-
 hw/mips_r4k.c |2 +-
 hw/omap1.c|2 +-
 hw/omap2.c|2 +-
 hw/pc.c   |2 +-
 hw/ppc440_bamboo.c|2 +-
 hw/ppc4xx_devs.c  |9 -
 hw/ppc_newworld.c |9 -
 hw/ppc_oldworld.c |9 -
 hw/ppc_prep.c |9 -
 hw/ppce500_mpc8544ds.c|4 ++--
 hw/pxa2xx.c   |2 +-
 hw/r2d.c  |2 +-
 hw/spapr.c|9 -
 hw/sun4m.c|4 ++--
 hw/sun4u.c|2 +-
 hw/virtex_ml507.c |2 +-
 hw/xtensa_lx60.c  |8 +---
 hw/xtensa_sim.c   |2 +-
 linux-user/main.c |2 +-
 linux-user/syscall.c  |2 +-
 target-arm/helper.c   |4 ++--
 target-cris/translate.c   |4 ++--
 target-i386/helper.c  |4 ++--
 target-lm32/helper.c  |4 ++--
 target-m68k/helper.c  |4 ++--
 target-microblaze/translate.c |4 ++--
 target-mips/helper.c  |2 +-
 target-mips/translate.c   |4 ++--
 target-ppc/helper.c   |2 +-
 target-s390x/helper.c |4 ++--
 target-sh4/translate.c|4 ++--
 target-sparc/cpu_init.c   |2 +-
 target-xtensa/helper.c|2 +-
 48 files changed, 98 insertions(+), 61 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index cdb0d0a..c3af395 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -917,7 +917,7 @@ int main(int argc, char **argv)
 exit(1);
 }
 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
-cpu_reset(env);
+cpu_state_reset(env);
 #endif
 thread_env = env;
 
diff --git a/cpu-all.h b/cpu-all.h
index f7f6e7a..e831ae0 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -433,7 +433,7 @@ void cpu_watchpoint_remove_all(CPUState *env, int mask);
 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 
 void cpu_single_step(CPUState *env, int enabled);
-void cpu_reset(CPUState *s);
+void cpu_state_reset(CPUState *s);
 int cpu_is_stopped(CPUState *env);
 void run_on_cpu(CPUState *env, void (*func)(void *data), void *data);
 
diff --git a/cpu-exec.c b/cpu-exec.c
index 3d28053..2bf1735 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -340,7 +340,7 @@ int cpu_exec(CPUState *env)
 }
 #elif defined(TARGET_PPC)
 if ((interrupt_request & CPU_INTERRUPT_RESET)) {
-cpu_reset(env);
+cpu_state_reset(env);
 }
 if (interrupt_request & CPU_INTERRUPT_HARD) {
 ppc_hw_interrupt(env);
diff --git a/darwin-user/main.c b/darwin-user/main.c
index e1519c7..13c1f05 100644
--- a/darwin-user/main.c
+++ b/darwin-user/main.c
@@ -858,7 +858,7 @@ int main(int argc, char **argv)
 /* NOTE: we need to init the CPU at this stage to get
qemu_host_page_size */
 env = cpu_init(cpu_model);
-cpu_reset(env);
+cpu_state_reset(env);
 
 printf("Starting %s with qemu\n\n", filename);
 
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index fc66910..23b3f0a 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -277,7 +277,7 @@ static void do_cpu_reset(void *opaque)
 CPUState *env = opaque;
 const struct arm_boot_info *info = env->boot_info;
 
-cpu_reset(env);
+cpu_state_reset(env);
 if (info) {
 if (!info->is_linux) {
 /* Jump to the entry point.  */
diff --git a/hw/armv7m.c b/hw/armv7m.c
index 6b80579..9cf96f4 100644
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@@ -149,7 +149,7 @@ static void armv7m_bitband_init(void)
 
 static void armv7m_reset(void *opaque)
 {
-cpu_reset((CPUState *)opaque);
+cpu_state_reset((CPUState *)opaque);
 }
 
 /* Init CPU and memory for a v7-M based board.
diff --git a/hw/cris-boot.c b/hw/cris-boot.c
index 37894f8..ade517d 100644
--- a/hw/cris-boot.c
+++ b/hw/cris-boot.c
@@ -34,7 +34,7 @@ static void main_cpu_reset(void *opaque)
 
 

[Qemu-devel] [PATCH v5 33/43] lm32 hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/lm32_boards.c hw/milkymist.c; do
sed -i "s/CPUState/CPULM32State/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/lm32_boards.c |   10 +-
 hw/milkymist.c   |8 
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/hw/lm32_boards.c b/hw/lm32_boards.c
index 51c8a0f..4dd4f0a 100644
--- a/hw/lm32_boards.c
+++ b/hw/lm32_boards.c
@@ -31,7 +31,7 @@
 #include "exec-memory.h"
 
 typedef struct {
-CPUState *env;
+CPULM32State *env;
 target_phys_addr_t bootstrap_pc;
 target_phys_addr_t flash_base;
 target_phys_addr_t hwsetup_base;
@@ -42,7 +42,7 @@ typedef struct {
 
 static void cpu_irq_handler(void *opaque, int irq, int level)
 {
-CPUState *env = opaque;
+CPULM32State *env = opaque;
 
 if (level) {
 cpu_interrupt(env, CPU_INTERRUPT_HARD);
@@ -54,7 +54,7 @@ static void cpu_irq_handler(void *opaque, int irq, int level)
 static void main_cpu_reset(void *opaque)
 {
 ResetInfo *reset_info = opaque;
-CPUState *env = reset_info->env;
+CPULM32State *env = reset_info->env;
 
 cpu_state_reset(env);
 
@@ -75,7 +75,7 @@ static void lm32_evr_init(ram_addr_t ram_size_not_used,
   const char *kernel_cmdline,
   const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPULM32State *env;
 DriveInfo *dinfo;
 MemoryRegion *address_space_mem =  get_system_memory();
 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
@@ -163,7 +163,7 @@ static void lm32_uclinux_init(ram_addr_t ram_size_not_used,
   const char *kernel_cmdline,
   const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPULM32State *env;
 DriveInfo *dinfo;
 MemoryRegion *address_space_mem =  get_system_memory();
 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
diff --git a/hw/milkymist.c b/hw/milkymist.c
index 7ec6554..8bb6a97 100644
--- a/hw/milkymist.c
+++ b/hw/milkymist.c
@@ -37,7 +37,7 @@
 #define KERNEL_LOAD_ADDR 0x4000
 
 typedef struct {
-CPUState *env;
+CPULM32State *env;
 target_phys_addr_t bootstrap_pc;
 target_phys_addr_t flash_base;
 target_phys_addr_t initrd_base;
@@ -47,7 +47,7 @@ typedef struct {
 
 static void cpu_irq_handler(void *opaque, int irq, int level)
 {
-CPUState *env = opaque;
+CPULM32State *env = opaque;
 
 if (level) {
 cpu_interrupt(env, CPU_INTERRUPT_HARD);
@@ -59,7 +59,7 @@ static void cpu_irq_handler(void *opaque, int irq, int level)
 static void main_cpu_reset(void *opaque)
 {
 ResetInfo *reset_info = opaque;
-CPUState *env = reset_info->env;
+CPULM32State *env = reset_info->env;
 
 cpu_state_reset(env);
 
@@ -79,7 +79,7 @@ milkymist_init(ram_addr_t ram_size_not_used,
   const char *kernel_cmdline,
   const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPULM32State *env;
 int kernel_size;
 DriveInfo *dinfo;
 MemoryRegion *address_space_mem = get_system_memory();
-- 
1.7.7

[Qemu-devel] [PATCH v5 16/43] target-lm32: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPULM32State/g" target-lm32/*.[hc]
  sed -i "s/#define CPULM32State/#define CPUState/" target-lm32/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-lm32/cpu.h   |   28 ++--
 target-lm32/helper.c|   16 
 target-lm32/machine.c   |   22 +++---
 target-lm32/op_helper.c |4 ++--
 target-lm32/translate.c |   38 +++---
 5 files changed, 54 insertions(+), 54 deletions(-)

diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index cc9b53b..684b2fa 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -36,7 +36,7 @@ typedef struct CPULM32State CPULM32State;
 
 #define NB_MMU_MODES 1
 #define TARGET_PAGE_BITS 12
-static inline int cpu_mmu_index(CPUState *env)
+static inline int cpu_mmu_index(CPULM32State *env)
 {
 return 0;
 }
@@ -185,18 +185,18 @@ typedef struct CPULM32State {
 } CPULM32State;
 
 
-CPUState *cpu_lm32_init(const char *cpu_model);
+CPULM32State *cpu_lm32_init(const char *cpu_model);
 void cpu_lm32_list(FILE *f, fprintf_function cpu_fprintf);
-int cpu_lm32_exec(CPUState *s);
-void cpu_lm32_close(CPUState *s);
-void do_interrupt(CPUState *env);
+int cpu_lm32_exec(CPULM32State *s);
+void cpu_lm32_close(CPULM32State *s);
+void do_interrupt(CPULM32State *env);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU.  */
 int cpu_lm32_signal_handler(int host_signum, void *pinfo,
   void *puc);
 void lm32_translate_init(void);
-void cpu_lm32_set_phys_msb_ignore(CPUState *env, int value);
+void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value);
 
 #define cpu_list cpu_lm32_list
 #define cpu_init cpu_lm32_init
@@ -206,12 +206,12 @@ void cpu_lm32_set_phys_msb_ignore(CPUState *env, int 
value);
 
 #define CPU_SAVE_VERSION 1
 
-int cpu_lm32_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int cpu_lm32_handle_mmu_fault(CPULM32State *env, target_ulong address, int rw,
   int mmu_idx);
 #define cpu_handle_mmu_fault cpu_lm32_handle_mmu_fault
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPULM32State *env, target_ulong newsp)
 {
 if (newsp) {
 env->regs[R_SP] = newsp;
@@ -220,23 +220,23 @@ static inline void cpu_clone_regs(CPUState *env, 
target_ulong newsp)
 }
 #endif
 
-static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
+static inline void cpu_set_tls(CPULM32State *env, target_ulong newtls)
 {
 }
 
-static inline int cpu_interrupts_enabled(CPUState *env)
+static inline int cpu_interrupts_enabled(CPULM32State *env)
 {
 return env->ie & IE_IE;
 }
 
 #include "cpu-all.h"
 
-static inline target_ulong cpu_get_pc(CPUState *env)
+static inline target_ulong cpu_get_pc(CPULM32State *env)
 {
 return env->pc;
 }
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->pc;
@@ -244,14 +244,14 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 *flags = 0;
 }
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPULM32State *env)
 {
 return env->interrupt_request & CPU_INTERRUPT_HARD;
 }
 
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPULM32State *env, TranslationBlock *tb)
 {
 env->pc = tb->pc;
 }
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index 6834401..5db8f8d 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -20,7 +20,7 @@
 #include "cpu.h"
 #include "host-utils.h"
 
-int cpu_lm32_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int cpu_lm32_handle_mmu_fault(CPULM32State *env, target_ulong address, int rw,
   int mmu_idx)
 {
 int prot;
@@ -37,12 +37,12 @@ int cpu_lm32_handle_mmu_fault(CPUState *env, target_ulong 
address, int rw,
 return 0;
 }
 
-target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
+target_phys_addr_t cpu_get_phys_page_debug(CPULM32State *env, target_ulong 
addr)
 {
 return addr & TARGET_PAGE_MASK;
 }
 
-void do_interrupt(CPUState *env)
+void do_interrupt(CPULM32State *env)
 {
 qemu_log_mask(CPU_LOG_INT,
 "exception at pc=%x type=%x\n", env->pc, env->exception_index);
@@ -192,9 +192,9 @@ static uint32_t cfg_by_def(const LM32Def *def)
 return cfg;
 }
 
-CPUState *cpu_lm32_init(const char *cpu_model)
+CPULM32State *cpu_lm32_init(const char *cpu_model)
 {
-CPUState *env;
+CPULM32State *env;
 const LM32Def *def;
 static int

[Qemu-devel] [PATCH v2 1/5] error: add error_set_file_open_failed

[Alon Levy]

Signed-off-by: Alon Levy 
---
 cpus.c   |4 ++--
 error.c  |   44 
 error.h  |4 
 qerror.c |   36 
 qerror.h |   27 +++
 qga/commands-posix.c |2 +-
 6 files changed, 114 insertions(+), 3 deletions(-)

diff --git a/cpus.c b/cpus.c
index 17b055f..c87035f 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1178,7 +1178,7 @@ void qmp_memsave(int64_t addr, int64_t size, const char 
*filename,
 
 f = fopen(filename, "wb");
 if (!f) {
-error_set(errp, QERR_OPEN_FILE_FAILED, filename);
+error_set_file_open_failed(errp, filename, errno);
 return;
 }
 
@@ -1208,7 +1208,7 @@ void qmp_pmemsave(int64_t addr, int64_t size, const char 
*filename,
 
 f = fopen(filename, "wb");
 if (!f) {
-error_set(errp, QERR_OPEN_FILE_FAILED, filename);
+error_set_file_open_failed(errp, filename, errno);
 return;
 }
 
diff --git a/error.c b/error.c
index 990050f..b32d7f5 100644
--- a/error.c
+++ b/error.c
@@ -144,3 +144,47 @@ void error_set_qobject(Error **errp, QObject *obj)
 
 *errp = err;
 }
+
+void error_set_file_open_failed(Error **errp, const char *file_name, int ret)
+{
+const char *fmt = NULL;
+
+switch (ret) {
+case EACCES:
+fmt = QERR_OPEN_FILE_EACCES;
+break;
+case EINTR:
+fmt = QERR_OPEN_FILE_EINTR;
+break;
+case EEXIST:
+fmt = QERR_OPEN_FILE_EEXIST;
+break;
+case EMFILE:
+fmt = QERR_OPEN_FILE_EMFILE;
+break;
+case ENOSPC:
+fmt = QERR_OPEN_FILE_ENOSPC;
+break;
+case EPERM:
+fmt = QERR_OPEN_FILE_EPERM;
+break;
+case EROFS:
+fmt = QERR_OPEN_FILE_EROFS;
+break;
+case ENOTDIR:
+fmt = QERR_OPEN_FILE_ENOTDIR;
+break;
+case EFBIG:
+fmt = QERR_OPEN_FILE_EFBIG;
+break;
+default:
+/*
+ * EINVAL and ENOTSUP will result in the default
+ *
+ * ENOENT too, it's used by (for instance) bdrv_create_file for
+ * a different purpose then open (2) so just give a generic error.
+ */
+fmt = QERR_OPEN_FILE_FAILED;
+}
+error_set(errp, fmt, file_name);
+}
diff --git a/error.h b/error.h
index 6361f40..f3a80f3 100644
--- a/error.h
+++ b/error.h
@@ -67,4 +67,8 @@ void error_free(Error *err);
  */
 bool error_is_type(Error *err, const char *fmt);
 
+/**
+ * Helper to set error for a open (2) style return code.
+ */
+void error_set_file_open_failed(Error **errp, const char *file_name, int ret);
 #endif
diff --git a/qerror.c b/qerror.c
index f55d435..23c260b 100644
--- a/qerror.c
+++ b/qerror.c
@@ -213,6 +213,42 @@ static const QErrorStringTable qerror_table[] = {
 .desc  = "Could not open '%(filename)'",
 },
 {
+.error_fmt = QERR_OPEN_FILE_EINTR,
+.desc  = "Interrupted open of '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_EACCES,
+.desc  = "Cannot access '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_EEXIST,
+.desc  = "File already exists '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_EMFILE,
+.desc  = "Max open files when opening '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_ENOSPC,
+.desc  = "No space left opening '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_EPERM,
+.desc  = "Permission denied (EPERM) for '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_EROFS,
+.desc  = "Read only filesystem opening '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_ENOTDIR,
+.desc  = "Directory related error opening '%(filename)'",
+},
+{
+.error_fmt = QERR_OPEN_FILE_EFBIG,
+.desc  = "File too big opening '%(filename)'",
+},
+{
 .error_fmt = QERR_PERMISSION_DENIED,
 .desc  = "Insufficient permission to perform this operation",
 },
diff --git a/qerror.h b/qerror.h
index e26c635..6ab9b8d 100644
--- a/qerror.h
+++ b/qerror.h
@@ -181,6 +181,33 @@ QError *qobject_to_qerror(const QObject *obj);
 #define QERR_OPEN_FILE_FAILED \
 "{ 'class': 'OpenFileFailed', 'data': { 'filename': %s } }"
 
+#define QERR_OPEN_FILE_EINTR \
+"{ 'class': 'OpenFileEINTR', 'data': { 'filename': %s } }"
+
+#define QERR_OPEN_FILE_EACCES \
+"{ 'class': 'OpenFileEACCES', 'data': { 'filename': %s } }"
+
+#define QERR_OPEN_FILE_EEXIST \
+"{ 'class': 'OpenFileEEXIST', 'data': { 'filename': %s } }"
+
+#define QERR_OPEN_FILE_EMFILE \
+"{ 'class': 'OpenFileEMFILE', 'data': { 'filename': %s } }"
+
+#define QERR_OPEN_FILE_ENOSPC \
+"{ 'class': 'OpenFileENOSPC', 'data': { 'filename': %s } }"
+
+#define QERR_OPEN_FILE_EPERM \
+"{ 'class': 'OpenFileEPERM', 'data': { 'filename'

[Qemu-devel] [PATCH v2 5/5] blockdev: use error_set_file_open_failed

[Alon Levy]

This is a little trickier, since those calls chain in many fun ways and
produce sometimes their own return values reusing existing errno values
for similar meanings. In that respect error_set_file_open_failed
specifically ignores EINVAL, ENOTSUP and ENOENT. The first two simply
are not returned by open (2), but the last is but I chose to ignore it
to allow easy reuse in blockdev to avoid confusion when it is used
internally by the create functions.

Signed-off-by: Alon Levy 
---
 blockdev.c |   11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/blockdev.c b/blockdev.c
index 1a500b8..544d067 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -777,7 +777,7 @@ void qmp_transaction(BlockdevActionList *dev_list, Error 
**errp)
   states->old_bs->drv->format_name,
   NULL, -1, flags);
 if (ret) {
-error_set(errp, QERR_OPEN_FILE_FAILED, new_image_file);
+error_set_file_open_failed(errp, new_image_file, -ret);
 goto delete_and_fail;
 }
 }
@@ -787,7 +787,7 @@ void qmp_transaction(BlockdevActionList *dev_list, Error 
**errp)
 ret = bdrv_open(states->new_bs, new_image_file,
 flags | BDRV_O_NO_BACKING, drv);
 if (ret != 0) {
-error_set(errp, QERR_OPEN_FILE_FAILED, new_image_file);
+error_set_file_open_failed(errp, new_image_file, -ret);
 goto delete_and_fail;
 }
 }
@@ -881,8 +881,11 @@ static void qmp_bdrv_open_encrypted(BlockDriverState *bs, 
const char *filename,
 int bdrv_flags, BlockDriver *drv,
 const char *password, Error **errp)
 {
-if (bdrv_open(bs, filename, bdrv_flags, drv) < 0) {
-error_set(errp, QERR_OPEN_FILE_FAILED, filename);
+int ret;
+
+ret = bdrv_open(bs, filename, bdrv_flags, drv);
+if (ret < 0) {
+error_set_file_open_failed(errp, filename, ret);
 return;
 }
 
-- 
1.7.9.3

[Qemu-devel] [PATCH v2 3/5] qapi: convert screendump

[Alon Levy]

Signed-off-by: Alon Levy 
---
 hmp-commands.hx  |3 +--
 hmp.c|8 
 hmp.h|1 +
 monitor.c|8 
 qapi-schema.json |   13 +
 qmp-commands.hx  |5 +
 qmp.c|5 +
 7 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/hmp-commands.hx b/hmp-commands.hx
index 6980214..d26421a 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -194,8 +194,7 @@ ETEXI
 .args_type  = "filename:F",
 .params = "filename",
 .help   = "save screen into PPM image 'filename'",
-.user_print = monitor_user_noop,
-.mhandler.cmd_new = do_screen_dump,
+.mhandler.cmd = hmp_screendump,
 },
 
 STEXI
diff --git a/hmp.c b/hmp.c
index 290c43d..42dc79a 100644
--- a/hmp.c
+++ b/hmp.c
@@ -860,3 +860,11 @@ void hmp_block_job_cancel(Monitor *mon, const QDict *qdict)
 
 hmp_handle_error(mon, &error);
 }
+
+void hmp_screendump(Monitor *mon, const QDict *qdict)
+{
+Error *err = NULL;
+
+qmp_screendump(qdict_get_str(qdict, "filename"), &err);
+hmp_handle_error(mon, &err);
+}
diff --git a/hmp.h b/hmp.h
index 5409464..25d123f 100644
--- a/hmp.h
+++ b/hmp.h
@@ -59,5 +59,6 @@ void hmp_block_set_io_throttle(Monitor *mon, const QDict 
*qdict);
 void hmp_block_stream(Monitor *mon, const QDict *qdict);
 void hmp_block_job_set_speed(Monitor *mon, const QDict *qdict);
 void hmp_block_job_cancel(Monitor *mon, const QDict *qdict);
+void hmp_screendump(Monitor *mon, const QDict *qdict);
 
 #endif
diff --git a/monitor.c b/monitor.c
index 79399ab..f79ce9a 100644
--- a/monitor.c
+++ b/monitor.c
@@ -893,14 +893,6 @@ static int client_migrate_info(Monitor *mon, const QDict 
*qdict,
 return -1;
 }
 
-static int do_screen_dump(Monitor *mon, const QDict *qdict, QObject **ret_data)
-{
-Error *errp = NULL;
-
-vga_hw_screen_dump(qdict_get_str(qdict, "filename"), &errp);
-return 0;
-}
-
 static void do_logfile(Monitor *mon, const QDict *qdict)
 {
 cpu_set_log_filename(qdict_get_str(qdict, "filename"));
diff --git a/qapi-schema.json b/qapi-schema.json
index 04fa84f..4f251ca 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -1663,3 +1663,16 @@
 { 'command': 'qom-list-types',
   'data': { '*implements': 'str', '*abstract': 'bool' },
   'returns': [ 'ObjectTypeInfo' ] }
+
+##
+# @screendump:
+#
+# Write a PPM of the VGA screen to a file.
+#
+# @filename: the name of a new PPM file to create to store the image
+#
+# Returns: Nothing on success
+#
+# Since: 1.1
+##
+{ 'command': 'screendump', 'data': {'filename': 'str'} }
diff --git a/qmp-commands.hx b/qmp-commands.hx
index dfe8a5b..5fe57fd 100644
--- a/qmp-commands.hx
+++ b/qmp-commands.hx
@@ -146,10 +146,7 @@ EQMP
 {
 .name   = "screendump",
 .args_type  = "filename:F",
-.params = "filename",
-.help   = "save screen into PPM image 'filename'",
-.user_print = monitor_user_noop,
-.mhandler.cmd_new = do_screen_dump,
+.mhandler.cmd_new = qmp_marshal_input_screendump,
 },
 
 SQMP
diff --git a/qmp.c b/qmp.c
index a182b51..086cec8 100644
--- a/qmp.c
+++ b/qmp.c
@@ -415,3 +415,8 @@ ObjectTypeInfoList *qmp_qom_list_types(bool has_implements,
 
 return ret;
 }
+
+void qmp_screendump(const char *filename, Error **errp)
+{
+vga_hw_screen_dump(filename, errp);
+}
-- 
1.7.9.3

[Qemu-devel] [PATCH v2 4/5] vga: ppm_save(): Return error on failure

[Alon Levy]

From: Luiz Capitulino 

This makes all devices using ppm_save() return an error appropriately
when the screendump command fails.

Based on a code by Anthony Liguori.

Signed-off-by: Luiz Capitulino 
Signed-off-by: Alon Levy 
---
 hw/blizzard.c   |2 +-
 hw/qxl.c|2 +-
 hw/vga.c|8 +---
 hw/vga_int.h|3 ++-
 hw/vmware_vga.c |2 +-
 5 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/hw/blizzard.c b/hw/blizzard.c
index 76df78c..29e5ae6 100644
--- a/hw/blizzard.c
+++ b/hw/blizzard.c
@@ -942,7 +942,7 @@ static void blizzard_screen_dump(void *opaque, const char 
*filename,
 blizzard_update_display(opaque);
 }
 if (s && ds_get_data(s->state))
-ppm_save(filename, s->state->surface);
+ppm_save(filename, s->state->surface, errp);
 }
 
 #define DEPTH 8
diff --git a/hw/qxl.c b/hw/qxl.c
index 27f27f5..aa68612 100644
--- a/hw/qxl.c
+++ b/hw/qxl.c
@@ -1503,7 +1503,7 @@ static void qxl_hw_screen_dump(void *opaque, const char 
*filename, bool cswitch,
 case QXL_MODE_COMPAT:
 case QXL_MODE_NATIVE:
 qxl_render_update(qxl);
-ppm_save(filename, qxl->ssd.ds->surface);
+ppm_save(filename, qxl->ssd.ds->surface, errp);
 break;
 case QXL_MODE_VGA:
 vga->screen_dump(vga, filename, cswitch, errp);
diff --git a/hw/vga.c b/hw/vga.c
index 79c5c38..80e6dca 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -2365,7 +2365,7 @@ void vga_init_vbe(VGACommonState *s, MemoryRegion 
*system_memory)
 //
 /* vga screen dump */
 
-int ppm_save(const char *filename, struct DisplaySurface *ds)
+int ppm_save(const char *filename, struct DisplaySurface *ds, Error **errp)
 {
 FILE *f;
 uint8_t *d, *d1;
@@ -2377,8 +2377,10 @@ int ppm_save(const char *filename, struct DisplaySurface 
*ds)
 
 trace_ppm_save(filename, ds);
 f = fopen(filename, "wb");
-if (!f)
+if (!f) {
+error_set_file_open_failed(errp, filename, errno);
 return -1;
+}
 fprintf(f, "P6\n%d %d\n%d\n",
 ds->width, ds->height, 255);
 linebuf = g_malloc(ds->width * 3);
@@ -2420,5 +2422,5 @@ static void vga_screen_dump(void *opaque, const char 
*filename, bool cswitch,
 vga_invalidate_display(s);
 vga_hw_update();
 }
-ppm_save(filename, s->ds->surface);
+ppm_save(filename, s->ds->surface, errp);
 }
diff --git a/hw/vga_int.h b/hw/vga_int.h
index 7685b2b..63078ba 100644
--- a/hw/vga_int.h
+++ b/hw/vga_int.h
@@ -24,6 +24,7 @@
 
 #include 
 #include "memory.h"
+#include "error.h"
 
 #define ST01_V_RETRACE  0x08
 #define ST01_DISP_ENABLE0x01
@@ -200,7 +201,7 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t 
val);
 uint32_t vga_mem_readb(VGACommonState *s, target_phys_addr_t addr);
 void vga_mem_writeb(VGACommonState *s, target_phys_addr_t addr, uint32_t val);
 void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
-int ppm_save(const char *filename, struct DisplaySurface *ds);
+int ppm_save(const char *filename, struct DisplaySurface *ds, Error **errp);
 
 int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
 void vga_init_vbe(VGACommonState *s, MemoryRegion *address_space);
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index 6868778..0769652 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -1016,7 +1016,7 @@ static void vmsvga_screen_dump(void *opaque, const char 
*filename, bool cswitch,
 if (s->depth == 32) {
 DisplaySurface *ds = qemu_create_displaysurface_from(s->width,
 s->height, 32, ds_get_linesize(s->vga.ds), s->vga.vram_ptr);
-ppm_save(filename, ds);
+ppm_save(filename, ds, errp);
 g_free(ds);
 }
 }
-- 
1.7.9.3

[Qemu-devel] [PATCH v2 0/5] screendump qapi convertion

[Alon Levy]

The blockdev patch is more RFC'ish, and not actually related. It is just
a natural candidate to reuse the error_set_file_open_failed introduced
by the first patch for usage in ppm_save but also useful for other places
that all call fopen.

v2 changes:
 split screendump convertion to an addition "add Error** param"
 handle various errors of fopen with new qerror codes

Alon Levy (4):
  error: add error_set_file_open_failed
  vga_hw_screen_dump: add Error** param
  qapi: convert screendump
  blockdev: use error_set_file_open_failed

Luiz Capitulino (1):
  vga: ppm_save(): Return error on failure

 blockdev.c   |   11 +++
 console.c|5 +++--
 console.h|6 --
 cpus.c   |4 ++--
 error.c  |   44 
 error.h  |4 
 hmp-commands.hx  |3 +--
 hmp.c|8 
 hmp.h|1 +
 hw/blizzard.c|5 +++--
 hw/g364fb.c  |4 +++-
 hw/omap_lcdc.c   |4 +++-
 hw/qxl.c |8 +---
 hw/tcx.c |   13 +
 hw/vga.c |   15 ++-
 hw/vga_int.h |3 ++-
 hw/vmware_vga.c  |8 +---
 monitor.c|6 --
 qapi-schema.json |   13 +
 qerror.c |   36 
 qerror.h |   27 +++
 qga/commands-posix.c |2 +-
 qmp-commands.hx  |5 +
 qmp.c|5 +
 24 files changed, 197 insertions(+), 43 deletions(-)

-- 
1.7.9.3

[Qemu-devel] [PATCH v5 11/43] bsd-user: Don't overuse CPUState

[Andreas Färber]

Use CPU*State where applicable.

Signed-off-by: Andreas Färber 
---
 bsd-user/main.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index c3af395..78533d5 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -63,7 +63,7 @@ void gemu_log(const char *fmt, ...)
 }
 
 #if defined(TARGET_I386)
-int cpu_get_pic_interrupt(CPUState *env)
+int cpu_get_pic_interrupt(CPUX86State *env)
 {
 return -1;
 }
@@ -109,7 +109,7 @@ void cpu_list_unlock(void)
 /***/
 /* CPUX86 core interface */
 
-void cpu_smm_update(CPUState *env)
+void cpu_smm_update(CPUX86State *env)
 {
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH v5 34/43] m68k hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/an5206.c hw/dummy_m68k.c hw/mcf.h hw/mcf5206.c hw/mcf5208.c 
hw/mcf_intc.c; do
sed -i "s/CPUState/CPUM68KState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/an5206.c |2 +-
 hw/dummy_m68k.c |2 +-
 hw/mcf.h|4 ++--
 hw/mcf5206.c|4 ++--
 hw/mcf5208.c|2 +-
 hw/mcf_intc.c   |4 ++--
 6 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/hw/an5206.c b/hw/an5206.c
index d57306d..25407c0 100644
--- a/hw/an5206.c
+++ b/hw/an5206.c
@@ -24,7 +24,7 @@ static void an5206_init(ram_addr_t ram_size,
  const char *kernel_filename, const char *kernel_cmdline,
  const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPUM68KState *env;
 int kernel_size;
 uint64_t elf_entry;
 target_phys_addr_t entry;
diff --git a/hw/dummy_m68k.c b/hw/dummy_m68k.c
index e3c5740..7cc7a99 100644
--- a/hw/dummy_m68k.c
+++ b/hw/dummy_m68k.c
@@ -21,7 +21,7 @@ static void dummy_m68k_init(ram_addr_t ram_size,
  const char *kernel_filename, const char *kernel_cmdline,
  const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPUM68KState *env;
 MemoryRegion *address_space_mem =  get_system_memory();
 MemoryRegion *ram = g_new(MemoryRegion, 1);
 int kernel_size;
diff --git a/hw/mcf.h b/hw/mcf.h
index baa790b..19a8b54 100644
--- a/hw/mcf.h
+++ b/hw/mcf.h
@@ -17,7 +17,7 @@ void mcf_uart_mm_init(struct MemoryRegion *sysmem,
 /* mcf_intc.c */
 qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem,
 target_phys_addr_t base,
-CPUState *env);
+CPUM68KState *env);
 
 /* mcf_fec.c */
 void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd,
@@ -25,6 +25,6 @@ void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd,
 
 /* mcf5206.c */
 qemu_irq *mcf5206_init(struct MemoryRegion *sysmem,
-   uint32_t base, CPUState *env);
+   uint32_t base, CPUM68KState *env);
 
 #endif
diff --git a/hw/mcf5206.c b/hw/mcf5206.c
index 5110d83..539b391 100644
--- a/hw/mcf5206.c
+++ b/hw/mcf5206.c
@@ -145,7 +145,7 @@ static m5206_timer_state *m5206_timer_init(qemu_irq irq)
 /* System Integration Module.  */
 
 typedef struct {
-CPUState *env;
+CPUM68KState *env;
 MemoryRegion iomem;
 m5206_timer_state *timer[2];
 void *uart[2];
@@ -525,7 +525,7 @@ static const MemoryRegionOps m5206_mbar_ops = {
 .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUState *env)
+qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUM68KState *env)
 {
 m5206_mbar_state *s;
 qemu_irq *pic;
diff --git a/hw/mcf5208.c b/hw/mcf5208.c
index aa11a75..d3ebe8d 100644
--- a/hw/mcf5208.c
+++ b/hw/mcf5208.c
@@ -192,7 +192,7 @@ static void mcf5208evb_init(ram_addr_t ram_size,
  const char *kernel_filename, const char *kernel_cmdline,
  const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPUM68KState *env;
 int kernel_size;
 uint64_t elf_entry;
 target_phys_addr_t entry;
diff --git a/hw/mcf_intc.c b/hw/mcf_intc.c
index 0b498dd..cc1a5f3 100644
--- a/hw/mcf_intc.c
+++ b/hw/mcf_intc.c
@@ -16,7 +16,7 @@ typedef struct {
 uint64_t ifr;
 uint64_t enabled;
 uint8_t icr[64];
-CPUState *env;
+CPUM68KState *env;
 int active_vector;
 } mcf_intc_state;
 
@@ -139,7 +139,7 @@ static const MemoryRegionOps mcf_intc_ops = {
 
 qemu_irq *mcf_intc_init(MemoryRegion *sysmem,
 target_phys_addr_t base,
-CPUState *env)
+CPUM68KState *env)
 {
 mcf_intc_state *s;
 
-- 
1.7.7

[Qemu-devel] [PATCH v5 18/43] target-microblaze: Don't overuse CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUMBState/g" target-microblaze/*.[hc]
  sed -i "s/#define CPUMBState/#define CPUState/" target-microblaze/cpu.h

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 target-microblaze/cpu.h   |   30 +++---
 target-microblaze/helper.c|   10 
 target-microblaze/mmu.c   |8 +++---
 target-microblaze/mmu.h   |6 ++--
 target-microblaze/op_helper.c |8 +++---
 target-microblaze/translate.c |   52 
 6 files changed, 57 insertions(+), 57 deletions(-)

diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 94ec43b..6ae5649 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -250,7 +250,7 @@ typedef struct CPUMBState {
 #define DRTE_FLAG  (1 << 17)
 #define DRTB_FLAG  (1 << 18)
 #define D_FLAG (1 << 19)  /* Bit in ESR.  */
-/* TB dependent CPUState.  */
+/* TB dependent CPUMBState.  */
 #define IFLAGS_TB_MASK  (D_FLAG | IMM_FLAG | DRTI_FLAG | DRTE_FLAG | DRTB_FLAG)
 uint32_t iflags;
 
@@ -266,10 +266,10 @@ typedef struct CPUMBState {
 CPU_COMMON
 } CPUMBState;
 
-CPUState *cpu_mb_init(const char *cpu_model);
-int cpu_mb_exec(CPUState *s);
-void cpu_mb_close(CPUState *s);
-void do_interrupt(CPUState *env);
+CPUMBState *cpu_mb_init(const char *cpu_model);
+int cpu_mb_exec(CPUMBState *s);
+void cpu_mb_close(CPUMBState *s);
+void do_interrupt(CPUMBState *env);
 /* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU.  */
@@ -305,7 +305,7 @@ enum {
 #define MMU_USER_IDX2
 /* See NB_MMU_MODES further up the file.  */
 
-static inline int cpu_mmu_index (CPUState *env)
+static inline int cpu_mmu_index (CPUMBState *env)
 {
 /* Are we in nommu mode?.  */
 if (!(env->sregs[SR_MSR] & MSR_VM))
@@ -316,12 +316,12 @@ static inline int cpu_mmu_index (CPUState *env)
 return MMU_KERNEL_IDX;
 }
 
-int cpu_mb_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+int cpu_mb_handle_mmu_fault(CPUMBState *env, target_ulong address, int rw,
 int mmu_idx);
 #define cpu_handle_mmu_fault cpu_mb_handle_mmu_fault
 
 #if defined(CONFIG_USER_ONLY)
-static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
+static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp)
 {
 if (newsp)
 env->regs[R_SP] = newsp;
@@ -329,23 +329,23 @@ static inline void cpu_clone_regs(CPUState *env, 
target_ulong newsp)
 }
 #endif
 
-static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
+static inline void cpu_set_tls(CPUMBState *env, target_ulong newtls)
 {
 }
 
-static inline int cpu_interrupts_enabled(CPUState *env)
+static inline int cpu_interrupts_enabled(CPUMBState *env)
 {
 return env->sregs[SR_MSR] & MSR_IE;
 }
 
 #include "cpu-all.h"
 
-static inline target_ulong cpu_get_pc(CPUState *env)
+static inline target_ulong cpu_get_pc(CPUMBState *env)
 {
 return env->sregs[SR_PC];
 }
 
-static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+static inline void cpu_get_tb_cpu_state(CPUMBState *env, target_ulong *pc,
 target_ulong *cs_base, int *flags)
 {
 *pc = env->sregs[SR_PC];
@@ -355,18 +355,18 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 }
 
 #if !defined(CONFIG_USER_ONLY)
-void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr,
+void cpu_unassigned_access(CPUMBState *env1, target_phys_addr_t addr,
int is_write, int is_exec, int is_asi, int size);
 #endif
 
-static inline bool cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUMBState *env)
 {
 return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
 }
 
 #include "exec-all.h"
 
-static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+static inline void cpu_pc_from_tb(CPUMBState *env, TranslationBlock *tb)
 {
 env->sregs[SR_PC] = tb->pc;
 }
diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c
index e1355ff..6e0e411 100644
--- a/target-microblaze/helper.c
+++ b/target-microblaze/helper.c
@@ -25,13 +25,13 @@
 
 #if defined(CONFIG_USER_ONLY)
 
-void do_interrupt (CPUState *env)
+void do_interrupt (CPUMBState *env)
 {
 env->exception_index = -1;
 env->regs[14] = env->sregs[SR_PC];
 }
 
-int cpu_mb_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
+int cpu_mb_handle_mmu_fault(CPUMBState * env, target_ulong address, int rw,
 int mmu_idx)
 {
 env->exception_index = 0xaa;
@@ -41,7 +41,7 @@ int cpu_mb_handle_mmu_fault(CPUState * env, target_ulong 
address, int rw,
 
 #else /* !CONFIG_USER_ONLY */
 
-int cpu_mb_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+int cpu_mb_handle_mmu_fault (CPUMBState *env, tar

[Qemu-devel] [PATCH v5 07/43] target-unicore32: Rename to CPUUniCore32State

[Andreas Färber]

This aids in refactoring CPUState by adopting the common naming scheme.

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 target-unicore32/cpu.h |8 
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index f725634..923db05 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -18,7 +18,7 @@
 
 #define ELF_MACHINE EM_UNICORE32
 
-#define CPUStatestruct CPUState_UniCore32
+#define CPUStatestruct CPUUniCore32State
 
 #include "config.h"
 #include "qemu-common.h"
@@ -27,7 +27,7 @@
 
 #define NB_MMU_MODES2
 
-typedef struct CPUState_UniCore32 {
+typedef struct CPUUniCore32State {
 /* Regs for current mode.  */
 uint32_t regs[32];
 /* Frequently accessed ASR bits are stored separately for efficiently.
@@ -71,7 +71,7 @@ typedef struct CPUState_UniCore32 {
 /* Internal CPU feature flags.  */
 uint32_t features;
 
-} CPUState_UniCore32;
+} CPUUniCore32State;
 
 #define ASR_M   (0x1f)
 #define ASR_MODE_USER   (0x10)
@@ -179,7 +179,7 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, 
target_ulong *pc,
 
 void uc32_translate_init(void);
 void do_interrupt(CPUState *);
-void switch_mode(CPUState_UniCore32 *, int);
+void switch_mode(CPUUniCore32State *, int);
 
 static inline bool cpu_has_work(CPUState *env)
 {
-- 
1.7.7

[Qemu-devel] [PATCH v5 05/43] target-lm32/microblaze: Typedef struct CPU{MB, LM32}State

[Andreas Färber]

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 target-lm32/cpu.h   |1 +
 target-microblaze/cpu.h |1 +
 2 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index b6b6b4c..cc9b53b 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -28,6 +28,7 @@
 #include "qemu-common.h"
 #include "cpu-defs.h"
 struct CPULM32State;
+typedef struct CPULM32State CPULM32State;
 
 #define TARGET_HAS_ICE 1
 
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 4092506..94ec43b 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -29,6 +29,7 @@
 #include "cpu-defs.h"
 #include "softfloat.h"
 struct CPUMBState;
+typedef struct CPUMBState CPUMBState;
 #if !defined(CONFIG_USER_ONLY)
 #include "mmu.h"
 #endif
-- 
1.7.7

Re: [Qemu-devel] [PATCH RFC v4 03/20] target-arm: Embed CPUARMState in QOM ARMCPU

[Andreas Färber]

Am 13.03.2012 14:18, schrieb Paolo Bonzini:
> Il 10/03/2012 17:53, Andreas Färber ha scritto:
>>  /**
>>   * ARMCPU:
>> + * @env: Legacy CPU state.
>>   *
>>   * An ARM CPU core.
>>   */
>> @@ -58,7 +60,17 @@ typedef struct ARMCPU {
>>  /*< private >*/
>>  CPUState parent_obj;
>>  /*< public >*/
>> +
>> +/* TODO Inline this and split off common state */
>> +CPUARMState env;
>>  } ARMCPU;
>>  
> 
> As usual I don't like "legacy". :)

Well, it refers to "former CPUState of which some or many fields are
going to be extracted". I wouldn't want to write it into documentation
as such.
" * @env: CPUARMState" is not telling either.
Better wordings anyone?

>  A more interesting distinction is
> between state that is relevant to the emulation, and state that is
> relevant to the main loop or the machine.  The former is reinitialized
> after reset and can remain in CPUFooState.  The latter is not
> reinitialized after reset, can move to QOM, and in most cases that's
> what we access when we use CPUArchState.

Actually I was planning on keeping CPU*State only for TCG fields.

Whether a field is reset or not should be determined by the reset
callback, not by a semi-magic memset() up to a certain field name.
That's especially problematic for cp15.

The CPU*State struct stays around for two reasons,
1) allowing an incremental conversion of targets,
2) allowing offset calculations for TCG from the middle of the struct.

Mentioning this, we need to review all my *CPU structs to make sure env
is the *first* member and that any fields accessed by offset in its
parent CPUState are placed *last*, to minimize the immediates, as
previously pointed out by rth. Starts to matter once we move icount into
CPUState, as done on qom-cpu-wip branch.

> Also, I understand that the conversion is not fully mechanical, but
> perhaps it can be made "more" mechanical than this?  Splitting this
> patch in two would be nice, but I can't say I read it fully.

Hm, this patch has been around since v1 and so far nobody requested a
particular split... it would be possible to move init and reset code in
separate patches if deemed necessary? Peter?

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

[Qemu-devel] [PATCH v5 06/43] target-sparc: Typedef struct CPUSPARCState early

[Andreas Färber]

Will be needed for qemu_irq_ack callback.

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 target-sparc/cpu.h |6 --
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 38a7074..8098669 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -378,7 +378,9 @@ struct QEMUFile;
 void cpu_put_timer(struct QEMUFile *f, CPUTimer *s);
 void cpu_get_timer(struct QEMUFile *f, CPUTimer *s);
 
-typedef struct CPUSPARCState {
+typedef struct CPUSPARCState CPUSPARCState;
+
+struct CPUSPARCState {
 target_ulong gregs[8]; /* general registers */
 target_ulong *regwptr; /* pointer to current register window */
 target_ulong pc;   /* program counter */
@@ -503,7 +505,7 @@ typedef struct CPUSPARCState {
 
 /* Leon3 cache control */
 uint32_t cache_control;
-} CPUSPARCState;
+};
 
 #ifndef NO_CPU_IO_DEFS
 /* cpu_init.c */
-- 
1.7.7

[Qemu-devel] [PATCH v5 32/43] i386 hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/apic.h hw/kvm/apic.c hw/kvmvapic.c hw/pc.c hw/vmport.c 
hw/xen_machine_pv.c; do
sed -i "s/CPUState/CPUX86State/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/apic.h   |2 +-
 hw/kvm/apic.c   |2 +-
 hw/kvmvapic.c   |   22 +++---
 hw/pc.c |   20 ++--
 hw/vmport.c |   12 ++--
 hw/xen_machine_pv.c |2 +-
 6 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/hw/apic.h b/hw/apic.h
index d6d6d44..62179ce 100644
--- a/hw/apic.h
+++ b/hw/apic.h
@@ -22,7 +22,7 @@ void apic_handle_tpr_access_report(DeviceState *d, 
target_ulong ip,
TPRAccess access);
 
 /* pc.c */
-int cpu_is_bsp(CPUState *env);
+int cpu_is_bsp(CPUX86State *env);
 DeviceState *cpu_get_current_apic(void);
 
 #endif
diff --git a/hw/kvm/apic.c b/hw/kvm/apic.c
index 9ca68f8..ffe7a52 100644
--- a/hw/kvm/apic.c
+++ b/hw/kvm/apic.c
@@ -124,7 +124,7 @@ static void kvm_apic_vapic_base_update(APICCommonState *s)
 static void do_inject_external_nmi(void *data)
 {
 APICCommonState *s = data;
-CPUState *env = s->cpu_env;
+CPUX86State *env = s->cpu_env;
 uint32_t lvt;
 int ret;
 
diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c
index e8bfeec..5d83625 100644
--- a/hw/kvmvapic.c
+++ b/hw/kvmvapic.c
@@ -142,7 +142,7 @@ static void update_guest_rom_state(VAPICROMState *s)
 write_guest_rom_state(s);
 }
 
-static int find_real_tpr_addr(VAPICROMState *s, CPUState *env)
+static int find_real_tpr_addr(VAPICROMState *s, CPUX86State *env)
 {
 target_phys_addr_t paddr;
 target_ulong addr;
@@ -185,7 +185,7 @@ static bool opcode_matches(uint8_t *opcode, const 
TPRInstruction *instr)
  modrm_reg(opcode[1]) == instr->modrm_reg);
 }
 
-static int evaluate_tpr_instruction(VAPICROMState *s, CPUState *env,
+static int evaluate_tpr_instruction(VAPICROMState *s, CPUX86State *env,
 target_ulong *pip, TPRAccess access)
 {
 const TPRInstruction *instr;
@@ -267,7 +267,7 @@ instruction_ok:
 return 0;
 }
 
-static int update_rom_mapping(VAPICROMState *s, CPUState *env, target_ulong ip)
+static int update_rom_mapping(VAPICROMState *s, CPUX86State *env, target_ulong 
ip)
 {
 target_phys_addr_t paddr;
 uint32_t rom_state_vaddr;
@@ -330,7 +330,7 @@ static int update_rom_mapping(VAPICROMState *s, CPUState 
*env, target_ulong ip)
  * cannot be accessed or is considered invalid. This also ensures that we are
  * not patching the wrong guest.
  */
-static int get_kpcr_number(CPUState *env)
+static int get_kpcr_number(CPUX86State *env)
 {
 struct kpcr {
 uint8_t  fill1[0x1c];
@@ -347,7 +347,7 @@ static int get_kpcr_number(CPUState *env)
 return kpcr.number;
 }
 
-static int vapic_enable(VAPICROMState *s, CPUState *env)
+static int vapic_enable(VAPICROMState *s, CPUX86State *env)
 {
 int cpu_number = get_kpcr_number(env);
 target_phys_addr_t vapic_paddr;
@@ -367,12 +367,12 @@ static int vapic_enable(VAPICROMState *s, CPUState *env)
 return 0;
 }
 
-static void patch_byte(CPUState *env, target_ulong addr, uint8_t byte)
+static void patch_byte(CPUX86State *env, target_ulong addr, uint8_t byte)
 {
 cpu_memory_rw_debug(env, addr, &byte, 1, 1);
 }
 
-static void patch_call(VAPICROMState *s, CPUState *env, target_ulong ip,
+static void patch_call(VAPICROMState *s, CPUX86State *env, target_ulong ip,
uint32_t target)
 {
 uint32_t offset;
@@ -382,7 +382,7 @@ static void patch_call(VAPICROMState *s, CPUState *env, 
target_ulong ip,
 cpu_memory_rw_debug(env, ip + 1, (void *)&offset, sizeof(offset), 1);
 }
 
-static void patch_instruction(VAPICROMState *s, CPUState *env, target_ulong ip)
+static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong 
ip)
 {
 target_phys_addr_t paddr;
 VAPICHandlers *handlers;
@@ -439,7 +439,7 @@ void vapic_report_tpr_access(DeviceState *dev, void *cpu, 
target_ulong ip,
  TPRAccess access)
 {
 VAPICROMState *s = DO_UPCAST(VAPICROMState, busdev.qdev, dev);
-CPUState *env = cpu;
+CPUX86State *env = cpu;
 
 cpu_synchronize_state(env);
 
@@ -475,7 +475,7 @@ static void vapic_enable_tpr_reporting(bool enable)
 VAPICEnableTPRReporting info = {
 .enable = enable,
 };
-CPUState *env;
+CPUX86State *env;
 
 for (env = first_cpu; env != NULL; env = env->next_cpu) {
 info.apic = env->apic_state;
@@ -606,7 +606,7 @@ static int vapic_prepare(VAPICROMState *s)
 static void vapic_write(void *opaque, target_phys_addr_t addr, uint64_t data,
 unsigned int size)
 {
-CPUState *env = cpu_single_env;
+CPUX86State *env = cpu_single_env;
 target_phys_addr_t rom_paddr;
 VAPICROMState *s = opaque;
 
diff --git a/hw/pc.c b/hw/pc.c
index aca4460..83a1b5b 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -140,7 +140,7 @@ vo

[Qemu-devel] [PATCH v5 03/43] monitor: Don't access registers through CPUState

[Andreas Färber]

Use CPUX86State etc. instead (hand-converted).

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 monitor.c |  488 ++--
 1 files changed, 244 insertions(+), 244 deletions(-)

diff --git a/monitor.c b/monitor.c
index cbdfbad..e3b72ff 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2696,30 +2696,30 @@ static const MonitorDef monitor_defs[] = {
 #ifdef TARGET_I386
 
 #define SEG(name, seg) \
-{ name, offsetof(CPUState, segs[seg].selector), NULL, MD_I32 },\
-{ name ".base", offsetof(CPUState, segs[seg].base) },\
-{ name ".limit", offsetof(CPUState, segs[seg].limit), NULL, MD_I32 },
+{ name, offsetof(CPUX86State, segs[seg].selector), NULL, MD_I32 },\
+{ name ".base", offsetof(CPUX86State, segs[seg].base) },\
+{ name ".limit", offsetof(CPUX86State, segs[seg].limit), NULL, MD_I32 },
 
-{ "eax", offsetof(CPUState, regs[0]) },
-{ "ecx", offsetof(CPUState, regs[1]) },
-{ "edx", offsetof(CPUState, regs[2]) },
-{ "ebx", offsetof(CPUState, regs[3]) },
-{ "esp|sp", offsetof(CPUState, regs[4]) },
-{ "ebp|fp", offsetof(CPUState, regs[5]) },
-{ "esi", offsetof(CPUState, regs[6]) },
-{ "edi", offsetof(CPUState, regs[7]) },
+{ "eax", offsetof(CPUX86State, regs[0]) },
+{ "ecx", offsetof(CPUX86State, regs[1]) },
+{ "edx", offsetof(CPUX86State, regs[2]) },
+{ "ebx", offsetof(CPUX86State, regs[3]) },
+{ "esp|sp", offsetof(CPUX86State, regs[4]) },
+{ "ebp|fp", offsetof(CPUX86State, regs[5]) },
+{ "esi", offsetof(CPUX86State, regs[6]) },
+{ "edi", offsetof(CPUX86State, regs[7]) },
 #ifdef TARGET_X86_64
-{ "r8", offsetof(CPUState, regs[8]) },
-{ "r9", offsetof(CPUState, regs[9]) },
-{ "r10", offsetof(CPUState, regs[10]) },
-{ "r11", offsetof(CPUState, regs[11]) },
-{ "r12", offsetof(CPUState, regs[12]) },
-{ "r13", offsetof(CPUState, regs[13]) },
-{ "r14", offsetof(CPUState, regs[14]) },
-{ "r15", offsetof(CPUState, regs[15]) },
+{ "r8", offsetof(CPUX86State, regs[8]) },
+{ "r9", offsetof(CPUX86State, regs[9]) },
+{ "r10", offsetof(CPUX86State, regs[10]) },
+{ "r11", offsetof(CPUX86State, regs[11]) },
+{ "r12", offsetof(CPUX86State, regs[12]) },
+{ "r13", offsetof(CPUX86State, regs[13]) },
+{ "r14", offsetof(CPUX86State, regs[14]) },
+{ "r15", offsetof(CPUX86State, regs[15]) },
 #endif
-{ "eflags", offsetof(CPUState, eflags) },
-{ "eip", offsetof(CPUState, eip) },
+{ "eflags", offsetof(CPUX86State, eflags) },
+{ "eip", offsetof(CPUX86State, eip) },
 SEG("cs", R_CS)
 SEG("ds", R_DS)
 SEG("es", R_ES)
@@ -2729,76 +2729,76 @@ static const MonitorDef monitor_defs[] = {
 { "pc", 0, monitor_get_pc, },
 #elif defined(TARGET_PPC)
 /* General purpose registers */
-{ "r0", offsetof(CPUState, gpr[0]) },
-{ "r1", offsetof(CPUState, gpr[1]) },
-{ "r2", offsetof(CPUState, gpr[2]) },
-{ "r3", offsetof(CPUState, gpr[3]) },
-{ "r4", offsetof(CPUState, gpr[4]) },
-{ "r5", offsetof(CPUState, gpr[5]) },
-{ "r6", offsetof(CPUState, gpr[6]) },
-{ "r7", offsetof(CPUState, gpr[7]) },
-{ "r8", offsetof(CPUState, gpr[8]) },
-{ "r9", offsetof(CPUState, gpr[9]) },
-{ "r10", offsetof(CPUState, gpr[10]) },
-{ "r11", offsetof(CPUState, gpr[11]) },
-{ "r12", offsetof(CPUState, gpr[12]) },
-{ "r13", offsetof(CPUState, gpr[13]) },
-{ "r14", offsetof(CPUState, gpr[14]) },
-{ "r15", offsetof(CPUState, gpr[15]) },
-{ "r16", offsetof(CPUState, gpr[16]) },
-{ "r17", offsetof(CPUState, gpr[17]) },
-{ "r18", offsetof(CPUState, gpr[18]) },
-{ "r19", offsetof(CPUState, gpr[19]) },
-{ "r20", offsetof(CPUState, gpr[20]) },
-{ "r21", offsetof(CPUState, gpr[21]) },
-{ "r22", offsetof(CPUState, gpr[22]) },
-{ "r23", offsetof(CPUState, gpr[23]) },
-{ "r24", offsetof(CPUState, gpr[24]) },
-{ "r25", offsetof(CPUState, gpr[25]) },
-{ "r26", offsetof(CPUState, gpr[26]) },
-{ "r27", offsetof(CPUState, gpr[27]) },
-{ "r28", offsetof(CPUState, gpr[28]) },
-{ "r29", offsetof(CPUState, gpr[29]) },
-{ "r30", offsetof(CPUState, gpr[30]) },
-{ "r31", offsetof(CPUState, gpr[31]) },
+{ "r0", offsetof(CPUPPCState, gpr[0]) },
+{ "r1", offsetof(CPUPPCState, gpr[1]) },
+{ "r2", offsetof(CPUPPCState, gpr[2]) },
+{ "r3", offsetof(CPUPPCState, gpr[3]) },
+{ "r4", offsetof(CPUPPCState, gpr[4]) },
+{ "r5", offsetof(CPUPPCState, gpr[5]) },
+{ "r6", offsetof(CPUPPCState, gpr[6]) },
+{ "r7", offsetof(CPUPPCState, gpr[7]) },
+{ "r8", offsetof(CPUPPCState, gpr[8]) },
+{ "r9", offsetof(CPUPPCState, gpr[9]) },
+{ "r10", offsetof(CPUPPCState, gpr[10]) },
+{ "r11", offsetof(CPUPPCState, gpr[11]) },
+{ "r12", offsetof(CPUPPCState, gpr[12]) },
+{ "r13", offsetof(CPUPPCState, gpr[13]) },
+{ "r14", offsetof(CPUPPCState, gpr[14]) },
+{ "r15", offsetof(CPUPPCState, gpr[15]) },
+ 

Re: [Qemu-devel] [PATCH 0/2] Lost VNC patches

[Stefan Weil]

Am 14.03.2012 22:46, schrieb Anthony Liguori:

On 03/14/2012 01:58 AM, Corentin Chary wrote:

Hi Anthony,

Please merge these two patchs from another age, they fix crash in the 
VNC

server (the iohandler one is only for the threaded server).


Applied.  Thanks.

Regards,

Anthony Liguori



The commit time of my patch was modified here. I had sent the patch on
March 15, 2011, 6:45 p.m., so you could also have waited a day longer
until its first birthday :-)

There is a more serious background why I write this mail: commit
requests should not modify the time when a patch was written.

See http://patchwork.ozlabs.org/patch/87029/ for the original.

Cheers,
Stefan W.





Thanks,

Corentin Chary (1):
   vnc: don't mess up with iohandlers in the vnc thread

Stefan Weil (1):
   vnc: Limit r/w access to size of allocated memory

  ui/vnc-jobs-async.c |   48 
+---

  ui/vnc-jobs.h   |1 +
  ui/vnc.c|   15 +++
  ui/vnc.h|2 ++
  4 files changed, 47 insertions(+), 19 deletions(-)

[Qemu-devel] [PATCH v5 43/43] qom: Introduce CPU class

[Andreas Färber]

Reintroduce CPUState as QOM object: It's abstract and derived directly
from TYPE_OBJECT for compatibility with the user emulators.
The identifier CPUState avoids conflicts between CPU() and the struct.

Introduce $(qom-twice-y) to build it separately for system and for user
emulators.

Prepare a virtual reset method, (re)introduce cpu_reset() as wrapper.

Signed-off-by: Andreas Färber 
Reviewed-by: Anthony Liguori 
---
 Makefile.objs  |3 ++
 configure  |1 +
 include/qemu/cpu.h |   75 
 qom/Makefile   |1 +
 qom/cpu.c  |   58 
 5 files changed, 138 insertions(+), 0 deletions(-)
 create mode 100644 include/qemu/cpu.h
 create mode 100644 qom/cpu.c

diff --git a/Makefile.objs b/Makefile.objs
index f71ea17..226b01d 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -14,6 +14,7 @@ universal-obj-y += $(qobject-obj-y)
 # QOM
 include $(SRC_PATH)/qom/Makefile
 qom-obj-y = $(addprefix qom/, $(qom-y))
+qom-obj-twice-y = $(addprefix qom/, $(qom-twice-y))
 
 universal-obj-y += $(qom-obj-y)
 
@@ -93,6 +94,7 @@ fsdev-obj-$(CONFIG_VIRTFS) += $(addprefix fsdev/, 
$(fsdev-nested-y))
 
 common-obj-y = $(block-obj-y) blockdev.o
 common-obj-y += $(net-obj-y)
+common-obj-y += $(qom-obj-twice-y)
 common-obj-$(CONFIG_LINUX) += $(fsdev-obj-$(CONFIG_LINUX))
 common-obj-y += readline.o console.o cursor.o
 common-obj-y += $(oslib-obj-y)
@@ -200,6 +202,7 @@ user-obj-y += cutils.o cache-utils.o
 user-obj-y += module.o
 user-obj-y += qemu-user.o
 user-obj-y += $(trace-obj-y)
+user-obj-y += $(qom-obj-twice-y)
 
 ##
 # libhw
diff --git a/configure b/configure
index fe4fc4f..afe7395 100755
--- a/configure
+++ b/configure
@@ -3921,6 +3921,7 @@ fi
 d=libuser
 mkdir -p $d
 mkdir -p $d/trace
+mkdir -p $d/qom
 symlink $source_path/Makefile.user $d/Makefile
 
 if test "$docs" = "yes" ; then
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
new file mode 100644
index 000..4291279
--- /dev/null
+++ b/include/qemu/cpu.h
@@ -0,0 +1,75 @@
+/*
+ * QEMU CPU model
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * 
+ */
+#ifndef QEMU_CPU_H
+#define QEMU_CPU_H
+
+#include "qemu/object.h"
+
+/**
+ * SECTION:cpu
+ * @section_id: QEMU-cpu
+ * @title: CPU Class
+ * @short_description: Base class for all CPUs
+ */
+
+#define TYPE_CPU "cpu"
+
+#define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
+#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
+#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
+
+typedef struct CPUState CPUState;
+
+/**
+ * CPUClass:
+ * @reset: Callback to reset the #CPU to its initial state.
+ *
+ * Represents a CPU family or model.
+ */
+typedef struct CPUClass {
+/*< private >*/
+ObjectClass parent_class;
+/*< public >*/
+
+void (*reset)(CPUState *cpu);
+} CPUClass;
+
+/**
+ * CPUState:
+ *
+ * State of one CPU core or thread.
+ */
+struct CPUState {
+/*< private >*/
+Object parent_obj;
+/*< public >*/
+
+/* TODO Move common fields from CPUState here. */
+};
+
+
+/**
+ * cpu_reset:
+ * @cpu: The CPU whose state is to be reset.
+ */
+void cpu_reset(CPUState *cpu);
+
+
+#endif
diff --git a/qom/Makefile b/qom/Makefile
index 885a263..34c6de5 100644
--- a/qom/Makefile
+++ b/qom/Makefile
@@ -1 +1,2 @@
 qom-y = object.o container.o qom-qobject.o
+qom-twice-y = cpu.o
diff --git a/qom/cpu.c b/qom/cpu.c
new file mode 100644
index 000..5b36046
--- /dev/null
+++ b/qom/cpu.c
@@ -0,0 +1,58 @@
+/*
+ * QEMU CPU model
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * 

[Qemu-devel] [RFC] qemu-iotest only for Linux?

[Stefan Weil]

Hi,

What's the reason for "_supported_os Linux" in each test?
Because of this statement, the tests only run on Linux today,
although they could also run on BSD, w32 and other operating
systems (maybe small fixes are needed).

I don't think that adding every possible OS to each test
would be a good solution. Can we remove this OS dependency
completely?

Regards,
Stefan W.

[Qemu-devel] [PATCH v5 40/43] sparc hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/sun4m.c hw/sun4u.c hw/grlib.h hw/leon3.c; do
sed -i "s/CPUState/CPUSPARCState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/grlib.h |2 +-
 hw/leon3.c |8 
 hw/sun4m.c |   12 ++--
 hw/sun4u.c |   24 
 4 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/hw/grlib.h b/hw/grlib.h
index fdf4b11..e1c4137 100644
--- a/hw/grlib.h
+++ b/hw/grlib.h
@@ -42,7 +42,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno);
 
 static inline
 DeviceState *grlib_irqmp_create(target_phys_addr_t   base,
-CPUState*env,
+CPUSPARCState*env,
 qemu_irq   **cpu_irqs,
 uint32_t nr_irqs,
 set_pil_in_fnset_pil_in)
diff --git a/hw/leon3.c b/hw/leon3.c
index 1dc5a02..0a5ff16 100644
--- a/hw/leon3.c
+++ b/hw/leon3.c
@@ -42,14 +42,14 @@
 #define MAX_PILS 16
 
 typedef struct ResetData {
-CPUState *env;
+CPUSPARCState *env;
 uint32_t  entry;/* save kernel entry in case of reset */
 } ResetData;
 
 static void main_cpu_reset(void *opaque)
 {
 ResetData *s   = (ResetData *)opaque;
-CPUState  *env = s->env;
+CPUSPARCState  *env = s->env;
 
 cpu_state_reset(env);
 
@@ -65,7 +65,7 @@ void leon3_irq_ack(void *irq_manager, int intno)
 
 static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
 {
-CPUState *env = (CPUState *)opaque;
+CPUSPARCState *env = (CPUSPARCState *)opaque;
 
 assert(env != NULL);
 
@@ -101,7 +101,7 @@ static void leon3_generic_hw_init(ram_addr_t  ram_size,
   const char *initrd_filename,
   const char *cpu_model)
 {
-CPUState   *env;
+CPUSPARCState   *env;
 MemoryRegion *address_space_mem = get_system_memory();
 MemoryRegion *ram = g_new(MemoryRegion, 1);
 MemoryRegion *prom = g_new(MemoryRegion, 1);
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 4045740..7bcbf37 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -228,7 +228,7 @@ void sun4m_irq_info(Monitor *mon)
 slavio_irq_info(mon, slavio_intctl);
 }
 
-void cpu_check_irqs(CPUState *env)
+void cpu_check_irqs(CPUSPARCState *env)
 {
 if (env->pil_in && (env->interrupt_index == 0 ||
 (env->interrupt_index & ~15) == TT_EXTINT)) {
@@ -253,7 +253,7 @@ void cpu_check_irqs(CPUState *env)
 }
 }
 
-static void cpu_kick_irq(CPUState *env)
+static void cpu_kick_irq(CPUSPARCState *env)
 {
 env->halted = 0;
 cpu_check_irqs(env);
@@ -262,7 +262,7 @@ static void cpu_kick_irq(CPUState *env)
 
 static void cpu_set_irq(void *opaque, int irq, int level)
 {
-CPUState *env = opaque;
+CPUSPARCState *env = opaque;
 
 if (level) {
 trace_sun4m_cpu_set_irq_raise(irq);
@@ -281,7 +281,7 @@ static void dummy_cpu_set_irq(void *opaque, int irq, int 
level)
 
 static void main_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUSPARCState *env = opaque;
 
 cpu_state_reset(env);
 env->halted = 0;
@@ -289,7 +289,7 @@ static void main_cpu_reset(void *opaque)
 
 static void secondary_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUSPARCState *env = opaque;
 
 cpu_state_reset(env);
 env->halted = 1;
@@ -809,7 +809,7 @@ static TypeInfo ram_info = {
 static void cpu_devinit(const char *cpu_model, unsigned int id,
 uint64_t prom_addr, qemu_irq **cpu_irqs)
 {
-CPUState *env;
+CPUSPARCState *env;
 
 env = cpu_init(cpu_model);
 if (!env) {
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 8b043f2..c32eddb 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -243,7 +243,7 @@ static unsigned long sun4u_load_kernel(const char 
*kernel_filename,
 return kernel_size;
 }
 
-void cpu_check_irqs(CPUState *env)
+void cpu_check_irqs(CPUSPARCState *env)
 {
 uint32_t pil = env->pil_in |
   (env->softint & ~(SOFTINT_TIMER | SOFTINT_STIMER));
@@ -297,7 +297,7 @@ void cpu_check_irqs(CPUState *env)
 }
 }
 
-static void cpu_kick_irq(CPUState *env)
+static void cpu_kick_irq(CPUSPARCState *env)
 {
 env->halted = 0;
 cpu_check_irqs(env);
@@ -306,7 +306,7 @@ static void cpu_kick_irq(CPUState *env)
 
 static void cpu_set_irq(void *opaque, int irq, int level)
 {
-CPUState *env = opaque;
+CPUSPARCState *env = opaque;
 
 if (level) {
 CPUIRQ_DPRINTF("Raise CPU IRQ %d\n", irq);
@@ -320,7 +320,7 @@ static void cpu_set_irq(void *opaque, int irq, int level)
 }
 
 typedef struct ResetData {
-CPUState *env;
+CPUSPARCState *env;
 uint64_t prom_addr;
 } ResetData;
 
@@ -344,7 +344,7 @@ void cpu_get_timer(QEMUFile *f, CPUTimer *s)
 qemu_get_timer(f, s->qtimer);
 }
 
-static CPUTimer* cpu_timer_create(const char* name, CPUState *env,
+static CPUTimer* cpu_timer_create(const cha

[Qemu-devel] [PATCH v5 35/43] microblaze hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/microblaze_*.[hc] hw/petalogix_ml605_mmu.c 
hw/petalogix_s3adsp1800_mmu.c; do
sed -i "s/CPUState/CPUMBState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/microblaze_boot.c  |8 
 hw/microblaze_boot.h  |4 ++--
 hw/microblaze_pic_cpu.c   |4 ++--
 hw/microblaze_pic_cpu.h   |2 +-
 hw/petalogix_ml605_mmu.c  |4 ++--
 hw/petalogix_s3adsp1800_mmu.c |4 ++--
 6 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/hw/microblaze_boot.c b/hw/microblaze_boot.c
index 7ce04dc..b4fbb10 100644
--- a/hw/microblaze_boot.c
+++ b/hw/microblaze_boot.c
@@ -35,7 +35,7 @@
 
 static struct
 {
-void (*machine_cpu_reset)(CPUState *);
+void (*machine_cpu_reset)(CPUMBState *);
 uint32_t bootstrap_pc;
 uint32_t cmdline;
 uint32_t fdt;
@@ -43,7 +43,7 @@ static struct
 
 static void main_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUMBState *env = opaque;
 
 cpu_state_reset(env);
 env->regs[5] = boot_info.cmdline;
@@ -99,9 +99,9 @@ static uint64_t translate_kernel_address(void *opaque, 
uint64_t addr)
 return addr - 0x3000LL;
 }
 
-void microblaze_load_kernel(CPUState *env, target_phys_addr_t ddr_base,
+void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base,
 uint32_t ramsize, const char *dtb_filename,
-  void (*machine_cpu_reset)(CPUState *))
+  void (*machine_cpu_reset)(CPUMBState *))
 {
 
 QemuOpts *machine_opts;
diff --git a/hw/microblaze_boot.h b/hw/microblaze_boot.h
index 69d4ac6..bf9d136 100644
--- a/hw/microblaze_boot.h
+++ b/hw/microblaze_boot.h
@@ -3,8 +3,8 @@
 
 #include "hw.h"
 
-void microblaze_load_kernel(CPUState *env, target_phys_addr_t ddr_base,
+void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base,
 uint32_t ramsize, const char *dtb_filename,
-  void (*machine_cpu_reset)(CPUState *));
+  void (*machine_cpu_reset)(CPUMBState *));
 
 #endif /* __MICROBLAZE_BOOT __ */
diff --git a/hw/microblaze_pic_cpu.c b/hw/microblaze_pic_cpu.c
index 8b5623c..ff36a52 100644
--- a/hw/microblaze_pic_cpu.c
+++ b/hw/microblaze_pic_cpu.c
@@ -29,7 +29,7 @@
 
 static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
 {
-CPUState *env = (CPUState *)opaque;
+CPUMBState *env = (CPUMBState *)opaque;
 int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
 
 if (level)
@@ -38,7 +38,7 @@ static void microblaze_pic_cpu_handler(void *opaque, int irq, 
int level)
 cpu_reset_interrupt(env, type);
 }
 
-qemu_irq *microblaze_pic_init_cpu(CPUState *env)
+qemu_irq *microblaze_pic_init_cpu(CPUMBState *env)
 {
 return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);
 }
diff --git a/hw/microblaze_pic_cpu.h b/hw/microblaze_pic_cpu.h
index 4c76275..43090a4 100644
--- a/hw/microblaze_pic_cpu.h
+++ b/hw/microblaze_pic_cpu.h
@@ -3,6 +3,6 @@
 
 #include "qemu-common.h"
 
-qemu_irq *microblaze_pic_init_cpu(CPUState *env);
+qemu_irq *microblaze_pic_init_cpu(CPUMBState *env);
 
 #endif /*  MICROBLAZE_PIC_CPU_H */
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index c87fa11..31a4348 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -54,7 +54,7 @@
 #define AXIENET_BASEADDR 0x8278
 #define AXIDMA_BASEADDR 0x8460
 
-static void machine_cpu_reset(CPUState *env)
+static void machine_cpu_reset(CPUMBState *env)
 {
 env->pvr.regs[10] = 0x0e00; /* virtex 6 */
 /* setup pvr to match kernel setting */
@@ -75,7 +75,7 @@ petalogix_ml605_init(ram_addr_t ram_size,
 {
 MemoryRegion *address_space_mem = get_system_memory();
 DeviceState *dev;
-CPUState *env;
+CPUMBState *env;
 DriveInfo *dinfo;
 int i;
 target_phys_addr_t ddr_base = MEMORY_BASEADDR;
diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c
index 2cb0b1f..ff154c7 100644
--- a/hw/petalogix_s3adsp1800_mmu.c
+++ b/hw/petalogix_s3adsp1800_mmu.c
@@ -49,7 +49,7 @@
 #define UARTLITE_BASEADDR 0x8400
 #define ETHLITE_BASEADDR 0x8100
 
-static void machine_cpu_reset(CPUState *env)
+static void machine_cpu_reset(CPUMBState *env)
 {
 /* FIXME: move to machine specfic cpu reset */
 env->pvr.regs[10] = 0x0c00; /* spartan 3a dsp family.  */
@@ -63,7 +63,7 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
   const char *initrd_filename, const char *cpu_model)
 {
 DeviceState *dev;
-CPUState *env;
+CPUMBState *env;
 DriveInfo *dinfo;
 int i;
 target_phys_addr_t ddr_base = MEMORY_BASEADDR;
-- 
1.7.7

[Qemu-devel] [PATCH v5 28/43] xtensa-semi: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  sed -i "s/CPUState/CPUXtensaState/g" xtensa-semi.c

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 xtensa-semi.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/xtensa-semi.c b/xtensa-semi.c
index ba0e828..5754b77 100644
--- a/xtensa-semi.c
+++ b/xtensa-semi.c
@@ -55,7 +55,7 @@ enum {
 SELECT_ONE_EXCEPT = 3,
 };
 
-void HELPER(simcall)(CPUState *env)
+void HELPER(simcall)(CPUXtensaState *env)
 {
 uint32_t *regs = env->regs;
 
-- 
1.7.7

Re: [Qemu-devel] [PATCH][v2] configure: change endianness test

[Paul Brook]

> Contrary to Paul's argument QEMU does not only support a fixed
> set of known host architectures, but also unknown hosts (via TCI).
> For those, there remains a small chance that they are big endian
> and that they get the wrong endianness now. TCI is still experimental,
> so I don't care too much about this small deficit.

If you're compiling for a host that obscure, then there's a good chance you'll 
be cross-compiling anyway.  I'd be amazed if there aren't other bits of qemu 
that require host-specific code.

Paul

Re: [Qemu-devel] [PATCH 0/2] Lost VNC patches

[Anthony Liguori]

On 03/14/2012 01:58 AM, Corentin Chary wrote:

Hi Anthony,

Please merge these two patchs from another age, they fix crash in the VNC
server (the iohandler one is only for the threaded server).


Applied.  Thanks.

Regards,

Anthony Liguori



Thanks,

Corentin Chary (1):
   vnc: don't mess up with iohandlers in the vnc thread

Stefan Weil (1):
   vnc: Limit r/w access to size of allocated memory

  ui/vnc-jobs-async.c |   48 +---
  ui/vnc-jobs.h   |1 +
  ui/vnc.c|   15 +++
  ui/vnc.h|2 ++
  4 files changed, 47 insertions(+), 19 deletions(-)

[Qemu-devel] [PATCH v5 30/43] arm hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/arm-misc.h hw/arm_boot.c hw/arm_pic.c hw/armv7m.c 
hw/exynos4210.h hw/highbank.c hw/integratorcp.c hw/musicpal.c hw/omap.h 
hw/pxa.h hw/pxa2xx_gpio.c hw/pxa2xx_pic.c hw/realview.c hw/strongarm.h 
hw/versatilepb.c hw/vexpress.c  hw/xilinx_zynq.c ; do
sed -i "s/CPUState/CPUARMState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/arm-misc.h |8 
 hw/arm_boot.c |8 
 hw/arm_pic.c  |4 ++--
 hw/armv7m.c   |4 ++--
 hw/exynos4210.h   |2 +-
 hw/highbank.c |8 
 hw/integratorcp.c |2 +-
 hw/musicpal.c |2 +-
 hw/omap.h |2 +-
 hw/pxa.h  |6 +++---
 hw/pxa2xx_gpio.c  |4 ++--
 hw/pxa2xx_pic.c   |4 ++--
 hw/realview.c |2 +-
 hw/strongarm.h|2 +-
 hw/versatilepb.c  |2 +-
 hw/vexpress.c |4 ++--
 hw/xilinx_zynq.c  |2 +-
 17 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 734bd82..2f46e21 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -16,7 +16,7 @@
 /* The CPU is also modeled as an interrupt controller.  */
 #define ARM_PIC_CPU_IRQ 0
 #define ARM_PIC_CPU_FIQ 1
-qemu_irq *arm_pic_init_cpu(CPUState *env);
+qemu_irq *arm_pic_init_cpu(CPUARMState *env);
 
 /* armv7m.c */
 qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
@@ -50,16 +50,16 @@ struct arm_boot_info {
  * perform any necessary CPU reset handling and set the PC for thei
  * secondary CPUs to point at this boot blob.
  */
-void (*write_secondary_boot)(CPUState *env,
+void (*write_secondary_boot)(CPUARMState *env,
  const struct arm_boot_info *info);
-void (*secondary_cpu_reset_hook)(CPUState *env,
+void (*secondary_cpu_reset_hook)(CPUARMState *env,
  const struct arm_boot_info *info);
 /* Used internally by arm_boot.c */
 int is_linux;
 target_phys_addr_t initrd_size;
 target_phys_addr_t entry;
 };
-void arm_load_kernel(CPUState *env, struct arm_boot_info *info);
+void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info);
 
 /* Multiplication factor to convert from system clock ticks to qemu timer
ticks.  */
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index 23b3f0a..7447f5c 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -59,7 +59,7 @@ static uint32_t smpboot[] = {
   0   /* bootreg: Boot register address is held here */
 };
 
-static void default_write_secondary(CPUState *env,
+static void default_write_secondary(CPUARMState *env,
 const struct arm_boot_info *info)
 {
 int n;
@@ -72,7 +72,7 @@ static void default_write_secondary(CPUState *env,
info->smp_loader_start);
 }
 
-static void default_reset_secondary(CPUState *env,
+static void default_reset_secondary(CPUARMState *env,
 const struct arm_boot_info *info)
 {
 stl_phys_notdirty(info->smp_bootreg_addr, 0);
@@ -274,7 +274,7 @@ static int load_dtb(target_phys_addr_t addr, const struct 
arm_boot_info *binfo)
 
 static void do_cpu_reset(void *opaque)
 {
-CPUState *env = opaque;
+CPUARMState *env = opaque;
 const struct arm_boot_info *info = env->boot_info;
 
 cpu_state_reset(env);
@@ -300,7 +300,7 @@ static void do_cpu_reset(void *opaque)
 }
 }
 
-void arm_load_kernel(CPUState *env, struct arm_boot_info *info)
+void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
 {
 int kernel_size;
 int initrd_size;
diff --git a/hw/arm_pic.c b/hw/arm_pic.c
index a2e8a73..1094965 100644
--- a/hw/arm_pic.c
+++ b/hw/arm_pic.c
@@ -13,7 +13,7 @@
 /* Input 0 is IRQ and input 1 is FIQ.  */
 static void arm_pic_cpu_handler(void *opaque, int irq, int level)
 {
-CPUState *env = (CPUState *)opaque;
+CPUARMState *env = (CPUARMState *)opaque;
 switch (irq) {
 case ARM_PIC_CPU_IRQ:
 if (level)
@@ -32,7 +32,7 @@ static void arm_pic_cpu_handler(void *opaque, int irq, int 
level)
 }
 }
 
-qemu_irq *arm_pic_init_cpu(CPUState *env)
+qemu_irq *arm_pic_init_cpu(CPUARMState *env)
 {
 return qemu_allocate_irqs(arm_pic_cpu_handler, env, 2);
 }
diff --git a/hw/armv7m.c b/hw/armv7m.c
index 9cf96f4..4aac076 100644
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@@ -149,7 +149,7 @@ static void armv7m_bitband_init(void)
 
 static void armv7m_reset(void *opaque)
 {
-cpu_state_reset((CPUState *)opaque);
+cpu_state_reset((CPUARMState *)opaque);
 }
 
 /* Init CPU and memory for a v7-M based board.
@@ -160,7 +160,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
   int flash_size, int sram_size,
   const char *kernel_filename, const char *cpu_model)
 {
-CPUState *env;
+CPUARMState *env;
 DeviceState *nvic;
 /* FIXME: make this local state.  */
 static qemu_irq pic[64];
diff --git a/hw/exynos4210.h b/hw/exynos4210.h
index e75

[Qemu-devel] [PATCH v5 38/43] s390x hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/s390-*.[hc]; do
sed -i "s/CPUState/CPUS390XState/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/s390-virtio-bus.c |6 +++---
 hw/s390-virtio.c |   16 
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/hw/s390-virtio-bus.c b/hw/s390-virtio-bus.c
index c450e4b..be1f5f1 100644
--- a/hw/s390-virtio-bus.c
+++ b/hw/s390-virtio-bus.c
@@ -85,7 +85,7 @@ VirtIOS390Bus *s390_virtio_bus_init(ram_addr_t *ram_size)
 return bus;
 }
 
-static void s390_virtio_irq(CPUState *env, int config_change, uint64_t token)
+static void s390_virtio_irq(CPUS390XState *env, int config_change, uint64_t 
token)
 {
 if (kvm_enabled()) {
 kvm_s390_virtio_irq(env, config_change, token);
@@ -116,7 +116,7 @@ static int s390_virtio_device_init(VirtIOS390Device *dev, 
VirtIODevice *vdev)
 s390_virtio_device_sync(dev);
 
 if (dev->qdev.hotplugged) {
-CPUState *env = s390_cpu_addr2state(0);
+CPUS390XState *env = s390_cpu_addr2state(0);
 s390_virtio_irq(env, VIRTIO_PARAM_DEV_ADD, dev->dev_offs);
 }
 
@@ -331,7 +331,7 @@ static void virtio_s390_notify(void *opaque, uint16_t 
vector)
 {
 VirtIOS390Device *dev = (VirtIOS390Device*)opaque;
 uint64_t token = s390_virtio_device_vq_token(dev, vector);
-CPUState *env = s390_cpu_addr2state(0);
+CPUS390XState *env = s390_cpu_addr2state(0);
 
 s390_virtio_irq(env, 0, token);
 }
diff --git a/hw/s390-virtio.c b/hw/s390-virtio.c
index 15e3ef3..1ebe70d 100644
--- a/hw/s390-virtio.c
+++ b/hw/s390-virtio.c
@@ -61,9 +61,9 @@
 #define MAX_BLK_DEVS10
 
 static VirtIOS390Bus *s390_bus;
-static CPUState **ipi_states;
+static CPUS390XState **ipi_states;
 
-CPUState *s390_cpu_addr2state(uint16_t cpu_addr)
+CPUS390XState *s390_cpu_addr2state(uint16_t cpu_addr)
 {
 if (cpu_addr >= smp_cpus) {
 return NULL;
@@ -72,7 +72,7 @@ CPUState *s390_cpu_addr2state(uint16_t cpu_addr)
 return ipi_states[cpu_addr];
 }
 
-int s390_virtio_hypercall(CPUState *env, uint64_t mem, uint64_t hypercall)
+int s390_virtio_hypercall(CPUS390XState *env, uint64_t mem, uint64_t hypercall)
 {
 int r = 0, i;
 
@@ -129,7 +129,7 @@ int s390_virtio_hypercall(CPUState *env, uint64_t mem, 
uint64_t hypercall)
  */
 static unsigned s390_running_cpus;
 
-void s390_add_running_cpu(CPUState *env)
+void s390_add_running_cpu(CPUS390XState *env)
 {
 if (env->halted) {
 s390_running_cpus++;
@@ -138,7 +138,7 @@ void s390_add_running_cpu(CPUState *env)
 }
 }
 
-unsigned s390_del_running_cpu(CPUState *env)
+unsigned s390_del_running_cpu(CPUS390XState *env)
 {
 if (env->halted == 0) {
 assert(s390_running_cpus >= 1);
@@ -157,7 +157,7 @@ static void s390_init(ram_addr_t my_ram_size,
   const char *initrd_filename,
   const char *cpu_model)
 {
-CPUState *env = NULL;
+CPUS390XState *env = NULL;
 MemoryRegion *sysmem = get_system_memory();
 MemoryRegion *ram = g_new(MemoryRegion, 1);
 ram_addr_t kernel_size = 0;
@@ -205,10 +205,10 @@ static void s390_init(ram_addr_t my_ram_size,
 cpu_model = "host";
 }
 
-ipi_states = g_malloc(sizeof(CPUState *) * smp_cpus);
+ipi_states = g_malloc(sizeof(CPUS390XState *) * smp_cpus);
 
 for (i = 0; i < smp_cpus; i++) {
-CPUState *tmp_env;
+CPUS390XState *tmp_env;
 
 tmp_env = cpu_init(cpu_model);
 if (!env) {
-- 
1.7.7

[Qemu-devel] [PATCH v5 39/43] sh4 hw/: Don't use CPUState

[Andreas Färber]

Scripted conversion:
  for file in hw/sh.h hw/shix.c hw/r2d.c; do
sed -i "s/CPUState/CPUSH4State/g" $file
  done

Signed-off-by: Andreas Färber 
Acked-by: Anthony Liguori 
---
 hw/r2d.c  |6 +++---
 hw/sh.h   |2 +-
 hw/shix.c |2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/r2d.c b/hw/r2d.c
index ae327a7..c55de01 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -192,14 +192,14 @@ static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
 }
 
 typedef struct ResetData {
-CPUState *env;
+CPUSH4State *env;
 uint32_t vector;
 } ResetData;
 
 static void main_cpu_reset(void *opaque)
 {
 ResetData *s = (ResetData *)opaque;
-CPUState *env = s->env;
+CPUSH4State *env = s->env;
 
 cpu_state_reset(env);
 env->pc = s->vector;
@@ -224,7 +224,7 @@ static void r2d_init(ram_addr_t ram_size,
  const char *kernel_filename, const char *kernel_cmdline,
  const char *initrd_filename, const char *cpu_model)
 {
-CPUState *env;
+CPUSH4State *env;
 ResetData *reset_info;
 struct SH7750State *s;
 MemoryRegion *sdram = g_new(MemoryRegion, 1);
diff --git a/hw/sh.h b/hw/sh.h
index 6488db2..40df18c 100644
--- a/hw/sh.h
+++ b/hw/sh.h
@@ -11,7 +11,7 @@
 struct SH7750State;
 struct MemoryRegion;
 
-struct SH7750State *sh7750_init(CPUState * cpu, struct MemoryRegion *sysmem);
+struct SH7750State *sh7750_init(CPUSH4State * cpu, struct MemoryRegion 
*sysmem);
 
 typedef struct {
 /* The callback will be triggered if any of the designated lines change */
diff --git a/hw/shix.c b/hw/shix.c
index e259c17..dd9ce17 100644
--- a/hw/shix.c
+++ b/hw/shix.c
@@ -43,7 +43,7 @@ static void shix_init(ram_addr_t ram_size,
   const char *initrd_filename, const char *cpu_model)
 {
 int ret;
-CPUState *env;
+CPUSH4State *env;
 struct SH7750State *s;
 MemoryRegion *sysmem = get_system_memory();
 MemoryRegion *rom = g_new(MemoryRegion, 1);
-- 
1.7.7

[Qemu-devel] [PATCH v5 01/43] PPC: 405: Use proper CPU reset

[Andreas Färber]

From: Alexander Graf 

On ppc405ep there is a register that allows for software to reset the
core, but not the whole system. Implement this reset using a reset
interrupt.

This gets rid of a bunch of #if 0'ed code.

Reported-by: Andreas Färber 
Signed-off-by: Alexander Graf 
Signed-off-by: Andreas Färber 
---
 cpu-exec.c   |2 --
 hw/ppc.c |   13 ++---
 hw/ppc405_uc.c   |   16 ++--
 target-ppc/cpu.h |3 +++
 4 files changed, 7 insertions(+), 27 deletions(-)

diff --git a/cpu-exec.c b/cpu-exec.c
index 2c2d24e..3d28053 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -339,11 +339,9 @@ int cpu_exec(CPUState *env)
 }
 }
 #elif defined(TARGET_PPC)
-#if 0
 if ((interrupt_request & CPU_INTERRUPT_RESET)) {
 cpu_reset(env);
 }
-#endif
 if (interrupt_request & CPU_INTERRUPT_HARD) {
 ppc_hw_interrupt(env);
 if (env->pending_interrupts == 0)
diff --git a/hw/ppc.c b/hw/ppc.c
index 59882e2..a9516f1 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -131,13 +131,7 @@ static void ppc6xx_set_irq (void *opaque, int pin, int 
level)
 /* Level sensitive - active low */
 if (level) {
 LOG_IRQ("%s: reset the CPU\n", __func__);
-env->interrupt_request |= CPU_INTERRUPT_EXITTB;
-/* XXX: TOFIX */
-#if 0
-cpu_reset(env);
-#else
-qemu_system_reset_request();
-#endif
+cpu_interrupt(env, CPU_INTERRUPT_RESET);
 }
 break;
 case PPC6xx_INPUT_SRESET:
@@ -214,10 +208,7 @@ static void ppc970_set_irq (void *opaque, int pin, int 
level)
 case PPC970_INPUT_HRESET:
 /* Level sensitive - active low */
 if (level) {
-#if 0 // XXX: TOFIX
-LOG_IRQ("%s: reset the CPU\n", __func__);
-cpu_reset(env);
-#endif
+cpu_interrupt(env, CPU_INTERRUPT_RESET);
 }
 break;
 case PPC970_INPUT_SRESET:
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 98079fa..951b389 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -1769,13 +1769,7 @@ void ppc40x_core_reset (CPUState *env)
 target_ulong dbsr;
 
 printf("Reset PowerPC core\n");
-env->interrupt_request |= CPU_INTERRUPT_EXITTB;
-/* XXX: TOFIX */
-#if 0
-cpu_reset(env);
-#else
-qemu_system_reset_request();
-#endif
+cpu_interrupt(env, CPU_INTERRUPT_RESET);
 dbsr = env->spr[SPR_40x_DBSR];
 dbsr &= ~0x0300;
 dbsr |= 0x0100;
@@ -1787,13 +1781,7 @@ void ppc40x_chip_reset (CPUState *env)
 target_ulong dbsr;
 
 printf("Reset PowerPC chip\n");
-env->interrupt_request |= CPU_INTERRUPT_EXITTB;
-/* XXX: TOFIX */
-#if 0
-cpu_reset(env);
-#else
-qemu_system_reset_request();
-#endif
+cpu_interrupt(env, CPU_INTERRUPT_RESET);
 /* XXX: TODO reset all internal peripherals */
 dbsr = env->spr[SPR_40x_DBSR];
 dbsr &= ~0x0300;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index fbcf488..ac753f3 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2051,6 +2051,9 @@ enum {
 PPC_INTERRUPT_PERFM,  /* Performance monitor interrupt*/
 };
 
+/* CPU should be reset next, restart from scratch afterwards */
+#define CPU_INTERRUPT_RESET   CPU_INTERRUPT_TGT_INT_0
+
 /*/
 
 static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
-- 
1.7.7

[Qemu-devel] [PULL] QOM CPUState v5

[Andreas Färber]

Hello Anthony,

Please pull the second QOM CPU series,
which frees the identifiers cpu_reset and CPUState and introduces TYPE_CPU.

Cc: Anthony Liguori 

The following changes since commit 418ba9e5d6849ef2e8512d8853628ce4bf37937a:

  qom: Introduce object_class_get_list() (2012-03-14 15:30:39 -0500)

are available in the git repository at:
  git://repo.or.cz/qemu/afaerber.git qom-cpu

Alexander Graf (1):
  PPC: 405: Use proper CPU reset

Andreas Färber (42):
  Rename cpu_reset() to cpu_state_reset()
  monitor: Don't access registers through CPUState
  monitor: Avoid CPUState in read/write functions
  target-lm32/microblaze: Typedef struct CPU{MB,LM32}State
  target-sparc: Typedef struct CPUSPARCState early
  target-unicore32: Rename to CPUUniCore32State
  hw/mc146818: Drop unneeded #includes
  linux-user: Don't overuse CPUState
  darwin-user: Don't overuse CPUState
  bsd-user: Don't overuse CPUState
  target-alpha: Don't overuse CPUState
  target-arm: Don't overuse CPUState
  target-cris: Don't overuse CPUState
  target-i386: Don't overuse CPUState
  target-lm32: Don't overuse CPUState
  target-m68k: Don't overuse CPUState
  target-microblaze: Don't overuse CPUState
  target-mips: Don't overuse CPUState
  target-ppc: Don't overuse CPUState
  target-s390x: Don't overuse CPUState
  target-sh4: Don't overuse CPUState
  target-sparc: Don't overuse CPUState
  target-unicore32: Don't overuse CPUState
  target-xtensa: Don't overuse CPUState
  arm-semi: Don't use CPUState
  m68k-semi: Don't use CPUState
  xtensa-semi: Don't use CPUState
  alpha hw/: Don't use CPUState
  arm hw/: Don't use CPUState
  cris hw/: Don't use CPUState
  i386 hw/: Don't use CPUState
  lm32 hw/: Don't use CPUState
  m68k hw/: Don't use CPUState
  microblaze hw/: Don't use CPUState
  mips hw/: Don't use CPUState
  ppc hw/: Don't use CPUState
  s390x hw/: Don't use CPUState
  sh4 hw/: Don't use CPUState
  sparc hw/: Don't use CPUState
  xtensa hw/: Don't use CPUState
  Rename CPUState -> CPUArchState
  qom: Introduce CPU class

 Makefile.objs |3 +
 arm-semi.c|   10 +-
 bsd-user/main.c   |   14 +-
 bsd-user/qemu.h   |   12 +-
 bsd-user/signal.c |2 +-
 configure |1 +
 cpu-all.h |   56 ++--
 cpu-defs.h|2 +-
 cpu-exec.c|   20 +-
 cpus.c|   76 +++---
 darwin-user/main.c|   22 +-
 darwin-user/qemu.h|6 +-
 darwin-user/signal.c  |8 +-
 def-helper.h  |2 +-
 disas.c   |4 +-
 disas.h   |2 +-
 dyngen-exec.h |4 +-
 exec-all.h|   38 ++--
 exec.c|  114 +-
 gdbstub.c |  100 
 gdbstub.h |   16 +-
 gen-icount.h  |8 +-
 hw/alpha_dp264.c  |2 +-
 hw/alpha_sys.h|2 +-
 hw/alpha_typhoon.c|   14 +-
 hw/an5206.c   |2 +-
 hw/apic.h |2 +-
 hw/arm-misc.h |8 +-
 hw/arm_boot.c |   10 +-
 hw/arm_pic.c  |4 +-
 hw/armv7m.c   |4 +-
 hw/axis_dev88.c   |2 +-
 hw/cris-boot.c|6 +-
 hw/cris-boot.h|2 +-
 hw/cris_pic_cpu.c |4 +-
 hw/dummy_m68k.c   |2 +-
 hw/etraxfs.h  |2 +-
 hw/etraxfs_ser.c  |4 +-
 hw/exynos4210.h   |2 +-
 hw/grlib.h|2 +-
 hw/highbank.c |8 +-
 hw/integratorcp.c |2 +-
 hw/kvm/apic.c |2 +-
 hw/kvmvapic.c |   22 +-
 hw/leon3.c|   10 +-
 hw/lm32_boards.c  |   12 +-
 hw/mc146818rtc.c  |2 -
 hw/mcf.h  |4 +-
 hw/mcf5206.c  |4 +-
 hw/mcf5208.c  |2 +-
 hw/mcf_intc.c |4 +-
 hw/microblaze_boot.c  |   10 +-
 hw/microblaze_boot.h  |4 +-
 hw/microblaze_pic_cpu.c   |4 +-
 hw/microblaze_pic_cpu.h   |2 +-
 hw/milkymist.c|   10 +-
 hw/mips_cpudevs.h |4 +-
 hw/mips_fulong2e.c|   12 +-
 hw/mips_int.c |6 +-
 hw/mips_jazz.c|8 +-
 hw/mips_malta.c   |   12 +-
 hw/mips_mipssim.c |8 +-
 hw/mips_r4k.c |8 +-
 hw/mips_timer.c   |   20 +-
 hw/mpc8544_guts.c |2 +-
 hw/musicpal.c |2 +-
 hw/omap.h |2 +-
 hw/omap1.c| 

Re: [Qemu-devel] [PATCH][v2] configure: change endianness test

[Stefan Weil]

Am 14.03.2012 22:37, schrieb Peter Maydell:

On 14 March 2012 21:24, Stefan Weil  wrote:

Contrary to Paul's argument QEMU does not only support a fixed
set of known host architectures, but also unknown hosts (via TCI).
For those, there remains a small chance that they are big endian
and that they get the wrong endianness now. TCI is still experimental,
so I don't care too much about this small deficit.


(speaking with absolutely no idea of the innards of TCI :-))
I think the correct fix for this is that TCI should be portable
code which doesn't care about the host endianness.

-- PMM


TCI does not care, but the rest of QEMU cares.
That's why configure determines the endianness.

Stefan

Re: [Qemu-devel] [PATCH][v2] configure: change endianness test

[Peter Maydell]

On 14 March 2012 21:24, Stefan Weil  wrote:
> Contrary to Paul's argument QEMU does not only support a fixed
> set of known host architectures, but also unknown hosts (via TCI).
> For those, there remains a small chance that they are big endian
> and that they get the wrong endianness now. TCI is still experimental,
> so I don't care too much about this small deficit.

(speaking with absolutely no idea of the innards of TCI :-))
I think the correct fix for this is that TCI should be portable
code which doesn't care about the host endianness.

-- PMM

Re: [Qemu-devel] [PATCH][v2] configure: change endianness test

[Stefan Weil]

Am 14.03.2012 21:37, schrieb Stuart Yoder:

From: Stuart Yoder 

Remove the runtime check for endianness, and for platforms
that can be bit or little endian do a compile time check.

This resolves an issue encountered building QEMU
under Yocto which was not setting --cross-prefix.

Signed-off-by: Stuart Yoder 
---

-v2: removed the dynamic runtime test completely,
added compile time check for mips

configure | 33 -
1 files changed, 8 insertions(+), 25 deletions(-)

diff --git a/configure b/configure
index fe4fc4f..d9c5999 100755
--- a/configure
+++ b/configure
@@ -1269,41 +1269,24 @@ feature_not_found() {
exit 1;
}

-if test -z "$cross_prefix" ; then
-
-# ---
-# big/little endian test
-cat > $TMPC << EOF
-#include 
-int main(int argc, char ** argv){
- volatile uint32_t i=0x01234567;
- return (*((uint8_t*)(&i))) == 0x67;
-}
-EOF
-
-if compile_prog "" "" ; then
-$TMPE && bigendian="yes"
-else
-echo big/little test failed
-fi
-
-else
-
-# if cross compiling, cannot launch a program, so make a static guess
+##
+# endianness check
case "$cpu" in
arm)
- # ARM can be either way; ask the compiler which one we are
if check_define __ARMEB__; then
bigendian=yes
fi
;;
- hppa|m68k|mips|mips64|ppc|ppc64|s390|s390x|sparc|sparc64)
+ mips|mips64)
+ if check_define __MIPSEB__; then
+ bigendian=yes
+ fi
+ ;;
+ hppa|m68k|ppc|ppc64|s390|s390x|sparc|sparc64)
bigendian=yes
;;
esac

-fi
-
##
# NPTL probe



The patch fixes all issues which were addressed in the discussion,
therefore

Reviewed-by: Stefan Weil 

Nevertheless the old test which was removed still might be useful
and could be re-added later in a modified form:

Contrary to Paul's argument QEMU does not only support a fixed
set of known host architectures, but also unknown hosts (via TCI).
For those, there remains a small chance that they are big endian
and that they get the wrong endianness now. TCI is still experimental,
so I don't care too much about this small deficit.

Regards,
Stefan W.

Re: [Qemu-devel] [PATCH 2/7] target-unicore32: Relicense to GPLv2+

[Anthony Liguori]

On 03/14/2012 04:09 PM, Stefan Weil wrote:

Am 14.03.2012 02:39, schrieb Andreas Färber:

Adopt the license text suggested by Guan Xue-tao for all files except
helper.c, to which Anthony Liguori (IBM) contributed a g_malloc() call.

Signed-off-by: Andreas Färber 
Signed-off-by: Guan Xuetao 
Signed-off-by: Stefan Weil 
Signed-off-by: Blue Swirl 
Signed-off-by: Dor Laor 
---
target-unicore32/cpu.h | 5 ++---
target-unicore32/helper.h | 5 ++---
target-unicore32/op_helper.c | 5 ++---
target-unicore32/translate.c | 5 ++---
4 files changed, 8 insertions(+), 12 deletions(-)


Ack. I don't really think that my contribution here is large
enough that my "Acked-by" or "Signed-off-by" is needed,
but if it helps...

As far as I know, at least in German law trivial changes don't
result in a copyright claim. A global search-and-replace operation
which replaces qemu_mallocz by g_malloc0 is trivial and no
obstacle for a license change, so helper.c could be changed as
well(that's my personal opinion).


Nack.

I don't really want to get into the business of splitting hairs here.  We have 
no pressing reason to relicense to GPLv2+ so let's do it right and get the 
appropriate SoBs.


Regards,

Anthony Liguori



Regards,
Stefan W.

Re: [Qemu-devel] [PATCH v2] qom: Introduce object_class_get_list()

[Anthony Liguori]

On 02/25/2012 04:07 PM, Andreas Färber wrote:

This function allows to obtain a singly-linked list of classes, which
can be sorted by the caller.

Signed-off-by: Andreas Färber
Cc: Anthony Liguori


Applied.  Thanks.

Regards,

Anthony Liguori


---
  v1 ->  v2:
  * Instead of object_class_foreach() using a GCompareFunc with a GTree 
internally,
return a GSList so that the caller can sort herself (suggested by Anthony).
  * Add documentation.

  include/qemu/object.h |   11 +++
  qom/object.c  |   17 +
  2 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/include/qemu/object.h b/include/qemu/object.h
index 69e4b7b..ddc3b81 100644
--- a/include/qemu/object.h
+++ b/include/qemu/object.h
@@ -560,6 +560,17 @@ ObjectClass *object_class_by_name(const char *typename);
  void object_class_foreach(void (*fn)(ObjectClass *klass, void *opaque),
const char *implements_type, bool include_abstract,
void *opaque);
+
+/**
+ * object_class_get_list:
+ * @implements_type: The type to filter for, including its derivatives.
+ * @include_abstract: Whether to include abstract classes.
+ *
+ * Returns: A singly-linked list of the classes in reverse hashtable order.
+ */
+GSList *object_class_get_list(const char *implements_type,
+  bool include_abstract);
+
  /**
   * object_ref:
   * @obj: the object
diff --git a/qom/object.c b/qom/object.c
index aa037d2..eef0b22 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -572,6 +572,23 @@ void object_class_foreach(void (*fn)(ObjectClass *klass, 
void *opaque),
  g_hash_table_foreach(type_table_get(), object_class_foreach_tramp,&data);
  }

+static void object_class_get_list_tramp(ObjectClass *klass, void *opaque)
+{
+GSList **list = opaque;
+
+*list = g_slist_prepend(*list, klass);
+}
+
+GSList *object_class_get_list(const char *implements_type,
+  bool include_abstract)
+{
+GSList *list = NULL;
+
+object_class_foreach(object_class_get_list_tramp,
+ implements_type, include_abstract,&list);
+return list;
+}
+
  void object_ref(Object *obj)
  {
  obj->ref++;

Re: [Qemu-devel] [PATCH V2 0/2] QOM: small object creation fix

[Anthony Liguori]

On 02/28/2012 05:57 AM, Igor Mitsyanko wrote:

Eliminate impossibility of creating objects of types with @instance_size == 0.


Applied all.  Thanks.

Regards,

Anthony Liguori



v1->v2: type's instance size now initialized during type initialization.
 type_class_init() renamed (in additional patch)

Igor Mitsyanko (2):
   qom: if @instance_size==0, assign size of object to parent object
 size
   qom/object.c: rename type_class_init() to type_initialize()

  qom/object.c |   27 +--
  1 files changed, 21 insertions(+), 6 deletions(-)

Re: [Qemu-devel] [PATCH] kvmvapic: align start address as well as size

[Anthony Liguori]

On 03/06/2012 09:50 AM, Avi Kivity wrote:

The kvmvapic code remaps a section of ROM as RAM to allow the guest to
maintain state there.  It is careful to align the section size to a page
boundary, to avoid creating subpages, but neglects to do the same for
the start address.  These leads to an assert later on when the memory
core tries to create a page which is half RAM and half ROM.

Fix by aligning the start address to a page boundary.

This can be triggered by running qemu-system-x86_64 -enable-kvm -vga none.

Signed-off-by: Avi Kivity


Applied.  Thanks.

Regards,

Anthony Liguori


---
  hw/kvmvapic.c |4 +++-
  1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c
index 36ccfbc..e8bfeec 100644
--- a/hw/kvmvapic.c
+++ b/hw/kvmvapic.c
@@ -578,8 +578,10 @@ static void vapic_map_rom_writable(VAPICROMState *s)
  rom_size = ram[rom_paddr + 2] * ROM_BLOCK_SIZE;
  s->rom_size = rom_size;

-/* We need to round up to avoid creating subpages
+/* We need to round to avoid creating subpages
   * from which we cannot run code. */
+rom_size += rom_paddr&  ~TARGET_PAGE_MASK;
+rom_paddr&= TARGET_PAGE_MASK;
  rom_size = TARGET_PAGE_ALIGN(rom_size);

  memory_region_init_alias(&s->rom, "kvmvapic-rom", section.mr, rom_paddr,

Re: [Qemu-devel] [PATCH 2/7] target-unicore32: Relicense to GPLv2+

[Stefan Weil]

Am 14.03.2012 02:39, schrieb Andreas Färber:

Adopt the license text suggested by Guan Xue-tao for all files except
helper.c, to which Anthony Liguori (IBM) contributed a g_malloc() call.

Signed-off-by: Andreas Färber 
Signed-off-by: Guan Xuetao 
Signed-off-by: Stefan Weil 
Signed-off-by: Blue Swirl 
Signed-off-by: Dor Laor 
---
target-unicore32/cpu.h | 5 ++---
target-unicore32/helper.h | 5 ++---
target-unicore32/op_helper.c | 5 ++---
target-unicore32/translate.c | 5 ++---
4 files changed, 8 insertions(+), 12 deletions(-)


Ack. I don't really think that my contribution here is large
enough that my "Acked-by" or "Signed-off-by" is needed,
but if it helps...

As far as I know, at least in German law trivial changes don't
result in a copyright claim. A global search-and-replace operation
which replaces qemu_mallocz by g_malloc0 is trivial and no
obstacle for a license change, so helper.c could be changed as
well(that's my personal opinion).

Regards,
Stefan W.

[Qemu-devel] [PATCH][v2] configure: change endianness test

[Stuart Yoder]

From: Stuart Yoder 

Remove the runtime check for endianness, and for platforms
that can be bit or little endian do a compile time check.

This resolves an issue encountered building QEMU
under Yocto which was not setting --cross-prefix.

Signed-off-by: Stuart Yoder 
---

-v2: removed the dynamic runtime test completely,
 added compile time check for mips

 configure |   33 -
 1 files changed, 8 insertions(+), 25 deletions(-)

diff --git a/configure b/configure
index fe4fc4f..d9c5999 100755
--- a/configure
+++ b/configure
@@ -1269,41 +1269,24 @@ feature_not_found() {
   exit 1;
 }
 
-if test -z "$cross_prefix" ; then
-
-# ---
-# big/little endian test
-cat > $TMPC << EOF
-#include 
-int main(int argc, char ** argv){
-volatile uint32_t i=0x01234567;
-return (*((uint8_t*)(&i))) == 0x67;
-}
-EOF
-
-if compile_prog "" "" ; then
-$TMPE && bigendian="yes"
-else
-echo big/little test failed
-fi
-
-else
-
-# if cross compiling, cannot launch a program, so make a static guess
+##
+# endianness check
 case "$cpu" in
   arm)
-# ARM can be either way; ask the compiler which one we are
 if check_define __ARMEB__; then
   bigendian=yes
 fi
   ;;
-  hppa|m68k|mips|mips64|ppc|ppc64|s390|s390x|sparc|sparc64)
+  mips|mips64)
+if check_define __MIPSEB__; then
+  bigendian=yes
+fi
+  ;;
+  hppa|m68k|ppc|ppc64|s390|s390x|sparc|sparc64)
 bigendian=yes
   ;;
 esac
 
-fi
-
 ##
 # NPTL probe
 
-- 
1.7.3.4

Re: [Qemu-devel] [PATCH RFC v4 13/44] target-alpha: Don't overuse CPUState

[Peter Maydell]

On 14 March 2012 20:50, Andreas Färber  wrote:
> Peter's Acked-by was added manually, so if re-running the script due to
> conflicts it would need to be re-added.

Or you could just drop it, I don't pay that much attention :-)

-- PMM

Re: [Qemu-devel] [PATCH RFC v4 13/44] target-alpha: Don't overuse CPUState

[Andreas Färber]

Am 13.03.2012 19:10, schrieb Anthony Liguori:
> On 03/09/2012 08:27 PM, Andreas Färber wrote:
>> Scripted conversion:
>>sed -i "s/CPUState/CPUAlphaState/g" target-alpha/*.[hc]
>>sed -i "s/#define CPUAlphaState/#define CPUState/" target-alpha/cpu.h
> 
> Acked-by: Anthony Liguori 
> 
> For 13-42.

Thanks, I applied yours by modifying my script. Attached.

Peter's Acked-by was added manually, so if re-running the script due to
conflicts it would need to be re-added.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg


git-cpustate.sh
Description: application/shellscript

Re: [Qemu-devel] [PATCH 1/2] qemu-iotests: Fix call syntax for qemu-img

[Stefan Weil]

Am 14.03.2012 20:08, schrieb Eric Blake:

On 03/14/2012 12:57 PM, Stefan Weil wrote:

qemu-img requires first options, then file name, then size.

GNU getopt also allows options at the end, but POSIX getopt
doesn't. Try "export POSIXLY_CORRECT=y" to get the POSIX
behaviour with GNU getopt, too.


That's a heavy sledgehammer, that has the potential to affect a lot of
other programs called alongside qemu-img. Simpler would be to just pass
-- in the command line at the point where you want to force qemu to
treat all further arguments without getopt reordering them, as in:


I did not want to suggest that POSIXLY_CORRECT should always
be set. It's just a way how maintainers can test that there is
a problem with the current code, and that this problem is
fixed by my patch.

Passing -- in the command line will not only stop argument
reordering, it also stops argument parsing which is not
what we need here.

Regards,

Stefan W.

Re: [Qemu-devel] [PATCH RFC v4 44/44] qom: Introduce CPU class

[Anthony Liguori]

On 03/14/2012 03:37 PM, Andreas Färber wrote:

Am 14.03.2012 21:37, schrieb Igor Mitsyanko:

On 13.03.2012 3:13 PM, Andreas Färber wrote:


I never heard anyone wanting to generalize reset so far. I don't think
it belongs into Object at least. Maybe DeviceState. Anthony? Paolo?



We can have a special object for this, let's call it ResetLine for
example, with methods ResetLine::connect, ResetLine::assert or something
like that. Different ResetLine objects could trigger reset of different
sets of subdevices, just like real hardware can have several reset types
(for example, STM32 has 3 different reset types).


Anthony provided a Reviewed-by, and given that this is a direct
conversion of cpu_reset() ->  cpu_state_reset() ->  CPUState::reset(), I
am preparing a PULL for this series tonight. That does not mean that the
code must stay like this forever. :)

cpu_reset() only handles the full reset of one CPU, as I understand, and
is called both at startup and at machine-level reset.

Anthony's Pin object, as qemu_irq successor, was planned post-4th QOM
series, I believe. -- "Small steps, Allie."


Ack.

Regards,

Anthony Liguori



Andreas

Re: [Qemu-devel] [PATCH v2 1/3] Add support for 64bit ARM system registers

[Peter Maydell]

On 14 March 2012 19:38, Michael Roth  wrote:
> On Wed, Mar 14, 2012 at 10:09:09PM +0300, Alexey Starikovskiy wrote:
>> Do I need to do anything beside following or not?
>
> Not sure, ARM folks?
>
> My suggestion would be to lose the the catch-all -EINVAL error we
> throw in machine.c:cpu_load() when version_id != CPU_SAVE_VERSION
> and only conditionally load 64-bit registers if the source's
> version_id >= CPU_SAVE_VERSION. But we've never done that in the
> past, and we broke old->new as recently as 2 months ago so I'm not
> sure it's worth it since there hasn't been a release since then.

My position at the moment is that old->new migration on ARM is
not supported and further that we make no attempt to avoid version
bumps. At some point as KVM-on-ARM gets towards being complete
we'll have to start worrying about compatibility, but at the moment
I really don't think that either (a) all the devices have tested
and working migration state or (b) we have a CPUState that's actually
in good enough shape[*] that we can reasonably start to insist on
not breaking cross-version migration.

So migration-wise I have no problem with the patch as it stands.
(I have other issues with it I suspect but haven't got to reviewing
it yet.)

[*] as an example of the kind of problem I'd like to see a solution
for, there's no reason that adding support for a new feature like
LPAE should require the migration state for non-LPAE CPUs to change,
but as things stand it does.

-- PMM

Re: [Qemu-devel] [PATCH RFC v4 44/44] qom: Introduce CPU class

[Andreas Färber]

Am 14.03.2012 21:37, schrieb Igor Mitsyanko:
> On 13.03.2012 3:13 PM, Andreas Färber wrote:
> 
>> I never heard anyone wanting to generalize reset so far. I don't think
>> it belongs into Object at least. Maybe DeviceState. Anthony? Paolo?
>>
> 
> We can have a special object for this, let's call it ResetLine for
> example, with methods ResetLine::connect, ResetLine::assert or something
> like that. Different ResetLine objects could trigger reset of different
> sets of subdevices, just like real hardware can have several reset types
> (for example, STM32 has 3 different reset types).

Anthony provided a Reviewed-by, and given that this is a direct
conversion of cpu_reset() -> cpu_state_reset() -> CPUState::reset(), I
am preparing a PULL for this series tonight. That does not mean that the
code must stay like this forever. :)

cpu_reset() only handles the full reset of one CPU, as I understand, and
is called both at startup and at machine-level reset.

Anthony's Pin object, as qemu_irq successor, was planned post-4th QOM
series, I believe. -- "Small steps, Allie."

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH] kvmvapic: align start address as well as size

[Anthony Liguori]

On 03/06/2012 09:50 AM, Avi Kivity wrote:

The kvmvapic code remaps a section of ROM as RAM to allow the guest to
maintain state there.  It is careful to align the section size to a page
boundary, to avoid creating subpages, but neglects to do the same for
the start address.  These leads to an assert later on when the memory
core tries to create a page which is half RAM and half ROM.

Fix by aligning the start address to a page boundary.

This can be triggered by running qemu-system-x86_64 -enable-kvm -vga none.

Signed-off-by: Avi Kivity


Tested-by: Anthony Liguori 

Are you going to do a PULL request or do you want me to apply directly?

Regards,

Anthony Liguori


---
  hw/kvmvapic.c |4 +++-
  1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c
index 36ccfbc..e8bfeec 100644
--- a/hw/kvmvapic.c
+++ b/hw/kvmvapic.c
@@ -578,8 +578,10 @@ static void vapic_map_rom_writable(VAPICROMState *s)
  rom_size = ram[rom_paddr + 2] * ROM_BLOCK_SIZE;
  s->rom_size = rom_size;

-/* We need to round up to avoid creating subpages
+/* We need to round to avoid creating subpages
   * from which we cannot run code. */
+rom_size += rom_paddr&  ~TARGET_PAGE_MASK;
+rom_paddr&= TARGET_PAGE_MASK;
  rom_size = TARGET_PAGE_ALIGN(rom_size);

  memory_region_init_alias(&s->rom, "kvmvapic-rom", section.mr, rom_paddr,

[Qemu-devel] [Bug 918791] Re: qemu-kvm dies when using vmvga driver and unity in the guest

[Launchpad Bug Tracker]

This bug was fixed in the package qemu-kvm - 1.0+noroms-0ubuntu7

---
qemu-kvm (1.0+noroms-0ubuntu7) precise; urgency=low

  [ Dave Walker ]
  * debian/patches/expose_vmx_qemu64cpu.patch: Expose VMX cpuid feature to the
default "qemu64" CPU type, supporting Intel compatible VMX nested
virtualization.

  [ Serge Hallyn ]
  * debian/patches/fix-vmware-vga-negative-vals - if x or y < 0, set them to 0
(and decrement width/height accordingly)  (LP: #918791)
 -- Serge HallynWed, 14 Mar 2012 14:52:44 -0500

** Changed in: qemu-kvm (Ubuntu Precise)
   Status: Confirmed => Fix Released

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/918791

Title:
  qemu-kvm dies when using vmvga driver and unity in the guest

Status in QEMU:
  New
Status in “qemu-kvm” package in Ubuntu:
  Fix Released
Status in “xserver-xorg-video-vmware” package in Ubuntu:
  Confirmed
Status in “qemu-kvm” source package in Precise:
  Fix Released
Status in “xserver-xorg-video-vmware” source package in Precise:
  Confirmed

Bug description:
  12.04's qemu-kvm has been unstable for me and Marc Deslauriers and I
  figured out it has something to do with the interaction of qemu-kvm,
  unity and the vmvga driver. This is a regression over qemu-kvm in
  11.10.

  TEST CASE:
  1. start a VM that uses unity (eg, 11.04, 11.10 or 12.04). My tests use 
unity-2d on an amd64 host and amd64 guests
  2. on 11.04 and 11.10, open empathy via the messaging indicator and click 
'Chat'. On 12.04, open empathy via the messaging indicator and click 'Chat', 
close the empathy wizard, move the empathy window over the unity luancher (so 
it autohides), then do 'ctrl+alt+t' to open a terminal

  When the launcher tries to auto(un)hide, qemu-kvm dies with this:
  [10574.958149] do_general_protection: 132 callbacks suppressed
  [10574.958154] kvm[13192] general protection ip:7fab9680ea0f sp:74440148 
error:0 in qemu-system-x86_64[7fab966c4000+2c9000]

  Relevant libvirt xml:
  


  

  If I change to using 'cirrus', then qemu-kvm no longer crashes. Eg:
  



  

  The workaround is therefore to use the cirrus driver instead of vmvga,
  however being able to kill qemu-kvm in this manner is not ideal. Also,
  unfortunately unity-2d does not run with with cirrus driver under
  11.04, so the security and SRU teams are unable to properly test
  updates in GUI applications under unity when using the current 12.04
  qemu-kvm.

  I tried to report this via apport, but apport complained about a CRC
  error, so I could not.

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/918791/+subscriptions

Re: [Qemu-devel] [Bug 948675] [NEW] QEMU is crashing when called with "-vga none"

[Fabiano Fidêncio]

Anthony,

See http://thread.gmane.org/gmane.comp.emulators.qemu/139580

This patch (from Avi) fix the problem, at least, in my case.

On Wed, Mar 14, 2012 at 4:59 PM, Anthony Liguori  wrote:
> On 03/06/2012 10:22 PM, fidencio wrote:
>>
>> Public bug reported:
>>
>> QEMU is crashing when called with "-vga none". This regression was
>> inserted in e5ad936b0fd7dfd7fd7908be6f9f1ca88f63b96b.
>>
>> QEMU line:
>> /home/fidencio/dev/bin/qemu-system-x86_64 -enable-kvm -m 1024 -kernel
>> /home/fidencio/src/linux-2.6/arch/x86_64/boot/bzImage -append "root=nfs rw
>> nfsrootdebug console=ttyS0
>> ip=192.168.122.2:192.168.122.1:192.168.122.1:255.255.255.0
>> nfsroot=192.168.122.1:/home/fidencio/fedora14-minimal" -device e1000,vlan=0
>> -serial stdio -net tap,script=/home/fidencio/dev/etc/qemu-ifup -vga none
>
>
> I can confirm this was introduced in:
>
> commit e5ad936b0fd7dfd7fd7908be6f9f1ca88f63b96b
> Author: Jan Kiszka 
> Date:   Fri Feb 17 18:31:19 2012 +0100
>
>    kvmvapic: Introduce TPR access optimization for Windows guests
>
> For me, this results in a SEGV until:
>
> commit bf75fec175d00885c7ae06e5917bde86110c386a
> Merge: 9f1d43b 7e68075
> Author: Anthony Liguori 
> Date:   Fri Mar 9 12:29:55 2012 -0600
>
>    Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
>
>    * qemu-kvm/uq/master:
>      kvm: fill in padding to help valgrind
>      kvm: x86: Add user space part for in-kernel i8254
>      kvm: Add kvm_has_pit_state2 helper
>      i8254: Open-code timer restore
>      i8254: Factor out base class for KVM reuse
>
> Which then turns it into:
>
> /home/anthony/build/qemu/x86_64-softmmu/qemu-system-x86_64 -kernel
> bin/vmlinuz-3.0 -initrd .tmp-20604/initramfs-20604.img.gz -append
> console=ttyS0 seed=8631 -drive
> file=.tmp-20604/disk-20604.img,if=none,snapshot=on,id=hd0 -device
> virtio-balloon-pci,addr=03.0 -device virtio-blk-pci,addr=04.0,drive=hd0
> -nographic -nodefconfig -m 1G -no-reboot -no-hpet -device virtio-serial
> -chardev socket,path=.tmp-20604/channel-20604.sock,id=channel0,server,nowait
> -device virtserialport,chardev=channel0,name=org.libguestfs.channel.0
> -nodefaults -serial stdio -enable-kvm -pidfile .tmp-20604/pidfile-20604.pid
> -qmp unix:.tmp-20604/qmpsock-20604.sock,server,nowait
> KVM internal error. Suberror: 1
> emulation failure
> EAX=aa55 EBX= ECX= EDX=
> ESI= EDI= EBP= ESP=6f78
> EIP=003c EFL=00010202 [---] CPL=0 II=0 A20=1 SMM=0 HLT=0
> ES =   9300
> CS =c300 000c3000  9b00
> SS =   9300
> DS =   9300
> FS =   9300
> GS =   9300
> LDT=   8200
> TR =   8b00
> GDT=     000fcd78 0037
> IDT=      03ff
> CR0=0010 CR2= CR3= CR4=
> DR0= DR1= DR2=
> DR3=
> DR6=0ff0 DR7=0400
> EFER=
> Code=00 00 7c 02 81 02 00 00 00 00 00 00 00 00 3c 00 00 00 00 00 <8c> c8 8e
> d8 fa fc e9 91 00 b8 16 00 ba 10 05 ef ba 11 05 ec 66 c1 e0 08 ec 66 c1 e0
> 08 ec
>
> A simple test case to reproduce:
>
> x86_64-softmmu/qemu-system-x86_64 -nographic -nodefconfig -enable-kvm
> -nodefaults -kernel /boot/vmlinuz-2.6.32-29-generic
>
> I've tried multiple guest kernel versions and they all reproduce (not
> surprising since EIP is still in SeaBIOS here).
>
> This also happens with the very latest SeaBIOS release.
>
> Regards,
>
> Anthony Liguori
>
>
>>
>> Backtrace:
>> #0  0x557ac976 in is_romd (pd=2048)
>>     at /home/fidencio/src/qemu/exec.c:2110
>> #1  0x557ac9e3 in is_ram_rom_romd (pd=804864)
>>     at /home/fidencio/src/qemu/exec.c:2115
>> #2  0x557ad05a in cpu_register_physical_memory_log (section=
>>     0x72daf6f0, readable=true, readonly=false)
>>     at /home/fidencio/src/qemu/exec.c:2587
>> #3  0x557e4d47 in as_memory_range_add (as=0x55c34980, fr=
>>     0x7fffec002950) at /home/fidencio/src/qemu/memory.c:317
>> #4  0x557e6b49 in address_space_update_topology_pass (as=
>>     0x55c34980, old_view=..., new_view=..., adding=true)
>>     at /home/fidencio/src/qemu/memory.c:763
>> #5  0x557e6c3f in address_space_update_topology
>> (as=0x55c34980)
>>     at /home/fidencio/src/qemu/memory.c:779
>> #6  0x557e6d0c in memory_region_update_topology
>> (mr=0x5646d2c0)
>>     at /home/fidencio/src/qemu/memory.c:798
>> #7  0x557e8e16 in memory_region_add_subregion_common (mr=
>>     0x5646d2c0, offset=792576, subregion=0x564a6130)
>>     at /home/fidencio/src/qemu/memory.c:1352
>> #8  0x557e8ede in memory_region_add_subregion_overlap (mr=
>>     0x5646d2c0, offset=792576, subregion=0x564a6130,
>> priority=1000)
>>     at /home/fidencio/src/qemu/memory.c:1372
>> #9  0x557dfebe in vapic_map_rom_writable (s=

Re: [Qemu-devel] [PATCH 2/7] target-unicore32: Relicense to GPLv2+

[Blue Swirl]

On Wed, Mar 14, 2012 at 01:39, Andreas Färber  wrote:
> Adopt the license text suggested by Guan Xue-tao for all files except
> helper.c, to which Anthony Liguori (IBM) contributed a g_malloc() call.
>
> Signed-off-by: Andreas Färber 
> Signed-off-by: Guan Xuetao 
> Signed-off-by: Stefan Weil 
> Signed-off-by: Blue Swirl 

Ack.

> Signed-off-by: Dor Laor 
> ---
>  target-unicore32/cpu.h       |    5 ++---
>  target-unicore32/helper.h    |    5 ++---
>  target-unicore32/op_helper.c |    5 ++---
>  target-unicore32/translate.c |    5 ++---
>  4 files changed, 8 insertions(+), 12 deletions(-)
>
> diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
> index a3f8589..9cbee7a 100644
> --- a/target-unicore32/cpu.h
> +++ b/target-unicore32/cpu.h
> @@ -3,9 +3,8 @@
>  *
>  * Copyright (C) 2010-2011 GUAN Xue-tao
>  *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> + * This program is licensed under the terms of the GNU GPL, version 2 or
> + * later. See the COPYING file in the top-level directory.
>  */
>  #ifndef __CPU_UC32_H__
>  #define __CPU_UC32_H__
> diff --git a/target-unicore32/helper.h b/target-unicore32/helper.h
> index 615de2a..5aa7de8 100644
> --- a/target-unicore32/helper.h
> +++ b/target-unicore32/helper.h
> @@ -1,9 +1,8 @@
>  /*
>  * Copyright (C) 2010-2011 GUAN Xue-tao
>  *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> + * This program is licensed under the terms of the GNU GPL, version 2 or
> + * later. See the COPYING file in the top-level directory.
>  */
>  #include "def-helper.h"
>
> diff --git a/target-unicore32/op_helper.c b/target-unicore32/op_helper.c
> index 638a020..9fc2b1f 100644
> --- a/target-unicore32/op_helper.c
> +++ b/target-unicore32/op_helper.c
> @@ -3,9 +3,8 @@
>  *
>  * Copyright (C) 2010-2011 GUAN Xue-tao
>  *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> + * This program is licensed under the terms of the GNU GPL, version 2 or
> + * later. See the COPYING file in the top-level directory.
>  */
>  #include "cpu.h"
>  #include "dyngen-exec.h"
> diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
> index 3b3ba16..c01e636 100644
> --- a/target-unicore32/translate.c
> +++ b/target-unicore32/translate.c
> @@ -3,9 +3,8 @@
>  *
>  * Copyright (C) 2010-2011 GUAN Xue-tao
>  *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> + * This program is licensed under the terms of the GNU GPL, version 2 or
> + * later. See the COPYING file in the top-level directory.
>  */
>  #include 
>  #include 
> --
> 1.7.7
>