[Qemu-devel] [PATCH] pc: limit 64 bit hole to 2G by default
It turns out that some 32 bit windows guests crash if 64 bit PCI hole size is 2G. Limit it to 2G for piix and q35 by default, add properties to let management override the hole size. Examples: -global i440FX-pcihost.pci_hole64_size=137438953472 -global q35-pcihost.pci_hole64_size=137438953472 Reported-by: Igor Mammedov imamm...@redhat.com, Signed-off-by: Michael S. Tsirkin m...@redhat.com --- hw/i386/pc.c | 35 --- hw/i386/pc_piix.c | 14 +- hw/pci-host/piix.c| 42 ++ hw/pci-host/q35.c | 29 + include/hw/i386/pc.h | 7 +-- include/hw/pci-host/q35.h | 1 + 6 files changed, 78 insertions(+), 50 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a7c578f..9cc0fda 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1072,27 +1072,32 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, memset(guest_info-found_cpus, 0, sizeof guest_info-found_cpus); qemu_for_each_cpu(pc_set_cpu_guest_info, guest_info); -guest_info-pci_info.w32.end = IO_APIC_DEFAULT_ADDRESS; -if (sizeof(hwaddr) == 4) { -guest_info-pci_info.w64.begin = 0; -guest_info-pci_info.w64.end = 0; -} else { +guest_info_state-machine_done.notify = pc_guest_info_machine_done; +qemu_add_machine_init_done_notifier(guest_info_state-machine_done); +return guest_info; +} + +void pc_init_pci_info(PcPciInfo *pci_info, + uint64_t pci_hole64_start, + uint64_t pci_hole64_size) +{ +pci_info-w32.end = IO_APIC_DEFAULT_ADDRESS; + +if (pci_hole64_size ((0x1 30) - 1)) { +error_report(Invalid value for pci_hole64_size: + must be a multiple of 1G. Rounding up.); +} +pci_hole64_size = ROUND_UP(pci_hole64_size, 0x1ULL 30); + /* * BIOS does not set MTRR entries for the 64 bit window, so no need to * align address to power of two. Align address at 1G, this makes sure * it can be exactly covered with a PAT entry even when using huge * pages. */ -guest_info-pci_info.w64.begin = -ROUND_UP((0x1ULL 32) + above_4g_mem_size, 0x1ULL 30); -guest_info-pci_info.w64.end = guest_info-pci_info.w64.begin + -(0x1ULL 31); -assert(guest_info-pci_info.w64.begin = guest_info-pci_info.w64.end); -} - -guest_info_state-machine_done.notify = pc_guest_info_machine_done; -qemu_add_machine_init_done_notifier(guest_info_state-machine_done); -return guest_info; +pci_info-w64.begin = ROUND_UP(pci_hole64_start, 0x1ULL 30); +pci_info-w64.end = pci_info-w64.begin + pci_hole64_size; +assert(pci_info-w64.begin = pci_info-w64.end); } void pc_acpi_init(const char *default_dsdt) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 76df42b..da61fa3 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -137,15 +137,6 @@ static void pc_init1(MemoryRegion *system_memory, guest_info-has_pci_info = has_pci_info; -/* Set PCI window size the way seabios has always done it. */ -/* Power of 2 so bios can cover it with a single MTRR */ -if (ram_size = 0x8000) -guest_info-pci_info.w32.begin = 0x8000; -else if (ram_size = 0xc000) -guest_info-pci_info.w32.begin = 0xc000; -else -guest_info-pci_info.w32.begin = 0xe000; - /* allocate ram and load rom/bios */ if (!xen_enabled()) { fw_cfg = pc_memory_init(system_memory, @@ -169,10 +160,7 @@ static void pc_init1(MemoryRegion *system_memory, below_4g_mem_size, 0x1ULL - below_4g_mem_size, 0x1ULL + above_4g_mem_size, - (sizeof(hwaddr) == 4 - ? 0 - : ((uint64_t)1 62)), - pci_memory, ram_memory); + pci_memory, ram_memory, guest_info); } else { pci_bus = NULL; i440fx_state = NULL; diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 7fb2fb1..963b3d8 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -40,6 +41,7 @@ typedef struct I440FXState { PCIHostState parent_obj; +uint64_t pci_hole64_size; } I440FXState; #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ @@ -234,9 +236,9 @@ static PCIBus *i440fx_common_init(const char *device_name, hwaddr pci_hole_start, hwaddr pci_hole_size, hwaddr pci_hole64_start, - hwaddr pci_hole64_size, MemoryRegion *pci_address_space, - MemoryRegion
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
Il 24/07/2013 03:28, liu ping fan ha scritto: On Tue, Jul 23, 2013 at 6:30 PM, Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 04:53, liu ping fan ha scritto: The scenior I can figure out is if adopting timeout of poll, then when changing the deadline, we need to invoke poll, and set the new timeout, right? Yes, you need to call aio_notify so that poll is reinvoked. I try to list the difference between alarm_timer and timeout of poll. It includes thread-affinity, resolution and easy-use. Most of all, thread-affinity The main issue with alarm timer is the affinity of timer_t with threads. For linux, SIGEV_THREAD_ID has been supported for a very long time and we already associate the signal with the specified thread. So the only issue is left for other unix, we can emulate the affinity by using SIGEV_THREAD and repost the event to the specified thread. As to timeout of poll, it has the affinity of threads. Resolution: alarm_timer provides higher resolution, but do we care about it? With ppoll, is this true or just hearsay? (Without ppoll, indeed setitimer has 1 us resolution while poll has 1 ms; too bad that select has other problems, because select has also 1 us resolution). Paolo easy-use: The reset of the deadline as mentioned. Finally, I admit timeout of poll will save large chunk of platform-related code.
Re: [Qemu-devel] trim in windows guest witch virtio
Il 24/07/2013 02:53, Libaiqing ha scritto: Hi paolo, I test window guest with ide device with the following config,trim with ide drive failed. 1 The host fs is ext4 with discard option: /dev/sdb1 on /home/sdb type ext4 (rw,relatime,discard,data=ordered) 2 qemu config : ide drive with discard open x86_64-softmmu/qemu-system-x86_64 -enable-kvm -name win7 -M pc-0.15 -m 1024 -smp 2 -boot c -device piix3-usb-uhci,id=usb,bus=pci.0,addr=0x1.0x2 -drive file=/home/win7_base.qcow2,if=ide,index=0,format=qcow2,id=ad -drive file=/home/sdb/raw.img,if=ide,index=1,format=raw,id=hd,discard=on -monitor stdio -vga qxl -vnc :1 -device usb-tablet,id=input0 TRIM is supported only on -M pc-1.5 and -M pc. 3 In win7 guest,init drive d,fill it with files,then shift+del files 4 The file /home/sdb/raw.img does not become small,when listing with -s option. It seems that the windows ntfs does not send trim to ide controller. No IDE_DMA_TRIM request received. Note that this may not happen immediately. NTFS may send TRIM later. Is there any config wrong? Btw,I found the info from the URL: http://msdn.microsoft.com/en-us/library/windows/desktop/hh848053(v=vs.85).aspx Qemu can do the same thing like hyper-v with windows guest? I don't know, I never tested it with Windows guests. It looks like Windows 8 would not need a filter driver to do TRIM on SCSI disks (you could try with megasas, so that you do not need a driver for the HBA). Paolo
Re: [Qemu-devel] [PATCH] pc: limit 64 bit hole to 2G by default
Hi, Am 24.07.2013 08:01, schrieb Michael S. Tsirkin: It turns out that some 32 bit windows guests crash if 64 bit PCI hole size is 2G. Limit it to 2G for piix and q35 by default, add properties to let management override the hole size. Examples: -global i440FX-pcihost.pci_hole64_size=137438953472 -global q35-pcihost.pci_hole64_size=137438953472 Reported-by: Igor Mammedov imamm...@redhat.com, Signed-off-by: Michael S. Tsirkin m...@redhat.com --- hw/i386/pc.c | 35 --- hw/i386/pc_piix.c | 14 +- hw/pci-host/piix.c| 42 ++ hw/pci-host/q35.c | 29 + include/hw/i386/pc.h | 7 +-- include/hw/pci-host/q35.h | 1 + 6 files changed, 78 insertions(+), 50 deletions(-) [...] diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 7fb2fb1..963b3d8 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -40,6 +41,7 @@ typedef struct I440FXState { PCIHostState parent_obj; +uint64_t pci_hole64_size; } I440FXState; #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ @@ -234,9 +236,9 @@ static PCIBus *i440fx_common_init(const char *device_name, hwaddr pci_hole_start, hwaddr pci_hole_size, hwaddr pci_hole64_start, - hwaddr pci_hole64_size, MemoryRegion *pci_address_space, - MemoryRegion *ram_memory) + MemoryRegion *ram_memory, + PcGuestInfo *guest_info) { DeviceState *dev; PCIBus *b; @@ -245,15 +247,31 @@ static PCIBus *i440fx_common_init(const char *device_name, PIIX3State *piix3; PCII440FXState *f; unsigned i; +I440FXState *i440fx; dev = qdev_create(NULL, i440FX-pcihost); s = PCI_HOST_BRIDGE(dev); +i440fx = OBJECT_CHECK(I440FXState, dev, i440FX-pcihost); If we're lacking a macro for this, please define one. E.g.: #define TYPE_I440FX i440FX-pcihost #define I440FX(obj) OBJECT_CHECK(I440FXState, (obj), TYPE_I440FX) above I440FXState. i440fx = I440FX(dev); So far was unused due to PCI_HOST_BRIDGE(), I guess. b = pci_bus_new(dev, NULL, pci_address_space, address_space_io, 0, TYPE_PCI_BUS); s-bus = b; object_property_add_child(qdev_get_machine(), i440fx, OBJECT(dev), NULL); qdev_init_nofail(dev); +if (guest_info) { +/* Set PCI window size the way seabios has always done it. */ +/* Power of 2 so bios can cover it with a single MTRR */ +if (ram_size = 0x8000) +guest_info-pci_info.w32.begin = 0x8000; +else if (ram_size = 0xc000) +guest_info-pci_info.w32.begin = 0xc000; +else +guest_info-pci_info.w32.begin = 0xe000; + +pc_init_pci_info(guest_info-pci_info, + pci_hole64_start, i440fx-pci_hole64_size); +} + d = pci_create_simple(b, 0, device_name); *pi440fx_state = I440FX_PCI_DEVICE(d); f = *pi440fx_state; @@ -265,8 +283,8 @@ static PCIBus *i440fx_common_init(const char *device_name, memory_region_add_subregion(f-system_memory, pci_hole_start, f-pci_hole); memory_region_init_alias(f-pci_hole_64bit, OBJECT(d), pci-hole64, f-pci_address_space, - pci_hole64_start, pci_hole64_size); -if (pci_hole64_size) { + pci_hole64_start, i440fx-pci_hole64_size); +if (i440fx-pci_hole64_size) { memory_region_add_subregion(f-system_memory, pci_hole64_start, f-pci_hole_64bit); } @@ -322,8 +340,8 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, hwaddr pci_hole_start, hwaddr pci_hole_size, hwaddr pci_hole64_start, -hwaddr pci_hole64_size, -MemoryRegion *pci_memory, MemoryRegion *ram_memory) +MemoryRegion *pci_memory, MemoryRegion *ram_memory, +PcGuestInfo *guest_info) { PCIBus *b; @@ -332,8 +350,9 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, piix3_devfn, isa_bus, pic, address_space_mem, address_space_io, ram_size, pci_hole_start, pci_hole_size, - pci_hole64_start, pci_hole64_size, - pci_memory, ram_memory); + pci_hole64_start, + pci_memory, ram_memory, + guest_info); return b;
Re: [Qemu-devel] [PATCH] pc: limit 64 bit hole to 2G by default
On 07/24/13 08:01, Michael S. Tsirkin wrote: It turns out that some 32 bit windows guests crash if 64 bit PCI hole size is 2G. Ah, *that* is the reason for winxp crashing with a 64bit hole. Current seabios uses a slightly different approach: the 64bit hole is present only in case it is actually used to map bars there, and seabios tries to fit everything into the 32bit hole first. Limit it to 2G for piix and q35 by default, add properties to let management override the hole size. Examples: -global i440FX-pcihost.pci_hole64_size=137438953472 Do we really want specify this in bytes? Using megabytes or gigabytes instead looks more sane to me. cheers, Gerd
[Qemu-devel] [RFC] [PATCH] linux-user: implement m68k atomic syscalls
From: Riku Voipio riku.voi...@linaro.org With nptl enabled, atomic_cmpxchg_32 and atomic_barrier system calls are needed. This patch enabled really dummy versions of the system calls, modeled after the m68k kernel code. With this patch I am able to execute m68k binaries with qemu linux-user (busybox compiled for coldfire). Cc: Laurent Vivier laur...@vivier.eu Signed-off-by: Riku Voipio riku.voi...@linaro.org --- linux-user/strace.list | 6 ++ linux-user/syscall.c | 20 2 files changed, 26 insertions(+) diff --git a/linux-user/strace.list b/linux-user/strace.list index 08f115d..4377365 100644 --- a/linux-user/strace.list +++ b/linux-user/strace.list @@ -1524,3 +1524,9 @@ #ifdef TARGET_NR_pipe2 { TARGET_NR_pipe2, pipe2, NULL, NULL, NULL }, #endif +#ifdef TARGET_NR_atomic_cmpxchg_32 +{ TARGET_NR_atomic_cmpxchg_32, atomic_cmpxchg_32, NULL, NULL, NULL }, +#endif +#ifdef TARGET_NR_atomic_barrier +{ TARGET_NR_atomic_barrier, atomic_barrier, NULL, NULL, NULL }, +#endif diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 3f6db4b..a98cec5 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -8990,6 +8990,26 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1, break; } #endif +#ifdef TARGET_NR_atomic_cmpxchg_32 +case TARGET_NR_atomic_cmpxchg_32: +{ +/* should use start_exclusive from main.c */ +abi_ulong mem_value; +if (get_user_u32(mem_value, arg6)) +ret = -TARGET_EFAULT; +if (mem_value == arg2) +put_user_u32(arg1, arg6); +ret = mem_value; +break; +} +#endif +#ifdef TARGET_NR_atomic_barrier +case TARGET_NR_atomic_barrier: +{ +/* Like the kernel implementation and the qemu arm barrier, no-op this? */ +break; +} +#endif default: unimplemented: gemu_log(qemu: Unsupported syscall: %d\n, num); -- 1.8.1.2
Re: [Qemu-devel] [sheepdog] [PATCH 00/11] sheepdog: reconnect server after connection failure
At Tue, 23 Jul 2013 13:08:04 +0200, Luca Lazzeroni wrote: Is this series of patches applyable to sheepdog-stable-0.6 band qemu 1.5.0 ? I've seen they use async i/o... This series is against upstream qemu. I've not tried it with qemu 1.5.x, but probably it can be applied without a big change. Thanks, Kazutaka
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
--On 24 July 2013 08:42:26 +0200 Paolo Bonzini pbonz...@redhat.com wrote: With ppoll, is this true or just hearsay? (Without ppoll, indeed setitimer has 1 us resolution while poll has 1 ms; too bad that select has other problems, because select has also 1 us resolution). Most 'reasonable' POSIX compliant operating systems have ppoll and I would have thought there is /better/ resolution there than relying not only on signal, but also a pipe or eventfd plus the underlying poll(). If it was my comments you are referring to, my concern was mainly about Windows (which I know very little about), as there does not appear to be a nanosecond or even microsecond alternative to WaitForMultipleObjects. However, articles like this: http://social.msdn.microsoft.com/Forums/vstudio/en-US/e8a7cb1e-9edd-4ee3-982e-f66b7bf6ae44/improve-accuracy-waitforsingleobject suggest that WaitFor{Single,Multiple}Objects can have pretty appalling latency anyway (100ms!), and there's no evidence that's limited by making one of the FDs (or objects) ready. In these circumstances, I'd question whether we gain anything by worrying about timer resolution. -- Alex Bligh
Re: [Qemu-devel] [PATCH v2 01/11] block: replace in_use with refcnt_soft and refcnt_hard
On Wed, Jul 24, 2013 at 08:39:53AM +0800, Fam Zheng wrote: On Tue, 07/23 15:34, Stefan Hajnoczi wrote: On Tue, Jul 23, 2013 at 06:32:25PM +0800, Fam Zheng wrote: On Tue, 07/23 11:36, Stefan Hajnoczi wrote: On Wed, Jul 17, 2013 at 05:42:06PM +0800, Fam Zheng wrote: Introduce refcnt_soft (soft reference) and refcnt_hard (hard reference) to BlockDriverState, since in_use mechanism cannot provide proper management of lifecycle when a BDS is referenced in multiple places (e.g. pointed to by another bs's backing_hd while also used as a block job device, in the use case of image fleecing). The original in_use case is considered a hard reference in this patch, where the bs is busy and should not be used in other tasks that require a hard reference. (However the interface doesn't force this, caller still need to call bdrv_in_use() to check by itself.). A soft reference is implemented but not used yet. It will be used in following patches to manage the lifecycle together with hard reference. If bdrv_ref() is called on a BDS, it must be released by exactly the same numbers of bdrv_unref() with the same soft/hard type, and never call bdrv_delete() directly. If the BDS is only used locally (unnamed), bdrv_ref/bdrv_unref can be skipped and just use bdrv_delete(). It is risky to keep bdrv_delete() public. I suggest replacing bdrv_delete() callers with bdrv_unref() and then making bdrv_delete() static in block.c. This way it is impossible to make the mistake of calling bdrv_delete() on a BDS which has refcnt 1. I don't really understand this patch. There are now two separate refcounts. They must both reach 0 for deletion to occur. I think you plan to treat the hard refcount like the in_use counter (there should only be 0 or 1 refs) but you don't enforce it. It seems cleaner to keep in_use separate: let in_use callers take a refcount and also set in_use. OK, I like your ideas, make bdrv_delete private is much cleaner. Will fix in next revision. I plan to make it like this: /* soft ref */ void bdrv_{ref,unref}(bs) /* hard ref */ bool bdrv_hard_{ref,unref}(bs) usage: bs = bdrv_new() implicit bdrv_ref(bs) called ... bdrv_unref(bs) automatically deleted here or with hard ref: bs = bdrv_new() implicit bdrv_ref() called bdrv_hard_ref(bs) ... bdrv_hard_unref(bs) bdrv_unref(bs) automatically deleted here The second bdrv_hard_ref call to a bs returns false, caller check the return value. Why is hard ref necessary when we already have bdrv_in_use()/bdrv_set_in_use()? Keeping the names of bdrv_in_use() and bdrv_set_in_use() is noting wrong, if no more than one hard ref is enforced. However I think we should manage lifecycle with both bdrv_ref and bdrv_set_in_use, so name them both ref sounds consistent: make it clearer to caller both hard ref (in_use) and soft ref preserve the bs from being released. I actually find hard/soft ref naming confusing and prefer keeping bdrv_in_use(). Refcount is for object lifetime whereas in_use is for busy status. Stefan
Re: [Qemu-devel] [sheepdog] [PATCH 03/11] qemu-sockets: make wait_for_connect be invoked in qemu_aio_wait
At Tue, 23 Jul 2013 13:36:08 +0200, Paolo Bonzini wrote: Il 23/07/2013 10:30, MORITA Kazutaka ha scritto: This allows us to use inet_nonblocking_connect() and unix_nonblocking_connect() in block drivers. qemu-ga needs to link block-obj to resolve dependencies of qemu_aio_set_fd_handler(). Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp I'm not sure this is safe. You could have e.g. migration start during qemu_aio_wait(). I thought that it is safe. Qemu creates another thread for migration and it can be started at any time, either way. However, so as not to hurt the existing codes, it might be better to create another nonblocking connect for qemu_aio_wait(). I think of dropping this patch from this series and will leave it for another day. Usually, sheepdog users prepare a local sheepdog daemon to be connected to, and connect() is unlikely to sleep for a long time. Using a blocking connect wouldn't be a big problem. Thanks, Kazutaka
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
Il 24/07/2013 09:31, Alex Bligh ha scritto: --On 24 July 2013 08:42:26 +0200 Paolo Bonzini pbonz...@redhat.com wrote: With ppoll, is this true or just hearsay? (Without ppoll, indeed setitimer has 1 us resolution while poll has 1 ms; too bad that select has other problems, because select has also 1 us resolution). Most 'reasonable' POSIX compliant operating systems have ppoll Really? I could find no manpages for any of Solaris and *BSD. and I would have thought there is /better/ resolution there than relying not only on signal, but also a pipe or eventfd plus the underlying poll(). I agree. If it was my comments you are referring to The message I replied to was Ping Fan's, but perhaps you brought it up first. I don't know. , my concern was mainly about Windows (which I know very little about), as there does not appear to be a nanosecond or even microsecond alternative to WaitForMultipleObjects. However, articles like this: http://social.msdn.microsoft.com/Forums/vstudio/en-US/e8a7cb1e-9edd-4ee3-982e-f66b7bf6ae44/improve-accuracy-waitforsingleobject suggest that WaitFor{Single,Multiple}Objects can have pretty appalling latency anyway (100ms!), and there's no evidence that's limited by making one of the FDs (or objects) ready. ... especially when making one of the FDs ready would likely have the same latency in some internal Windows thread that implements timers. In these circumstances, I'd question whether we gain anything by worrying about timer resolution. Part of it should be fixed by os_setup_early_signal_handling. This is corroborated by the fact that without os_setup_early_signal_handling Wine always works, and Windows breaks. Paolo
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
On Wed, Jul 24, 2013 at 2:42 PM, Paolo Bonzini pbonz...@redhat.com wrote: Il 24/07/2013 03:28, liu ping fan ha scritto: On Tue, Jul 23, 2013 at 6:30 PM, Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 04:53, liu ping fan ha scritto: The scenior I can figure out is if adopting timeout of poll, then when changing the deadline, we need to invoke poll, and set the new timeout, right? Yes, you need to call aio_notify so that poll is reinvoked. I try to list the difference between alarm_timer and timeout of poll. It includes thread-affinity, resolution and easy-use. Most of all, thread-affinity The main issue with alarm timer is the affinity of timer_t with threads. For linux, SIGEV_THREAD_ID has been supported for a very long time and we already associate the signal with the specified thread. So the only issue is left for other unix, we can emulate the affinity by using SIGEV_THREAD and repost the event to the specified thread. As to timeout of poll, it has the affinity of threads. Resolution: alarm_timer provides higher resolution, but do we care about it? With ppoll, is this true or just hearsay? (Without ppoll, indeed setitimer has 1 us resolution while poll has 1 ms; too bad that select has other problems, because select has also 1 us resolution). Paid some time to dig the kernel code, and find out that the resolution lost by timeout of poll/select..etc is cause by the timeout is a slack region. See code in do_poll() if (!poll_schedule_timeout(wait, TASK_INTERRUPTIBLE, to, slack)) Notice the slack param, it causes the lose of resolution. The process default slack time inherits from init_task and it is .timer_slack_ns = 5, /* 50 usec default slack */ But we can fix it by PR_SET_TIMERSLACK to decrease it for select/poll/... So ppoll with timerslack adjustment will meet our requirement. But what about other non-linux system? Regards, Pingfan Paolo easy-use: The reset of the deadline as mentioned. Finally, I admit timeout of poll will save large chunk of platform-related code.
Re: [Qemu-devel] [PATCH v2 01/11] block: replace in_use with refcnt_soft and refcnt_hard
On Wed, 07/24 09:35, Stefan Hajnoczi wrote: On Wed, Jul 24, 2013 at 08:39:53AM +0800, Fam Zheng wrote: On Tue, 07/23 15:34, Stefan Hajnoczi wrote: On Tue, Jul 23, 2013 at 06:32:25PM +0800, Fam Zheng wrote: On Tue, 07/23 11:36, Stefan Hajnoczi wrote: On Wed, Jul 17, 2013 at 05:42:06PM +0800, Fam Zheng wrote: Introduce refcnt_soft (soft reference) and refcnt_hard (hard reference) to BlockDriverState, since in_use mechanism cannot provide proper management of lifecycle when a BDS is referenced in multiple places (e.g. pointed to by another bs's backing_hd while also used as a block job device, in the use case of image fleecing). The original in_use case is considered a hard reference in this patch, where the bs is busy and should not be used in other tasks that require a hard reference. (However the interface doesn't force this, caller still need to call bdrv_in_use() to check by itself.). A soft reference is implemented but not used yet. It will be used in following patches to manage the lifecycle together with hard reference. If bdrv_ref() is called on a BDS, it must be released by exactly the same numbers of bdrv_unref() with the same soft/hard type, and never call bdrv_delete() directly. If the BDS is only used locally (unnamed), bdrv_ref/bdrv_unref can be skipped and just use bdrv_delete(). It is risky to keep bdrv_delete() public. I suggest replacing bdrv_delete() callers with bdrv_unref() and then making bdrv_delete() static in block.c. This way it is impossible to make the mistake of calling bdrv_delete() on a BDS which has refcnt 1. I don't really understand this patch. There are now two separate refcounts. They must both reach 0 for deletion to occur. I think you plan to treat the hard refcount like the in_use counter (there should only be 0 or 1 refs) but you don't enforce it. It seems cleaner to keep in_use separate: let in_use callers take a refcount and also set in_use. OK, I like your ideas, make bdrv_delete private is much cleaner. Will fix in next revision. I plan to make it like this: /* soft ref */ void bdrv_{ref,unref}(bs) /* hard ref */ bool bdrv_hard_{ref,unref}(bs) usage: bs = bdrv_new() implicit bdrv_ref(bs) called ... bdrv_unref(bs) automatically deleted here or with hard ref: bs = bdrv_new() implicit bdrv_ref() called bdrv_hard_ref(bs) ... bdrv_hard_unref(bs) bdrv_unref(bs) automatically deleted here The second bdrv_hard_ref call to a bs returns false, caller check the return value. Why is hard ref necessary when we already have bdrv_in_use()/bdrv_set_in_use()? Keeping the names of bdrv_in_use() and bdrv_set_in_use() is noting wrong, if no more than one hard ref is enforced. However I think we should manage lifecycle with both bdrv_ref and bdrv_set_in_use, so name them both ref sounds consistent: make it clearer to caller both hard ref (in_use) and soft ref preserve the bs from being released. I actually find hard/soft ref naming confusing and prefer keeping bdrv_in_use(). Refcount is for object lifetime whereas in_use is for busy status. OK, do you suggest keeping in_use as is and call bdrv_delete(bs) in bdrv_unref() regardless of bs-in_use? -- Fam
[Qemu-devel] [PATCH qom-next for-1.6 04/29] integratorcp: QOM'ify icp_pic_state
Introduce type constant and use QOM cast. Fix indentation. Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/integratorcp.c | 32 +++- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 58f4ed7..af31007 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -271,15 +271,21 @@ static int integratorcm_init(SysBusDevice *dev) /* Integrator/CP hardware emulation. */ /* Primary interrupt controller. */ -typedef struct icp_pic_state -{ - SysBusDevice busdev; - MemoryRegion iomem; - uint32_t level; - uint32_t irq_enabled; - uint32_t fiq_enabled; - qemu_irq parent_irq; - qemu_irq parent_fiq; +#define TYPE_INTEGRATOR_PIC integrator_pic +#define INTEGRATOR_PIC(obj) \ + OBJECT_CHECK(icp_pic_state, (obj), TYPE_INTEGRATOR_PIC) + +typedef struct icp_pic_state { +/* private */ +SysBusDevice parent_obj; +/* public */ + +MemoryRegion iomem; +uint32_t level; +uint32_t irq_enabled; +uint32_t fiq_enabled; +qemu_irq parent_irq; +qemu_irq parent_fiq; } icp_pic_state; static void icp_pic_update(icp_pic_state *s) @@ -376,7 +382,7 @@ static const MemoryRegionOps icp_pic_ops = { static int icp_pic_init(SysBusDevice *dev) { -icp_pic_state *s = FROM_SYSBUS(icp_pic_state, dev); +icp_pic_state *s = INTEGRATOR_PIC(dev); qdev_init_gpio_in(dev-qdev, icp_pic_set_irq, 32); sysbus_init_irq(dev, s-parent_irq); @@ -487,13 +493,13 @@ static void integratorcp_init(QEMUMachineInitArgs *args) sysbus_mmio_map((SysBusDevice *)dev, 0, 0x1000); cpu_pic = arm_pic_init_cpu(cpu); -dev = sysbus_create_varargs(integrator_pic, 0x1400, +dev = sysbus_create_varargs(TYPE_INTEGRATOR_PIC, 0x1400, cpu_pic[ARM_PIC_CPU_IRQ], cpu_pic[ARM_PIC_CPU_FIQ], NULL); for (i = 0; i 32; i++) { pic[i] = qdev_get_gpio_in(dev, i); } -sysbus_create_simple(integrator_pic, 0xca00, pic[26]); +sysbus_create_simple(TYPE_INTEGRATOR_PIC, 0xca00, pic[26]); sysbus_create_varargs(integrator_pit, 0x1300, pic[5], pic[6], pic[7], NULL); sysbus_create_simple(pl031, 0x1500, pic[8]); @@ -559,7 +565,7 @@ static void icp_pic_class_init(ObjectClass *klass, void *data) } static const TypeInfo icp_pic_info = { -.name = integrator_pic, +.name = TYPE_INTEGRATOR_PIC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(icp_pic_state), .class_init= icp_pic_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 01/29] armv7m: QOM'ify BitBandState
Introduce TYPE_* constant and use QOM cast. Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/armv7m.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 5b22e84..82d36fb 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -114,15 +114,21 @@ static const MemoryRegionOps bitband_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +#define TYPE_BITBAND ARM,bitband-memory +#define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND) + typedef struct { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t base; } BitBandState; static int bitband_init(SysBusDevice *dev) { -BitBandState *s = FROM_SYSBUS(BitBandState, dev); +BitBandState *s = BITBAND(dev); memory_region_init_io(s-iomem, OBJECT(s), bitband_ops, s-base, bitband, 0x0200); @@ -134,12 +140,12 @@ static void armv7m_bitband_init(void) { DeviceState *dev; -dev = qdev_create(NULL, ARM,bitband-memory); +dev = qdev_create(NULL, TYPE_BITBAND); qdev_prop_set_uint32(dev, base, 0x2000); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x2200); -dev = qdev_create(NULL, ARM,bitband-memory); +dev = qdev_create(NULL, TYPE_BITBAND); qdev_prop_set_uint32(dev, base, 0x4000); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x4200); @@ -270,7 +276,7 @@ static void bitband_class_init(ObjectClass *klass, void *data) } static const TypeInfo bitband_info = { -.name = ARM,bitband-memory, +.name = TYPE_BITBAND, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(BitBandState), .class_init= bitband_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 00/29] arm: QOM cast cleanups
Hello Peter, This series eliminates FROM_SYSBUS() in hw/arm/. Variable naming has been prepared for QOM realize and to avoid -qdev access. Post-1.6 many of the devices should be moved into the appropriate hw/ sub-directory from their board file. Regards, Andreas Cc: Peter Maydell peter.mayd...@linaro.org Cc: Peter Crosthwaite peter.crosthwa...@xilinx.com Cc: Hu Tao hu...@cn.fujitsu.com Andreas Färber (29): armv7m: QOM'ify BitBandState highbank: QOM'ify HighbankRegsState integratorcp: QOM'ify integratorcm_state integratorcp: QOM'ify icp_pic_state musicpal: QOM'ify mv88w8618_eth_state musicpal: QOM'ify musicpal_lcd_state musicpal: Use TYPE_MV88W8618_ETH musicpal: QOM'ify mv88w8618_pic_state musicpal: QOM'ify mv88w8618_pit_state musicpal: QOM'ify mv88w8618_flashcfg musicpal: QOM'ify musicpal_gpio_state musicpal: QOM'ify musicpal_key_state pxa2xx: QOM'ify PXA2xxSSPState pxa2xx: QOM'ify PXA2xxRTCState pxa2xx: QOM'ify PXA2xxI2CState pxa2xx_gpio: QOM'ify PXA2xxGPIOInfo pxa2xx_pic: QOM'ify PXA2xxPICState spitz: QOM'ify SLNANDState spitz: QOM'ify SpitzKeyboardState stellaris: QOM'ify gptm_state stellaris: QOM'ify stellaris_i2c_state stellaris: QOM'ify stellaris_adc_state strongarm: QOM'ify StrongARMPICState strongarm: QOM'ify StrongARMRTCState strongarm: QOM'ify StrongARMGPIOInfo strongarm: QOM'ify StrongARMPPCInfo strongarm: QOM'ify StrongARMUARTState strongarm: QOM'ify StrongARMSSPState versatilepb: QOM'ify vpb_sic_state hw/arm/armv7m.c | 16 -- hw/arm/highbank.c | 16 -- hw/arm/integratorcp.c | 65 ++-- hw/arm/musicpal.c | 138 ++ hw/arm/pxa2xx.c | 71 +- hw/arm/pxa2xx_gpio.c | 35 - hw/arm/pxa2xx_pic.c | 18 --- hw/arm/spitz.c| 34 - hw/arm/stellaris.c| 64 ++- hw/arm/strongarm.c| 134 +--- hw/arm/versatilepb.c | 37 -- 11 files changed, 398 insertions(+), 230 deletions(-) -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 05/29] musicpal: QOM'ify mv88w8618_eth_state
Introduce type constant and use QOM casts. Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index b06d442..293ab26 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -146,8 +146,15 @@ typedef struct mv88w8618_rx_desc { uint32_t next; } mv88w8618_rx_desc; +#define TYPE_MV88W8618_ETH mv88w8618_eth +#define MV88W8618_ETH(obj) \ +OBJECT_CHECK(mv88w8618_eth_state, (obj), TYPE_MV88W8618_ETH) + typedef struct mv88w8618_eth_state { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; qemu_irq irq; uint32_t smir; @@ -384,7 +391,7 @@ static NetClientInfo net_mv88w8618_info = { static int mv88w8618_eth_init(SysBusDevice *dev) { -mv88w8618_eth_state *s = FROM_SYSBUS(mv88w8618_eth_state, dev); +mv88w8618_eth_state *s = MV88W8618_ETH(dev); sysbus_init_irq(dev, s-irq); s-nic = qemu_new_nic(net_mv88w8618_info, s-conf, @@ -429,7 +436,7 @@ static void mv88w8618_eth_class_init(ObjectClass *klass, void *data) } static const TypeInfo mv88w8618_eth_info = { -.name = mv88w8618_eth, +.name = TYPE_MV88W8618_ETH, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(mv88w8618_eth_state), .class_init= mv88w8618_eth_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 03/29] integratorcp: QOM'ify integratorcm_state
Rename to IntegratorCMState, introduce type constant and use QOM cast. Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/integratorcp.c | 33 - 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 249a430..58f4ed7 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -15,8 +15,15 @@ #include exec/address-spaces.h #include sysemu/sysemu.h -typedef struct { -SysBusDevice busdev; +#define TYPE_INTEGRATOR_CM integrator_core +#define INTEGRATOR_CM(obj) \ +OBJECT_CHECK(IntegratorCMState, (obj), TYPE_INTEGRATOR_CM) + +typedef struct IntegratorCMState { +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t memsz; MemoryRegion flash; @@ -31,7 +38,7 @@ typedef struct { uint32_t int_level; uint32_t irq_enabled; uint32_t fiq_enabled; -} integratorcm_state; +} IntegratorCMState; static uint8_t integrator_spd[128] = { 128, 8, 4, 11, 9, 1, 64, 0, 2, 0xa0, 0xa0, 0, 0, 8, 0, 1, @@ -41,7 +48,7 @@ static uint8_t integrator_spd[128] = { static uint64_t integratorcm_read(void *opaque, hwaddr offset, unsigned size) { -integratorcm_state *s = (integratorcm_state *)opaque; +IntegratorCMState *s = opaque; if (offset = 0x100 offset 0x200) { /* CM_SPD */ if (offset = 0x180) @@ -108,7 +115,7 @@ static uint64_t integratorcm_read(void *opaque, hwaddr offset, } } -static void integratorcm_do_remap(integratorcm_state *s) +static void integratorcm_do_remap(IntegratorCMState *s) { /* Sync memory region state with CM_CTRL REMAP bit: * bit 0 = flash at address 0; bit 1 = RAM @@ -116,7 +123,7 @@ static void integratorcm_do_remap(integratorcm_state *s) memory_region_set_enabled(s-flash, !(s-cm_ctrl 4)); } -static void integratorcm_set_ctrl(integratorcm_state *s, uint32_t value) +static void integratorcm_set_ctrl(IntegratorCMState *s, uint32_t value) { if (value 8) { qemu_system_reset_request(); @@ -133,7 +140,7 @@ static void integratorcm_set_ctrl(integratorcm_state *s, uint32_t value) integratorcm_do_remap(s); } -static void integratorcm_update(integratorcm_state *s) +static void integratorcm_update(IntegratorCMState *s) { /* ??? The CPU irq/fiq is raised when either the core module or base PIC are active. */ @@ -144,7 +151,7 @@ static void integratorcm_update(integratorcm_state *s) static void integratorcm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { -integratorcm_state *s = (integratorcm_state *)opaque; +IntegratorCMState *s = opaque; switch (offset 2) { case 2: /* CM_OSC */ if (s-cm_lock == 0xa05f) @@ -226,7 +233,7 @@ static const MemoryRegionOps integratorcm_ops = { static int integratorcm_init(SysBusDevice *dev) { -integratorcm_state *s = FROM_SYSBUS(integratorcm_state, dev); +IntegratorCMState *s = INTEGRATOR_CM(dev); s-cm_osc = 0x0148; /* ??? What should the high bits of this value be? */ @@ -474,7 +481,7 @@ static void integratorcp_init(QEMUMachineInitArgs *args) memory_region_init_alias(ram_alias, NULL, ram.alias, ram, 0, ram_size); memory_region_add_subregion(address_space_mem, 0x8000, ram_alias); -dev = qdev_create(NULL, integrator_core); +dev = qdev_create(NULL, TYPE_INTEGRATOR_CM); qdev_prop_set_uint32(dev, memsz, ram_size 20); qdev_init_nofail(dev); sysbus_mmio_map((SysBusDevice *)dev, 0, 0x1000); @@ -524,7 +531,7 @@ static void integratorcp_machine_init(void) machine_init(integratorcp_machine_init); static Property core_properties[] = { -DEFINE_PROP_UINT32(memsz, integratorcm_state, memsz, 0), +DEFINE_PROP_UINT32(memsz, IntegratorCMState, memsz, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -538,9 +545,9 @@ static void core_class_init(ObjectClass *klass, void *data) } static const TypeInfo core_info = { -.name = integrator_core, +.name = TYPE_INTEGRATOR_CM, .parent= TYPE_SYS_BUS_DEVICE, -.instance_size = sizeof(integratorcm_state), +.instance_size = sizeof(IntegratorCMState), .class_init= core_class_init, }; -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 07/29] musicpal: Use TYPE_MV88W8618_ETH
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index e7efed9..e2d9e84 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1641,7 +1641,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) sysbus_create_simple(mv88w8618_flashcfg, MP_FLASHCFG_BASE, NULL); qemu_check_nic_model(nd_table[0], mv88w8618); -dev = qdev_create(NULL, mv88w8618_eth); +dev = qdev_create(NULL, TYPE_MV88W8618_ETH); qdev_set_nic_properties(dev, nd_table[0]); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE); -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 17/29] pxa2xx_pic: QOM'ify PXA2xxPICState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/pxa2xx_pic.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 8929b6d..46d337c 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -31,8 +31,15 @@ #define PXA2XX_PIC_SRCS40 +#define TYPE_PXA2XX_PIC pxa2xx_pic +#define PXA2XX_PIC(obj) \ +OBJECT_CHECK(PXA2xxPICState, (obj), TYPE_PXA2XX_PIC) + typedef struct { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; ARMCPU *cpu; uint32_t int_enabled[2]; @@ -260,9 +267,8 @@ static int pxa2xx_pic_post_load(void *opaque, int version_id) DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) { -CPUARMState *env = cpu-env; -DeviceState *dev = qdev_create(NULL, pxa2xx_pic); -PXA2xxPICState *s = FROM_SYSBUS(PXA2xxPICState, SYS_BUS_DEVICE(dev)); +DeviceState *dev = qdev_create(NULL, TYPE_PXA2XX_PIC); +PXA2xxPICState *s = PXA2XX_PIC(dev); s-cpu = cpu; @@ -284,7 +290,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); /* Enable IC coprocessor access. */ -define_arm_cp_regs_with_opaque(arm_env_get_cpu(env), pxa_pic_cp_reginfo, s); +define_arm_cp_regs_with_opaque(cpu, pxa_pic_cp_reginfo, s); return dev; } @@ -321,7 +327,7 @@ static void pxa2xx_pic_class_init(ObjectClass *klass, void *data) } static const TypeInfo pxa2xx_pic_info = { -.name = pxa2xx_pic, +.name = TYPE_PXA2XX_PIC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PXA2xxPICState), .class_init= pxa2xx_pic_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 09/29] musicpal: QOM'ify mv88w8618_pit_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index d35b6cd..54ead12 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -814,8 +814,15 @@ typedef struct mv88w8618_timer_state { qemu_irq irq; } mv88w8618_timer_state; +#define TYPE_MV88W8618_PIT mv88w8618_pit +#define MV88W8618_PIT(obj) \ +OBJECT_CHECK(mv88w8618_pit_state, (obj), TYPE_MV88W8618_PIT) + typedef struct mv88w8618_pit_state { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; mv88w8618_timer_state timer[4]; } mv88w8618_pit_state; @@ -897,8 +904,7 @@ static void mv88w8618_pit_write(void *opaque, hwaddr offset, static void mv88w8618_pit_reset(DeviceState *d) { -mv88w8618_pit_state *s = FROM_SYSBUS(mv88w8618_pit_state, - SYS_BUS_DEVICE(d)); +mv88w8618_pit_state *s = MV88W8618_PIT(d); int i; for (i = 0; i 4; i++) { @@ -915,7 +921,7 @@ static const MemoryRegionOps mv88w8618_pit_ops = { static int mv88w8618_pit_init(SysBusDevice *dev) { -mv88w8618_pit_state *s = FROM_SYSBUS(mv88w8618_pit_state, dev); +mv88w8618_pit_state *s = MV88W8618_PIT(dev); int i; /* Letting them all run at 1 MHz is likely just a pragmatic @@ -965,7 +971,7 @@ static void mv88w8618_pit_class_init(ObjectClass *klass, void *data) } static const TypeInfo mv88w8618_pit_info = { -.name = mv88w8618_pit, +.name = TYPE_MV88W8618_PIT, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(mv88w8618_pit_state), .class_init= mv88w8618_pit_class_init, @@ -1596,7 +1602,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) for (i = 0; i 32; i++) { pic[i] = qdev_get_gpio_in(dev, i); } -sysbus_create_varargs(mv88w8618_pit, MP_PIT_BASE, pic[MP_TIMER1_IRQ], +sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, pic[MP_TIMER1_IRQ], pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ], pic[MP_TIMER4_IRQ], NULL); -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 06/29] musicpal: QOM'ify musicpal_lcd_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 293ab26..e7efed9 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -461,8 +461,15 @@ static const TypeInfo mv88w8618_eth_info = { #define MP_LCD_TEXTCOLOR0xe0e0ff /* RRGGBB */ +#define TYPE_MUSICPAL_LCD musicpal_lcd +#define MUSICPAL_LCD(obj) \ +OBJECT_CHECK(musicpal_lcd_state, (obj), TYPE_MUSICPAL_LCD) + typedef struct musicpal_lcd_state { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t brightness; uint32_t mode; @@ -615,7 +622,7 @@ static const GraphicHwOps musicpal_gfx_ops = { static int musicpal_lcd_init(SysBusDevice *dev) { -musicpal_lcd_state *s = FROM_SYSBUS(musicpal_lcd_state, dev); +musicpal_lcd_state *s = MUSICPAL_LCD(dev); s-brightness = 7; @@ -657,7 +664,7 @@ static void musicpal_lcd_class_init(ObjectClass *klass, void *data) } static const TypeInfo musicpal_lcd_info = { -.name = musicpal_lcd, +.name = TYPE_MUSICPAL_LCD, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(musicpal_lcd_state), .class_init= musicpal_lcd_class_init, @@ -1648,7 +1655,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) i2c_dev = sysbus_create_simple(gpio_i2c, -1, NULL); i2c = (i2c_bus *)qdev_get_child_bus(i2c_dev, i2c); -lcd_dev = sysbus_create_simple(musicpal_lcd, MP_LCD_BASE, NULL); +lcd_dev = sysbus_create_simple(TYPE_MUSICPAL_LCD, MP_LCD_BASE, NULL); key_dev = sysbus_create_simple(musicpal_key, -1, NULL); /* I2C read data */ -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 11/29] musicpal: QOM'ify musicpal_gpio_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 30 +++--- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 8c1d200..a8beae6 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1181,8 +1181,15 @@ static int mv88w8618_wlan_init(SysBusDevice *dev) /* LCD brightness bits in GPIO_OE_HI */ #define MP_OE_LCD_BRIGHTNESS0x0007 +#define TYPE_MUSICPAL_GPIO musicpal_gpio +#define MUSICPAL_GPIO(obj) \ +OBJECT_CHECK(musicpal_gpio_state, (obj), TYPE_MUSICPAL_GPIO) + typedef struct musicpal_gpio_state { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t lcd_brightness; uint32_t out_state; @@ -1342,8 +1349,7 @@ static const MemoryRegionOps musicpal_gpio_ops = { static void musicpal_gpio_reset(DeviceState *d) { -musicpal_gpio_state *s = FROM_SYSBUS(musicpal_gpio_state, - SYS_BUS_DEVICE(d)); +musicpal_gpio_state *s = MUSICPAL_GPIO(d); s-lcd_brightness = 0; s-out_state = 0; @@ -1353,19 +1359,20 @@ static void musicpal_gpio_reset(DeviceState *d) s-isr = 0; } -static int musicpal_gpio_init(SysBusDevice *dev) +static int musicpal_gpio_init(SysBusDevice *sbd) { -musicpal_gpio_state *s = FROM_SYSBUS(musicpal_gpio_state, dev); +DeviceState *dev = DEVICE(sbd); +musicpal_gpio_state *s = MUSICPAL_GPIO(dev); -sysbus_init_irq(dev, s-irq); +sysbus_init_irq(sbd, s-irq); memory_region_init_io(s-iomem, OBJECT(s), musicpal_gpio_ops, s, musicpal-gpio, MP_GPIO_SIZE); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); -qdev_init_gpio_out(dev-qdev, s-out, ARRAY_SIZE(s-out)); +qdev_init_gpio_out(dev, s-out, ARRAY_SIZE(s-out)); -qdev_init_gpio_in(dev-qdev, musicpal_gpio_pin_event, 32); +qdev_init_gpio_in(dev, musicpal_gpio_pin_event, 32); return 0; } @@ -1397,7 +1404,7 @@ static void musicpal_gpio_class_init(ObjectClass *klass, void *data) } static const TypeInfo musicpal_gpio_info = { -.name = musicpal_gpio, +.name = TYPE_MUSICPAL_GPIO, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(musicpal_gpio_state), .class_init= musicpal_gpio_class_init, @@ -1669,7 +1676,8 @@ static void musicpal_init(QEMUMachineInitArgs *args) sysbus_create_simple(TYPE_MUSICPAL_MISC, MP_MISC_BASE, NULL); -dev = sysbus_create_simple(musicpal_gpio, MP_GPIO_BASE, pic[MP_GPIO_IRQ]); +dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE, + pic[MP_GPIO_IRQ]); i2c_dev = sysbus_create_simple(gpio_i2c, -1, NULL); i2c = (i2c_bus *)qdev_get_child_bus(i2c_dev, i2c); -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 26/29] strongarm: QOM'ify StrongARMPPCInfo
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/strongarm.c | 24 ++-- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index efb56b3..421ac54 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -706,9 +706,14 @@ static const TypeInfo strongarm_gpio_info = { #define PSDR 0x0c #define PPFR 0x10 +#define TYPE_STRONGARM_PPC strongarm-ppc +#define STRONGARM_PPC(obj) \ +OBJECT_CHECK(StrongARMPPCInfo, (obj), TYPE_STRONGARM_PPC) + typedef struct StrongARMPPCInfo StrongARMPPCInfo; struct StrongARMPPCInfo { -SysBusDevice busdev; +SysBusDevice parent_obj; + MemoryRegion iomem; qemu_irq handler[28]; @@ -817,19 +822,18 @@ static const MemoryRegionOps strongarm_ppc_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static int strongarm_ppc_init(SysBusDevice *dev) +static int strongarm_ppc_init(SysBusDevice *sbd) { -StrongARMPPCInfo *s; - -s = FROM_SYSBUS(StrongARMPPCInfo, dev); +DeviceState *dev = DEVICE(sbd); +StrongARMPPCInfo *s = STRONGARM_PPC(dev); -qdev_init_gpio_in(dev-qdev, strongarm_ppc_set, 22); -qdev_init_gpio_out(dev-qdev, s-handler, 22); +qdev_init_gpio_in(dev, strongarm_ppc_set, 22); +qdev_init_gpio_out(dev, s-handler, 22); memory_region_init_io(s-iomem, OBJECT(s), strongarm_ppc_ops, s, ppc, 0x1000); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); return 0; } @@ -860,7 +864,7 @@ static void strongarm_ppc_class_init(ObjectClass *klass, void *data) } static const TypeInfo strongarm_ppc_info = { -.name = strongarm-ppc, +.name = TYPE_STRONGARM_PPC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(StrongARMPPCInfo), .class_init= strongarm_ppc_class_init, @@ -1612,7 +1616,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem, s-gpio = strongarm_gpio_init(0x9004, s-pic); -s-ppc = sysbus_create_varargs(strongarm-ppc, 0x9006, NULL); +s-ppc = sysbus_create_varargs(TYPE_STRONGARM_PPC, 0x9006, NULL); for (i = 0; sa_serial[i].io_base; i++) { DeviceState *dev = qdev_create(NULL, strongarm-uart); -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 08/29] musicpal: QOM'ify mv88w8618_pic_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index e2d9e84..d35b6cd 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -675,9 +675,15 @@ static const TypeInfo musicpal_lcd_info = { #define MP_PIC_ENABLE_SET 0x08 #define MP_PIC_ENABLE_CLR 0x0C -typedef struct mv88w8618_pic_state -{ -SysBusDevice busdev; +#define TYPE_MV88W8618_PIC mv88w8618_pic +#define MV88W8618_PIC(obj) \ +OBJECT_CHECK(mv88w8618_pic_state, (obj), TYPE_MV88W8618_PIC) + +typedef struct mv88w8618_pic_state { +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t level; uint32_t enabled; @@ -735,8 +741,7 @@ static void mv88w8618_pic_write(void *opaque, hwaddr offset, static void mv88w8618_pic_reset(DeviceState *d) { -mv88w8618_pic_state *s = FROM_SYSBUS(mv88w8618_pic_state, - SYS_BUS_DEVICE(d)); +mv88w8618_pic_state *s = MV88W8618_PIC(d); s-level = 0; s-enabled = 0; @@ -750,9 +755,9 @@ static const MemoryRegionOps mv88w8618_pic_ops = { static int mv88w8618_pic_init(SysBusDevice *dev) { -mv88w8618_pic_state *s = FROM_SYSBUS(mv88w8618_pic_state, dev); +mv88w8618_pic_state *s = MV88W8618_PIC(dev); -qdev_init_gpio_in(dev-qdev, mv88w8618_pic_set_irq, 32); +qdev_init_gpio_in(DEVICE(dev), mv88w8618_pic_set_irq, 32); sysbus_init_irq(dev, s-parent_irq); memory_region_init_io(s-iomem, OBJECT(s), mv88w8618_pic_ops, s, musicpal-pic, MP_PIC_SIZE); @@ -783,7 +788,7 @@ static void mv88w8618_pic_class_init(ObjectClass *klass, void *data) } static const TypeInfo mv88w8618_pic_info = { -.name = mv88w8618_pic, +.name = TYPE_MV88W8618_PIC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(mv88w8618_pic_state), .class_init= mv88w8618_pic_class_init, @@ -1586,7 +1591,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) vmstate_register_ram_global(sram); memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram); -dev = sysbus_create_simple(mv88w8618_pic, MP_PIC_BASE, +dev = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE, cpu_pic[ARM_PIC_CPU_IRQ]); for (i = 0; i 32; i++) { pic[i] = qdev_get_gpio_in(dev, i); -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 13/29] pxa2xx: QOM'ify PXA2xxSSPState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/pxa2xx.c | 28 ++-- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 3c520d7..babe22e 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -457,9 +457,16 @@ static const VMStateDescription vmstate_pxa2xx_mm = { } }; +#define TYPE_PXA2XX_SSP pxa2xx-ssp +#define PXA2XX_SSP(obj) \ +OBJECT_CHECK(PXA2xxSSPState, (obj), TYPE_PXA2XX_SSP) + /* Synchronous Serial Ports */ typedef struct { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; qemu_irq irq; int enable; @@ -757,19 +764,20 @@ static int pxa2xx_ssp_load(QEMUFile *f, void *opaque, int version_id) return 0; } -static int pxa2xx_ssp_init(SysBusDevice *dev) +static int pxa2xx_ssp_init(SysBusDevice *sbd) { -PXA2xxSSPState *s = FROM_SYSBUS(PXA2xxSSPState, dev); +DeviceState *dev = DEVICE(sbd); +PXA2xxSSPState *s = PXA2XX_SSP(dev); -sysbus_init_irq(dev, s-irq); +sysbus_init_irq(sbd, s-irq); memory_region_init_io(s-iomem, OBJECT(s), pxa2xx_ssp_ops, s, pxa2xx-ssp, 0x1000); -sysbus_init_mmio(dev, s-iomem); -register_savevm(dev-qdev, pxa2xx_ssp, -1, 0, +sysbus_init_mmio(sbd, s-iomem); +register_savevm(dev, pxa2xx_ssp, -1, 0, pxa2xx_ssp_save, pxa2xx_ssp_load, s); -s-bus = ssi_create_bus(dev-qdev, ssi); +s-bus = ssi_create_bus(dev, ssi); return 0; } @@ -2107,7 +2115,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space, s-ssp = (SSIBus **)g_malloc0(sizeof(SSIBus *) * i); for (i = 0; pxa27x_ssp[i].io_base; i ++) { DeviceState *dev; -dev = sysbus_create_simple(pxa2xx-ssp, pxa27x_ssp[i].io_base, +dev = sysbus_create_simple(TYPE_PXA2XX_SSP, pxa27x_ssp[i].io_base, qdev_get_gpio_in(s-pic, pxa27x_ssp[i].irqn)); s-ssp[i] = (SSIBus *)qdev_get_child_bus(dev, ssi); } @@ -2238,7 +2246,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size) s-ssp = (SSIBus **)g_malloc0(sizeof(SSIBus *) * i); for (i = 0; pxa255_ssp[i].io_base; i ++) { DeviceState *dev; -dev = sysbus_create_simple(pxa2xx-ssp, pxa255_ssp[i].io_base, +dev = sysbus_create_simple(TYPE_PXA2XX_SSP, pxa255_ssp[i].io_base, qdev_get_gpio_in(s-pic, pxa255_ssp[i].irqn)); s-ssp[i] = (SSIBus *)qdev_get_child_bus(dev, ssi); } @@ -2278,7 +2286,7 @@ static void pxa2xx_ssp_class_init(ObjectClass *klass, void *data) } static const TypeInfo pxa2xx_ssp_info = { -.name = pxa2xx-ssp, +.name = TYPE_PXA2XX_SSP, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PXA2xxSSPState), .class_init= pxa2xx_ssp_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 10/29] musicpal: QOM'ify mv88w8618_flashcfg
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 54ead12..8c1d200 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -980,8 +980,15 @@ static const TypeInfo mv88w8618_pit_info = { /* Flash config register offsets */ #define MP_FLASHCFG_CFGR00x04 +#define TYPE_MV88W8618_FLASHCFG mv88w8618_flashcfg +#define MV88W8618_FLASHCFG(obj) \ +OBJECT_CHECK(mv88w8618_flashcfg_state, (obj), TYPE_MV88W8618_FLASHCFG) + typedef struct mv88w8618_flashcfg_state { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t cfgr0; } mv88w8618_flashcfg_state; @@ -1021,7 +1028,7 @@ static const MemoryRegionOps mv88w8618_flashcfg_ops = { static int mv88w8618_flashcfg_init(SysBusDevice *dev) { -mv88w8618_flashcfg_state *s = FROM_SYSBUS(mv88w8618_flashcfg_state, dev); +mv88w8618_flashcfg_state *s = MV88W8618_FLASHCFG(dev); s-cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */ memory_region_init_io(s-iomem, OBJECT(s), mv88w8618_flashcfg_ops, s, @@ -1051,7 +1058,7 @@ static void mv88w8618_flashcfg_class_init(ObjectClass *klass, void *data) } static const TypeInfo mv88w8618_flashcfg_info = { -.name = mv88w8618_flashcfg, +.name = TYPE_MV88W8618_FLASHCFG, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(mv88w8618_flashcfg_state), .class_init= mv88w8618_flashcfg_class_init, @@ -1649,7 +1656,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) #endif } -sysbus_create_simple(mv88w8618_flashcfg, MP_FLASHCFG_BASE, NULL); +sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL); qemu_check_nic_model(nd_table[0], mv88w8618); dev = qdev_create(NULL, TYPE_MV88W8618_ETH); -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 14/29] pxa2xx: QOM'ify PXA2xxRTCState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/pxa2xx.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index babe22e..6548338 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -798,8 +798,15 @@ static int pxa2xx_ssp_init(SysBusDevice *sbd) #define RTCPICR0x34/* RTC Periodic Interrupt Counter register */ #define PIAR 0x38/* RTC Periodic Interrupt Alarm register */ +#define TYPE_PXA2XX_RTC pxa2xx_rtc +#define PXA2XX_RTC(obj) \ +OBJECT_CHECK(PXA2xxRTCState, (obj), TYPE_PXA2XX_RTC) + typedef struct { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t rttr; uint32_t rtsr; @@ -1110,7 +1117,7 @@ static const MemoryRegionOps pxa2xx_rtc_ops = { static int pxa2xx_rtc_init(SysBusDevice *dev) { -PXA2xxRTCState *s = FROM_SYSBUS(PXA2xxRTCState, dev); +PXA2xxRTCState *s = PXA2XX_RTC(dev); struct tm tm; int wom; @@ -1205,7 +1212,7 @@ static void pxa2xx_rtc_sysbus_class_init(ObjectClass *klass, void *data) } static const TypeInfo pxa2xx_rtc_sysbus_info = { -.name = pxa2xx_rtc, +.name = TYPE_PXA2XX_RTC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PXA2xxRTCState), .class_init= pxa2xx_rtc_sysbus_class_init, @@ -2128,7 +2135,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space, s-pcmcia[0] = pxa2xx_pcmcia_init(address_space, 0x2000); s-pcmcia[1] = pxa2xx_pcmcia_init(address_space, 0x3000); -sysbus_create_simple(pxa2xx_rtc, 0x4090, +sysbus_create_simple(TYPE_PXA2XX_RTC, 0x4090, qdev_get_gpio_in(s-pic, PXA2XX_PIC_RTCALARM)); s-i2c[0] = pxa2xx_i2c_init(0x40301600, @@ -2259,7 +2266,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size) s-pcmcia[0] = pxa2xx_pcmcia_init(address_space, 0x2000); s-pcmcia[1] = pxa2xx_pcmcia_init(address_space, 0x3000); -sysbus_create_simple(pxa2xx_rtc, 0x4090, +sysbus_create_simple(TYPE_PXA2XX_RTC, 0x4090, qdev_get_gpio_in(s-pic, PXA2XX_PIC_RTCALARM)); s-i2c[0] = pxa2xx_i2c_init(0x40301600, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 24/29] strongarm: QOM'ify StrongARMRTCState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/strongarm.c | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 457f9c7..78211a0 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -242,8 +242,13 @@ static const TypeInfo strongarm_pic_info = { * trim delete isn't emulated, so * f = 32 768 / (RTTR_trim + 1) */ -typedef struct { -SysBusDevice busdev; +#define TYPE_STRONGARM_RTC strongarm-rtc +#define STRONGARM_RTC(obj) \ +OBJECT_CHECK(StrongARMRTCState, (obj), TYPE_STRONGARM_RTC) + +typedef struct StrongARMRTCState { +SysBusDevice parent_obj; + MemoryRegion iomem; uint32_t rttr; uint32_t rtsr; @@ -374,7 +379,7 @@ static const MemoryRegionOps strongarm_rtc_ops = { static int strongarm_rtc_init(SysBusDevice *dev) { -StrongARMRTCState *s = FROM_SYSBUS(StrongARMRTCState, dev); +StrongARMRTCState *s = STRONGARM_RTC(dev); struct tm tm; s-rttr = 0x0; @@ -443,7 +448,7 @@ static void strongarm_rtc_sysbus_class_init(ObjectClass *klass, void *data) } static const TypeInfo strongarm_rtc_sysbus_info = { -.name = strongarm-rtc, +.name = TYPE_STRONGARM_RTC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(StrongARMRTCState), .class_init= strongarm_rtc_sysbus_class_init, @@ -1599,7 +1604,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem, qdev_get_gpio_in(s-pic, SA_PIC_OSTC3), NULL); -sysbus_create_simple(strongarm-rtc, 0x9001, +sysbus_create_simple(TYPE_STRONGARM_RTC, 0x9001, qdev_get_gpio_in(s-pic, SA_PIC_RTC_ALARM)); s-gpio = strongarm_gpio_init(0x9004, s-pic); -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 15/29] pxa2xx: QOM'ify PXA2xxI2CState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/pxa2xx.c | 26 +- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 6548338..ab145ee 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1224,8 +1224,15 @@ typedef struct { PXA2xxI2CState *host; } PXA2xxI2CSlaveState; +#define TYPE_PXA2XX_I2C pxa2xx_i2c +#define PXA2XX_I2C(obj) \ +OBJECT_CHECK(PXA2xxI2CState, (obj), TYPE_PXA2XX_I2C) + struct PXA2xxI2CState { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; PXA2xxI2CSlaveState *slave; i2c_bus *bus; @@ -1473,7 +1480,7 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, SysBusDevice *i2c_dev; PXA2xxI2CState *s; -i2c_dev = SYS_BUS_DEVICE(qdev_create(NULL, pxa2xx_i2c)); +i2c_dev = SYS_BUS_DEVICE(qdev_create(NULL, TYPE_PXA2XX_I2C)); qdev_prop_set_uint32(i2c_dev-qdev, size, region_size + 1); qdev_prop_set_uint32(i2c_dev-qdev, offset, base region_size); @@ -1482,7 +1489,7 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, sysbus_mmio_map(i2c_dev, 0, base ~region_size); sysbus_connect_irq(i2c_dev, 0, irq); -s = FROM_SYSBUS(PXA2xxI2CState, i2c_dev); +s = PXA2XX_I2C(i2c_dev); /* FIXME: Should the slave device really be on a separate bus? */ dev = i2c_create_slave(i2c_init_bus(NULL, dummy), pxa2xx-i2c-slave, 0); s-slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, I2C_SLAVE(dev)); @@ -1491,16 +1498,17 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, return s; } -static int pxa2xx_i2c_initfn(SysBusDevice *dev) +static int pxa2xx_i2c_initfn(SysBusDevice *sbd) { -PXA2xxI2CState *s = FROM_SYSBUS(PXA2xxI2CState, dev); +DeviceState *dev = DEVICE(sbd); +PXA2xxI2CState *s = PXA2XX_I2C(dev); -s-bus = i2c_init_bus(dev-qdev, i2c); +s-bus = i2c_init_bus(dev, i2c); memory_region_init_io(s-iomem, OBJECT(s), pxa2xx_i2c_ops, s, pxa2xx-i2c, s-region_size); -sysbus_init_mmio(dev, s-iomem); -sysbus_init_irq(dev, s-irq); +sysbus_init_mmio(sbd, s-iomem); +sysbus_init_irq(sbd, s-irq); return 0; } @@ -1528,7 +1536,7 @@ static void pxa2xx_i2c_class_init(ObjectClass *klass, void *data) } static const TypeInfo pxa2xx_i2c_info = { -.name = pxa2xx_i2c, +.name = TYPE_PXA2XX_I2C, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PXA2xxI2CState), .class_init= pxa2xx_i2c_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 12/29] musicpal: QOM'ify musicpal_key_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 22 +++--- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index a8beae6..6e8eb5d 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1434,8 +1434,15 @@ static const TypeInfo musicpal_gpio_info = { #define MP_KEY_BTN_VOLUME (1 6) #define MP_KEY_BTN_NAVIGATION (1 7) +#define TYPE_MUSICPAL_KEY musicpal_key +#define MUSICPAL_KEY(obj) \ +OBJECT_CHECK(musicpal_key_state, (obj), TYPE_MUSICPAL_KEY) + typedef struct musicpal_key_state { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; uint32_t kbd_extended; uint32_t pressed_keys; @@ -1519,17 +1526,18 @@ static void musicpal_key_event(void *opaque, int keycode) s-kbd_extended = 0; } -static int musicpal_key_init(SysBusDevice *dev) +static int musicpal_key_init(SysBusDevice *sbd) { -musicpal_key_state *s = FROM_SYSBUS(musicpal_key_state, dev); +DeviceState *dev = DEVICE(sbd); +musicpal_key_state *s = MUSICPAL_KEY(dev); memory_region_init(s-iomem, OBJECT(s), dummy, 0); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); s-kbd_extended = 0; s-pressed_keys = 0; -qdev_init_gpio_out(dev-qdev, s-out, ARRAY_SIZE(s-out)); +qdev_init_gpio_out(dev, s-out, ARRAY_SIZE(s-out)); qemu_add_kbd_event_handler(musicpal_key_event, s); @@ -1558,7 +1566,7 @@ static void musicpal_key_class_init(ObjectClass *klass, void *data) } static const TypeInfo musicpal_key_info = { -.name = musicpal_key, +.name = TYPE_MUSICPAL_KEY, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(musicpal_key_state), .class_init= musicpal_key_class_init, @@ -1682,7 +1690,7 @@ static void musicpal_init(QEMUMachineInitArgs *args) i2c = (i2c_bus *)qdev_get_child_bus(i2c_dev, i2c); lcd_dev = sysbus_create_simple(TYPE_MUSICPAL_LCD, MP_LCD_BASE, NULL); -key_dev = sysbus_create_simple(musicpal_key, -1, NULL); +key_dev = sysbus_create_simple(TYPE_MUSICPAL_KEY, -1, NULL); /* I2C read data */ qdev_connect_gpio_out(i2c_dev, 0, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 20/29] stellaris: QOM'ify gptm_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/stellaris.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index a2b6b17..1c69bcf 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -43,8 +43,13 @@ typedef const struct { /* General purpose timer module. */ +#define TYPE_STELLARIS_GPTM stellaris-gptm +#define STELLARIS_GPTM(obj) \ +OBJECT_CHECK(gptm_state, (obj), TYPE_STELLARIS_GPTM) + typedef struct gptm_state { -SysBusDevice busdev; +SysBusDevice parent_obj; + MemoryRegion iomem; uint32_t config; uint32_t mode[2]; @@ -302,7 +307,7 @@ static const VMStateDescription vmstate_stellaris_gptm = { static int stellaris_gptm_init(SysBusDevice *dev) { -gptm_state *s = FROM_SYSBUS(gptm_state, dev); +gptm_state *s = STELLARIS_GPTM(dev); sysbus_init_irq(dev, s-irq); qdev_init_gpio_out(dev-qdev, s-trigger, 1); @@ -1215,7 +1220,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, } for (i = 0; i 4; i++) { if (board-dc2 (0x1 i)) { -dev = sysbus_create_simple(stellaris-gptm, +dev = sysbus_create_simple(TYPE_STELLARIS_GPTM, 0x4003 + i * 0x1000, pic[timer_irq[i]]); /* TODO: This is incorrect, but we get away with it because @@ -1371,7 +1376,7 @@ static void stellaris_gptm_class_init(ObjectClass *klass, void *data) } static const TypeInfo stellaris_gptm_info = { -.name = stellaris-gptm, +.name = TYPE_STELLARIS_GPTM, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(gptm_state), .class_init= stellaris_gptm_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 16/29] pxa2xx_gpio: QOM'ify PXA2xxGPIOInfo
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/pxa2xx_gpio.c | 35 +-- 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index f8c3ee0..ca77f56 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -13,9 +13,16 @@ #define PXA2XX_GPIO_BANKS 4 +#define TYPE_PXA2XX_GPIO pxa2xx-gpio +#define PXA2XX_GPIO(obj) \ +OBJECT_CHECK(PXA2xxGPIOInfo, (obj), TYPE_PXA2XX_GPIO) + typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo; struct PXA2xxGPIOInfo { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion iomem; qemu_irq irq0, irq1, irqX; int lines; @@ -256,7 +263,7 @@ DeviceState *pxa2xx_gpio_init(hwaddr base, CPUState *cs = CPU(cpu); DeviceState *dev; -dev = qdev_create(NULL, pxa2xx-gpio); +dev = qdev_create(NULL, TYPE_PXA2XX_GPIO); qdev_prop_set_int32(dev, lines, lines); qdev_prop_set_int32(dev, ncpu, cs-cpu_index); qdev_init_nofail(dev); @@ -272,22 +279,21 @@ DeviceState *pxa2xx_gpio_init(hwaddr base, return dev; } -static int pxa2xx_gpio_initfn(SysBusDevice *dev) +static int pxa2xx_gpio_initfn(SysBusDevice *sbd) { -PXA2xxGPIOInfo *s; - -s = FROM_SYSBUS(PXA2xxGPIOInfo, dev); +DeviceState *dev = DEVICE(sbd); +PXA2xxGPIOInfo *s = PXA2XX_GPIO(dev); s-cpu = ARM_CPU(qemu_get_cpu(s-ncpu)); -qdev_init_gpio_in(dev-qdev, pxa2xx_gpio_set, s-lines); -qdev_init_gpio_out(dev-qdev, s-handler, s-lines); +qdev_init_gpio_in(dev, pxa2xx_gpio_set, s-lines); +qdev_init_gpio_out(dev, s-handler, s-lines); memory_region_init_io(s-iomem, OBJECT(s), pxa_gpio_ops, s, pxa2xx-gpio, 0x1000); -sysbus_init_mmio(dev, s-iomem); -sysbus_init_irq(dev, s-irq0); -sysbus_init_irq(dev, s-irq1); -sysbus_init_irq(dev, s-irqX); +sysbus_init_mmio(sbd, s-iomem); +sysbus_init_irq(sbd, s-irq0); +sysbus_init_irq(sbd, s-irq1); +sysbus_init_irq(sbd, s-irqX); return 0; } @@ -298,7 +304,8 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev) */ void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler) { -PXA2xxGPIOInfo *s = FROM_SYSBUS(PXA2xxGPIOInfo, SYS_BUS_DEVICE(dev)); +PXA2xxGPIOInfo *s = PXA2XX_GPIO(dev); + s-read_notify = handler; } @@ -337,7 +344,7 @@ static void pxa2xx_gpio_class_init(ObjectClass *klass, void *data) } static const TypeInfo pxa2xx_gpio_info = { -.name = pxa2xx-gpio, +.name = TYPE_PXA2XX_GPIO, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PXA2xxGPIOInfo), .class_init= pxa2xx_gpio_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 28/29] strongarm: QOM'ify StrongARMSSPState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/strongarm.c | 28 ++-- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 61c2b22..82a9492 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -1336,8 +1336,14 @@ static const TypeInfo strongarm_uart_info = { }; /* Synchronous Serial Ports */ -typedef struct { -SysBusDevice busdev; + +#define TYPE_STRONGARM_SSP strongarm-ssp +#define STRONGARM_SSP(obj) \ +OBJECT_CHECK(StrongARMSSPState, (obj), TYPE_STRONGARM_SSP) + +typedef struct StrongARMSSPState { +SysBusDevice parent_obj; + MemoryRegion iomem; qemu_irq irq; SSIBus *bus; @@ -1519,23 +1525,25 @@ static int strongarm_ssp_post_load(void *opaque, int version_id) return 0; } -static int strongarm_ssp_init(SysBusDevice *dev) +static int strongarm_ssp_init(SysBusDevice *sbd) { -StrongARMSSPState *s = FROM_SYSBUS(StrongARMSSPState, dev); +DeviceState *dev = DEVICE(sbd); +StrongARMSSPState *s = STRONGARM_SSP(dev); -sysbus_init_irq(dev, s-irq); +sysbus_init_irq(sbd, s-irq); memory_region_init_io(s-iomem, OBJECT(s), strongarm_ssp_ops, s, ssp, 0x1000); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); -s-bus = ssi_create_bus(dev-qdev, ssi); +s-bus = ssi_create_bus(dev, ssi); return 0; } static void strongarm_ssp_reset(DeviceState *dev) { -StrongARMSSPState *s = DO_UPCAST(StrongARMSSPState, busdev.qdev, dev); +StrongARMSSPState *s = STRONGARM_SSP(dev); + s-sssr = 0x03; /* 3 bit data, SPI, disabled */ s-rx_start = 0; s-rx_level = 0; @@ -1569,7 +1577,7 @@ static void strongarm_ssp_class_init(ObjectClass *klass, void *data) } static const TypeInfo strongarm_ssp_info = { -.name = strongarm-ssp, +.name = TYPE_STRONGARM_SSP, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(StrongARMSSPState), .class_init= strongarm_ssp_class_init, @@ -1633,7 +1641,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem, qdev_get_gpio_in(s-pic, sa_serial[i].irq)); } -s-ssp = sysbus_create_varargs(strongarm-ssp, 0x8007, +s-ssp = sysbus_create_varargs(TYPE_STRONGARM_SSP, 0x8007, qdev_get_gpio_in(s-pic, SA_PIC_SSP), NULL); s-ssp_bus = (SSIBus *)qdev_get_child_bus(s-ssp, ssi); -- 1.8.1.4
[Qemu-devel] [PATCH v2 0/9] sheepdog: reconnect server after connection failure
Currently, if a sheepdog server exits, all the connecting VMs need to be restarted. This series implements a feature to reconnect the server, and enables us to do online sheepdog upgrade and avoid restarting VMs when sheepdog servers crash unexpectedly. v2: - Dropped nonblocking connect patches MORITA Kazutaka (9): ignore SIGPIPE in qemu-img and qemu-io iov: handle EOF in iov_send_recv sheepdog: check return values of qemu_co_recv/send correctly sheepdog: handle vdi objects in resend_aio_req sheepdog: reload inode outside of resend_aioreq coroutine: add co_aio_sleep_ns() to allow sleep in block drivers sheepdog: try to reconnect to sheepdog after network error sheepdog: make add_aio_request and send_aioreq void functions sheepdog: cancel aio requests if possible block/sheepdog.c | 244 ++ include/block/coroutine.h | 8 ++ qemu-coroutine-sleep.c| 47 + qemu-img.c| 4 + qemu-io.c | 4 + util/iov.c| 6 ++ 6 files changed, 228 insertions(+), 85 deletions(-) -- 1.8.1.3.566.gaa39828
[Qemu-devel] [PATCH qom-next for-1.6 27/29] strongarm: QOM'ify StrongARMUARTState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/strongarm.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 421ac54..61c2b22 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -908,8 +908,13 @@ static const TypeInfo strongarm_ppc_info = { #define RX_FIFO_FRE (1 9) #define RX_FIFO_ROR (1 10) -typedef struct { -SysBusDevice busdev; +#define TYPE_STRONGARM_UART strongarm-uart +#define STRONGARM_UART(obj) \ +OBJECT_CHECK(StrongARMUARTState, (obj), TYPE_STRONGARM_UART) + +typedef struct StrongARMUARTState { +SysBusDevice parent_obj; + MemoryRegion iomem; CharDriverState *chr; qemu_irq irq; @@ -1225,7 +1230,7 @@ static const MemoryRegionOps strongarm_uart_ops = { static int strongarm_uart_init(SysBusDevice *dev) { -StrongARMUARTState *s = FROM_SYSBUS(StrongARMUARTState, dev); +StrongARMUARTState *s = STRONGARM_UART(dev); memory_region_init_io(s-iomem, OBJECT(s), strongarm_uart_ops, s, uart, 0x1); @@ -1248,7 +1253,7 @@ static int strongarm_uart_init(SysBusDevice *dev) static void strongarm_uart_reset(DeviceState *dev) { -StrongARMUARTState *s = DO_UPCAST(StrongARMUARTState, busdev.qdev, dev); +StrongARMUARTState *s = STRONGARM_UART(dev); s-utcr0 = UTCR0_DSS; /* 8 data, no parity */ s-brd = 23;/* 9600 */ @@ -1324,7 +1329,7 @@ static void strongarm_uart_class_init(ObjectClass *klass, void *data) } static const TypeInfo strongarm_uart_info = { -.name = strongarm-uart, +.name = TYPE_STRONGARM_UART, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(StrongARMUARTState), .class_init= strongarm_uart_class_init, @@ -1619,7 +1624,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem, s-ppc = sysbus_create_varargs(TYPE_STRONGARM_PPC, 0x9006, NULL); for (i = 0; sa_serial[i].io_base; i++) { -DeviceState *dev = qdev_create(NULL, strongarm-uart); +DeviceState *dev = qdev_create(NULL, TYPE_STRONGARM_UART); qdev_prop_set_chr(dev, chardev, serial_hds[i]); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, -- 1.8.1.4
[Qemu-devel] [PATCH v2 6/9] coroutine: add co_aio_sleep_ns() to allow sleep in block drivers
This helper function behaves similarly to co_sleep_ns(), but the sleeping coroutine will be resumed when using qemu_aio_wait(). Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- include/block/coroutine.h | 8 qemu-coroutine-sleep.c| 47 +++ 2 files changed, 55 insertions(+) diff --git a/include/block/coroutine.h b/include/block/coroutine.h index 377805a..23ea6e9 100644 --- a/include/block/coroutine.h +++ b/include/block/coroutine.h @@ -210,6 +210,14 @@ void qemu_co_rwlock_unlock(CoRwlock *lock); void coroutine_fn co_sleep_ns(QEMUClock *clock, int64_t ns); /** + * Yield the coroutine for a given duration + * + * Behaves similarly to co_sleep_ns(), but the sleeping coroutine will be + * resumed when using qemu_aio_wait(). + */ +void coroutine_fn co_aio_sleep_ns(int64_t ns); + +/** * Yield until a file descriptor becomes readable * * Note that this function clobbers the handlers for the file descriptor. diff --git a/qemu-coroutine-sleep.c b/qemu-coroutine-sleep.c index 169ce5c..3955347 100644 --- a/qemu-coroutine-sleep.c +++ b/qemu-coroutine-sleep.c @@ -13,6 +13,7 @@ #include block/coroutine.h #include qemu/timer.h +#include qemu/thread.h typedef struct CoSleepCB { QEMUTimer *ts; @@ -37,3 +38,49 @@ void coroutine_fn co_sleep_ns(QEMUClock *clock, int64_t ns) qemu_del_timer(sleep_cb.ts); qemu_free_timer(sleep_cb.ts); } + +typedef struct CoAioSleepCB { +QEMUBH *bh; +int64_t ns; +Coroutine *co; +} CoAioSleepCB; + +static void co_aio_sleep_cb(void *opaque) +{ +CoAioSleepCB *aio_sleep_cb = opaque; + +qemu_coroutine_enter(aio_sleep_cb-co, NULL); +} + +static void *sleep_thread(void *opaque) +{ +CoAioSleepCB *aio_sleep_cb = opaque; +struct timespec req = { +.tv_sec = aio_sleep_cb-ns / 10, +.tv_nsec = aio_sleep_cb-ns % 10, +}; +struct timespec rem; + +while (nanosleep(req, rem) 0 errno == EINTR) { +req = rem; +} + +qemu_bh_schedule(aio_sleep_cb-bh); + +return NULL; +} + +void coroutine_fn co_aio_sleep_ns(int64_t ns) +{ +CoAioSleepCB aio_sleep_cb = { +.ns = ns, +.co = qemu_coroutine_self(), +}; +QemuThread thread; + +aio_sleep_cb.bh = qemu_bh_new(co_aio_sleep_cb, aio_sleep_cb); +qemu_thread_create(thread, sleep_thread, aio_sleep_cb, + QEMU_THREAD_DETACHED); +qemu_coroutine_yield(); +qemu_bh_delete(aio_sleep_cb.bh); +} -- 1.8.1.3.566.gaa39828
Re: [Qemu-devel] Question on aio_poll
On Tue, Jul 23, 2013 at 03:46:23PM +0100, Alex Bligh wrote: --On 23 July 2013 14:18:25 +0200 Stefan Hajnoczi stefa...@gmail.com wrote: Unfortunately there is an issue with the series which I haven't had time to look into yet. I don't remember the details but I think make check is failing. The current qemu.git/master code is doing the correct thing though. Callers of aio_poll() are using it to complete any pending I/O requests and process BHs. If there is no work left, we do not want to block indefinitely. Instead we want to return. If we have no work to do (no FDs) and have a timer, then this should wait for the timer to expire (i.e. wait until progress has been made). Hence without a timer, it would be peculiar if it returned earlier. I think it should behave like select really, i.e. if you give it an infinite timeout (blocking) and no descriptors to work on, it hangs for ever. At the very least it should warn, as this is in my opinion an error by the caller. I left this how it was in the end (I think), and got round it by creating a bogus pipe for the test to listen to. Doing that requires the changes in my patch series, otherwise you break aio_poll() loops that are waiting for pending I/O requests. They don't want to wait for timers. Thirdly, I don't quite understand how/why busy is being set. It seems to be set if the flush callback returns non-zero. That would imply (I think) the fd handler has something to write. But what if it is just interested in any data to read that is available (and never writes)? If this is the only fd aio_poll has, it would appear it never polls. The point of .io_flush() is to select file descriptors that are awaiting I/O (either direction). For example, consider an iSCSI TCP socket with no I/O requests pending. In that case .io_flush() returns 0 and we will not block in aio_poll(). But if there is an iSCSI request pending, then .io_flush() will return 1 and we'll wait for the iSCSI response to be received. The effect of .io_flush() is that aio_poll() will return false if there is no I/O pending. Right, but take that example. If the tcp socket is idle because it's an iSCSI server and it is waiting for an iSCSI request, then io_flush returns 0. That will mean busy will not be set, and if it's the only FD, g_poll won't be called AT ALL - forget the fact it won't block - because it will exit aio_poll a couple of lines before the g_poll. That means you'll never actually poll for the incoming iSCSI command. Surely that can't be right! Or are you saying that this type of FD never appears in the aio poll set so it is just returning for the main loop to handle them. That happens because QEMU has two types of fd monitoring. It has AioContext's aio_poll() which is designed for asynchronous I/O requests initiated by QEMU. It can wait for them to complete. QEMU also has main-loop's qemu_set_fd_handler() (iohandler) which is used for server connections like the one you described. The NBD server uses it, for example. I hope we can eventually unify event loops and then the select function should behave as you described. For now though, we need to keep the current behavior until my .io_flush() removal series or something equivalent is merged, at least. It turned out that this behavior could be implemented at the block layer instead of using the .io_flush() interface at the AioContext layer. The patch series I linked to above modifies the code so AioContext can eliminate the .io_flush() concept. I've just had a quick read of that. I think the key one is: http://lists.nongnu.org/archive/html/qemu-devel/2013-07/msg00099.html I note you've eliminated 'busy' - hurrah. I note you now have: if (ctx-pollfds-len == 1) { return progress; } Is the '1' there the event notifier? How do we know there is only one of them? There many be many EventNotifier instances. That's not what matters. Rather, it's about the aio_notify() EventNotifier. Each AioContext has its own EventNotifier which can be signalled with aio_notify(). The purpose of this function is to kick an event loop that is blocking in select()/poll(). This is necessary when another thread modifies something that the AioContext needs to act upon, such as adding/removing an fd.
Re: [Qemu-devel] trim in windows guest witch virtio
Hi paolo, With -M pc,trim works well in windows guest with ide device and ahci bus. About the filter driver,you mean do something in windows virtio-scsi driver,let it send unmap command to qemu? Thanks baiqing. -Original Message- From: Paolo Bonzini [mailto:pbonz...@redhat.com] Sent: Wednesday, July 24, 2013 2:46 PM To: Libaiqing Cc: qemu-devel@nongnu.org Subject: Re: trim in windows guest witch virtio Il 24/07/2013 02:53, Libaiqing ha scritto: Hi paolo, I test window guest with ide device with the following config,trim with ide drive failed. 1 The host fs is ext4 with discard option: /dev/sdb1 on /home/sdb type ext4 (rw,relatime,discard,data=ordered) 2 qemu config : ide drive with discard open x86_64-softmmu/qemu-system-x86_64 -enable-kvm -name win7 -M pc-0.15 -m 1024 -smp 2 -boot c -device piix3-usb-uhci,id=usb,bus=pci.0,addr=0x1.0x2 -drive file=/home/win7_base.qcow2,if=ide,index=0,format=qcow2,id=ad -drive file=/home/sdb/raw.img,if=ide,index=1,format=raw,id=hd,discard=on -monitor stdio -vga qxl -vnc :1 -device usb-tablet,id=input0 TRIM is supported only on -M pc-1.5 and -M pc. 3 In win7 guest,init drive d,fill it with files,then shift+del files 4 The file /home/sdb/raw.img does not become small,when listing with -s option. It seems that the windows ntfs does not send trim to ide controller. No IDE_DMA_TRIM request received. Note that this may not happen immediately. NTFS may send TRIM later. Is there any config wrong? Btw,I found the info from the URL: http://msdn.microsoft.com/en-us/library/windows/desktop/hh848053(v=vs. 85).aspx Qemu can do the same thing like hyper-v with windows guest? I don't know, I never tested it with Windows guests. It looks like Windows 8 would not need a filter driver to do TRIM on SCSI disks (you could try with megasas, so that you do not need a driver for the HBA). Paolo
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
Il 24/07/2013 09:43, liu ping fan ha scritto: Paid some time to dig the kernel code, and find out that the resolution lost by timeout of poll/select..etc is cause by the timeout is a slack region. See code in do_poll() if (!poll_schedule_timeout(wait, TASK_INTERRUPTIBLE, to, slack)) Notice the slack param, it causes the lose of resolution. The process default slack time inherits from init_task and it is .timer_slack_ns = 5, /* 50 usec default slack */ But we can fix it by PR_SET_TIMERSLACK to decrease it for select/poll/... Right, good catch. I just learnt about PR_SET_TIMERSLACK. :) Alex, can you add it to your series? (Note that you must set a timer slack of 1, because 0 is interpreted as default). So ppoll with timerslack adjustment will meet our requirement. But what about other non-linux system? They might have their own mechanism similar to PR_SET_TIMERSLACK. Paolo
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
Paolo, --On 24 July 2013 09:43:28 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Most 'reasonable' POSIX compliant operating systems have ppoll Really? I could find no manpages for any of Solaris and *BSD. OK I shall (re)research that then! I suppose select() / pselect() is an alternative when there are few FDs. , my concern was mainly about Windows (which I know very little about), as there does not appear to be a nanosecond or even microsecond alternative to WaitForMultipleObjects. However, articles like this: http://social.msdn.microsoft.com/Forums/vstudio/en-US/e8a7cb1e-9edd-4ee3 -982e-f66b7bf6ae44/improve-accuracy-waitforsingleobject suggest that WaitFor{Single,Multiple}Objects can have pretty appalling latency anyway (100ms!), and there's no evidence that's limited by making one of the FDs (or objects) ready. ... especially when making one of the FDs ready would likely have the same latency in some internal Windows thread that implements timers. In these circumstances, I'd question whether we gain anything by worrying about timer resolution. Part of it should be fixed by os_setup_early_signal_handling. This is corroborated by the fact that without os_setup_early_signal_handling Wine always works, and Windows breaks. This: http://www.windowstimestamp.com/description suggests that whilst WaitForMultipleEvents has a millisecond timeout, one can (see section 3.2) use these to wait for an object which is itself a timer and expires with - in this case - 100ns resolution which is probably enough. Again I know nothing about Windows so this may be completely wrong. -- Alex Bligh
[Qemu-devel] [PATCH qom-next for-1.6 23/29] strongarm: QOM'ify StrongARMPICState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/strongarm.c | 25 - 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index feaaf45..457f9c7 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -70,8 +70,14 @@ static struct { }; /* Interrupt Controller */ -typedef struct { -SysBusDevice busdev; + +#define TYPE_STRONGARM_PIC strongarm_pic +#define STRONGARM_PIC(obj) \ +OBJECT_CHECK(StrongARMPICState, (obj), TYPE_STRONGARM_PIC) + +typedef struct StrongARMPICState { +SysBusDevice parent_obj; + MemoryRegion iomem; qemu_irqirq; qemu_irqfiq; @@ -168,16 +174,17 @@ static const MemoryRegionOps strongarm_pic_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static int strongarm_pic_initfn(SysBusDevice *dev) +static int strongarm_pic_initfn(SysBusDevice *sbd) { -StrongARMPICState *s = FROM_SYSBUS(StrongARMPICState, dev); +DeviceState *dev = DEVICE(sbd); +StrongARMPICState *s = STRONGARM_PIC(dev); -qdev_init_gpio_in(dev-qdev, strongarm_pic_set_irq, SA_PIC_SRCS); +qdev_init_gpio_in(dev, strongarm_pic_set_irq, SA_PIC_SRCS); memory_region_init_io(s-iomem, OBJECT(s), strongarm_pic_ops, s, pic, 0x1000); -sysbus_init_mmio(dev, s-iomem); -sysbus_init_irq(dev, s-irq); -sysbus_init_irq(dev, s-fiq); +sysbus_init_mmio(sbd, s-iomem); +sysbus_init_irq(sbd, s-irq); +sysbus_init_irq(sbd, s-fiq); return 0; } @@ -214,7 +221,7 @@ static void strongarm_pic_class_init(ObjectClass *klass, void *data) } static const TypeInfo strongarm_pic_info = { -.name = strongarm_pic, +.name = TYPE_STRONGARM_PIC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(StrongARMPICState), .class_init= strongarm_pic_class_init, -- 1.8.1.4
Re: [Qemu-devel] [PATCH qom-next for-1.6 07/29] musicpal: Use TYPE_MV88W8618_ETH
Am 24.07.2013 09:48, schrieb Andreas Färber: Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/musicpal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Erm, this was supposed to be squashed, obviously. ;) Fixed. Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] [PATCH v2 4/9] sheepdog: handle vdi objects in resend_aio_req
The current resend_aio_req() doesn't work when the request is against vdi objects. This fixes the problem. Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- block/sheepdog.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/block/sheepdog.c b/block/sheepdog.c index bca5730..f25c7df 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -1209,11 +1209,15 @@ static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req) return ret; } -aio_req-oid = vid_to_data_oid(s-inode.vdi_id, - data_oid_to_idx(aio_req-oid)); +if (is_data_obj(aio_req-oid)) { +aio_req-oid = vid_to_data_oid(s-inode.vdi_id, + data_oid_to_idx(aio_req-oid)); +} else { +aio_req-oid = vid_to_vdi_oid(s-inode.vdi_id); +} /* check whether this request becomes a CoW one */ -if (acb-aiocb_type == AIOCB_WRITE_UDATA) { +if (acb-aiocb_type == AIOCB_WRITE_UDATA is_data_obj(aio_req-oid)) { int idx = data_oid_to_idx(aio_req-oid); AIOReq *areq; @@ -1241,8 +1245,15 @@ static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req) create = true; } out: -return add_aio_request(s, aio_req, acb-qiov-iov, acb-qiov-niov, - create, acb-aiocb_type); +if (is_data_obj(aio_req-oid)) { +return add_aio_request(s, aio_req, acb-qiov-iov, acb-qiov-niov, + create, acb-aiocb_type); +} else { +struct iovec iov; +iov.iov_base = s-inode; +iov.iov_len = sizeof(s-inode); +return add_aio_request(s, aio_req, iov, 1, false, AIOCB_WRITE_UDATA); +} } /* TODO Convert to fine grained options */ -- 1.8.1.3.566.gaa39828
[Qemu-devel] [PATCH v2 3/9] sheepdog: check return values of qemu_co_recv/send correctly
qemu_co_recv/send return shorter length on error. Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- block/sheepdog.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/block/sheepdog.c b/block/sheepdog.c index 6a41ad9..bca5730 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -671,7 +671,7 @@ static void coroutine_fn aio_read_response(void *opaque) /* read a header */ ret = qemu_co_recv(fd, rsp, sizeof(rsp)); -if (ret 0) { +if (ret sizeof(rsp)) { error_report(failed to get the header, %s, strerror(errno)); goto out; } @@ -722,7 +722,7 @@ static void coroutine_fn aio_read_response(void *opaque) case AIOCB_READ_UDATA: ret = qemu_co_recvv(fd, acb-qiov-iov, acb-qiov-niov, aio_req-iov_offset, rsp.data_length); -if (ret 0) { +if (ret rsp.data_length) { error_report(failed to get the data, %s, strerror(errno)); goto out; } @@ -1075,7 +1075,7 @@ static int coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, /* send a header */ ret = qemu_co_send(s-fd, hdr, sizeof(hdr)); -if (ret 0) { +if (ret sizeof(hdr)) { qemu_co_mutex_unlock(s-lock); error_report(failed to send a req, %s, strerror(errno)); return -errno; @@ -1083,7 +1083,7 @@ static int coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, if (wlen) { ret = qemu_co_sendv(s-fd, iov, niov, aio_req-iov_offset, wlen); -if (ret 0) { +if (ret wlen) { qemu_co_mutex_unlock(s-lock); error_report(failed to send a data, %s, strerror(errno)); return -errno; -- 1.8.1.3.566.gaa39828
[Qemu-devel] [PATCH qom-next for-1.6 21/29] stellaris: QOM'ify stellaris_i2c_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/stellaris.c | 24 +++- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 1c69bcf..15093ba 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -684,8 +684,13 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq, /* I2C controller. */ +#define TYPE_STELLARIS_I2C stellaris-i2c +#define STELLARIS_I2C(obj) \ +OBJECT_CHECK(stellaris_i2c_state, (obj), TYPE_STELLARIS_I2C) + typedef struct { -SysBusDevice busdev; +SysBusDevice parent_obj; + i2c_bus *bus; qemu_irq irq; MemoryRegion iomem; @@ -858,21 +863,22 @@ static const VMStateDescription vmstate_stellaris_i2c = { } }; -static int stellaris_i2c_init(SysBusDevice * dev) +static int stellaris_i2c_init(SysBusDevice *sbd) { -stellaris_i2c_state *s = FROM_SYSBUS(stellaris_i2c_state, dev); +DeviceState *dev = DEVICE(sbd); +stellaris_i2c_state *s = STELLARIS_I2C(dev); i2c_bus *bus; -sysbus_init_irq(dev, s-irq); -bus = i2c_init_bus(dev-qdev, i2c); +sysbus_init_irq(sbd, s-irq); +bus = i2c_init_bus(dev, i2c); s-bus = bus; memory_region_init_io(s-iomem, OBJECT(s), stellaris_i2c_ops, s, i2c, 0x1000); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); /* ??? For now we only implement the master interface. */ stellaris_i2c_reset(s); -vmstate_register(dev-qdev, -1, vmstate_stellaris_i2c, s); +vmstate_register(dev, -1, vmstate_stellaris_i2c, s); return 0; } @@ -1243,7 +1249,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, } if (board-dc2 (1 12)) { -dev = sysbus_create_simple(stellaris-i2c, 0x4002, pic[8]); +dev = sysbus_create_simple(TYPE_STELLARIS_I2C, 0x4002, pic[8]); i2c = (i2c_bus *)qdev_get_child_bus(dev, i2c); if (board-peripherals BP_OLED_I2C) { i2c_create_slave(i2c, ssd0303, 0x3d); @@ -1362,7 +1368,7 @@ static void stellaris_i2c_class_init(ObjectClass *klass, void *data) } static const TypeInfo stellaris_i2c_info = { -.name = stellaris-i2c, +.name = TYPE_STELLARIS_I2C, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(stellaris_i2c_state), .class_init= stellaris_i2c_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 29/29] versatilepb: QOM'ify vpb_sic_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/versatilepb.c | 37 + 1 file changed, 21 insertions(+), 16 deletions(-) diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 725f60f..b48d84c 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -25,15 +25,19 @@ /* Primary interrupt controller. */ -typedef struct vpb_sic_state -{ - SysBusDevice busdev; - MemoryRegion iomem; - uint32_t level; - uint32_t mask; - uint32_t pic_enable; - qemu_irq parent[32]; - int irq; +#define TYPE_VERSATILE_PB_SIC versatilepb_sic +#define VERSATILE_PB_SIC(obj) \ +OBJECT_CHECK(vpb_sic_state, (obj), TYPE_VERSATILE_PB_SIC) + +typedef struct vpb_sic_state { +SysBusDevice parent_obj; + +MemoryRegion iomem; +uint32_t level; +uint32_t mask; +uint32_t pic_enable; +qemu_irq parent[32]; +int irq; } vpb_sic_state; static const VMStateDescription vmstate_vpb_sic = { @@ -144,19 +148,20 @@ static const MemoryRegionOps vpb_sic_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static int vpb_sic_init(SysBusDevice *dev) +static int vpb_sic_init(SysBusDevice *sbd) { -vpb_sic_state *s = FROM_SYSBUS(vpb_sic_state, dev); +DeviceState *dev = DEVICE(sbd); +vpb_sic_state *s = VERSATILE_PB_SIC(dev); int i; -qdev_init_gpio_in(dev-qdev, vpb_sic_set_irq, 32); +qdev_init_gpio_in(dev, vpb_sic_set_irq, 32); for (i = 0; i 32; i++) { -sysbus_init_irq(dev, s-parent[i]); +sysbus_init_irq(sbd, s-parent[i]); } s-irq = 31; memory_region_init_io(s-iomem, OBJECT(s), vpb_sic_ops, s, vpb-sic, 0x1000); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); return 0; } @@ -213,7 +218,7 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id) for (n = 0; n 32; n++) { pic[n] = qdev_get_gpio_in(dev, n); } -dev = sysbus_create_simple(versatilepb_sic, 0x10003000, NULL); +dev = sysbus_create_simple(TYPE_VERSATILE_PB_SIC, 0x10003000, NULL); for (n = 0; n 32; n++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), n, pic[n]); sic[n] = qdev_get_gpio_in(dev, n); @@ -393,7 +398,7 @@ static void vpb_sic_class_init(ObjectClass *klass, void *data) } static const TypeInfo vpb_sic_info = { -.name = versatilepb_sic, +.name = TYPE_VERSATILE_PB_SIC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(vpb_sic_state), .class_init= vpb_sic_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH v2 1/9] ignore SIGPIPE in qemu-img and qemu-io
This prevents the tools from being stopped when they write data to a closed connection in the other side. Reviewed-by: Paolo Bonzini pbonz...@redhat.com Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- qemu-img.c | 4 qemu-io.c | 4 2 files changed, 8 insertions(+) diff --git a/qemu-img.c b/qemu-img.c index c55ca5c..919d464 100644 --- a/qemu-img.c +++ b/qemu-img.c @@ -2319,6 +2319,10 @@ int main(int argc, char **argv) const img_cmd_t *cmd; const char *cmdname; +#ifdef CONFIG_POSIX +signal(SIGPIPE, SIG_IGN); +#endif + error_set_progname(argv[0]); qemu_init_main_loop(); diff --git a/qemu-io.c b/qemu-io.c index cb9def5..d54dc86 100644 --- a/qemu-io.c +++ b/qemu-io.c @@ -335,6 +335,10 @@ int main(int argc, char **argv) int opt_index = 0; int flags = BDRV_O_UNMAP; +#ifdef CONFIG_POSIX +signal(SIGPIPE, SIG_IGN); +#endif + progname = basename(argv[0]); while ((c = getopt_long(argc, argv, sopt, lopt, opt_index)) != -1) { -- 1.8.1.3.566.gaa39828
[Qemu-devel] [PATCH v2 9/9] sheepdog: cancel aio requests if possible
This patch tries to cancel aio requests in pending queue and failed queue. When the sheepdog driver cannot cancel the requests, it waits for them to be completed. Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- block/sheepdog.c | 70 +++- 1 file changed, 59 insertions(+), 11 deletions(-) diff --git a/block/sheepdog.c b/block/sheepdog.c index 42a30f1..58e03c8 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -294,7 +294,8 @@ struct SheepdogAIOCB { Coroutine *coroutine; void (*aio_done_func)(SheepdogAIOCB *); -bool canceled; +bool cancelable; +bool *finished; int nr_pending; }; @@ -411,6 +412,7 @@ static inline void free_aio_req(BDRVSheepdogState *s, AIOReq *aio_req) { SheepdogAIOCB *acb = aio_req-aiocb; +acb-cancelable = false; QLIST_REMOVE(aio_req, aio_siblings); g_free(aio_req); @@ -419,23 +421,68 @@ static inline void free_aio_req(BDRVSheepdogState *s, AIOReq *aio_req) static void coroutine_fn sd_finish_aiocb(SheepdogAIOCB *acb) { -if (!acb-canceled) { -qemu_coroutine_enter(acb-coroutine, NULL); +qemu_coroutine_enter(acb-coroutine, NULL); +if (acb-finished) { +*acb-finished = true; } qemu_aio_release(acb); } +/* + * Check whether the specified acb can be canceled + * + * We can cancel aio when any request belonging to the acb is: + * - Not processed by the sheepdog server. + * - Not linked to the inflight queue. + */ +static bool sd_acb_cancelable(const SheepdogAIOCB *acb) +{ +BDRVSheepdogState *s = acb-common.bs-opaque; +AIOReq *aioreq; + +if (!acb-cancelable) { +return false; +} + +QLIST_FOREACH(aioreq, s-inflight_aio_head, aio_siblings) { +if (aioreq-aiocb == acb) { +return false; +} +} + +return false; +} + static void sd_aio_cancel(BlockDriverAIOCB *blockacb) { SheepdogAIOCB *acb = (SheepdogAIOCB *)blockacb; +BDRVSheepdogState *s = acb-common.bs-opaque; +AIOReq *aioreq, *next; +bool finished = false; + +acb-finished = finished; +while (!finished) { +if (sd_acb_cancelable(acb)) { +/* Remove outstanding requests from pending and failed queues. */ +QLIST_FOREACH_SAFE(aioreq, s-pending_aio_head, aio_siblings, + next) { +if (aioreq-aiocb == acb) { +free_aio_req(s, aioreq); +} +} +QLIST_FOREACH_SAFE(aioreq, s-failed_aio_head, aio_siblings, + next) { +if (aioreq-aiocb == acb) { +free_aio_req(s, aioreq); +} +} -/* - * Sheepdog cannot cancel the requests which are already sent to - * the servers, so we just complete the request with -EIO here. - */ -acb-ret = -EIO; -qemu_coroutine_enter(acb-coroutine, NULL); -acb-canceled = true; +assert(acb-nr_pending == 0); +sd_finish_aiocb(acb); +return; +} +qemu_aio_wait(); +} } static const AIOCBInfo sd_aiocb_info = { @@ -456,7 +503,8 @@ static SheepdogAIOCB *sd_aio_setup(BlockDriverState *bs, QEMUIOVector *qiov, acb-nb_sectors = nb_sectors; acb-aio_done_func = NULL; -acb-canceled = false; +acb-cancelable = true; +acb-finished = NULL; acb-coroutine = qemu_coroutine_self(); acb-ret = 0; acb-nr_pending = 0; -- 1.8.1.3.566.gaa39828
[Qemu-devel] [PATCH v2 7/9] sheepdog: try to reconnect to sheepdog after network error
This introduces a failed request queue and links all the inflight requests to the list after network error happens. After QEMU reconnects to the sheepdog server successfully, the sheepdog block driver will retry all the requests in the failed queue. Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- block/sheepdog.c | 72 1 file changed, 57 insertions(+), 15 deletions(-) diff --git a/block/sheepdog.c b/block/sheepdog.c index cde887b..303354e 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -318,8 +318,11 @@ typedef struct BDRVSheepdogState { Coroutine *co_recv; uint32_t aioreq_seq_num; + +/* Every aio request must be linked to either of these queues. */ QLIST_HEAD(inflight_aio_head, AIOReq) inflight_aio_head; QLIST_HEAD(pending_aio_head, AIOReq) pending_aio_head; +QLIST_HEAD(failed_aio_head, AIOReq) failed_aio_head; } BDRVSheepdogState; static const char * sd_strerror(int err) @@ -613,6 +616,8 @@ static int coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, enum AIOCBState aiocb_type); static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req); static int reload_inode(BDRVSheepdogState *s, uint32_t snapid, const char *tag); +static int get_sheep_fd(BDRVSheepdogState *s); +static void co_write_request(void *opaque); static AIOReq *find_pending_req(BDRVSheepdogState *s, uint64_t oid) { @@ -654,6 +659,44 @@ static void coroutine_fn send_pending_req(BDRVSheepdogState *s, uint64_t oid) } } +static coroutine_fn void reconnect_to_sdog(void *opaque) +{ +BDRVSheepdogState *s = opaque; +AIOReq *aio_req, *next; + +qemu_aio_set_fd_handler(s-fd, NULL, NULL, NULL, NULL); +close(s-fd); +s-fd = -1; + +/* Wait for outstanding write requests to be completed. */ +while (s-co_send != NULL) { +co_write_request(opaque); +} + +/* Move all the inflight requests to the failed queue. */ +QLIST_FOREACH_SAFE(aio_req, s-inflight_aio_head, aio_siblings, next) { +QLIST_REMOVE(aio_req, aio_siblings); +QLIST_INSERT_HEAD(s-failed_aio_head, aio_req, aio_siblings); +} + +/* Try to reconnect the sheepdog server every one second. */ +while (s-fd 0) { +s-fd = get_sheep_fd(s); +if (s-fd 0) { +dprintf(Wait for connection to be established\n); +co_aio_sleep_ns(10ULL); +} +}; + +/* Resend all the failed aio requests. */ +while (!QLIST_EMPTY(s-failed_aio_head)) { +aio_req = QLIST_FIRST(s-failed_aio_head); +QLIST_REMOVE(aio_req, aio_siblings); +QLIST_INSERT_HEAD(s-inflight_aio_head, aio_req, aio_siblings); +resend_aioreq(s, aio_req); +} +} + /* * Receive responses of the I/O requests. * @@ -670,15 +713,11 @@ static void coroutine_fn aio_read_response(void *opaque) SheepdogAIOCB *acb; uint64_t idx; -if (QLIST_EMPTY(s-inflight_aio_head)) { -goto out; -} - /* read a header */ ret = qemu_co_recv(fd, rsp, sizeof(rsp)); if (ret sizeof(rsp)) { error_report(failed to get the header, %s, strerror(errno)); -goto out; +goto err; } /* find the right aio_req from the inflight aio list */ @@ -689,7 +728,7 @@ static void coroutine_fn aio_read_response(void *opaque) } if (!aio_req) { error_report(cannot find aio_req %x, rsp.id); -goto out; +goto err; } acb = aio_req-aiocb; @@ -729,7 +768,7 @@ static void coroutine_fn aio_read_response(void *opaque) aio_req-iov_offset, rsp.data_length); if (ret rsp.data_length) { error_report(failed to get the data, %s, strerror(errno)); -goto out; +goto err; } break; case AIOCB_FLUSH_CACHE: @@ -763,10 +802,9 @@ static void coroutine_fn aio_read_response(void *opaque) if (s-inode.vdi_id == oid_to_vid(aio_req-oid)) { ret = reload_inode(s, 0, ); if (ret 0) { -goto out; +goto err; } } - if (is_data_obj(aio_req-oid)) { aio_req-oid = vid_to_data_oid(s-inode.vdi_id, data_oid_to_idx(aio_req-oid)); @@ -794,6 +832,10 @@ static void coroutine_fn aio_read_response(void *opaque) } out: s-co_recv = NULL; +return; +err: +s-co_recv = NULL; +reconnect_to_sdog(opaque); } static void co_read_response(void *opaque) @@ -819,7 +861,8 @@ static int aio_flush_request(void *opaque) BDRVSheepdogState *s = opaque; return !QLIST_EMPTY(s-inflight_aio_head) || -!QLIST_EMPTY(s-pending_aio_head); +!QLIST_EMPTY(s-pending_aio_head) || +!QLIST_EMPTY(s-failed_aio_head); } /* @@ -1094,23 +1137,21 @@ static int coroutine_fn
[Qemu-devel] [PATCH v2 2/9] iov: handle EOF in iov_send_recv
Without this patch, iov_send_recv() never returns when do_send_recv() returns zero. Reviewed-by: Paolo Bonzini pbonz...@redhat.com Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- util/iov.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/util/iov.c b/util/iov.c index cc6e837..f705586 100644 --- a/util/iov.c +++ b/util/iov.c @@ -202,6 +202,12 @@ ssize_t iov_send_recv(int sockfd, struct iovec *iov, unsigned iov_cnt, return -1; } +if (ret == 0 !do_send) { +/* recv returns 0 when the peer has performed an orderly + * shutdown. */ +break; +} + /* Prepare for the next iteration */ offset += ret; total += ret; -- 1.8.1.3.566.gaa39828
Re: [Qemu-devel] Question on aio_poll
Stefan, --On 24 July 2013 09:54:39 +0200 Stefan Hajnoczi stefa...@gmail.com wrote: I left this how it was in the end (I think), and got round it by creating a bogus pipe for the test to listen to. Doing that requires the changes in my patch series, otherwise you break aio_poll() loops that are waiting for pending I/O requests. They don't want to wait for timers. Sorry I meant leaving the main code as is, and creating the bogus pipe solely in tests/test-aio.c in my new test that tests a timer attached to AioContext - no changes elsewhere. I hope we can eventually unify event loops and then the select function should behave as you described. For now though, we need to keep the current behavior until my .io_flush() removal series or something equivalent is merged, at least. OK. That's pretty much the way I went with the PATCHv2 series. I note you now have: if (ctx-pollfds-len == 1) { return progress; } Is the '1' there the event notifier? How do we know there is only one of them? There many be many EventNotifier instances. That's not what matters. Rather, it's about the aio_notify() EventNotifier. Each AioContext has its own EventNotifier which can be signalled with aio_notify(). The purpose of this function is to kick an event loop that is blocking in select()/poll(). This is necessary when another thread modifies something that the AioContext needs to act upon, such as adding/removing an fd. Thanks -- Alex Bligh
[Qemu-devel] [PATCH v2 8/9] sheepdog: make add_aio_request and send_aioreq void functions
These functions no longer return errors. We can make them void functions and simplify the codes. Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- block/sheepdog.c | 66 +++- 1 file changed, 17 insertions(+), 49 deletions(-) diff --git a/block/sheepdog.c b/block/sheepdog.c index 303354e..42a30f1 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -611,10 +611,10 @@ static int do_req(int sockfd, SheepdogReq *hdr, void *data, return srco.ret; } -static int coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, +static void coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, struct iovec *iov, int niov, bool create, enum AIOCBState aiocb_type); -static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req); +static void coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req); static int reload_inode(BDRVSheepdogState *s, uint32_t snapid, const char *tag); static int get_sheep_fd(BDRVSheepdogState *s); static void co_write_request(void *opaque); @@ -640,22 +640,14 @@ static void coroutine_fn send_pending_req(BDRVSheepdogState *s, uint64_t oid) { AIOReq *aio_req; SheepdogAIOCB *acb; -int ret; while ((aio_req = find_pending_req(s, oid)) != NULL) { acb = aio_req-aiocb; /* move aio_req from pending list to inflight one */ QLIST_REMOVE(aio_req, aio_siblings); QLIST_INSERT_HEAD(s-inflight_aio_head, aio_req, aio_siblings); -ret = add_aio_request(s, aio_req, acb-qiov-iov, - acb-qiov-niov, false, acb-aiocb_type); -if (ret 0) { -error_report(add_aio_request is failed); -free_aio_req(s, aio_req); -if (!acb-nr_pending) { -sd_finish_aiocb(acb); -} -} +add_aio_request(s, aio_req, acb-qiov-iov, acb-qiov-niov, false, +acb-aiocb_type); } } @@ -811,11 +803,8 @@ static void coroutine_fn aio_read_response(void *opaque) } else { aio_req-oid = vid_to_vdi_oid(s-inode.vdi_id); } -ret = resend_aioreq(s, aio_req); -if (ret == SD_RES_SUCCESS) { -goto out; -} -/* fall through */ +resend_aioreq(s, aio_req); +goto out; default: acb-ret = -EIO; error_report(%s, sd_strerror(rsp.result)); @@ -1073,7 +1062,7 @@ out: return ret; } -static int coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, +static void coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, struct iovec *iov, int niov, bool create, enum AIOCBState aiocb_type) { @@ -1153,8 +1142,6 @@ out: aio_flush_request, s); s-co_send = NULL; qemu_co_mutex_unlock(s-lock); - -return 0; } static int read_write_object(int fd, char *buf, uint64_t oid, int copies, @@ -1257,7 +1244,7 @@ out: return ret; } -static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req) +static void coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req) { SheepdogAIOCB *acb = aio_req-aiocb; bool create = false; @@ -1282,7 +1269,7 @@ static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req) dprintf(simultaneous CoW to % PRIx64 \n, aio_req-oid); QLIST_REMOVE(aio_req, aio_siblings); QLIST_INSERT_HEAD(s-pending_aio_head, aio_req, aio_siblings); -return SD_RES_SUCCESS; +return; } } @@ -1292,13 +1279,13 @@ static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req) } out: if (is_data_obj(aio_req-oid)) { -return add_aio_request(s, aio_req, acb-qiov-iov, acb-qiov-niov, - create, acb-aiocb_type); +add_aio_request(s, aio_req, acb-qiov-iov, acb-qiov-niov, create, +acb-aiocb_type); } else { struct iovec iov; iov.iov_base = s-inode; iov.iov_len = sizeof(s-inode); -return add_aio_request(s, aio_req, iov, 1, false, AIOCB_WRITE_UDATA); +add_aio_request(s, aio_req, iov, 1, false, AIOCB_WRITE_UDATA); } } @@ -1688,7 +1675,6 @@ static int sd_truncate(BlockDriverState *bs, int64_t offset) */ static void coroutine_fn sd_write_done(SheepdogAIOCB *acb) { -int ret; BDRVSheepdogState *s = acb-common.bs-opaque; struct iovec iov; AIOReq *aio_req; @@ -1710,18 +1696,13 @@ static void coroutine_fn sd_write_done(SheepdogAIOCB *acb) aio_req = alloc_aio_req(s, acb, vid_to_vdi_oid(s-inode.vdi_id), data_len, offset, 0, 0, offset); QLIST_INSERT_HEAD(s-inflight_aio_head, aio_req, aio_siblings); -
[Qemu-devel] [PATCH v2 5/9] sheepdog: reload inode outside of resend_aioreq
This prepares for using resend_aioreq() after reconnecting to the sheepdog server. Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp --- block/sheepdog.c | 33 +++-- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/block/sheepdog.c b/block/sheepdog.c index f25c7df..cde887b 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -222,6 +222,11 @@ static inline uint64_t data_oid_to_idx(uint64_t oid) return oid (MAX_DATA_OBJS - 1); } +static inline uint32_t oid_to_vid(uint64_t oid) +{ +return (oid ~VDI_BIT) VDI_SPACE_SHIFT; +} + static inline uint64_t vid_to_vdi_oid(uint32_t vid) { return VDI_BIT | ((uint64_t)vid VDI_SPACE_SHIFT); @@ -607,7 +612,7 @@ static int coroutine_fn add_aio_request(BDRVSheepdogState *s, AIOReq *aio_req, struct iovec *iov, int niov, bool create, enum AIOCBState aiocb_type); static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req); - +static int reload_inode(BDRVSheepdogState *s, uint32_t snapid, const char *tag); static AIOReq *find_pending_req(BDRVSheepdogState *s, uint64_t oid) { @@ -755,6 +760,19 @@ static void coroutine_fn aio_read_response(void *opaque) case SD_RES_SUCCESS: break; case SD_RES_READONLY: +if (s-inode.vdi_id == oid_to_vid(aio_req-oid)) { +ret = reload_inode(s, 0, ); +if (ret 0) { +goto out; +} +} + +if (is_data_obj(aio_req-oid)) { +aio_req-oid = vid_to_data_oid(s-inode.vdi_id, + data_oid_to_idx(aio_req-oid)); +} else { +aio_req-oid = vid_to_vdi_oid(s-inode.vdi_id); +} ret = resend_aioreq(s, aio_req); if (ret == SD_RES_SUCCESS) { goto out; @@ -1202,19 +1220,6 @@ static int coroutine_fn resend_aioreq(BDRVSheepdogState *s, AIOReq *aio_req) { SheepdogAIOCB *acb = aio_req-aiocb; bool create = false; -int ret; - -ret = reload_inode(s, 0, ); -if (ret 0) { -return ret; -} - -if (is_data_obj(aio_req-oid)) { -aio_req-oid = vid_to_data_oid(s-inode.vdi_id, - data_oid_to_idx(aio_req-oid)); -} else { -aio_req-oid = vid_to_vdi_oid(s-inode.vdi_id); -} /* check whether this request becomes a CoW one */ if (acb-aiocb_type == AIOCB_WRITE_UDATA is_data_obj(aio_req-oid)) { -- 1.8.1.3.566.gaa39828
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
Paolo, --On 24 July 2013 09:54:57 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Alex, can you add it to your series? (Note that you must set a timer slack of 1, because 0 is interpreted as default). Sure, will do. I'm guessing I'll have to look for that inside configure as well. -- Alex Bligh
Re: [Qemu-devel] [PATCH v2 01/11] target-ppc: Convert ppc cpu savevm to VMStateDescription
On 07/19/2013 05:32 AM, Anthony Liguori wrote: From: Alexey Kardashevskiy a...@ozlabs.ru The savevm code for the powerpc cpu emulation is currently based around the old register_savevm() rather than register_vmstate() method. It's also rather broken, missing some important state on some CPU models. This patch completely rewrites the savevm for target-ppc, using the new VMStateDescription approach. Exactly what needs to be saved in what configurations has been more carefully examined, too. This introduces a new version (5) of the cpu save format. The old load function is retained to support version 4 images. Signed-off-by: David Gibson da...@gibson.dropbear.id.au [aik: ppc cpu savevm convertion fixed to use PowerPCCPU instead of CPUPPCState] Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- target-ppc/cpu-qom.h| 4 + target-ppc/cpu.h| 8 +- target-ppc/machine.c| 531 target-ppc/translate_init.c | 2 + 4 files changed, 452 insertions(+), 93 deletions(-) diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 7132599..c660e3c 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -106,4 +106,8 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); +#ifndef CONFIG_USER_ONLY +extern const struct VMStateDescription vmstate_ppc_cpu; +#endif + #endif diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7a7b1bf..454ea13 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -948,7 +948,7 @@ struct CPUPPCState { #if defined(TARGET_PPC64) /* PowerPC 64 SLB area */ ppc_slb_t slb[64]; -int slb_nr; +int32_t slb_nr; #endif /* segment registers */ hwaddr htab_base; @@ -957,11 +957,11 @@ struct CPUPPCState { /* externally stored hash table */ uint8_t *external_htab; /* BATs */ -int nb_BATs; +uint32_t nb_BATs; target_ulong DBAT[2][8]; target_ulong IBAT[2][8]; /* PowerPC TLB registers (for 4xx, e500 and 60x software driven TLBs) */ -int nb_tlb; /* Total number of TLB */ +int32_t nb_tlb; /* Total number of TLB */ int tlb_per_way; /* Speed-up helper: used to avoid divisions at run time */ int nb_ways; /* Number of ways in the TLB set */ int last_way;/* Last used way used to allocate TLB in a LRU way */ @@ -1176,8 +1176,6 @@ static inline CPUPPCState *cpu_init(const char *cpu_model) #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list -#define CPU_SAVE_VERSION 4 - /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _user #define MMU_MODE1_SUFFIX _kernel diff --git a/target-ppc/machine.c b/target-ppc/machine.c index 2d10adb..12e1512 100644 --- a/target-ppc/machine.c +++ b/target-ppc/machine.c @@ -1,96 +1,12 @@ #include hw/hw.h #include hw/boards.h #include sysemu/kvm.h +#include helper_regs.h -void cpu_save(QEMUFile *f, void *opaque) +static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) { -CPUPPCState *env = (CPUPPCState *)opaque; -unsigned int i, j; -uint32_t fpscr; -target_ulong xer; - -for (i = 0; i 32; i++) -qemu_put_betls(f, env-gpr[i]); -#if !defined(TARGET_PPC64) -for (i = 0; i 32; i++) -qemu_put_betls(f, env-gprh[i]); -#endif -qemu_put_betls(f, env-lr); -qemu_put_betls(f, env-ctr); -for (i = 0; i 8; i++) -qemu_put_be32s(f, env-crf[i]); -xer = cpu_read_xer(env); -qemu_put_betls(f, xer); -qemu_put_betls(f, env-reserve_addr); -qemu_put_betls(f, env-msr); -for (i = 0; i 4; i++) -qemu_put_betls(f, env-tgpr[i]); -for (i = 0; i 32; i++) { -union { -float64 d; -uint64_t l; -} u; -u.d = env-fpr[i]; -qemu_put_be64(f, u.l); -} -fpscr = env-fpscr; -qemu_put_be32s(f, fpscr); -qemu_put_sbe32s(f, env-access_type); -#if defined(TARGET_PPC64) -qemu_put_betls(f, env-spr[SPR_ASR]); -qemu_put_sbe32s(f, env-slb_nr); -#endif -qemu_put_betls(f, env-spr[SPR_SDR1]); -for (i = 0; i 32; i++) -qemu_put_betls(f, env-sr[i]); -for (i = 0; i 2; i++) -for (j = 0; j 8; j++) -qemu_put_betls(f, env-DBAT[i][j]); -for (i = 0; i 2; i++) -for (j = 0; j 8; j++) -qemu_put_betls(f, env-IBAT[i][j]); -qemu_put_sbe32s(f, env-nb_tlb); -qemu_put_sbe32s(f, env-tlb_per_way); -qemu_put_sbe32s(f, env-nb_ways); -qemu_put_sbe32s(f, env-last_way); -qemu_put_sbe32s(f, env-id_tlbs); -qemu_put_sbe32s(f, env-nb_pids); -if (env-tlb.tlb6) { -
[Qemu-devel] [PATCH qom-next for-1.6 19/29] spitz: QOM'ify SpitzKeyboardState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/spitz.c | 17 ++--- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 0bf5c5c..70f23b3 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -215,8 +215,13 @@ static const int spitz_gpiomap[5] = { SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, }; +#define TYPE_SPITZ_KEYBOARD spitz-keyboard +#define SPITZ_KEYBOARD(obj) \ +OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD) + typedef struct { -SysBusDevice busdev; +SysBusDevice parent_obj; + qemu_irq sense[SPITZ_KEY_SENSE_NUM]; qemu_irq gpiomap[5]; int keymap[0x80]; @@ -461,8 +466,8 @@ static void spitz_keyboard_register(PXA2xxState *cpu) DeviceState *dev; SpitzKeyboardState *s; -dev = sysbus_create_simple(spitz-keyboard, -1, NULL); -s = FROM_SYSBUS(SpitzKeyboardState, SYS_BUS_DEVICE(dev)); +dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL); +s = SPITZ_KEYBOARD(dev); for (i = 0; i SPITZ_KEY_SENSE_NUM; i ++) qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu-gpio, spitz_gpio_key_sense[i])); @@ -487,11 +492,9 @@ static void spitz_keyboard_register(PXA2xxState *cpu) static int spitz_keyboard_init(SysBusDevice *dev) { -SpitzKeyboardState *s; +SpitzKeyboardState *s = SPITZ_KEYBOARD(dev); int i, j; -s = FROM_SYSBUS(SpitzKeyboardState, dev); - for (i = 0; i 0x80; i ++) s-keymap[i] = -1; for (i = 0; i SPITZ_KEY_SENSE_NUM + 1; i ++) @@ -1065,7 +1068,7 @@ static void spitz_keyboard_class_init(ObjectClass *klass, void *data) } static const TypeInfo spitz_keyboard_info = { -.name = spitz-keyboard, +.name = TYPE_SPITZ_KEYBOARD, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(SpitzKeyboardState), .class_init= spitz_keyboard_class_init, -- 1.8.1.4
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
Il 24/07/2013 10:01, Alex Bligh ha scritto: Part of it should be fixed by os_setup_early_signal_handling. This is corroborated by the fact that without os_setup_early_signal_handling Wine always works, and Windows breaks. This: http://www.windowstimestamp.com/description suggests that whilst WaitForMultipleEvents has a millisecond timeout, one can (see section 3.2) use these to wait for an object which is itself a timer and expires with - in this case - 100ns resolution which is probably enough. Again I know nothing about Windows so this may be completely wrong. This is roughly what the alarm timer code does on Windows. I also don't know much about the internals, I wouldn't worry too much. Paolo
Re: [Qemu-devel] trim in windows guest witch virtio
Il 24/07/2013 09:52, Libaiqing ha scritto: Hi paolo, With -M pc,trim works well in windows guest with ide device and ahci bus. About the filter driver,you mean do something in windows virtio-scsi driver,let it send unmap command to qemu? Yes, it must trap the IOCTL_STORAGE_MANAGE_DATA_SET_ATTRIBUTES ioctl and convert it to a SCSI UNMAP command. But your link may suggest that it's only needed on Windows 8 (and Server 2012). Paolo Thanks baiqing.
Re: [Qemu-devel] [PATCH v2 01/11] target-ppc: Convert ppc cpu savevm to VMStateDescription
Am 24.07.2013 10:16, schrieb Alexey Kardashevskiy: On 07/19/2013 05:32 AM, Anthony Liguori wrote: diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 79bfcd8..09ea944 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8449,6 +8449,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc-do_interrupt = ppc_cpu_do_interrupt; cc-dump_state = ppc_cpu_dump_state; cc-dump_statistics = ppc_cpu_dump_statistics; + +cpu_class_set_vmsd(cc, vmstate_ppc_cpu); } Does not apply on the current master from qemu.org, need this: diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index f97c0c7..f377b74 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8462,7 +8462,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc-get_phys_page_debug = ppc_cpu_get_phys_page_debug; #endif -cpu_class_set_vmsd(cc, vmstate_ppc_cpu); +dc-vmsd = vmstate_ppc_cpu; } static const TypeInfo ppc_cpu_type_info = { That would break ppc-linux-user. It needs to go into the #ifdef above, which obsoleted cpu_class_set_vmsd(). Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] [PATCH qom-next for-1.6 18/29] spitz: QOM'ify SLNANDState
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/spitz.c | 17 ++--- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 593b75e..0bf5c5c 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -50,8 +50,12 @@ #define FLASHCTL_RYBY (1 5) #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1) +#define TYPE_SL_NAND sl-nand +#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND) + typedef struct { -SysBusDevice busdev; +SysBusDevice parent_obj; + MemoryRegion iomem; DeviceState *nand; uint8_t ctl; @@ -147,7 +151,7 @@ static void sl_flash_register(PXA2xxState *cpu, int size) { DeviceState *dev; -dev = qdev_create(NULL, sl-nand); +dev = qdev_create(NULL, TYPE_SL_NAND); qdev_prop_set_uint8(dev, manf_id, NAND_MFR_SAMSUNG); if (size == FLASH_128M) @@ -159,12 +163,11 @@ static void sl_flash_register(PXA2xxState *cpu, int size) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); } -static int sl_nand_init(SysBusDevice *dev) { -SLNANDState *s; +static int sl_nand_init(SysBusDevice *dev) +{ +SLNANDState *s = SL_NAND(dev); DriveInfo *nand; -s = FROM_SYSBUS(SLNANDState, dev); - s-ctl = 0; nand = drive_get(IF_MTD, 0, 0); s-nand = nand_init(nand ? nand-bdrv : NULL, s-manf_id, s-chip_id); @@ -1027,7 +1030,7 @@ static void sl_nand_class_init(ObjectClass *klass, void *data) } static const TypeInfo sl_nand_info = { -.name = sl-nand, +.name = TYPE_SL_NAND, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(SLNANDState), .class_init= sl_nand_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 02/29] highbank: QOM'ify HighbankRegsState
Add type constant and use QOM casts. Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/highbank.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index be264d3..35d5511 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -116,8 +116,15 @@ static const MemoryRegionOps hb_mem_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +#define TYPE_HIGHBANK_REGISTERS highbank-regs +#define HIGHBANK_REGISTERS(obj) \ +OBJECT_CHECK(HighbankRegsState, (obj), TYPE_HIGHBANK_REGISTERS) + typedef struct { -SysBusDevice busdev; +/* private */ +SysBusDevice parent_obj; +/* public */ + MemoryRegion *iomem; uint32_t regs[NUM_REGS]; } HighbankRegsState; @@ -135,8 +142,7 @@ static VMStateDescription vmstate_highbank_regs = { static void highbank_regs_reset(DeviceState *dev) { -SysBusDevice *sys_dev = SYS_BUS_DEVICE(dev); -HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, sys_dev); +HighbankRegsState *s = HIGHBANK_REGISTERS(dev); s-regs[0x40] = 0x05F20121; s-regs[0x41] = 0x2; @@ -146,7 +152,7 @@ static void highbank_regs_reset(DeviceState *dev) static int highbank_regs_init(SysBusDevice *dev) { -HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, dev); +HighbankRegsState *s = HIGHBANK_REGISTERS(dev); s-iomem = g_new(MemoryRegion, 1); memory_region_init_io(s-iomem, OBJECT(s), hb_mem_ops, s-regs, @@ -168,7 +174,7 @@ static void highbank_regs_class_init(ObjectClass *klass, void *data) } static const TypeInfo highbank_regs_info = { -.name = highbank-regs, +.name = TYPE_HIGHBANK_REGISTERS, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(HighbankRegsState), .class_init= highbank_regs_class_init, -- 1.8.1.4
Re: [Qemu-devel] [sheepdog] [PATCH v2 0/9] sheepdog: reconnect server after connection failure
On Wed, Jul 24, 2013 at 04:56:24PM +0900, MORITA Kazutaka wrote: Currently, if a sheepdog server exits, all the connecting VMs need to be restarted. This series implements a feature to reconnect the server, and enables us to do online sheepdog upgrade and avoid restarting VMs when sheepdog servers crash unexpectedly. It doesn't work on my test. I tried start linux-0.2.img stored in sheepdog cluster and then 1. did some buffered writes 2. restart sheep that this QEMU VM connected to. 3. $ sync I got following error: $ ../qemu/x86_64-softmmu/qemu-system-x86_64 --enable-kvm -m 1024 -hda sheepdog:test qemu-system-x86_64: failed to get the header, Resource temporarily unavailable qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused ...repeat... QEMU version is master tip Thanks Yuan
[Qemu-devel] [PATCH] RFC v2: hcd-ohci: add dma error handling
Current hcd-ohci does not handle DMA errors. However they may happen so here we introduce simple error handling. On such errors, a typical OHCI will stop operating, signal the guest about the error by sending UnrecoverableError Event, set itself into error state and set Detected Parity Error in its PCI config space to signal that it got an error and so does the patch. Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- As I am just getting familiar with USB stack, this all may be very wrong. Comments are very welcome. The open questions are: 1. if a physical device once reported UnrecoverableError, what is it expected to be able to do after that? Should ohci_hcd module reloading bring it back to life? With this patch, OHCI dies till reboot (but at least it does not break other subsystems). 2. is UnrecoverableError a correct event here? Thanks! --- hw/usb/hcd-ohci.c | 164 ++ 1 file changed, 117 insertions(+), 47 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 2bab8ff..3888ca9 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -308,6 +308,8 @@ struct ohci_iso_td { #define OHCI_HRESET_FSBIR (1 0) +static void ohci_stop(OHCIState *ohci); + /* Update IRQ levels */ static inline void ohci_intr_update(OHCIState *ohci) { @@ -508,11 +510,13 @@ static inline int get_dwords(OHCIState *ohci, addr += ohci-localmem_base; for (i = 0; i num; i++, buf++, addr += sizeof(*buf)) { -dma_memory_read(ohci-as, addr, buf, sizeof(*buf)); +if (dma_memory_read(ohci-as, addr, buf, sizeof(*buf))) { +return -1; +} *buf = le32_to_cpu(*buf); } -return 1; +return 0; } /* Put an array of dwords in to main memory */ @@ -525,10 +529,12 @@ static inline int put_dwords(OHCIState *ohci, for (i = 0; i num; i++, buf++, addr += sizeof(*buf)) { uint32_t tmp = cpu_to_le32(*buf); -dma_memory_write(ohci-as, addr, tmp, sizeof(tmp)); +if (dma_memory_write(ohci-as, addr, tmp, sizeof(tmp))) { +return -1; +} } -return 1; +return 0; } /* Get an array of words from main memory */ @@ -540,11 +546,13 @@ static inline int get_words(OHCIState *ohci, addr += ohci-localmem_base; for (i = 0; i num; i++, buf++, addr += sizeof(*buf)) { -dma_memory_read(ohci-as, addr, buf, sizeof(*buf)); +if (dma_memory_read(ohci-as, addr, buf, sizeof(*buf))) { +return -1; +} *buf = le16_to_cpu(*buf); } -return 1; +return 0; } /* Put an array of words in to main memory */ @@ -557,10 +565,12 @@ static inline int put_words(OHCIState *ohci, for (i = 0; i num; i++, buf++, addr += sizeof(*buf)) { uint16_t tmp = cpu_to_le16(*buf); -dma_memory_write(ohci-as, addr, tmp, sizeof(tmp)); +if (dma_memory_write(ohci-as, addr, tmp, sizeof(tmp))) { +return -1; +} } -return 1; +return 0; } static inline int ohci_read_ed(OHCIState *ohci, @@ -578,15 +588,15 @@ static inline int ohci_read_td(OHCIState *ohci, static inline int ohci_read_iso_td(OHCIState *ohci, dma_addr_t addr, struct ohci_iso_td *td) { -return (get_dwords(ohci, addr, (uint32_t *)td, 4) +return (get_dwords(ohci, addr, (uint32_t *)td, 4) || get_words(ohci, addr + 16, td-offset, 8)); } static inline int ohci_read_hcca(OHCIState *ohci, dma_addr_t addr, struct ohci_hcca *hcca) { -dma_memory_read(ohci-as, addr + ohci-localmem_base, hcca, sizeof(*hcca)); -return 1; +return dma_memory_read(ohci-as, addr + ohci-localmem_base, + hcca, sizeof(*hcca)); } static inline int ohci_put_ed(OHCIState *ohci, @@ -610,23 +620,22 @@ static inline int ohci_put_td(OHCIState *ohci, static inline int ohci_put_iso_td(OHCIState *ohci, dma_addr_t addr, struct ohci_iso_td *td) { -return (put_dwords(ohci, addr, (uint32_t *)td, 4) +return (put_dwords(ohci, addr, (uint32_t *)td, 4) || put_words(ohci, addr + 16, td-offset, 8)); } static inline int ohci_put_hcca(OHCIState *ohci, dma_addr_t addr, struct ohci_hcca *hcca) { -dma_memory_write(ohci-as, - addr + ohci-localmem_base + HCCA_WRITEBACK_OFFSET, - (char *)hcca + HCCA_WRITEBACK_OFFSET, - HCCA_WRITEBACK_SIZE); -return 1; +return dma_memory_write(ohci-as, +addr + ohci-localmem_base + HCCA_WRITEBACK_OFFSET, +(char *)hcca + HCCA_WRITEBACK_OFFSET, +HCCA_WRITEBACK_SIZE); } /* Read/Write the contents of a TD from/to main memory. */ -static void ohci_copy_td(OHCIState *ohci, struct ohci_td *td, - uint8_t *buf,
[Qemu-devel] [PATCH v3] spapr-vscsi: add task management
At the moment the guest kernel issues two types of task management requests to the hypervisor - task about and lun reset. This adds handling for these tasks. As spapr-vscsi starts calling scsi_req_cancel(), free_request callback was implemented. As virtio-vscsi, spapr-vscsi does not handle CLEAR_ACA either as CDB control byte does not seem to be used at all so NACA bit is not set to the guest so the guest has no good reason to call CLEAR_ACA task. Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- Changes: 2013/07/23: * remove unnecessary free_request callback 2013/07/22: * fixed LUN_RESET (it used to clear requests while it should reset a device) * added handling of ABORT_TASK_SET/CLEAR_TASK_SET Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- hw/scsi/spapr_vscsi.c | 65 +-- 1 file changed, 48 insertions(+), 17 deletions(-) diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index 46f4455..50993fa 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -117,6 +117,20 @@ static struct vscsi_req *vscsi_get_req(VSCSIState *s) return NULL; } +static struct vscsi_req *vscsi_find_req(VSCSIState *s, uint64_t srp_tag) +{ +vscsi_req *req; +int i; + +for (i = 0; i VSCSI_REQ_LIMIT; i++) { +req = s-reqs[i]; +if (req-iu.srp.cmd.tag == srp_tag) { +return req; +} +} +return NULL; +} + static void vscsi_put_req(vscsi_req *req) { if (req-sreq != NULL) { @@ -753,40 +767,57 @@ static int vscsi_queue_cmd(VSCSIState *s, vscsi_req *req) static int vscsi_process_tsk_mgmt(VSCSIState *s, vscsi_req *req) { union viosrp_iu *iu = req-iu; -int fn; +vscsi_req *tmpreq; +SCSIDevice *sdev; +int i, lun = 0, error = 0; fprintf(stderr, vscsi_process_tsk_mgmt %02x\n, iu-srp.tsk_mgmt.tsk_mgmt_func); switch (iu-srp.tsk_mgmt.tsk_mgmt_func) { -#if 0 /* We really don't deal with these for now */ case SRP_TSK_ABORT_TASK: -fn = ABORT_TASK; +tmpreq = vscsi_find_req(s, req-iu.srp.tsk_mgmt.task_tag); +if (tmpreq tmpreq-sreq) { +assert(tmpreq-sreq-hba_private); +scsi_req_cancel(tmpreq-sreq); +} break; + +case SRP_TSK_LUN_RESET: +sdev = vscsi_device_find(s-bus, req-iu.srp.tsk_mgmt.lun, lun); +if (sdev) { +qdev_reset_all(sdev-qdev); +} +break; + case SRP_TSK_ABORT_TASK_SET: -fn = ABORT_TASK_SET; -break; case SRP_TSK_CLEAR_TASK_SET: -fn = CLEAR_TASK_SET; -break; -case SRP_TSK_LUN_RESET: -fn = LOGICAL_UNIT_RESET; +for (i = 0; i VSCSI_REQ_LIMIT; i++) { +tmpreq = s-reqs[i]; +if (tmpreq-iu.srp.cmd.lun != req-iu.srp.tsk_mgmt.lun) { +continue; +} +if (!tmpreq-active || !tmpreq-sreq) { +continue; +} +assert(tmpreq-sreq-hba_private); +scsi_req_cancel(tmpreq-sreq); +} break; + case SRP_TSK_CLEAR_ACA: -fn = CLEAR_ACA; -break; -#endif default: -fn = 0; +error = 1; } -if (fn) { -/* XXX Send/Handle target task management */ -; + +if (!error) { +vscsi_send_rsp(s, req, GOOD, 0, 0); } else { vscsi_makeup_sense(s, req, ILLEGAL_REQUEST, 0x20, 0); vscsi_send_rsp(s, req, CHECK_CONDITION, 0, 0); } -return !fn; + +return 1; } static int vscsi_handle_srp_req(VSCSIState *s, vscsi_req *req) -- 1.8.3.2
Re: [Qemu-devel] [PATCH v2 00/11] pseries: migration and QOM support
Am 23.07.2013 16:38, schrieb Anthony Liguori: Anthony Liguori aligu...@us.ibm.com writes: This series is based on Alexey's series: spapr: migration, pci, msi, power8 Which in turn was based on work by David Gibson. I've removed the bits not related to migration and made the following changes: 1) QOMify TCE tables and XICS 2) Do everything in terms of VMStateDescriptions 3) Fix endianness problem with TCE table translation a) Drop the VMSTATE_DIVIDE thing in the process I've tested this with a TCG pseries guest on an x86_64 host. Since v1, I've incorporated some fixes that Alexey posted upon testing with KVM. Ping. (It's nice to be on the sending side of a ping for a change :-) ) Being on the sending side, many patches are lacking your Sob. ;) Patch 6, as possibly pointed out before, has a [David Gibson: ] comment without his Sob. And patch 5 has a weird order of Sobs and comments. Regards, Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
[...] http://social.msdn.microsoft.com/Forums/vstudio/en-US/e8a7cb1e-9edd-4ee3-982e-f66b7bf6ae44/improve-accuracy-waitforsingleobject suggest that WaitFor{Single,Multiple}Objects can have pretty appalling latency anyway (100ms!), and there's no evidence that's limited by making one of the FDs (or objects) ready. ... especially when making one of the FDs ready would likely have the same latency in some internal Windows thread that implements timers. In these circumstances, I'd question whether we gain anything by worrying about timer resolution. Does hpet emulation care about it? Part of it should be fixed by os_setup_early_signal_handling. This is corroborated by the fact that without os_setup_early_signal_handling Wine always works, and Windows breaks. Paolo
[Qemu-devel] [PATCH qom-next for-1.6 0/4] audio: QOM cast cleanups
Hello, This series eliminates FROM_SYSBUS() in hw/audio/. Regards, Andreas Cc: Hu Tao hu...@cn.fujitsu.com Andreas Färber (4): cs4231: QOM'ify audio/marvell_88w8618: QOM'ify milkymist-ac97: QOM'ify pl041: QOM'ify hw/audio/cs4231.c | 15 ++- hw/audio/marvell_88w8618.c | 14 +- hw/audio/milkymist-ac97.c | 13 + hw/audio/pl041.c | 45 + 4 files changed, 53 insertions(+), 34 deletions(-) -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 1/4] cs4231: QOM'ify
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/audio/cs4231.c | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/audio/cs4231.c b/hw/audio/cs4231.c index fabe9e6..d19195a 100644 --- a/hw/audio/cs4231.c +++ b/hw/audio/cs4231.c @@ -33,8 +33,13 @@ #define CS_DREGS 32 #define CS_MAXDREG (CS_DREGS - 1) +#define TYPE_CS4231 SUNW,CS4231 +#define CS4231(obj) \ +OBJECT_CHECK(CSState, (obj), TYPE_CS4231) + typedef struct CSState { -SysBusDevice busdev; +SysBusDevice parent_obj; + MemoryRegion iomem; qemu_irq irq; uint32_t regs[CS_REGS]; @@ -47,7 +52,7 @@ typedef struct CSState { static void cs_reset(DeviceState *d) { -CSState *s = container_of(d, CSState, busdev.qdev); +CSState *s = CS4231(d); memset(s-regs, 0, CS_REGS * 4); memset(s-dregs, 0, CS_DREGS); @@ -111,7 +116,7 @@ static void cs_mem_write(void *opaque, hwaddr addr, break; case 4: if (val 1) { -cs_reset(s-busdev.qdev); +cs_reset(DEVICE(s)); } val = 0x7f; s-regs[saddr] = val; @@ -142,7 +147,7 @@ static const VMStateDescription vmstate_cs4231 = { static int cs4231_init1(SysBusDevice *dev) { -CSState *s = FROM_SYSBUS(CSState, dev); +CSState *s = CS4231(dev); memory_region_init_io(s-iomem, OBJECT(s), cs_mem_ops, s, cs4321, CS_SIZE); @@ -168,7 +173,7 @@ static void cs4231_class_init(ObjectClass *klass, void *data) } static const TypeInfo cs4231_info = { -.name = SUNW,CS4231, +.name = TYPE_CS4231, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(CSState), .class_init= cs4231_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 2/4] audio/marvell_88w8618: QOM'ify
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/audio/marvell_88w8618.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index b40ea43..97194ce 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -36,8 +36,13 @@ #define MP_AUDIO_CLOCK_24MHZ(1 9) #define MP_AUDIO_MONO (1 14) +#define TYPE_MV88W8618_AUDIO mv88w8618_audio +#define MV88W8618_AUDIO(obj) \ +OBJECT_CHECK(mv88w8618_audio_state, (obj), TYPE_MV88W8618_AUDIO) + typedef struct mv88w8618_audio_state { -SysBusDevice busdev; +SysBusDevice parent_obj; + MemoryRegion iomem; qemu_irq irq; uint32_t playback_mode; @@ -219,8 +224,7 @@ static void mv88w8618_audio_write(void *opaque, hwaddr offset, static void mv88w8618_audio_reset(DeviceState *d) { -mv88w8618_audio_state *s = FROM_SYSBUS(mv88w8618_audio_state, - SYS_BUS_DEVICE(d)); +mv88w8618_audio_state *s = MV88W8618_AUDIO(d); s-playback_mode = 0; s-status = 0; @@ -238,7 +242,7 @@ static const MemoryRegionOps mv88w8618_audio_ops = { static int mv88w8618_audio_init(SysBusDevice *dev) { -mv88w8618_audio_state *s = FROM_SYSBUS(mv88w8618_audio_state, dev); +mv88w8618_audio_state *s = MV88W8618_AUDIO(dev); sysbus_init_irq(dev, s-irq); @@ -287,7 +291,7 @@ static void mv88w8618_audio_class_init(ObjectClass *klass, void *data) } static const TypeInfo mv88w8618_audio_info = { -.name = mv88w8618_audio, +.name = TYPE_MV88W8618_AUDIO, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(mv88w8618_audio_state), .class_init= mv88w8618_audio_class_init, -- 1.8.1.4
Re: [Qemu-devel] [PATCH 10/16] dimm: add busy slot check and slot auto-allocation
On Tue, 23 Jul 2013 19:09:26 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 18:23, Igor Mammedov ha scritto: - if slot property is not specified on -device/device_add command, treat default value as request for assigning DimmDevice to the first free slot. Even with -m instead of -numa mem, I think this is problematic because we still need to separate the host and guest parts of the DIMM device. -numa mem (or the QMP command that Wanlong added) will be necessary to allocate memory on the host side before adding a DIMM. why not do host allocation part at the same time when DIMM is added, is there a real need to separate DIMM device? I probably miss something but -numa mem option and co aside what problem couldn't be solved during DIMM device initialization and would require a split DIMM device? So slots will have three states: free (created with -m), allocated (a free slot moves to this state with -numa mem...,populated=no when migrating, or with the QMP command for regular hotplug), populated (an allocated slot moves to this state with -device dimm). You would be able to plug a DIMM only into an allocated slot, and the size will be specified on the slot rather than the DIMM device. 'slot' property is there only for migration sake to provide stable numeric ID for QEMU-ACPI BIOS interface. It's not used for any other purpose and wasn't intended for any other usage.. on baremetal slot has noting to do with size of plugged in DIMM, why we would model it other way if it only brings problems: like predefined size, allocated, free etc. I think slot should be either free or busy. In general, I don't think free slots should be managed by the DimmBus, and host vs. guest separation should be there even if we accept your -m extension (doesn't look bad at all, I must say). Paolo
[Qemu-devel] [PATCH qom-next for-1.6 22/29] stellaris: QOM'ify stellaris_adc_state
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/stellaris.c | 27 --- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 15093ba..27205d0 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -896,9 +896,13 @@ static int stellaris_i2c_init(SysBusDevice *sbd) #define STELLARIS_ADC_FIFO_EMPTY0x0100 #define STELLARIS_ADC_FIFO_FULL 0x1000 -typedef struct -{ -SysBusDevice busdev; +#define TYPE_STELLARIS_ADC stellaris-adc +#define STELLARIS_ADC(obj) \ +OBJECT_CHECK(stellaris_adc_state, (obj), TYPE_STELLARIS_ADC) + +typedef struct StellarisADCState { +SysBusDevice parent_obj; + MemoryRegion iomem; uint32_t actss; uint32_t ris; @@ -1147,21 +1151,22 @@ static const VMStateDescription vmstate_stellaris_adc = { } }; -static int stellaris_adc_init(SysBusDevice *dev) +static int stellaris_adc_init(SysBusDevice *sbd) { -stellaris_adc_state *s = FROM_SYSBUS(stellaris_adc_state, dev); +DeviceState *dev = DEVICE(sbd); +stellaris_adc_state *s = STELLARIS_ADC(dev); int n; for (n = 0; n 4; n++) { -sysbus_init_irq(dev, s-irq[n]); +sysbus_init_irq(sbd, s-irq[n]); } memory_region_init_io(s-iomem, OBJECT(s), stellaris_adc_ops, s, adc, 0x1000); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); stellaris_adc_reset(s); -qdev_init_gpio_in(dev-qdev, stellaris_adc_trigger, 1); -vmstate_register(dev-qdev, -1, vmstate_stellaris_adc, s); +qdev_init_gpio_in(dev, stellaris_adc_trigger, 1); +vmstate_register(dev, -1, vmstate_stellaris_adc, s); return 0; } @@ -1218,7 +1223,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, flash_size, sram_size, kernel_filename, cpu_model); if (board-dc1 (1 16)) { -dev = sysbus_create_varargs(stellaris-adc, 0x40038000, +dev = sysbus_create_varargs(TYPE_STELLARIS_ADC, 0x40038000, pic[14], pic[15], pic[16], pic[17], NULL); adc = qdev_get_gpio_in(dev, 0); } else { @@ -1396,7 +1401,7 @@ static void stellaris_adc_class_init(ObjectClass *klass, void *data) } static const TypeInfo stellaris_adc_info = { -.name = stellaris-adc, +.name = TYPE_STELLARIS_ADC, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(stellaris_adc_state), .class_init= stellaris_adc_class_init, -- 1.8.1.4
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
--On 24 July 2013 09:01:22 +0100 Alex Bligh a...@alex.org.uk wrote: Most 'reasonable' POSIX compliant operating systems have ppoll Really? I could find no manpages for any of Solaris and *BSD. OK I shall (re)research that then! I suppose select() / pselect() is an alternative when there are few FDs. Looks like I was wrong. However, pselect support is pretty wide. -- Alex Bligh
[Qemu-devel] [PATCH qom-next for-1.6 3/4] milkymist-ac97: QOM'ify
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/audio/milkymist-ac97.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/hw/audio/milkymist-ac97.c b/hw/audio/milkymist-ac97.c index 133de4e..9c0f7a0 100644 --- a/hw/audio/milkymist-ac97.c +++ b/hw/audio/milkymist-ac97.c @@ -51,8 +51,13 @@ enum { CTRL_EN = (10), }; +#define TYPE_MILKYMIST_AC97 milkymist-ac97 +#define MILKYMIST_AC97(obj) \ +OBJECT_CHECK(MilkymistAC97State, (obj), TYPE_MILKYMIST_AC97) + struct MilkymistAC97State { -SysBusDevice busdev; +SysBusDevice parent_obj; + MemoryRegion regs_region; QEMUSoundCard card; @@ -258,7 +263,7 @@ static void ac97_out_cb(void *opaque, int free_b) static void milkymist_ac97_reset(DeviceState *d) { -MilkymistAC97State *s = container_of(d, MilkymistAC97State, busdev.qdev); +MilkymistAC97State *s = MILKYMIST_AC97(d); int i; for (i = 0; i R_MAX; i++) { @@ -280,7 +285,7 @@ static int ac97_post_load(void *opaque, int version_id) static int milkymist_ac97_init(SysBusDevice *dev) { -MilkymistAC97State *s = FROM_SYSBUS(typeof(*s), dev); +MilkymistAC97State *s = MILKYMIST_AC97(dev); struct audsettings as; sysbus_init_irq(dev, s-crrequest_irq); @@ -330,7 +335,7 @@ static void milkymist_ac97_class_init(ObjectClass *klass, void *data) } static const TypeInfo milkymist_ac97_info = { -.name = milkymist-ac97, +.name = TYPE_MILKYMIST_AC97, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(MilkymistAC97State), .class_init= milkymist_ac97_class_init, -- 1.8.1.4
[Qemu-devel] [PATCH qom-next for-1.6 4/4] pl041: QOM'ify
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/audio/pl041.c | 45 + 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c index 7d331b9..4d7a329 100644 --- a/hw/audio/pl041.c +++ b/hw/audio/pl041.c @@ -70,8 +70,12 @@ typedef struct { uint8_t rx_sample_size; } pl041_channel; -typedef struct { -SysBusDevice busdev; +#define TYPE_PL041 pl041 +#define PL041(obj) OBJECT_CHECK(PL041State, (obj), TYPE_PL041) + +typedef struct PL041State { +SysBusDevice parent_obj; + MemoryRegion iomem; qemu_irq irq; @@ -80,7 +84,7 @@ typedef struct { pl041_regfile regs; pl041_channel fifo1; lm4549_state codec; -} pl041_state; +} PL041State; static const unsigned char pl041_default_id[8] = { @@ -107,7 +111,7 @@ static const char *get_reg_name(hwaddr offset) } #endif -static uint8_t pl041_compute_periphid3(pl041_state *s) +static uint8_t pl041_compute_periphid3(PL041State *s) { uint8_t id3 = 1; /* One channel */ @@ -142,7 +146,7 @@ static uint8_t pl041_compute_periphid3(pl041_state *s) return id3; } -static void pl041_reset(pl041_state *s) +static void pl041_reset(PL041State *s) { DBG_L1(pl041_reset\n); @@ -156,7 +160,7 @@ static void pl041_reset(pl041_state *s) } -static void pl041_fifo1_write(pl041_state *s, uint32_t value) +static void pl041_fifo1_write(PL041State *s, uint32_t value) { pl041_channel *channel = s-fifo1; pl041_fifo *fifo = s-fifo1.tx_fifo; @@ -239,7 +243,7 @@ static void pl041_fifo1_write(pl041_state *s, uint32_t value) DBG_L2(fifo1_push sr1 = 0x%08x\n, s-regs.sr1); } -static void pl041_fifo1_transmit(pl041_state *s) +static void pl041_fifo1_transmit(PL041State *s) { pl041_channel *channel = s-fifo1; pl041_fifo *fifo = s-fifo1.tx_fifo; @@ -291,7 +295,7 @@ static void pl041_fifo1_transmit(pl041_state *s) } } -static void pl041_isr1_update(pl041_state *s) +static void pl041_isr1_update(PL041State *s) { /* Update ISR1 */ if (s-regs.sr1 TXUNDERRUN) { @@ -320,7 +324,7 @@ static void pl041_isr1_update(pl041_state *s) static void pl041_request_data(void *opaque) { -pl041_state *s = (pl041_state *)opaque; +PL041State *s = (PL041State *)opaque; /* Trigger pending transfers */ pl041_fifo1_transmit(s); @@ -330,7 +334,7 @@ static void pl041_request_data(void *opaque) static uint64_t pl041_read(void *opaque, hwaddr offset, unsigned size) { -pl041_state *s = (pl041_state *)opaque; +PL041State *s = (PL041State *)opaque; int value; if ((offset = PL041_periphid0) (offset = PL041_pcellid3)) { @@ -364,7 +368,7 @@ static uint64_t pl041_read(void *opaque, hwaddr offset, static void pl041_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { -pl041_state *s = (pl041_state *)opaque; +PL041State *s = (PL041State *)opaque; uint16_t control, data; uint32_t result; @@ -504,7 +508,7 @@ static void pl041_write(void *opaque, hwaddr offset, static void pl041_device_reset(DeviceState *d) { -pl041_state *s = DO_UPCAST(pl041_state, busdev.qdev, d); +PL041State *s = PL041(d); pl041_reset(s); } @@ -517,7 +521,7 @@ static const MemoryRegionOps pl041_ops = { static int pl041_init(SysBusDevice *dev) { -pl041_state *s = FROM_SYSBUS(pl041_state, dev); +PL041State *s = PL041(dev); DBG_L1(pl041_init 0x%08x\n, (uint32_t)s); @@ -603,12 +607,12 @@ static const VMStateDescription vmstate_pl041 = { .version_id = 1, .minimum_version_id = 1, .fields = (VMStateField[]) { -VMSTATE_UINT32(fifo_depth, pl041_state), -VMSTATE_STRUCT(regs, pl041_state, 0, +VMSTATE_UINT32(fifo_depth, PL041State), +VMSTATE_STRUCT(regs, PL041State, 0, vmstate_pl041_regfile, pl041_regfile), -VMSTATE_STRUCT(fifo1, pl041_state, 0, +VMSTATE_STRUCT(fifo1, PL041State, 0, vmstate_pl041_channel, pl041_channel), -VMSTATE_STRUCT(codec, pl041_state, 0, +VMSTATE_STRUCT(codec, PL041State, 0, vmstate_lm4549_state, lm4549_state), VMSTATE_END_OF_LIST() } @@ -616,7 +620,8 @@ static const VMStateDescription vmstate_pl041 = { static Property pl041_device_properties[] = { /* Non-compact FIFO depth property */ -DEFINE_PROP_UINT32(nc_fifo_depth, pl041_state, fifo_depth, DEFAULT_FIFO_DEPTH), +DEFINE_PROP_UINT32(nc_fifo_depth, PL041State, fifo_depth, + DEFAULT_FIFO_DEPTH), DEFINE_PROP_END_OF_LIST(), }; @@ -633,9 +638,9 @@ static void pl041_device_class_init(ObjectClass *klass, void *data) } static const TypeInfo pl041_device_info = { -.name = pl041, +.name = TYPE_PL041, .parent= TYPE_SYS_BUS_DEVICE, -.instance_size = sizeof(pl041_state), +
[Qemu-devel] [PATCH qom-next for-1.6 25/29] strongarm: QOM'ify StrongARMGPIOInfo
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/arm/strongarm.c | 25 ++--- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 78211a0..efb56b3 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -464,6 +464,10 @@ static const TypeInfo strongarm_rtc_sysbus_info = { #define GEDR 0x18 #define GAFR 0x1c +#define TYPE_STRONGARM_GPIO strongarm-gpio +#define STRONGARM_GPIO(obj) \ +OBJECT_CHECK(StrongARMGPIOInfo, (obj), TYPE_STRONGARM_GPIO) + typedef struct StrongARMGPIOInfo StrongARMGPIOInfo; struct StrongARMGPIOInfo { SysBusDevice busdev; @@ -630,7 +634,7 @@ static DeviceState *strongarm_gpio_init(hwaddr base, DeviceState *dev; int i; -dev = qdev_create(NULL, strongarm-gpio); +dev = qdev_create(NULL, TYPE_STRONGARM_GPIO); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); @@ -641,24 +645,23 @@ static DeviceState *strongarm_gpio_init(hwaddr base, return dev; } -static int strongarm_gpio_initfn(SysBusDevice *dev) +static int strongarm_gpio_initfn(SysBusDevice *sbd) { -StrongARMGPIOInfo *s; +DeviceState *dev = DEVICE(sbd); +StrongARMGPIOInfo *s = STRONGARM_GPIO(dev); int i; -s = FROM_SYSBUS(StrongARMGPIOInfo, dev); - -qdev_init_gpio_in(dev-qdev, strongarm_gpio_set, 28); -qdev_init_gpio_out(dev-qdev, s-handler, 28); +qdev_init_gpio_in(dev, strongarm_gpio_set, 28); +qdev_init_gpio_out(dev, s-handler, 28); memory_region_init_io(s-iomem, OBJECT(s), strongarm_gpio_ops, s, gpio, 0x1000); -sysbus_init_mmio(dev, s-iomem); +sysbus_init_mmio(sbd, s-iomem); for (i = 0; i 11; i++) { -sysbus_init_irq(dev, s-irqs[i]); +sysbus_init_irq(sbd, s-irqs[i]); } -sysbus_init_irq(dev, s-irqX); +sysbus_init_irq(sbd, s-irqX); return 0; } @@ -690,7 +693,7 @@ static void strongarm_gpio_class_init(ObjectClass *klass, void *data) } static const TypeInfo strongarm_gpio_info = { -.name = strongarm-gpio, +.name = TYPE_STRONGARM_GPIO, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(StrongARMGPIOInfo), .class_init= strongarm_gpio_class_init, -- 1.8.1.4
Re: [Qemu-devel] [PATCH 03/16] vl: convert -m to qemu_opts_parse()
On Tue, 23 Jul 2013 19:11:31 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 18:22, Igor Mammedov ha scritto: Signed-off-by: Igor Mammedov imamm...@redhat.com --- qemu-options.hx |9 +++-- vl.c| 53 +++-- 2 files changed, 54 insertions(+), 8 deletions(-) diff --git a/qemu-options.hx b/qemu-options.hx index 137a39b..f799b3d 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -210,8 +210,13 @@ use is discouraged as it may be removed from future versions. ETEXI DEF(m, HAS_ARG, QEMU_OPTION_m, --m megs set virtual RAM size to megs MB [default= -stringify(DEFAULT_RAM_SIZE) ]\n, QEMU_ARCH_ALL) +-m [mem=]megs[,slots=n,maxmem=size]\n +set virtual RAM size to megs MB [default= +stringify(DEFAULT_RAM_SIZE) ]\n +mem=start-up memory amount\n +slots=maximum number of hotplug slots\n +maxmem=maximum total amount of memory\n, +QEMU_ARCH_ALL) STEXI @item -m @var{megs} @findex -m diff --git a/vl.c b/vl.c index bf0c658..16c6f1e 100644 --- a/vl.c +++ b/vl.c @@ -516,6 +516,27 @@ static QemuOptsList qemu_realtime_opts = { }, }; +static QemuOptsList qemu_mem_opts = { +.name = memory-opts, +.implied_opt_name = mem, +.head = QTAILQ_HEAD_INITIALIZER(qemu_mem_opts.head), This should have .merge_lists = true, Just to clarify: is it to allow syntax like? -m 512 -m slots=X -m maxmem=Y Paolo +.desc = { +{ +.name = mem, +.type = QEMU_OPT_SIZE, +}, +{ +.name = slots, +.type = QEMU_OPT_NUMBER, +}, +{ +.name = maxmem, +.type = QEMU_OPT_SIZE, +}, +{ /* end of list */ } +}, +}; + const char *qemu_get_vm_name(void) { return qemu_name; @@ -2933,6 +2954,7 @@ int main(int argc, char **argv, char **envp) qemu_add_opts(qemu_object_opts); qemu_add_opts(qemu_tpmdev_opts); qemu_add_opts(qemu_realtime_opts); +qemu_add_opts(qemu_mem_opts); runstate_init(); @@ -3224,21 +3246,40 @@ int main(int argc, char **argv, char **envp) exit(0); break; case QEMU_OPTION_m: { -int64_t value; uint64_t sz; -char *end; +const char *end; +char *s; -value = strtosz(optarg, end); -if (value 0 || *end) { -fprintf(stderr, qemu: invalid ram size: %s\n, optarg); +opts = qemu_opts_parse(qemu_find_opts(memory-opts), + optarg, 1); +if (!opts) { exit(1); } -sz = QEMU_ALIGN_UP((uint64_t)value, 8192); + +/* fixup legacy sugffix-less format */ +end = qemu_opt_get(opts, mem); +if (g_ascii_isdigit(end[strlen(end) - 1])) { +s = g_strconcat(end, M, NULL); +qemu_opt_set(opts, mem, s); +g_free(s); +} + +sz = QEMU_ALIGN_UP(qemu_opt_get_size(opts, mem, 0), 8192); ram_size = sz; if (ram_size != sz) { fprintf(stderr, qemu: ram size too large\n); exit(1); } +/* store aligned value for future use */ +s = g_strdup_printf(% PRIu64, sz); +qemu_opt_set(opts, mem, s); +g_free(s); + +sz = qemu_opt_get_size(opts, maxmem, ram_size); +if (sz ram_size) { +fprintf(stderr, qemu: maxmem must be initial memory\n); +exit(1); +} break; } #ifdef CONFIG_TPM
[Qemu-devel] [PATCH qom-next for-1.6] onenand: QOM'ify
Signed-off-by: Andreas Färber afaer...@suse.de --- hw/block/onenand.c | 30 -- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/hw/block/onenand.c b/hw/block/onenand.c index 2776f64..aae9ee7 100644 --- a/hw/block/onenand.c +++ b/hw/block/onenand.c @@ -34,8 +34,12 @@ /* Fixed */ #define BLOCK_SHIFT(PAGE_SHIFT + 6) -typedef struct { -SysBusDevice busdev; +#define TYPE_ONE_NAND onenand +#define ONE_NAND(obj) OBJECT_CHECK(OneNANDState, (obj), TYPE_ONE_NAND) + +typedef struct OneNANDState { +SysBusDevice parent_obj; + struct { uint16_t man; uint16_t dev; @@ -226,7 +230,9 @@ static void onenand_reset(OneNANDState *s, int cold) static void onenand_system_reset(DeviceState *dev) { -onenand_reset(FROM_SYSBUS(OneNANDState, SYS_BUS_DEVICE(dev)), 1); +OneNANDState *s = ONE_NAND(dev); + +onenand_reset(s, 1); } static inline int onenand_load_main(OneNANDState *s, int sec, int secn, @@ -757,11 +763,13 @@ static const MemoryRegionOps onenand_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static int onenand_initfn(SysBusDevice *dev) +static int onenand_initfn(SysBusDevice *sbd) { -OneNANDState *s = (OneNANDState *)dev; +DeviceState *dev = DEVICE(sbd); +OneNANDState *s = ONE_NAND(dev); uint32_t size = 1 (24 + ((s-id.dev 4) 7)); void *ram; + s-base = (hwaddr)-1; s-rdy = NULL; s-blocks = size BLOCK_SHIFT; @@ -794,9 +802,9 @@ static int onenand_initfn(SysBusDevice *dev) s-data[1][0] = ram + ((0x0200 + (1 (PAGE_SHIFT - 1))) s-shift); s-data[1][1] = ram + ((0x8010 + (1 (PAGE_SHIFT - 6))) s-shift); onenand_mem_setup(s); -sysbus_init_irq(dev, s-intr); -sysbus_init_mmio(dev, s-container); -vmstate_register(dev-qdev, +sysbus_init_irq(sbd, s-intr); +sysbus_init_mmio(sbd, s-container); +vmstate_register(dev, ((s-shift 0x7f) 24) | ((s-id.man 0xff) 16) | ((s-id.dev 0xff) 8) @@ -825,7 +833,7 @@ static void onenand_class_init(ObjectClass *klass, void *data) } static const TypeInfo onenand_info = { -.name = onenand, +.name = TYPE_ONE_NAND, .parent= TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(OneNANDState), .class_init= onenand_class_init, @@ -838,7 +846,9 @@ static void onenand_register_types(void) void *onenand_raw_otp(DeviceState *onenand_device) { -return FROM_SYSBUS(OneNANDState, SYS_BUS_DEVICE(onenand_device))-otp; +OneNANDState *s = ONE_NAND(onenand_device); + +return s-otp; } type_init(onenand_register_types) -- 1.8.1.4
Re: [Qemu-devel] [PATCH 03/16] vl: convert -m to qemu_opts_parse()
Il 24/07/2013 10:40, Igor Mammedov ha scritto: On Tue, 23 Jul 2013 19:11:31 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 18:22, Igor Mammedov ha scritto: Signed-off-by: Igor Mammedov imamm...@redhat.com --- qemu-options.hx |9 +++-- vl.c| 53 +++-- 2 files changed, 54 insertions(+), 8 deletions(-) diff --git a/qemu-options.hx b/qemu-options.hx index 137a39b..f799b3d 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -210,8 +210,13 @@ use is discouraged as it may be removed from future versions. ETEXI DEF(m, HAS_ARG, QEMU_OPTION_m, --m megs set virtual RAM size to megs MB [default= -stringify(DEFAULT_RAM_SIZE) ]\n, QEMU_ARCH_ALL) +-m [mem=]megs[,slots=n,maxmem=size]\n +set virtual RAM size to megs MB [default= +stringify(DEFAULT_RAM_SIZE) ]\n +mem=start-up memory amount\n +slots=maximum number of hotplug slots\n +maxmem=maximum total amount of memory\n, +QEMU_ARCH_ALL) STEXI @item -m @var{megs} @findex -m diff --git a/vl.c b/vl.c index bf0c658..16c6f1e 100644 --- a/vl.c +++ b/vl.c @@ -516,6 +516,27 @@ static QemuOptsList qemu_realtime_opts = { }, }; +static QemuOptsList qemu_mem_opts = { +.name = memory-opts, +.implied_opt_name = mem, +.head = QTAILQ_HEAD_INITIALIZER(qemu_mem_opts.head), This should have .merge_lists = true, Just to clarify: is it to allow syntax like? -m 512 -m slots=X -m maxmem=Y Yes. In general, if id doesn't make sense the QemuOptsList should have merge_lists=true. Paolo
Re: [Qemu-devel] [PATCH] RFC v2: hcd-ohci: add dma error handling
On Wed, 2013-07-24 at 18:28 +1000, Alexey Kardashevskiy wrote: 1. if a physical device once reported UnrecoverableError, what is it expected to be able to do after that? Should ohci_hcd module reloading bring it back to life? With this patch, OHCI dies till reboot (but at least it does not break other subsystems). Not sure what the spec says but I assume an HC reset should work. That and a PCI reset which we can potentially trigger in SW (though we haven't yet implemented the RTAS interfaces for it). 2. is UnrecoverableError a correct event here? Yes. Cheers, Ben.
Re: [Qemu-devel] [sheepdog] [PATCH v2 0/9] sheepdog: reconnect server after connection failure
At Wed, 24 Jul 2013 16:28:30 +0800, Liu Yuan wrote: On Wed, Jul 24, 2013 at 04:56:24PM +0900, MORITA Kazutaka wrote: Currently, if a sheepdog server exits, all the connecting VMs need to be restarted. This series implements a feature to reconnect the server, and enables us to do online sheepdog upgrade and avoid restarting VMs when sheepdog servers crash unexpectedly. It doesn't work on my test. I tried start linux-0.2.img stored in sheepdog cluster and then 1. did some buffered writes 2. restart sheep that this QEMU VM connected to. 3. $ sync I got following error: $ ../qemu/x86_64-softmmu/qemu-system-x86_64 --enable-kvm -m 1024 -hda sheepdog:test qemu-system-x86_64: failed to get the header, Resource temporarily unavailable qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused qemu-system-x86_64: Failed to connect to socket: Connection refused ...repeat... QEMU version is master tip Your sheep daemon looks like unreachable from qemu. I tried the same procedure, but couldn't reproduce it. Is the problem reproducible? Can you make sure that you can connect to the sheep daemon from collie while the error message shows up? Thanks, Kazutaka
Re: [Qemu-devel] [PATCH 03/16] vl: convert -m to qemu_opts_parse()
On Wed, 24 Jul 2013 11:04:14 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 24/07/2013 10:40, Igor Mammedov ha scritto: On Tue, 23 Jul 2013 19:11:31 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 18:22, Igor Mammedov ha scritto: Signed-off-by: Igor Mammedov imamm...@redhat.com --- qemu-options.hx |9 +++-- vl.c| 53 +++-- 2 files changed, 54 insertions(+), 8 deletions(-) diff --git a/qemu-options.hx b/qemu-options.hx index 137a39b..f799b3d 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -210,8 +210,13 @@ use is discouraged as it may be removed from future versions. ETEXI DEF(m, HAS_ARG, QEMU_OPTION_m, --m megs set virtual RAM size to megs MB [default= -stringify(DEFAULT_RAM_SIZE) ]\n, QEMU_ARCH_ALL) +-m [mem=]megs[,slots=n,maxmem=size]\n +set virtual RAM size to megs MB [default= +stringify(DEFAULT_RAM_SIZE) ]\n +mem=start-up memory amount\n +slots=maximum number of hotplug slots\n +maxmem=maximum total amount of memory\n, +QEMU_ARCH_ALL) STEXI @item -m @var{megs} @findex -m diff --git a/vl.c b/vl.c index bf0c658..16c6f1e 100644 --- a/vl.c +++ b/vl.c @@ -516,6 +516,27 @@ static QemuOptsList qemu_realtime_opts = { }, }; +static QemuOptsList qemu_mem_opts = { +.name = memory-opts, +.implied_opt_name = mem, +.head = QTAILQ_HEAD_INITIALIZER(qemu_mem_opts.head), This should have .merge_lists = true, Just to clarify: is it to allow syntax like? -m 512 -m slots=X -m maxmem=Y Yes. In general, if id doesn't make sense the QemuOptsList should have merge_lists=true. Thanks, pushed to memhp-wip branch Paolo
Re: [Qemu-devel] [PATCH 10/16] dimm: add busy slot check and slot auto-allocation
Il 24/07/2013 10:36, Igor Mammedov ha scritto: On Tue, 23 Jul 2013 19:09:26 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 18:23, Igor Mammedov ha scritto: - if slot property is not specified on -device/device_add command, treat default value as request for assigning DimmDevice to the first free slot. Even with -m instead of -numa mem, I think this is problematic because we still need to separate the host and guest parts of the DIMM device. -numa mem (or the QMP command that Wanlong added) will be necessary to allocate memory on the host side before adding a DIMM. why not do host allocation part at the same time when DIMM is added, is there a real need to separate DIMM device? I probably miss something but -numa mem option and co aside what problem couldn't be solved during DIMM device initialization and would require a split DIMM device? Because otherwise, every option we add to -numa mem will have to be added to -device dimm. For example, -device dimm,policy=interleave makes no sense to me. In fact, this is no different from having to do drive_add or netdev_add before device_add. First you tell QEMU about the host resources to use, then you add the guest device and bind the device to those resources. So slots will have three states: free (created with -m), allocated (a free slot moves to this state with -numa mem...,populated=no when migrating, or with the QMP command for regular hotplug), populated (an allocated slot moves to this state with -device dimm). You would be able to plug a DIMM only into an allocated slot, and the size will be specified on the slot rather than the DIMM device. 'slot' property is there only for migration sake to provide stable numeric ID for QEMU-ACPI BIOS interface. It's not used for any other purpose and wasn't intended for any other usage.. How would you otherwise refer to the memory you want to affect in a set-mem-policy monitor command? on baremetal slot has noting to do with size of plugged in DIMM, On baremetal slots also belong to a specific NUMA node, for what it's worth. There are going to be differences with baremetal no matter what. why we would model it other way if it only brings problems: like predefined size, It doesn't have to be predefined. In the previous discussions (and also based on Vasilis and Hu Tao's implementations) I assumed predefined slot sizes. Now I understand the benefit of having a simpler command-line with -m, but then in return you need three slot states instead of just unpopulated/populated. So you'd just do set-mem-policy 0 size=2G # free-allocated device_add dimm,slotid=0 # allocated-populated to hotplug a 2G DIMM. And you'll be able to pin it to host NUMA nodes, and assign it to guest NUMA nodes, like this: set-mem-policy 0 size=2G,nodeid=1,policy=membind host-nodes=0-1 device_add dimm,slotid=0 Again, this is the same as drive_add/device_add. Paolo allocated, free etc. I think slot should be either free or busy. In general, I don't think free slots should be managed by the DimmBus, and host vs. guest separation should be there even if we accept your -m extension (doesn't look bad at all, I must say). Paolo
Re: [Qemu-devel] [PATCH] pc: limit 64 bit hole to 2G by default
On Wed, Jul 24, 2013 at 09:01:51AM +0200, Gerd Hoffmann wrote: On 07/24/13 08:01, Michael S. Tsirkin wrote: It turns out that some 32 bit windows guests crash if 64 bit PCI hole size is 2G. Ah, *that* is the reason for winxp crashing with a 64bit hole. Current seabios uses a slightly different approach: the 64bit hole is present only in case it is actually used to map bars there, and seabios tries to fit everything into the 32bit hole first. Yes. But this doesn't work with device hotplug. Limit it to 2G for piix and q35 by default, add properties to let management override the hole size. Examples: -global i440FX-pcihost.pci_hole64_size=137438953472 Do we really want specify this in bytes? Using megabytes or gigabytes instead looks more sane to me. cheers, Gerd I think that arbitrarily saying size is in gigabytes is confusing to users (in particular because there's no documentation for properties except their type). I intend to send a patch to properties that allows writing size=1G instead. Will this address your comment?
Re: [Qemu-devel] [PATCH] RFC v2: hcd-ohci: add dma error handling
On 07/24/2013 07:05 PM, Benjamin Herrenschmidt wrote: On Wed, 2013-07-24 at 18:28 +1000, Alexey Kardashevskiy wrote: 1. if a physical device once reported UnrecoverableError, what is it expected to be able to do after that? Should ohci_hcd module reloading bring it back to life? With this patch, OHCI dies till reboot (but at least it does not break other subsystems). Not sure what the spec says but I assume an HC reset should work. That and a PCI reset which we can potentially trigger in SW (though we haven't yet implemented the RTAS interfaces for it). Double checked. rmmod ohci_hcd; modprobe ohci_hcd brings it back so we are good here :) -- Alexey
Re: [Qemu-devel] [PATCH 00/16 RFC v6] ACPI memory hotplug
v6 doesn't work here, things are going fine until online hotplugged memory in guest. steps: 1. qemu cmd: ./x86_64-softmmu/qemu-system-x86_64 -enable-kvm -m 512,maxmem=2G,slots=1 \ -hda /mnt/data/libvirt-images/hut-rhel6.3.img -L ../pc-bios-memhp/ (bios is from MST's acpi tree) 2. hot-plug a dimm: device_adddimm,id=d0,size=1G 3. online hotplugged memory(in guest): echo 'onlone' /sys/devices/system/memory/memory/32/state then after several seconds the console prints error messages like: nommu_map_sg: overflow 107c15000+4096 of device mask ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x0 ata1.00: cmd ca/00:10:d0:0d:a4/00:00:00:00:00/e0 tag 0 dma 8192 out res 50/00:00:08:09:e0/00:00:00:00:00/e0 Emask 0x40 (internal error) ata1.00: configured for MWDMA2 ata1: EH complete (repeat) and can't do any disk I/O.
Re: [Qemu-devel] VM can not boot after commit 235e898
On 05.06.2013, at 04:44, Dunrong Huang wrote: On Wed, Jun 5, 2013 at 1:03 AM, Jordan Justen jljus...@gmail.com wrote: On Tue, Jun 4, 2013 at 1:26 AM, Dunrong Huang riegama...@gmail.com wrote: On Tue, Jun 4, 2013 at 3:51 PM, Gleb Natapov g...@redhat.com wrote: On Tue, Jun 04, 2013 at 03:47:47PM +0800, Dunrong Huang wrote: On Tue, Jun 4, 2013 at 2:47 PM, Paolo Bonzini pbonz...@redhat.com wrote: Il 04/06/2013 05:47, Dunrong Huang ha scritto: QEMU command: ~/usr/bin/qemu-system-x86_64 -enable-kvm -m 1024 debian-append.img git bisect tells that the following commit causes this bug: commit 235e8982ad393e5611cb892df54881c872eea9e1 Author: Jordan Justen jordan.l.jus...@intel.com mailto:jordan.l.jus...@intel.com Date: Wed May 29 01:27:26 2013 -0700 kvm: support using KVM_MEM_READONLY flag for regions For readonly memory regions and rom devices in romd_mode, we make use of the KVM_MEM_READONLY. A slot that uses KVM_MEM_READONLY can be read from and code can execute from the region, but writes will exit to qemu. After reverting this commit, VM can boot normally. A patch is queued for that. Using kernel 3.8 or reverting the commit will both work. Ok, thanks for information, I will try it. The fix is 651eb0f4 and you claim it is still fails for you. This is strange because the commit fixed the problem for everyone else. Can you double check that you are testing the right commit and you recompiled and reinstalled? I am sure 651eb0f4 does not fix this problem. My test environment is below: * config.log: # head -n 2 config.log # QEMU configure log 2013年 06月 04日 星期二 16:12:59 CST # Configured with: './configure' '--prefix=/root/usr' '--enable-kvm' '--enable-werror' '--enable-debug' '--enable-debug-tcg' '--enable-debug-info' '--enable-sdl' '--enable-gtk' '--enable-virtfs' '--enable-vnc' '--enable-mixemu' '--enable-vnc-tls' '--enable-vnc-sasl' '--enable-vnc-jpeg' '--enable-vnc-png' '--enable-vnc-ws' '--enable-curses' '--enable-curl' '--enable-nptl' '--enable-system' '--enable-user' '--enable-linux-user' '--enable-guest-base' '--enable-uuid' '--enable-vde' '--enable-linux-aio' '--enable-cap-ng' '--enable-attr' '--enable-docs' '--enable-vhost-net' '--enable-spice' '--enable-usb-redir' '--enable-smartcard-nss' '--enable-tpm' '--enable-guest-agent' '--target-list=x86_64-softmmu' * kernel version: # uname -a Linux gentoo-company 3.8.2-gentoo #1 SMP Fri Mar 8 11:44:36 CST 2013 x86_64 Intel(R) Core(TM)2 Duo CPU E7500 @ 2.93GHz GenuineIntel GNU/Linux You were using a 3.8 kernel originally? (Someone mentioned trying a 3.8 kernel, and I think that is when you went to 3.8.) yes, I have been using kernel 3.8.2 lately, not because of Paolo's suggestion. * details of git tree: # git log HEAD --oneline 1713924 gtk: don't use g_object_unref on GdkCursor 41686a9 gtk: don't resize window when enabling scaling 651eb0f fix double free the memslot in kvm_set_phys_mem 25b4833 configure: Report unknown target names more helpfully 6e92f82 configure: Autogenerate default target list 0ded1fe Merge remote-tracking branch 'pmaydell/arm-devs.next' into staging 95669e6 i.MX: Improve EPIT timer code. 6539ed2 exynos4210.c: register rom_mem for memory migration * QEMU command line: x86_64-softmmu/qemu-system-x86_64 -enable-kvm -cdrom /mnt/nfs/Images/ISO/ubuntu-12.04-dvd-amd64.iso FWIW, I've been able to boot the 11.10 iso when booted to a 3.9 kernel. Does it only fail after you boot the OS? If you just run KVM without a disk, so only seabios runs, is it okay? It fails even runing without any parameters, like: x86_64-softmmu/qemu-system-x86_64 -enable-kvm No BIOS information printed, just a black screen is shown. After disable KVM_MEM_READONLY flag like below, VM can boot normally. diff --git a/kvm-all.c b/kvm-all.c index 405480e..c33ba6e 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -774,7 +774,7 @@ static void kvm_set_phys_mem(MemoryRegionSection *section, bool add) mem-memory_size = size; mem-start_addr = start_addr; mem-ram = ram; -mem-flags = kvm_mem_flags(s, log_dirty, readonly_flag); +mem-flags = kvm_mem_flags(s, log_dirty, false); err = kvm_set_user_memory_region(s, mem); if (err) { I can provide more details if needed. I don't think you mentioned how it fails. Does KVM crash? Is an error message printed? Does the VM reset, or just hang? No QEMU or kvm crashes, no error message printed, I mean it just hangs, even no BIOS information are printed. And top shows QEMU consumes 100% cpu. When I define DEBUG_KVM in kvm-all.c, and run QEMU(this time I boot a normal OS disk), # x86_64-softmmu/qemu-system-x86_64 -enable-kvm -hda /mnt/nfs/Images/debian-append.img kvm_init_vcpu kvm_cpu_exec() handle_io
Re: [Qemu-devel] [PATCH 00/16 RFC v6] ACPI memory hotplug
On Wed, 24 Jul 2013 17:52:50 +0800 Hu Tao hu...@cn.fujitsu.com wrote: v6 doesn't work here, things are going fine until online hotplugged memory in guest. steps: 1. qemu cmd: ./x86_64-softmmu/qemu-system-x86_64 -enable-kvm -m 512,maxmem=2G,slots=1 \ -hda /mnt/data/libvirt-images/hut-rhel6.3.img -L ../pc-bios-memhp/ (bios is from MST's acpi tree) 2. hot-plug a dimm: device_adddimm,id=d0,size=1G 3. online hotplugged memory(in guest): echo 'onlone' /sys/devices/system/memory/memory/32/state then after several seconds the console prints error messages like: nommu_map_sg: overflow 107c15000+4096 of device mask ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x0 ata1.00: cmd ca/00:10:d0:0d:a4/00:00:00:00:00/e0 tag 0 dma 8192 out res 50/00:00:08:09:e0/00:00:00:00:00/e0 Emask 0x40 (internal error) ata1.00: configured for MWDMA2 ata1: EH complete (repeat) and can't do any disk I/O. Looks like a guest bug where it tries to use high memory but assumes low one. if you boot guest with initial memory 4Gb then it wont hit issue or use FC18 which doesn't have this problem.
Re: [Qemu-devel] [PATCH] pc: limit 64 bit hole to 2G by default
On Wed, 24 Jul 2013 12:51:16 +0300 Michael S. Tsirkin m...@redhat.com wrote: On Wed, Jul 24, 2013 at 09:01:51AM +0200, Gerd Hoffmann wrote: On 07/24/13 08:01, Michael S. Tsirkin wrote: It turns out that some 32 bit windows guests crash if 64 bit PCI hole size is 2G. Ah, *that* is the reason for winxp crashing with a 64bit hole. Current seabios uses a slightly different approach: the 64bit hole is present only in case it is actually used to map bars there, and seabios tries to fit everything into the 32bit hole first. Yes. But this doesn't work with device hotplug. Limit it to 2G for piix and q35 by default, add properties to let management override the hole size. Examples: -global i440FX-pcihost.pci_hole64_size=137438953472 Do we really want specify this in bytes? Using megabytes or gigabytes instead looks more sane to me. cheers, Gerd I think that arbitrarily saying size is in gigabytes is confusing to users (in particular because there's no documentation for properties except their type). I intend to send a patch to properties that allows writing size=1G instead. for size property you could take patches: [PATCH 04/16] qapi: make visit_type_size fallback to type_int [PATCH 05/16] qdev: Add SIZE type to qdev properties from [PATCH 00/16 RFC v6] ACPI memory hotplug
Re: [Qemu-devel] [PATCH] Citrix PV Bus device
On 07/02/13 16:03, Paul Durrant wrote: This patch introduces a new PCI device which will act as the binding point for Citrix branded PV drivers for Xen. The intention is that Citrix Windows PV drivers will be available on Windows Update and thus using the existing Xen platform PCI device as an anchor point is not desirable as that device has been ubiquitous in HVM guests for a long time and thus existing HVM guests running Windows would start automatically downloading drivers from Windows Update when this may not be desired by either the host or guest admin. This device therefore acts as an opt-in for those wishing to deploy Citrix PV drivers. How does this differ from the xen platform pci device, except for the fact that it has a different PCI ID? cheers, Gerd
Re: [Qemu-devel] [PATCH V6 1/3] Implement sync modes for drive-backup.
Am 23.07.2013 um 00:09 hat Ian Main geschrieben: This patch adds sync-modes to the drive-backup interface and implements the FULL, NONE and TOP modes of synchronization. FULL performs as before copying the entire contents of the drive while preserving the point-in-time using CoW. NONE only copies new writes to the target drive. TOP copies changes to the topmost drive image and preserves the point-in-time using CoW. For sync mode TOP are creating a new target image using the same backing file as the original disk image. Then any new data that has been laid on top of it since creation is copied in the main backup_run() loop. There is an extra check in the 'TOP' case so that we don't bother to copy all the data of the backing file as it already exists in the target. This is where the bdrv_co_is_allocated() is used to determine if the data exists in the topmost layer or below. Also any new data being written is intercepted via the write_notifier hook which ends up calling backup_do_cow() to copy old data out before it gets overwritten. For mode 'NONE' we create the new target image and only copy in the original data from the disk image starting from the time the call was made. This preserves the point in time data by only copying the parts that are *going to change* to the target image. This way we can reconstruct the final image by checking to see if the given block exists in the new target image first, and if it does not, you can get it from the original image. This is basically an optimization allowing you to do point-in-time snapshots with low overhead vs the 'FULL' version. Since there is no old data to copy out the loop in backup_run() for the NONE case just calls qemu_coroutine_yield() which only wakes up after an event (usually cancel in this case). The rest is handled by the before_write notifier which again calls backup_do_cow() to write out the old data so it can be preserved. Signed-off-by: Ian Main im...@redhat.com --- block/backup.c| 91 +++ blockdev.c| 36 --- include/block/block_int.h | 4 ++- qapi-schema.json | 4 +-- qmp-commands.hx | 2 ++ 5 files changed, 92 insertions(+), 45 deletions(-) diff --git a/block/backup.c b/block/backup.c index 16105d4..68abd23 100644 --- a/block/backup.c +++ b/block/backup.c @@ -37,6 +37,7 @@ typedef struct CowRequest { typedef struct BackupBlockJob { BlockJob common; BlockDriverState *target; +MirrorSyncMode sync_mode; RateLimit limit; BlockdevOnError on_source_error; BlockdevOnError on_target_error; @@ -247,40 +248,69 @@ static void coroutine_fn backup_run(void *opaque) bdrv_add_before_write_notifier(bs, before_write); -for (; start end; start++) { -bool error_is_read; - -if (block_job_is_cancelled(job-common)) { -break; +if (job-sync_mode == MIRROR_SYNC_MODE_NONE) { +while (!block_job_is_cancelled(job-common)) { +/* Yield until the job is cancelled. We just let our before_write + * notify callback service CoW requests. */ +job-common.busy = false; +qemu_coroutine_yield(); +job-common.busy = true; } +} else { +/* Both FULL and TOP SYNC_MODE's require copying.. */ +for (; start end; start++) { +bool error_is_read; -/* we need to yield so that qemu_aio_flush() returns. - * (without, VM does not reboot) - */ -if (job-common.speed) { -uint64_t delay_ns = ratelimit_calculate_delay( -job-limit, job-sectors_read); -job-sectors_read = 0; -block_job_sleep_ns(job-common, rt_clock, delay_ns); -} else { -block_job_sleep_ns(job-common, rt_clock, 0); -} +if (block_job_is_cancelled(job-common)) { +break; +} -if (block_job_is_cancelled(job-common)) { -break; -} +/* we need to yield so that qemu_aio_flush() returns. + * (without, VM does not reboot) + */ +if (job-common.speed) { +uint64_t delay_ns = ratelimit_calculate_delay( +job-limit, job-sectors_read); +job-sectors_read = 0; +block_job_sleep_ns(job-common, rt_clock, delay_ns); +} else { +block_job_sleep_ns(job-common, rt_clock, 0); +} -ret = backup_do_cow(bs, start * BACKUP_SECTORS_PER_CLUSTER, -BACKUP_SECTORS_PER_CLUSTER, error_is_read); -if (ret 0) { -/* Depending on error action, fail now or retry cluster */ -BlockErrorAction action = -backup_error_action(job, error_is_read,
Re: [Qemu-devel] [PATCH 00/16 RFC v6] ACPI memory hotplug
On Wed, Jul 24, 2013 at 12:02:46PM +0200, Igor Mammedov wrote: On Wed, 24 Jul 2013 17:52:50 +0800 Hu Tao hu...@cn.fujitsu.com wrote: v6 doesn't work here, things are going fine until online hotplugged memory in guest. steps: 1. qemu cmd: ./x86_64-softmmu/qemu-system-x86_64 -enable-kvm -m 512,maxmem=2G,slots=1 \ -hda /mnt/data/libvirt-images/hut-rhel6.3.img -L ../pc-bios-memhp/ (bios is from MST's acpi tree) 2. hot-plug a dimm: device_adddimm,id=d0,size=1G 3. online hotplugged memory(in guest): echo 'onlone' /sys/devices/system/memory/memory/32/state then after several seconds the console prints error messages like: nommu_map_sg: overflow 107c15000+4096 of device mask ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x0 ata1.00: cmd ca/00:10:d0:0d:a4/00:00:00:00:00/e0 tag 0 dma 8192 out res 50/00:00:08:09:e0/00:00:00:00:00/e0 Emask 0x40 (internal error) ata1.00: configured for MWDMA2 ata1: EH complete (repeat) and can't do any disk I/O. Looks like a guest bug where it tries to use high memory but assumes low one. yes. Iirc booting the guest kernel with swiotlb=force option could also work around this. if you boot guest with initial memory 4Gb then it wont hit issue or use FC18 which doesn't have this problem. thanks, - Vasilis
Re: [Qemu-devel] [PATCH V6 2/3] Add tests for sync modes 'TOP' and 'NONE'
Am 23.07.2013 um 00:09 hat Ian Main geschrieben: This patch adds tests for sync modes top and none. Also added are tests for invalid and missing formats. Signed-off-by: Ian Main im...@redhat.com --- tests/qemu-iotests/055| 108 +- tests/qemu-iotests/055.out| 4 +- tests/qemu-iotests/group | 2 +- tests/qemu-iotests/iotests.py | 5 ++ 4 files changed, 103 insertions(+), 16 deletions(-) @@ -127,7 +202,8 @@ class TestSetSpeed(iotests.QMPTestCase): self.assert_qmp(result, 'return[0]/device', 'drive0') self.assert_qmp(result, 'return[0]/speed', 0) -result = self.vm.qmp('block-job-set-speed', device='drive0', speed=8 * 1024 * 1024) +result = self.vm.qmp('block-job-set-speed', device='drive0', + speed=8 * 1024 * 1024) Forgot adding sync? self.assert_qmp(result, 'return', {}) # Ensure the speed we set was accepted @@ -285,4 +367,4 @@ class TestSingleTransaction(iotests.QMPTestCase): self.assert_no_active_block_jobs() if __name__ == '__main__': -iotests.main(supported_fmts=['raw', 'qcow2']) +iotests.main(supported_fmts=['qcow2', 'qed']) Not good. Can we split the test in a part that can be run by raw, and a separate part that uses backing files? Kevin
Re: [Qemu-devel] [PATCH V6 3/3] Add backing drive while performing backup.
Am 23.07.2013 um 00:09 hat Ian Main geschrieben: This patch adds the original source drive as a backing drive to our target image so that the target image will appear complete during backup. This is especially useful for SYNC_MODE_NONE as it allows export via NBD to have a complete point-in-time snapshot available for export. Signed-off-by: Ian Main im...@redhat.com This isn't directly usable, right? Let's complettely leave it out for now, it's incomplete and most likely wrong, and that's not easy to fix right. I expect that Fam's patches (at which I have to take a look yet) offer a more complete solution for this, but I wouldn't consider any change that allows users to access the backup target for 1.6, because the user can do all sorts of interesting things with it then, which we probably don't check for in most cases. Kevin
Re: [Qemu-devel] [RFC 0/8] arm AioContext with its own timer stuff
Il 24/07/2013 10:37, Alex Bligh ha scritto: --On 24 July 2013 09:01:22 +0100 Alex Bligh a...@alex.org.uk wrote: Most 'reasonable' POSIX compliant operating systems have ppoll Really? I could find no manpages for any of Solaris and *BSD. OK I shall (re)research that then! I suppose select() / pselect() is an alternative when there are few FDs. Looks like I was wrong. However, pselect support is pretty wide. Yes, on the other hand we only recently switched from select() to poll(). I guess using ms resolution wouldn't be too bad for non-Linux. After all before dynticks support was added to the alarm timer, it used to use /dev/rtc or /dev/hpet -- which is very precise but only has ms resolution too. We might not care about the slack either, in practice. TCG timing sucks anyway, and for KVM/Xen most relevant device models are in the kernel. Paolo
Re: [Qemu-devel] [PATCH 10/16] dimm: add busy slot check and slot auto-allocation
On Wed, 24 Jul 2013 11:41:04 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 24/07/2013 10:36, Igor Mammedov ha scritto: On Tue, 23 Jul 2013 19:09:26 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 18:23, Igor Mammedov ha scritto: - if slot property is not specified on -device/device_add command, treat default value as request for assigning DimmDevice to the first free slot. Even with -m instead of -numa mem, I think this is problematic because we still need to separate the host and guest parts of the DIMM device. -numa mem (or the QMP command that Wanlong added) will be necessary to allocate memory on the host side before adding a DIMM. why not do host allocation part at the same time when DIMM is added, is there a real need to separate DIMM device? I probably miss something but -numa mem option and co aside what problem couldn't be solved during DIMM device initialization and would require a split DIMM device? Because otherwise, every option we add to -numa mem will have to be added to -device dimm. For example, -device dimm,policy=interleave if it's feature of DIMM device sure, if it is not lets find a better place for it. See below for an alternative approach. makes no sense to me. In fact, this is no different from having to do drive_add or netdev_add before device_add. First you tell QEMU about the host resources to use, then you add the guest device and bind the device to those resources. So slots will have three states: free (created with -m), allocated (a free slot moves to this state with -numa mem...,populated=no when migrating, or with the QMP command for regular hotplug), populated (an allocated slot moves to this state with -device dimm). You would be able to plug a DIMM only into an allocated slot, and the size will be specified on the slot rather than the DIMM device. 'slot' property is there only for migration sake to provide stable numeric ID for QEMU-ACPI BIOS interface. It's not used for any other purpose and wasn't intended for any other usage.. How would you otherwise refer to the memory you want to affect in a set-mem-policy monitor command? could be 'id' property or even better a QOM path on baremetal slot has noting to do with size of plugged in DIMM, On baremetal slots also belong to a specific NUMA node, for what it's worth. There are going to be differences with baremetal no matter what. sure we can deviate here, but I don't see full picture yet so I'm trying to find justification for it first and asking questions. Maybe a better solution will be found. why we would model it other way if it only brings problems: like predefined size, It doesn't have to be predefined. In the previous discussions (and also based on Vasilis and Hu Tao's implementations) I assumed predefined slot sizes. Now I understand the benefit of having a simpler command-line with -m, but then in return you need three slot states instead of just unpopulated/populated. So you'd just do set-mem-policy 0 size=2G # free-allocated device_add dimm,slotid=0 # allocated-populated to hotplug a 2G DIMM. And you'll be able to pin it to host NUMA nodes, and assign it to guest NUMA nodes, like this: set-mem-policy 0 size=2G,nodeid=1,policy=membind host-nodes=0-1 device_add dimm,slotid=0 Do policy and other -numa mem properties belong to a particular DIMM device or rather to a particular NUMA node? How about following idea: guest-node maps to a specific host-node, then when we plug DIMM, guest node provides information on policies and whatever to the creator of DIMM device (via DimmBus and/or mhc) which allocates memory, applies policies and binds new memory to a specific host node. That would eliminate 2 stage approach. in this case DIMM device only needs to specify where it's plugged in, using 'node' property (now number but could become QOM path to NUMA node object). Ideally it would be QOM hierarchy: /nodeX/@dimmbus/dimm_device where even 'node' property would become obsolete, just specify right bus to attach DIMM device to. PS: we need a similar QOM hierarchy for CPUs as well to sort out -numa cpus=ids mess. Again, this is the same as drive_add/device_add. Paolo allocated, free etc. I think slot should be either free or busy. In general, I don't think free slots should be managed by the DimmBus, and host vs. guest separation should be there even if we accept your -m extension (doesn't look bad at all, I must say). Paolo
Re: [Qemu-devel] [PATCH v3] spapr-vscsi: add task management
Il 24/07/2013 10:29, Alexey Kardashevskiy ha scritto: At the moment the guest kernel issues two types of task management requests to the hypervisor - task about and lun reset. This adds handling for these tasks. As spapr-vscsi starts calling scsi_req_cancel(), free_request callback was implemented. As virtio-vscsi, spapr-vscsi does not handle CLEAR_ACA either as CDB control byte does not seem to be used at all so NACA bit is not set to the guest so the guest has no good reason to call CLEAR_ACA task. Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- Changes: 2013/07/23: * remove unnecessary free_request callback 2013/07/22: * fixed LUN_RESET (it used to clear requests while it should reset a device) * added handling of ABORT_TASK_SET/CLEAR_TASK_SET Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- hw/scsi/spapr_vscsi.c | 65 +-- 1 file changed, 48 insertions(+), 17 deletions(-) diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index 46f4455..50993fa 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -117,6 +117,20 @@ static struct vscsi_req *vscsi_get_req(VSCSIState *s) return NULL; } +static struct vscsi_req *vscsi_find_req(VSCSIState *s, uint64_t srp_tag) +{ +vscsi_req *req; +int i; + +for (i = 0; i VSCSI_REQ_LIMIT; i++) { +req = s-reqs[i]; +if (req-iu.srp.cmd.tag == srp_tag) { +return req; +} +} +return NULL; +} + static void vscsi_put_req(vscsi_req *req) { if (req-sreq != NULL) { @@ -753,40 +767,57 @@ static int vscsi_queue_cmd(VSCSIState *s, vscsi_req *req) static int vscsi_process_tsk_mgmt(VSCSIState *s, vscsi_req *req) { union viosrp_iu *iu = req-iu; -int fn; +vscsi_req *tmpreq; +SCSIDevice *sdev; +int i, lun = 0, error = 0; fprintf(stderr, vscsi_process_tsk_mgmt %02x\n, iu-srp.tsk_mgmt.tsk_mgmt_func); switch (iu-srp.tsk_mgmt.tsk_mgmt_func) { -#if 0 /* We really don't deal with these for now */ case SRP_TSK_ABORT_TASK: Here it should also be an error if the LUN does not exist (request fields invalid, see below). -fn = ABORT_TASK; +tmpreq = vscsi_find_req(s, req-iu.srp.tsk_mgmt.task_tag); +if (tmpreq tmpreq-sreq) { +assert(tmpreq-sreq-hba_private); +scsi_req_cancel(tmpreq-sreq); +} break; + +case SRP_TSK_LUN_RESET: +sdev = vscsi_device_find(s-bus, req-iu.srp.tsk_mgmt.lun, lun); +if (sdev) { +qdev_reset_all(sdev-qdev); +} Same here. +break; + case SRP_TSK_ABORT_TASK_SET: -fn = ABORT_TASK_SET; -break; case SRP_TSK_CLEAR_TASK_SET: -fn = CLEAR_TASK_SET; -break; -case SRP_TSK_LUN_RESET: -fn = LOGICAL_UNIT_RESET; And here. +for (i = 0; i VSCSI_REQ_LIMIT; i++) { +tmpreq = s-reqs[i]; +if (tmpreq-iu.srp.cmd.lun != req-iu.srp.tsk_mgmt.lun) { +continue; +} +if (!tmpreq-active || !tmpreq-sreq) { +continue; +} +assert(tmpreq-sreq-hba_private); +scsi_req_cancel(tmpreq-sreq); +} break; + case SRP_TSK_CLEAR_ACA: -fn = CLEAR_ACA; -break; -#endif default: -fn = 0; +error = 1; } -if (fn) { -/* XXX Send/Handle target task management */ -; + +if (!error) { +vscsi_send_rsp(s, req, GOOD, 0, 0); } else { vscsi_makeup_sense(s, req, ILLEGAL_REQUEST, 0x20, 0); vscsi_send_rsp(s, req, CHECK_CONDITION, 0, 0); I now checked the SRP standard and indeed this is not the format you should send for task management functions. You should not send sense data, you should send response data instead (filling in resp_data_len). The format is: byte 0: reserved byte 1: reserved byte 2: reserved byte 3: 0 = TASK MANAGEMENT FUNCTION COMPLETE 2 = REQUEST FIELDS INVALID 4 = TASK MANAGEMENT FUNCTION NOT SUPPORTED 5 = TASK MANAGEMENT FUNCTION FAILED If byte 3 is 0 you do not need to send it, thus what you're doing in the if (!error) case is correct (because GOOD == 0). Source: http://www.csit-sun.pub.ro/~cpop/Documentatie_SM/Standarde_magistrale/SCSI/srp-r16a.pdf Paolo } -return !fn; + +return 1; } static int vscsi_handle_srp_req(VSCSIState *s, vscsi_req *req)
[Qemu-devel] qemu git (f03d07d46) / e100 / sending large packets causes SIGABRT
1. qemu-kvm -sdl -nodefaults -name NP1-C1 \ -uuid b71057e9-5705-420b-a780-52339afa6ed9\ -boot c \ -hda np1UD.disk \ -hdb fat:exchange \ -device i82559c,netdev=vin0,romfile=,mac=00:11:22:33:44:54\ -netdev tap,id=vin0,ifname=vin0,script=no \ -device cirrus-vga\ -serial pty \ 2. ping -s 65000 3. Program received signal SIGABRT, Aborted. #0 0x7f9aa35e62a9 in __GI_raise (sig=sig@entry=0x6) at ../nptl/sysdeps/unix/sysv/linux/raise.c:56 #1 0x7f9aa35e7608 in __GI_abort () at abort.c:90 #2 0x7f9aa97cb9ac in address_space_rw (as=as@entry=0x7f9aac086a40, addr=0x86fa453c, addr@entry=0x86fa4000, buf=0x7f9a97ffe55e \327\060\061\061\272?32\330\061\062\062\276@43\331\062\063\063\302A54\332\063\064\064\306B65\333\064\065\065\312C76\334\065\066\066\316D87\335\066\067\067\322E98\336\067\070\070\326F:9\337\070\071\071\332G;:\340\071::\336H;\341:;;\342I=\342;\346J=\343==\352K?\344=, '\377' repeats 92 times..., buf@entry=0x7f9a97ffe022 '\377' repeats 200 times..., len=0x3, len@entry=0x53f, is_write=is_write@entry=0x0) at /tmp/portage/app-emulation/qemu-/work/qemu-/exec.c:2005 #3 0x7f9aa96d6349 in dma_memory_rw_relaxed (dir=DMA_DIRECTION_TO_DEVICE, len=0x53f, buf=0x7f9a97ffe022, addr=0x86fa4000, as=0x7f9aac086a40) at /tmp/portage/app-emulation/qemu-/work/qemu-/include/sysemu/dma.h:90 #4 dma_memory_rw (dir=DMA_DIRECTION_TO_DEVICE, len=0x53f, buf=0x7f9a97ffe022, addr=0x86fa4000, as=0x7f9aac086a40) at /tmp/portage/app-emulation/qemu-/work/qemu-/include/sysemu/dma.h:112 #5 pci_dma_rw (dir=DMA_DIRECTION_TO_DEVICE, len=0x53f, buf=0x7f9a97ffe022, addr=0x86fa4000, dev=0x7f9aac086820) at /tmp/portage/app-emulation/qemu-/work/qemu-/include/hw/pci/pci.h:652 #6 pci_dma_read (len=0x53f, buf=0x7f9a97ffe022, addr=0x86fa4000, dev=0x7f9aac086820) at /tmp/portage/app-emulation/qemu-/work/qemu-/include/hw/pci/pci.h:659 #7 tx_command (s=s@entry=0x7f9aac086820) at /tmp/portage/app-emulation/qemu-/work/qemu-/hw/net/eepro100.c:804 #8 0x7f9aa96d6e38 in action_command (s=s@entry=0x7f9aac086820) at /tmp/portage/app-emulation/qemu-/work/qemu-/hw/net/eepro100.c:906 #9 0x7f9aa96d70fb in eepro100_cu_command (s=s@entry=0x7f9aac086820, val=val@entry=0x20) at /tmp/portage/app-emulation/qemu-/work/qemu-/hw/net/eepro100.c:980 #10 0x7f9aa96d8065 in eepro100_write_command (val=optimized out, s=0x7f9aac086820) at /tmp/portage/app-emulation/qemu-/work/qemu-/hw/net/eepro100.c:1074 #11 eepro100_write1 (s=0x7f9aac086820, addr=optimized out, val=optimized out) at /tmp/portage/app-emulation/qemu-/work/qemu-/hw/net/eepro100.c:1457 #12 0x7f9aa981d012 in access_with_adjusted_size (addr=addr@entry=0x2, value=value@entry=0x7f9a97ffeba0, size=size@entry=0x1, access_size_min=optimized out, access_size_max=optimized out, access=0x7f9aa981d1c0 memory_region_write_accessor, opaque=0x7f9aac086fd8) at /tmp/portage/app-emulation/qemu-/work/qemu-/memory.c:436 #13 0x7f9aa9822153 in memory_region_dispatch_write (size=0x1, data=0x20, addr=0x2, mr=0x7f9aac086fd8) at /tmp/portage/app-emulation/qemu-/work/qemu-/memory.c:978 #14 io_mem_write (mr=mr@entry=0x7f9aac086fd8, addr=0x2, val=optimized out, size=size@entry=0x1) at /tmp/portage/app-emulation/qemu-/work/qemu-/memory.c:1737 #15 0x7f9aa97cb9fd in address_space_rw (as=as@entry=0x7f9aa9fa1080 address_space_memory, addr=0xfe001002, buf=buf@entry=0x7f9aa956b028 \242\005\272, len=0x1, is_write=0x1) at /tmp/portage/app-emulation/qemu-/work/qemu-/exec.c:1967 #16 0x7f9aa97cbcb5 in cpu_physical_memory_rw (addr=optimized out, buf=buf@entry=0x7f9aa956b028 \242\005\272, len=optimized out, is_write=optimized out) at /tmp/portage/app-emulation/qemu-/work/qemu-/exec.c:2036 #17 0x7f9aa981bfe5 in kvm_cpu_exec (cpu=cpu@entry=0x7f9aabfe1550) at /tmp/portage/app-emulation/qemu-/work/qemu-/kvm-all.c:1673 #18 0x7f9aa97c1f7a in qemu_kvm_cpu_thread_fn (arg=0x7f9aabfe1550) at /tmp/portage/app-emulation/qemu-/work/qemu-/cpus.c:785 #19 0x7f9aa70b5d63 in start_thread (arg=0x7f9a97fff700) at pthread_create.c:308 #20 0x7f9aa3698cfd in clone () at ../sysdeps/unix/sysv/linux/x86_64/clone.S:113
Re: [Qemu-devel] [Qemu-trivial] [PULL trivial 0/5] trivial patches for 2013-07-19
On 19 July 2013 05:11, Michael Tokarev m...@tls.msk.ru wrote: This is another trivial-patches pull request. This time we have just 5 patches accumulated in two (!) weeks period. Please consider apply. ... Michael Tokarev (2): slirp: remove mbuf(m_hdr,m_dat) indirection Any idea when this might get pulled? The FreeBSD build is broken until this slirp fix makes it in.
Re: [Qemu-devel] [PATCH 10/16] dimm: add busy slot check and slot auto-allocation
Il 24/07/2013 13:34, Igor Mammedov ha scritto: On Wed, 24 Jul 2013 11:41:04 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 24/07/2013 10:36, Igor Mammedov ha scritto: On Tue, 23 Jul 2013 19:09:26 +0200 Paolo Bonzini pbonz...@redhat.com wrote: Il 23/07/2013 18:23, Igor Mammedov ha scritto: - if slot property is not specified on -device/device_add command, treat default value as request for assigning DimmDevice to the first free slot. Even with -m instead of -numa mem, I think this is problematic because we still need to separate the host and guest parts of the DIMM device. -numa mem (or the QMP command that Wanlong added) will be necessary to allocate memory on the host side before adding a DIMM. why not do host allocation part at the same time when DIMM is added, is there a real need to separate DIMM device? I probably miss something but -numa mem option and co aside what problem couldn't be solved during DIMM device initialization and would require a split DIMM device? Because otherwise, every option we add to -numa mem will have to be added to -device dimm. For example, -device dimm,policy=interleave if it's feature of DIMM device sure, if it is not lets find a better place for it. See below for an alternative approach. makes no sense to me. In fact, this is no different from having to do drive_add or netdev_add before device_add. First you tell QEMU about the host resources to use, then you add the guest device and bind the device to those resources. So slots will have three states: free (created with -m), allocated (a free slot moves to this state with -numa mem...,populated=no when migrating, or with the QMP command for regular hotplug), populated (an allocated slot moves to this state with -device dimm). You would be able to plug a DIMM only into an allocated slot, and the size will be specified on the slot rather than the DIMM device. 'slot' property is there only for migration sake to provide stable numeric ID for QEMU-ACPI BIOS interface. It's not used for any other purpose and wasn't intended for any other usage.. How would you otherwise refer to the memory you want to affect in a set-mem-policy monitor command? could be 'id' property or even better a QOM path on baremetal slot has noting to do with size of plugged in DIMM, On baremetal slots also belong to a specific NUMA node, for what it's worth. There are going to be differences with baremetal no matter what. sure we can deviate here, but I don't see full picture yet so I'm trying to find justification for it first and asking questions. Maybe a better solution will be found. why we would model it other way if it only brings problems: like predefined size, It doesn't have to be predefined. In the previous discussions (and also based on Vasilis and Hu Tao's implementations) I assumed predefined slot sizes. Now I understand the benefit of having a simpler command-line with -m, but then in return you need three slot states instead of just unpopulated/populated. So you'd just do set-mem-policy 0 size=2G # free-allocated device_add dimm,slotid=0 # allocated-populated to hotplug a 2G DIMM. And you'll be able to pin it to host NUMA nodes, and assign it to guest NUMA nodes, like this: set-mem-policy 0 size=2G,nodeid=1,policy=membind host-nodes=0-1 device_add dimm,slotid=0 Do policy and other -numa mem properties belong to a particular DIMM device or rather to a particular NUMA node? How about following idea: guest-node maps to a specific host-node, then when we plug DIMM, guest node provides information on policies and whatever to the creator of DIMM device (via DimmBus and/or mhc) which allocates memory, applies policies and binds new memory to a specific host node. That would eliminate 2 stage approach. It makes sense. My main worry is not to deviate from what we've been doing for drives and netdevs (because that's a proven design). Both -numa mem and this proposal satisfy that goal. I originally proposed -numa mem because Vasilis and Hu's patches were relying on specifying predefined sizes for all slots. So -numa mem was a good fit for both memory hotplug (done Hu's way) and NUMA policy. It also simplified the command line which had a lot of mem- prefixed options. With the approach you suggest it may not be necessary at all, and we can go back to just -numa node,cpus=0,mem=1G,mem-policy=membind,mem-hostnodes=0-1,cpu-hostnodes=0 or something like that. Whether it is workable, it depends on what granularity Wanlong/Hu want. There may be some scenarios where per-slot policies make sense. For example, imagine that in general you want memory to be bound to the corresponding host node. It turns out some nodes are now fully committed and others are free, and you need more memory on a VM. You can hotplug that memory without really caring about binding and momentarily suffer some performance loss. I agree that