Re: [Qemu-devel] [PATCH 2/2] fw_cfg: set the get_boot_devices_list() ignore_suffixes parameter from machine property

2018-08-05 Thread Thomas Huth
On 08/05/2018 01:28 PM, Mark Cave-Ayland wrote:
> For the older machines (such as Mac and SPARC) the DT nodes representing
> bootdevices for disk nodes are irregular for mainly historical reasons, and
> should be handled on an individual basis via a custom FWPathProvider.
> 
> Since the majority of bootdevice nodes for these machines either do not have a
> separate disk node or require different (custom) names then it is much easier
> to allow the ignore_suffixes parameter to be set on a per-machine basis via
> a machine property.
> 
> The default value for this new fwcfg_bootdevice_ignore_suffixes machine
> property is false to preserve compatibility for existing machines.
> 
> Signed-off-by: Mark Cave-Ayland 
> ---
>  hw/core/machine.c   | 3 +++
>  hw/nvram/fw_cfg.c   | 5 -
>  include/hw/boards.h | 1 +
>  3 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index a9aeb22f03..fbadb35865 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -525,6 +525,9 @@ static void machine_class_init(ObjectClass *oc, void 
> *data)
>  mc->default_ram_size = 128 * MiB;
>  mc->rom_file_has_mr = true;
>  
> +/* Default to using fwcfg bootdevice suffixes */
> +mc->fwcfg_bootdevice_ignore_suffixes = false;

I guess you could omit this line since the memory for the machine class
is pre-initialized to zero. Anyway:

Reviewed-by: Thomas Huth 



Re: [Qemu-devel] [PATCH 1/2] sysbus: always allow explicit_ofw_unit_address() to override address generation

2018-08-05 Thread Thomas Huth
On 08/05/2018 01:28 PM, Mark Cave-Ayland wrote:
> Some SysBusDevices either use sysbus_init_mmio() without
> sysbus_mmio_map() or the first MMIO memory region doesn't represent the
> bus address, causing a firmware device path with an invalid address to
> be generated.
> 
> SysBusDeviceClass does provide a virtual explicit_ofw_unit_address()
> method that can be used to override this process, but it was originally 
> intended
> only as as a fallback option meaning that any existing MMIO memory regions 
> still
> take priority whilst determining the firmware device address.
> 
> There is currently only one user of explicit_ofw_unit_address() and that
> is the PCI expander bridge (PXB) device which has no MMIO/PIO resources
> defined. This enables us to allow explicit_ofw_unit_address() to take
> priority without affecting backwards compatibility, allowing the address
> to be customised as required.
> 
> Signed-off-by: Mark Cave-Ayland 
> Reviewed-by: Laszlo Ersek 
> ---
>  hw/core/sysbus.c | 15 +++
>  1 file changed, 7 insertions(+), 8 deletions(-)

Looks reasonable.

Reviewed-by: Thomas Huth 



[Qemu-devel] [PATCH] Revert "Revert "vfio/pci-quirks.c: Disable stolen memory for igd VFIO""

2018-08-05 Thread Xiong Zhang
This reverts commit 93587e3af3a259deac89c12863d93653d69d22b8

The original patch "c2b2e158cc7b vfio/pci-quirks.c: Disable stolen memory
for igd VFIO" intend to fix an issue that linux guest couldn't work under
igd passthrough. But this patch breaks windows guest which will unload
igd windows driver when stolen memory is disabled. So the original patch
was reverted by 93587e3af3a2.

After we fixed igd windows driver, it could work well when stolen memory
is disabled since 15.45.4860 version. So let's disable stolen memory,
then both windows guest and linux guest could work under igd passthrough.

Signed-off-by: Xiong Zhang 
---
 hw/vfio/pci-quirks.c | 65 ++--
 1 file changed, 38 insertions(+), 27 deletions(-)

diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index 481fd08..dcaebcb 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -1569,14 +1569,45 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice 
*vdev, int nr)
 uint16_t cmd_orig, cmd;
 Error *err = NULL;
 
+/* This must be an Intel VGA device. */
+if (!vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, PCI_ANY_ID) ||
+!vfio_is_vga(vdev) || nr != 4) {
+return;
+}
+
 /*
- * This must be an Intel VGA device at address 00:02.0 for us to even
- * consider enabling legacy mode.  The vBIOS has dependencies on the
- * PCI bus address.
+ * IGD is not a standard, they like to change their specs often.  We
+ * only attempt to support back to SandBridge and we hope that newer
+ * devices maintain compatibility with generation 8.
  */
-if (!vfio_pci_is(vdev, PCI_VENDOR_ID_INTEL, PCI_ANY_ID) ||
-!vfio_is_vga(vdev) || nr != 4 ||
->pdev != pci_find_device(pci_device_root_bus(>pdev),
+gen = igd_gen(vdev);
+if (gen != 6 && gen != 8) {
+error_report("IGD device %s is unsupported by IGD quirks, "
+ "try SandyBridge or newer", vdev->vbasedev.name);
+return;
+}
+
+/*
+ * Regardless of running in UPT or legacy mode, the guest graphics
+ * driver may attempt to use stolen memory, however only legacy mode
+ * has BIOS support for reserving stolen memory in the guest VM.
+ * Emulate the GMCH register in all cases and zero out the stolen
+ * memory size here. Legacy mode may request allocation and re-write
+ * this below.
+ */
+gmch = vfio_pci_read_config(>pdev, IGD_GMCH, 4);
+gmch &= ~((gen < 8 ? 0x1f : 0xff) << (gen < 8 ? 3 : 8));
+
+/* GMCH is read-only, emulated */
+pci_set_long(vdev->pdev.config + IGD_GMCH, gmch);
+pci_set_long(vdev->pdev.wmask + IGD_GMCH, 0);
+pci_set_long(vdev->emulated_config_bits + IGD_GMCH, ~0);
+
+/*
+ * This must be at address 00:02.0 for us to even onsider enabling
+ * legacy mode.  The vBIOS has dependencies on the PCI bus address.
+ */
+if (>pdev != pci_find_device(pci_device_root_bus(>pdev),
0, PCI_DEVFN(0x2, 0))) {
 return;
 }
@@ -1596,18 +1627,6 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice 
*vdev, int nr)
 }
 
 /*
- * IGD is not a standard, they like to change their specs often.  We
- * only attempt to support back to SandBridge and we hope that newer
- * devices maintain compatibility with generation 8.
- */
-gen = igd_gen(vdev);
-if (gen != 6 && gen != 8) {
-error_report("IGD device %s is unsupported in legacy mode, "
- "try SandyBridge or newer", vdev->vbasedev.name);
-return;
-}
-
-/*
  * Most of what we're doing here is to enable the ROM to run, so if
  * there's no ROM, there's no point in setting up this quirk.
  * NB. We only seem to get BIOS ROMs, so a UEFI VM would need CSM support.
@@ -1662,8 +1681,6 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice 
*vdev, int nr)
 goto out;
 }
 
-gmch = vfio_pci_read_config(>pdev, IGD_GMCH, 4);
-
 /*
  * If IGD VGA Disable is clear (expected) and VGA is not already enabled,
  * try to enable it.  Probably shouldn't be using legacy mode without VGA,
@@ -1732,12 +1749,11 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice 
*vdev, int nr)
  * when IVD (IGD VGA Disable) is clear, but the claim is that it's unused,
  * so let's not waste VM memory for it.
  */
-gmch &= ~((gen < 8 ? 0x1f : 0xff) << (gen < 8 ? 3 : 8));
-
 if (vdev->igd_gms) {
 if (vdev->igd_gms <= 0x10) {
 gms_mb = vdev->igd_gms * 32;
 gmch |= vdev->igd_gms << (gen < 8 ? 3 : 8);
+pci_set_long(vdev->pdev.config + IGD_GMCH, gmch);
 } else {
 error_report("Unsupported IGD GMS value 0x%x", vdev->igd_gms);
 vdev->igd_gms = 0;
@@ -1757,11 +1773,6 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice 
*vdev, int nr)
 fw_cfg_add_file(fw_cfg_find(), "etc/igd-bdsm-size",
 

Re: [Qemu-devel] [PATCH] tcg/optimize: Do not skip default processing of dup_vec

2018-08-05 Thread Laurent Desnogues
Hello,

On Mon, Aug 6, 2018 at 1:32 AM, Richard Henderson
 wrote:
> If we do not opimize away dup_vec, we must mark its output as changed.
>
> Fixes: 170ba88f45b
> Reported-by: Laurent Desnogues 
> Signed-off-by: Richard Henderson 

Reviewed-by: Laurent Desnogues 
Tested-by: Laurent Desnogues 

Thanks,

Laurent

> ---
>  tcg/optimize.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tcg/optimize.c b/tcg/optimize.c
> index d4ea67e541..5dbe11c3c8 100644
> --- a/tcg/optimize.c
> +++ b/tcg/optimize.c
> @@ -1094,9 +1094,9 @@ void tcg_optimize(TCGContext *s)
>  tmp = arg_info(op->args[1])->val;
>  tmp = dup_const(TCGOP_VECE(op), tmp);
>  tcg_opt_gen_movi(s, op, op->args[0], tmp);
> -continue;
> +break;
>  }
> -break;
> +goto do_default;
>
>  CASE_OP_32_64(not):
>  CASE_OP_32_64(neg):
> --
> 2.17.1
>



Re: [Qemu-devel] [PATCH 0/2] target/ppc: Fixes for my fpu cleanups

2018-08-05 Thread David Gibson
On Sun, Aug 05, 2018 at 06:27:21PM -0700, Richard Henderson wrote:
> David, please squash these with the patches you already
> have on your ppc-for-3.1 branch.
> 
> The first fixes fp division within the vector insns.
> The second fixes some typos within the load/store converters
> as reported by Mark Cave-Ayland.

Done, thanks.

> 
> 
> r~
> 
> 
> Richard Henderson (2):
>   fixup! target/ppc: Honor fpscr_ze semantics and tidy fdiv
>   fixup! target/ppc: Use non-arithmetic conversions for fp load/store
> 
>  target/ppc/fpu_helper.c | 12 +---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [Qemu-devel] [Qemu-ppc] [PATCH 7/7] target/ppc: Use non-arithmetic conversions for fp load/store

2018-08-05 Thread Richard Henderson
On 08/05/2018 04:41 AM, Mark Cave-Ayland wrote:
> On 06/07/18 10:03, Mark Cave-Ayland wrote:
> 
>> On 05/07/18 17:48, Richard Henderson wrote:
>>
>>> On 07/05/2018 09:31 AM, Programmingkid wrote:
> On Jul 3, 2018, at 11:17 AM, Richard Henderson
>  wrote:
>
> Memory operations have no side effects on fp state.
> The use of a "real" conversions between float64 and float32
> would raise exceptions for SNaN and out-of-range inputs.

 Would you have any documentation that tells us about converting
 between 64 bit and 32 bit floating points?
>>>
>>> Spelled out right at the beginning of sections 4.6 (load) and 4.7 (store) of
>>> Book 1 of the Power ISA manual (version 3.0B) [0].
>>>
>>> I've double-checked vs RISU[1] testing of LFS and STFS, with master traces
>>> generated on Power 8 ppc64le, so I don't see anything immediately wrong with
>>> the patch.  But I haven't had time to look further than that.
>>
>> I've had a quick look at this with the attached patch to compare the helper
>> results before your patch and after, writing any differences to the console.
>>
>> With this patch applied to ppc-for-3.1 I've booted MacOS 9 and recorded the
>> output below:
>>
>>
>> $ ./qemu-system-ppc -cdrom MacOS921-macsbug.iso -boot d -M mac99
>>
>> helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret:
>> 3bf0
>> helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret:
>> 3bf0
>>
>> (note: MacOS 9 will hang here unless the line marked "Uncommenting this
>> allows MacOS to run" in my patch is enabled)
>>
>> helper_todouble diff for arg: 3f00  d.ll: 3fe0  ret:
>> 3be0
>> helper_todouble diff for arg: 3f00  d.ll: 3fe0  ret:
>> 3be0
>> helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret:
>> 3bf0
>> helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret:
>> 3bf0
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_todouble diff for arg: be61b08a  d.ll: bfcc36114000  ret:
>> bbcc36114000
>> helper_todouble diff for arg: 3fdf81a5  d.ll: 3ffbf034a000  ret:
>> 3bfbf034a000
>> helper_todouble diff for arg: bf402647  d.ll: bfe804c8e000  ret:
>> bbe804c8e000
>> helper_todouble diff for arg: 3e61b08a  d.ll: 3fcc36114000  ret:
>> 3bcc36114000
>> helper_tosingle diff for arg: bfcc36114000  f.l: be61b08a  ret: 9e61b08a
>> helper_todouble diff for arg: 3f0d  d.ll: 3fe1a000  ret:
>> 3be1a000
>> helper_tosingle diff for arg: 3ffbf034a000  f.l: 3fdf81a5  ret: 1fdf81a5
>> helper_tosingle diff for arg: bfe804c8e000  f.l: bf402647  ret: 9f402647
>> helper_tosingle diff for arg: 3fcc36114000  f.l: 3e61b08a  ret: 1e61b08a
>> helper_tosingle diff for arg: 3fe1a000  f.l: 3f0d  ret: 1f0d
>> helper_todouble diff for arg: 3b80  d.ll: 3f70  ret:
>> 3b70
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_todouble diff for arg: 3b80  d.ll: 3f70  ret:
>> 3b70
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>> helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 1f80
>>
>>
>> It looks like the differences are related to a flag or flags in the MSB byte
>> of ret.
> 
> Hi Richard,
> 
> Have you had a chance to look at this yet? I've been working on top of David's
> ppc-for-3.1 branch over the weekend and ran into this again during my testing 
> :/

Thanks for the reminder and the test cases.
I've posted a fix for this now.


r~



[Qemu-devel] [PATCH 2/2] fixup! target/ppc: Use non-arithmetic conversions for fp load/store

2018-08-05 Thread Richard Henderson
---
 target/ppc/fpu_helper.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index faea64020b..b9bb1b856e 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -61,7 +61,7 @@ uint64_t helper_todouble(uint32_t arg)
 /* Normalized operand, or Inf, or NaN.  */
 ret  = (uint64_t)extract32(arg, 30, 2) << 62;
 ret |= ((extract32(arg, 30, 1) ^ 1) * (uint64_t)7) << 59;
-ret |= (uint64_t)extract32(arg, 0, 29) << 29;
+ret |= (uint64_t)extract32(arg, 0, 30) << 29;
 } else {
 /* Zero or Denormalized operand.  */
 ret = (uint64_t)extract32(arg, 31, 1) << 63;
@@ -88,14 +88,14 @@ uint32_t helper_tosingle(uint64_t arg)
 if (likely(exp > 896)) {
 /* No denormalization required (includes Inf, NaN).  */
 ret  = extract64(arg, 62, 2) << 30;
-ret |= extract64(arg, 29, 29);
+ret |= extract64(arg, 29, 30);
 } else {
 /* Zero or Denormal result.  If the exponent is in bounds for
  * a single-precision denormal result, extract the proper bits.
  * If the input is not zero, and the exponent is out of bounds,
  * then the result is undefined; this underflows to zero.
  */
-ret = extract64(arg, 63, 1) << 63;
+ret = extract64(arg, 63, 1) << 31;
 if (unlikely(exp >= 874)) {
 /* Denormal result.  */
 ret |= ((1ULL << 52) | extract64(arg, 0, 52)) >> (896 + 30 - exp);
-- 
2.17.1




[Qemu-devel] [PATCH 1/2] fixup! target/ppc: Honor fpscr_ze semantics and tidy fdiv

2018-08-05 Thread Richard Henderson
---
 target/ppc/fpu_helper.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index cb82e6e842..faea64020b 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -1965,6 +1965,9 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)   
\
 tp##_is_signaling_nan(xb.fld, )) {  \
 float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf);\
 } \
+} \
+if (unlikely(tstat.float_exception_flags & float_flag_divbyzero)) {   \
+float_zero_divide_excp(env, GETPC()); \
 } \
   \
 if (r2sp) {   \
@@ -2015,6 +2018,9 @@ void helper_xsdivqp(CPUPPCState *env, uint32_t opcode)
 float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
 }
 }
+if (unlikely(tstat.float_exception_flags & float_flag_divbyzero)) {
+float_zero_divide_excp(env, GETPC());
+}
 
 helper_compute_fprf_float128(env, xt.f128);
 putVSR(rD(opcode) + 32, , env);
-- 
2.17.1




[Qemu-devel] [PATCH 0/2] target/ppc: Fixes for my fpu cleanups

2018-08-05 Thread Richard Henderson
David, please squash these with the patches you already
have on your ppc-for-3.1 branch.

The first fixes fp division within the vector insns.
The second fixes some typos within the load/store converters
as reported by Mark Cave-Ayland.


r~


Richard Henderson (2):
  fixup! target/ppc: Honor fpscr_ze semantics and tidy fdiv
  fixup! target/ppc: Use non-arithmetic conversions for fp load/store

 target/ppc/fpu_helper.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

-- 
2.17.1




[Qemu-devel] [PATCH] tcg/optimize: Do not skip default processing of dup_vec

2018-08-05 Thread Richard Henderson
If we do not opimize away dup_vec, we must mark its output as changed.

Fixes: 170ba88f45b
Reported-by: Laurent Desnogues 
Signed-off-by: Richard Henderson 
---
 tcg/optimize.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tcg/optimize.c b/tcg/optimize.c
index d4ea67e541..5dbe11c3c8 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -1094,9 +1094,9 @@ void tcg_optimize(TCGContext *s)
 tmp = arg_info(op->args[1])->val;
 tmp = dup_const(TCGOP_VECE(op), tmp);
 tcg_opt_gen_movi(s, op, op->args[0], tmp);
-continue;
+break;
 }
-break;
+goto do_default;
 
 CASE_OP_32_64(not):
 CASE_OP_32_64(neg):
-- 
2.17.1




[Qemu-devel] [PATCH 6/6] target/s390x: implement CVB, CVBY and CVBG

2018-08-05 Thread Pavel Zbitskiy
Convert to Binary - counterparts of the already implemented Convert
to Decimal (CVD*) instructions.
Example from the Principles of Operation: 25594C becomes 63FA.

Signed-off-by: Pavel Zbitskiy 
---
 target/s390x/helper.h  |  2 ++
 target/s390x/insn-data.def |  4 
 target/s390x/int_helper.c  | 58 ++
 target/s390x/translate.c   | 12 ++
 4 files changed, 76 insertions(+)

diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 97c60ca7bc..20e0c424f9 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -88,6 +88,8 @@ DEF_HELPER_FLAGS_4(tcxb, TCG_CALL_NO_RWG_SE, i32, env, i64, 
i64, i64)
 DEF_HELPER_FLAGS_2(sqeb, TCG_CALL_NO_WG, i64, env, i64)
 DEF_HELPER_FLAGS_2(sqdb, TCG_CALL_NO_WG, i64, env, i64)
 DEF_HELPER_FLAGS_3(sqxb, TCG_CALL_NO_WG, i64, env, i64, i64)
+DEF_HELPER_FLAGS_2(cvb, TCG_CALL_NO_WG, i64, env, i64)
+DEF_HELPER_FLAGS_2(cvbg, TCG_CALL_NO_WG, i64, env, i64)
 DEF_HELPER_FLAGS_1(cvd, TCG_CALL_NO_RWG_SE, i64, s32)
 DEF_HELPER_FLAGS_4(pack, TCG_CALL_NO_WG, void, env, i32, i64, i64)
 DEF_HELPER_FLAGS_4(pka, TCG_CALL_NO_WG, void, env, i64, i64, i32)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 9c7b434fca..f0b1cbc4b2 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -284,6 +284,10 @@
 D(0xec73, CLFIT,   RIE_a, GIE, r1_32u, i2_32u, 0, 0, ct, 0, 1)
 D(0xec71, CLGIT,   RIE_a, GIE, r1_o, i2_32u, 0, 0, ct, 0, 1)
 
+/* CONVERT TO BINARY */
+C(0x4f00, CVB, RX_a,  Z,   0, a2, new, r1_32, cvb, 0)
+C(0xe306, CVBY,RXY_a, LD,  0, a2, new, r1_32, cvb, 0)
+C(0xe30e, CVBG,RXY_a, Z,   0, a2, r1, 0, cvbg, 0)
 /* CONVERT TO DECIMAL */
 C(0x4e00, CVD, RX_a,  Z,   r1_o, a2, 0, 0, cvd, 0)
 C(0xe326, CVDY,RXY_a, LD,  r1_o, a2, 0, 0, cvd, 0)
diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c
index abf77a94e6..2d67347d08 100644
--- a/target/s390x/int_helper.c
+++ b/target/s390x/int_helper.c
@@ -24,6 +24,7 @@
 #include "exec/exec-all.h"
 #include "qemu/host-utils.h"
 #include "exec/helper-proto.h"
+#include "exec/cpu_ldst.h"
 
 /* #define DEBUG_HELPER */
 #ifdef DEBUG_HELPER
@@ -118,6 +119,63 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, 
uint64_t al,
 return ret;
 }
 
+static void general_operand_exception(CPUS390XState *env, uintptr_t ra)
+{
+LowCore *lowcore;
+
+lowcore = cpu_map_lowcore(env);
+lowcore->data_exc_code = 0;
+cpu_unmap_lowcore(lowcore);
+s390_program_interrupt(env, PGM_DATA, ILEN_AUTO, ra);
+}
+
+static int64_t do_cvb(CPUS390XState *env, uint64_t src, int n)
+{
+int i, j;
+uintptr_t ra = GETPC();
+int64_t dec, sign, digit, val, pow10;
+
+for (i = 0; i < n; i++) {
+dec = cpu_ldq_data_ra(env, src + (n - i - 1) * 8, ra);
+for (j = 0; j < 16; j++, dec >>= 4) {
+if (i == 0 && j == 0) {
+sign = dec & 0xf;
+if (sign < 0xa) {
+general_operand_exception(env, ra);
+}
+continue;
+}
+digit = dec & 0xf;
+if (digit > 0x9) {
+general_operand_exception(env, ra);
+}
+if (i == 0 && j == 1) {
+if (sign == 0xb || sign == 0xd) {
+val = -digit;
+pow10 = -10;
+} else {
+val = digit;
+pow10 = 10;
+}
+} else {
+val += digit * pow10;
+pow10 *= 10;
+}
+}
+}
+return val;
+}
+
+uint64_t HELPER(cvb)(CPUS390XState *env, uint64_t src)
+{
+return do_cvb(env, src, 1);
+}
+
+uint64_t HELPER(cvbg)(CPUS390XState *env, uint64_t src)
+{
+return do_cvb(env, src, 2);
+}
+
 uint64_t HELPER(cvd)(int32_t reg)
 {
 /* positive 0 */
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 05442dff36..83d71815d4 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -2106,6 +2106,18 @@ static DisasJumpType op_csp(DisasContext *s, DisasOps *o)
 }
 #endif
 
+static DisasJumpType op_cvb(DisasContext *s, DisasOps *o)
+{
+gen_helper_cvb(o->out, cpu_env, o->in2);
+return DISAS_NEXT;
+}
+
+static DisasJumpType op_cvbg(DisasContext *s, DisasOps *o)
+{
+gen_helper_cvbg(o->out, cpu_env, o->in2);
+return DISAS_NEXT;
+}
+
 static DisasJumpType op_cvd(DisasContext *s, DisasOps *o)
 {
 TCGv_i64 t1 = tcg_temp_new_i64();
-- 
2.16.2.windows.1




[Qemu-devel] [PATCH 5/6] target/s390x: fix PACK reading 1 byte less and writing 1 byte more

2018-08-05 Thread Pavel Zbitskiy
PACK fails on the test from the Principles of Operation: F1F2F3F4
becomes 234C instead of 0001234C due to an off-by-one error.
Furthermore, it overwrites one extra byte to the left of F1.

Signed-off-by: Pavel Zbitskiy 
---
 target/s390x/mem_helper.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 704d0193b5..bacae4f503 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -1019,15 +1019,15 @@ void HELPER(pack)(CPUS390XState *env, uint32_t len, 
uint64_t dest, uint64_t src)
 len_src--;
 
 /* now pack every value */
-while (len_dest >= 0) {
+while (len_dest > 0) {
 b = 0;
 
-if (len_src > 0) {
+if (len_src >= 0) {
 b = cpu_ldub_data_ra(env, src, ra) & 0x0f;
 src--;
 len_src--;
 }
-if (len_src > 0) {
+if (len_src >= 0) {
 b |= cpu_ldub_data_ra(env, src, ra) << 4;
 src--;
 len_src--;
-- 
2.16.2.windows.1




[Qemu-devel] [PATCH 4/6] target/s390x: add EX support for TRT and TRTR

2018-08-05 Thread Pavel Zbitskiy
Improves "b213c9f5: target/s390x: Implement TRTR" by introducing the
intermediate functions, which are compatible with dx_helper type.

Signed-off-by: Pavel Zbitskiy 
---
 target/s390x/mem_helper.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index c94dbf3fcb..704d0193b5 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -1299,12 +1299,26 @@ static inline uint32_t do_helper_trt(CPUS390XState 
*env, int len,
 return 0;
 }
 
+static uint32_t do_helper_trt_fwd(CPUS390XState *env, uint32_t len,
+  uint64_t array, uint64_t trans,
+  uintptr_t ra)
+{
+return do_helper_trt(env, len, array, trans, 1, ra);
+}
+
 uint32_t HELPER(trt)(CPUS390XState *env, uint32_t len, uint64_t array,
  uint64_t trans)
 {
 return do_helper_trt(env, len, array, trans, 1, GETPC());
 }
 
+static uint32_t do_helper_trt_bkwd(CPUS390XState *env, uint32_t len,
+   uint64_t array, uint64_t trans,
+   uintptr_t ra)
+{
+return do_helper_trt(env, len, array, trans, -1, ra);
+}
+
 uint32_t HELPER(trtr)(CPUS390XState *env, uint32_t len, uint64_t array,
   uint64_t trans)
 {
@@ -2193,12 +2207,14 @@ void HELPER(ex)(CPUS390XState *env, uint32_t ilen, 
uint64_t r1, uint64_t addr)
 typedef uint32_t (*dx_helper)(CPUS390XState *, uint32_t, uint64_t,
   uint64_t, uintptr_t);
 static const dx_helper dx[16] = {
+[0x0] = do_helper_trt_bkwd,
 [0x2] = do_helper_mvc,
 [0x4] = do_helper_nc,
 [0x5] = do_helper_clc,
 [0x6] = do_helper_oc,
 [0x7] = do_helper_xc,
 [0xc] = do_helper_tr,
+[0xd] = do_helper_trt_fwd,
 };
 dx_helper helper = dx[opc & 0xf];
 
-- 
2.16.2.windows.1




[Qemu-devel] [PATCH 1/6] target/s390x: add BAL and BALR instructions

2018-08-05 Thread Pavel Zbitskiy
These instructions are provided for compatibility purposes and are
used only by old software, in the new code BAS and BASR are preferred.
The difference between the old and new instruction exists only in the
24-bit mode.

Signed-off-by: Pavel Zbitskiy 
---
 target/s390x/insn-data.def |  3 +++
 target/s390x/translate.c   | 32 
 2 files changed, 35 insertions(+)

diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 5c6f33ed9c..9c7b434fca 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -102,6 +102,9 @@
 D(0x9400, NI,  SI,Z,   la1, i2_8u, new, 0, ni, nz64, MO_UB)
 D(0xeb54, NIY, SIY,   LD,  la1, i2_8u, new, 0, ni, nz64, MO_UB)
 
+/* BRANCH AND LINK */
+C(0x0500, BALR,RR_a,  Z,   0, r2_nz, r1, 0, bal, 0)
+C(0x4500, BAL, RX_a,  Z,   0, a2, r1, 0, bal, 0)
 /* BRANCH AND SAVE */
 C(0x0d00, BASR,RR_a,  Z,   0, r2_nz, r1, 0, bas, 0)
 C(0x4d00, BAS, RX_a,  Z,   0, a2, r1, 0, bas, 0)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 57c03cbf58..efdc88e227 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -1463,6 +1463,38 @@ static DisasJumpType op_bas(DisasContext *s, DisasOps *o)
 }
 }
 
+static void save_link_info(TCGv_i64 out, uint64_t pc, uint64_t ilc)
+{
+TCGv_i64 t;
+
+tcg_gen_andi_i64(out, out, 0x);
+tcg_gen_ori_i64(out, out, (ilc << 30) | pc);
+t = tcg_temp_new_i64();
+tcg_gen_shri_i64(t, psw_mask, 16);
+tcg_gen_andi_i64(t, t, 0x0f00);
+tcg_gen_or_i64(out, out, t);
+tcg_gen_extu_i32_i64(t, cc_op);
+tcg_gen_shli_i64(t, t, 28);
+tcg_gen_or_i64(out, out, t);
+tcg_temp_free_i64(t);
+}
+
+static DisasJumpType op_bal(DisasContext *s, DisasOps *o)
+{
+if (s->base.tb->flags & FLAG_MASK_32) {
+return op_bas(s, o);
+}
+gen_op_calc_cc(s);
+save_link_info(o->out, s->pc_tmp, s->ilen / 2);
+if (o->in2) {
+tcg_gen_mov_i64(psw_addr, o->in2);
+per_branch(s, false);
+return DISAS_PC_UPDATED;
+} else {
+return DISAS_NEXT;
+}
+}
+
 static DisasJumpType op_basi(DisasContext *s, DisasOps *o)
 {
 tcg_gen_movi_i64(o->out, pc_to_link_info(s, s->pc_tmp));
-- 
2.16.2.windows.1




[Qemu-devel] [PATCH 2/6] target/s390x: fix CSST decoding and runtime alignment check

2018-08-05 Thread Pavel Zbitskiy
CSST is defined as:

C(0xc802, CSST,SSF,   CASS, la1, a2, 0, 0, csst, 0)

It means that the first parameter is handled by in1_la1().
in1_la1() fills addr1 field, and not in1.

Furthermore, when extract32() is used for the alignment check, the
third parameter should specify the number of trailing bits that must
be 0. For FC these numbers are:

FC=0: 2
FC=1: 3
FC=2: 4

For SC these numbers are:

SC=0: 0
SC=1: 1
SC=2: 2
SC=3: 3
SC=4: 4

Signed-off-by: Pavel Zbitskiy 
---
 target/s390x/mem_helper.c | 2 +-
 target/s390x/translate.c  | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index e21a47fb4d..c94dbf3fcb 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -1442,7 +1442,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, 
uint64_t a1,
 }
 
 /* Sanity check the alignments.  */
-if (extract32(a1, 0, 4 << fc) || extract32(a2, 0, 1 << sc)) {
+if (extract32(a1, 0, fc + 2) || extract32(a2, 0, sc)) {
 goto spec_exception;
 }
 
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index efdc88e227..f318fb6e4e 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -2050,9 +2050,9 @@ static DisasJumpType op_csst(DisasContext *s, DisasOps *o)
 TCGv_i32 t_r3 = tcg_const_i32(r3);
 
 if (tb_cflags(s->base.tb) & CF_PARALLEL) {
-gen_helper_csst_parallel(cc_op, cpu_env, t_r3, o->in1, o->in2);
+gen_helper_csst_parallel(cc_op, cpu_env, t_r3, o->addr1, o->in2);
 } else {
-gen_helper_csst(cc_op, cpu_env, t_r3, o->in1, o->in2);
+gen_helper_csst(cc_op, cpu_env, t_r3, o->addr1, o->in2);
 }
 tcg_temp_free_i32(t_r3);
 
-- 
2.16.2.windows.1




[Qemu-devel] [PATCH 0/6] Some improvements in z/Arch instructions support

2018-08-05 Thread Pavel Zbitskiy
Add BAL, BALR, CVB instructions
Fix few bugs in PACK, CSST

Pavel Zbitskiy (6):
  target/s390x: add BAL and BALR instructions
  target/s390x: fix CSST decoding and runtime alignment check
  target/s390x: fix ipm polluting irrelevant bits
  target/s390x: add EX support for TRT and TRTR
  target/s390x: fix PACK reading 1 byte less and writing 1 byte more
  target/s390x: implement CVB, CVBY and CVBG

 target/s390x/helper.h  |  2 ++
 target/s390x/insn-data.def |  7 ++
 target/s390x/int_helper.c  | 58 ++
 target/s390x/mem_helper.c  | 24 +++
 target/s390x/translate.c   | 52 +
 5 files changed, 135 insertions(+), 8 deletions(-)

-- 
2.16.2.windows.1




[Qemu-devel] [PATCH 3/6] target/s390x: fix ipm polluting irrelevant bits

2018-08-05 Thread Pavel Zbitskiy
Suppose psw.mask=0x8000, cc=2, r1=0 and we do "ipm 1".
This command must touch only bits 32-39, so the expected output
is r1=0x2000. However, currently qemu yields r1=0x20008000,
because irrelevant parts of PSW leak into r1 during program mask
transfer.

Signed-off-by: Pavel Zbitskiy 
---
 target/s390x/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index f318fb6e4e..05442dff36 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -2442,8 +2442,8 @@ static DisasJumpType op_ipm(DisasContext *s, DisasOps *o)
 tcg_gen_andi_i64(o->out, o->out, ~0xff00ull);
 
 t1 = tcg_temp_new_i64();
-tcg_gen_shli_i64(t1, psw_mask, 20);
-tcg_gen_shri_i64(t1, t1, 36);
+tcg_gen_andi_i64(t1, psw_mask, 0x0f00);
+tcg_gen_shri_i64(t1, t1, 16);
 tcg_gen_or_i64(o->out, o->out, t1);
 
 tcg_gen_extu_i32_i64(t1, cc_op);
-- 
2.16.2.windows.1




[Qemu-devel] [PATCH 0/6] Some improvements in z/Arch instructions support

2018-08-05 Thread Pavel Zbitskiy
Add BAL, BALR, CVB instructions
Fix few bugs in PACK, CSST

Pavel Zbitskiy (6):
  target/s390x: add BAL and BALR instructions
  target/s390x: fix CSST decoding and runtime alignment check
  target/s390x: fix ipm polluting irrelevant bits
  target/s390x: add EX support for TRT and TRTR
  target/s390x: fix PACK reading 1 byte less and writing 1 byte more
  target/s390x: implement CVB, CVBY and CVBG

 target/s390x/helper.h  |  2 ++
 target/s390x/insn-data.def |  7 ++
 target/s390x/int_helper.c  | 58 ++
 target/s390x/mem_helper.c  | 24 +++
 target/s390x/translate.c   | 52 +
 5 files changed, 135 insertions(+), 8 deletions(-)

-- 
2.16.2.windows.1




[Qemu-devel] [PATCH v2 12/13] hw/rdma: Bugfix - Support non-aligned buffers

2018-08-05 Thread Yuval Shaia
RDMA application can provide non-aligned buffers to be registered. In
such case the DMA address passed by driver is pointing to the beginning
of the physical address of the mapped page so we can't distinguish
between two addresses from the same page.

Fix it by keeping the offset of the virtual address in mr->virt.

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/rdma_rm.c| 2 ++
 hw/rdma/vmw/pvrdma_cmd.c | 1 +
 2 files changed, 3 insertions(+)

diff --git a/hw/rdma/rdma_rm.c b/hw/rdma/rdma_rm.c
index 859c93..8d59a42cd1 100644
--- a/hw/rdma/rdma_rm.c
+++ b/hw/rdma/rdma_rm.c
@@ -166,6 +166,7 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t 
pd_handle,
 mr->virt = host_virt;
 mr->start = guest_start;
 mr->length = guest_length;
+mr->virt += (mr->start & (TARGET_PAGE_SIZE - 1));
 
 ret = rdma_backend_create_mr(>backend_mr, >backend_pd, 
mr->virt,
  mr->length, access_flags);
@@ -203,6 +204,7 @@ void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, 
uint32_t mr_handle)
 rdma_backend_destroy_mr(>backend_mr);
 pr_dbg("start=0x%" PRIx64 "\n", mr->start);
 if (mr->start) {
+mr->virt -= (mr->start & (TARGET_PAGE_SIZE - 1));
 munmap(mr->virt, mr->length);
 }
 res_tbl_dealloc(_res->mr_tbl, mr_handle);
diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_cmd.c
index 4f74b29936..b74b0b48d0 100644
--- a/hw/rdma/vmw/pvrdma_cmd.c
+++ b/hw/rdma/vmw/pvrdma_cmd.c
@@ -59,6 +59,7 @@ static void *pvrdma_map_to_pdir(PCIDevice *pdev, uint64_t 
pdir_dma,
 }
 
 host_virt = mremap(curr_page, 0, length, MREMAP_MAYMOVE);
+pr_dbg("mremap %p -> %p\n", curr_page, host_virt);
 if (host_virt == MAP_FAILED) {
 host_virt = NULL;
 error_report("PVRDMA: Failed to remap memory for host_virt");
-- 
2.17.1




[Qemu-devel] [PATCH v2 13/13] hw/rdma: Add reference to pci_dev in backend_dev

2018-08-05 Thread Yuval Shaia
The field backend_dev->dev is not initialized, fix it.

Signed-off-by: Yuval Shaia 
---
 hw/rdma/rdma_backend.c| 6 +-
 hw/rdma/rdma_backend.h| 2 +-
 hw/rdma/vmw/pvrdma_main.c | 2 +-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c
index d29acc505b..d7a4bbd91f 100644
--- a/hw/rdma/rdma_backend.c
+++ b/hw/rdma/rdma_backend.c
@@ -744,7 +744,7 @@ static int init_device_caps(RdmaBackendDev *backend_dev,
 return 0;
 }
 
-int rdma_backend_init(RdmaBackendDev *backend_dev,
+int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev,
   RdmaDeviceResources *rdma_dev_res,
   const char *backend_device_name, uint8_t port_num,
   uint8_t backend_gid_idx, struct ibv_device_attr 
*dev_attr,
@@ -756,6 +756,10 @@ int rdma_backend_init(RdmaBackendDev *backend_dev,
 struct ibv_device **dev_list;
 struct ibv_port_attr port_attr;
 
+memset(backend_dev, 0, sizeof(*backend_dev));
+
+backend_dev->dev = pdev;
+
 backend_dev->backend_gid_idx = backend_gid_idx;
 backend_dev->port_num = port_num;
 backend_dev->rdma_dev_res = rdma_dev_res;
diff --git a/hw/rdma/rdma_backend.h b/hw/rdma/rdma_backend.h
index 3049a73962..86e8fe8ab6 100644
--- a/hw/rdma/rdma_backend.h
+++ b/hw/rdma/rdma_backend.h
@@ -46,7 +46,7 @@ static inline uint32_t rdma_backend_mr_rkey(const 
RdmaBackendMR *mr)
 return mr->ibmr ? mr->ibmr->rkey : 0;
 }
 
-int rdma_backend_init(RdmaBackendDev *backend_dev,
+int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev,
   RdmaDeviceResources *rdma_dev_res,
   const char *backend_device_name, uint8_t port_num,
   uint8_t backend_gid_idx, struct ibv_device_attr 
*dev_attr,
diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c
index 3d448bffc4..ca5fa8d981 100644
--- a/hw/rdma/vmw/pvrdma_main.c
+++ b/hw/rdma/vmw/pvrdma_main.c
@@ -611,7 +611,7 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp)
 goto out;
 }
 
-rc = rdma_backend_init(>backend_dev, >rdma_dev_res,
+rc = rdma_backend_init(>backend_dev, pdev, >rdma_dev_res,
dev->backend_device_name, dev->backend_port_num,
dev->backend_gid_idx, >dev_attr, errp);
 if (rc) {
-- 
2.17.1




[Qemu-devel] [PATCH v2 10/13] hw/rdma: Cosmetic change - move to generic function

2018-08-05 Thread Yuval Shaia
To ease maintenance of struct comp_thread move all related code to
dedicated function.

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/rdma_backend.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c
index 52981d652d..d29acc505b 100644
--- a/hw/rdma/rdma_backend.c
+++ b/hw/rdma/rdma_backend.c
@@ -146,10 +146,10 @@ static void *comp_handler_thread(void *arg)
 return NULL;
 }
 
-static void stop_comp_thread(RdmaBackendDev *backend_dev)
+static void stop_backend_thread(RdmaBackendThread *thread)
 {
-backend_dev->comp_thread.run = false;
-while (backend_dev->comp_thread.is_running) {
+thread->run = false;
+while (thread->is_running) {
 pr_dbg("Waiting for thread to complete\n");
 sleep(THR_POLL_TO / SCALE_US / 2);
 }
@@ -159,7 +159,7 @@ static void start_comp_thread(RdmaBackendDev *backend_dev)
 {
 char thread_name[THR_NAME_LEN] = {0};
 
-stop_comp_thread(backend_dev);
+stop_backend_thread(_dev->comp_thread);
 
 snprintf(thread_name, sizeof(thread_name), "rdma_comp_%s",
  ibv_get_device_name(backend_dev->ib_dev));
@@ -876,7 +876,7 @@ void rdma_backend_start(RdmaBackendDev *backend_dev)
 void rdma_backend_stop(RdmaBackendDev *backend_dev)
 {
 pr_dbg("Stopping rdma_backend\n");
-stop_comp_thread(backend_dev);
+stop_backend_thread(_dev->comp_thread);
 }
 
 void rdma_backend_fini(RdmaBackendDev *backend_dev)
-- 
2.17.1




[Qemu-devel] [PATCH v2 09/13] hw/pvrdma: Cosmetic change - indent right

2018-08-05 Thread Yuval Shaia
Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/vmw/pvrdma_main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c
index 1b1330e113..3d448bffc4 100644
--- a/hw/rdma/vmw/pvrdma_main.c
+++ b/hw/rdma/vmw/pvrdma_main.c
@@ -430,7 +430,7 @@ static void regs_write(void *opaque, hwaddr addr, uint64_t 
val, unsigned size)
 reset_device(dev);
 break;
 }
-break;
+break;
 case PVRDMA_REG_IMR:
 pr_dbg("Interrupt mask=0x%" PRIx64 "\n", val);
 dev->interrupt_mask = val;
@@ -439,7 +439,7 @@ static void regs_write(void *opaque, hwaddr addr, uint64_t 
val, unsigned size)
 if (val == 0) {
 execute_command(dev);
 }
-break;
+break;
 default:
 break;
 }
-- 
2.17.1




Re: [Qemu-devel] [Qemu-ppc] [PULL 0/2] ppc-for-3.0 queue 20180801

2018-08-05 Thread BALATON Zoltan

On Wed, 1 Aug 2018, Peter Maydell wrote:

On 1 August 2018 at 12:24, BALATON Zoltan  wrote:

On Wed, 1 Aug 2018, Peter Maydell wrote:

So, we've just put out rc3, which in an ideal world is our
final release candidate for 3.0. Are these bugs regressions from
2.12 ?



I don't know about the macio one but the sam460ex PCI interrupts were broken
in 2.12 too. However it's a fix for a device only used in sam460ex which is
now fixed by this patch so including it is not high risk for breaking
anything else than sam460ex which is known to be not finished yet so I would
not worry too much. But which is better? Releasing 3.0 with a known bug or
including this fix without an rc4?


The problem with continuing to delay 3.0 while we have known bugs
is that bugs generally come in at an even rate, so we *always*
have known bugs, and so "we found another bug, let's delay 3.0
again to put in a fix for it" is a recipe for never doing a release.
That's why we gradually wind up the bar for "should this go in",
from "any bug" to "regressions" to "really really serious showstopper
regressions".

We never do a final release without a last rc (it is too risky),
so that is not an option.


Now that it looks like we'll have an rc4 due to other fixes can these be 
included as well despite not being regressions? These may not have been 
serious enough to fix when we wouldn't have rc4 otherwise but holding on 
to broken implementation just because they were also broken in the 
previous release does not make sense if we'll have another rc anyway.


Regards,
BALATON Zoltan



[Qemu-devel] [PATCH v2 11/13] hw/rdma: Print backend QP number in hex format

2018-08-05 Thread Yuval Shaia
To be consistent with other prints throughout the code fix places that
print it as decimal number.

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/rdma_rm.c   | 4 ++--
 hw/rdma/vmw/pvrdma_qp_ops.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/rdma/rdma_rm.c b/hw/rdma/rdma_rm.c
index 1f014b4ab2..859c93 100644
--- a/hw/rdma/rdma_rm.c
+++ b/hw/rdma/rdma_rm.c
@@ -389,7 +389,7 @@ int rdma_rm_modify_qp(RdmaDeviceResources *dev_res, 
RdmaBackendDev *backend_dev,
 RdmaRmQP *qp;
 int ret;
 
-pr_dbg("qpn=%d\n", qp_handle);
+pr_dbg("qpn=0x%x\n", qp_handle);
 
 qp = rdma_rm_get_qp(dev_res, qp_handle);
 if (!qp) {
@@ -447,7 +447,7 @@ int rdma_rm_query_qp(RdmaDeviceResources *dev_res, 
RdmaBackendDev *backend_dev,
 {
 RdmaRmQP *qp;
 
-pr_dbg("qpn=%d\n", qp_handle);
+pr_dbg("qpn=0x%x\n", qp_handle);
 
 qp = rdma_rm_get_qp(dev_res, qp_handle);
 if (!qp) {
diff --git a/hw/rdma/vmw/pvrdma_qp_ops.c b/hw/rdma/vmw/pvrdma_qp_ops.c
index a8664f40c8..c668afd0ed 100644
--- a/hw/rdma/vmw/pvrdma_qp_ops.c
+++ b/hw/rdma/vmw/pvrdma_qp_ops.c
@@ -130,7 +130,7 @@ int pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle)
 PvrdmaSqWqe *wqe;
 PvrdmaRing *ring;
 
-pr_dbg("qp_handle=%d\n", qp_handle);
+pr_dbg("qp_handle=0x%x\n", qp_handle);
 
 qp = rdma_rm_get_qp(>rdma_dev_res, qp_handle);
 if (unlikely(!qp)) {
@@ -174,7 +174,7 @@ int pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle)
 PvrdmaRqWqe *wqe;
 PvrdmaRing *ring;
 
-pr_dbg("qp_handle=%d\n", qp_handle);
+pr_dbg("qp_handle=0x%x\n", qp_handle);
 
 qp = rdma_rm_get_qp(>rdma_dev_res, qp_handle);
 if (unlikely(!qp)) {
-- 
2.17.1




[Qemu-devel] [PATCH v2 07/13] hw/rdma: Do not allocate memory for non-dma MR

2018-08-05 Thread Yuval Shaia
There is no use in the memory allocated for non-dma MR.
Delete the code that allocates it.

Signed-off-by: Yuval Shaia 
---
 hw/rdma/rdma_rm.c | 52 +++
 1 file changed, 21 insertions(+), 31 deletions(-)

diff --git a/hw/rdma/rdma_rm.c b/hw/rdma/rdma_rm.c
index 7403d24674..bf4a5c71b4 100644
--- a/hw/rdma/rdma_rm.c
+++ b/hw/rdma/rdma_rm.c
@@ -144,8 +144,6 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t 
pd_handle,
 RdmaRmMR *mr;
 int ret = 0;
 RdmaRmPD *pd;
-void *addr;
-size_t length;
 
 pd = rdma_rm_get_pd(dev_res, pd_handle);
 if (!pd) {
@@ -158,40 +156,29 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, 
uint32_t pd_handle,
 pr_dbg("Failed to allocate obj in table\n");
 return -ENOMEM;
 }
+pr_dbg("mr_handle=%d\n", *mr_handle);
 
-if (!host_virt) {
-/* TODO: This is my guess but not so sure that this needs to be
- * done */
-length = TARGET_PAGE_SIZE;
-addr = g_malloc(length);
-} else {
+pr_dbg("host_virt=0x%p\n", host_virt);
+pr_dbg("guest_start=0x%" PRIx64 "\n", guest_start);
+pr_dbg("length=%zu\n", guest_length);
+
+if (host_virt) {
 mr->virt = host_virt;
-pr_dbg("host_virt=0x%p\n", mr->virt);
-mr->length = guest_length;
-pr_dbg("length=%zu\n", guest_length);
 mr->start = guest_start;
-pr_dbg("guest_start=0x%" PRIx64 "\n", mr->start);
-
-length = mr->length;
-addr = mr->virt;
-}
+mr->length = guest_length;
 
-ret = rdma_backend_create_mr(>backend_mr, >backend_pd, addr, 
length,
- access_flags);
-if (ret) {
-pr_dbg("Fail in rdma_backend_create_mr, err=%d\n", ret);
-ret = -EIO;
-goto out_dealloc_mr;
+ret = rdma_backend_create_mr(>backend_mr, >backend_pd, 
mr->virt,
+ mr->length, access_flags);
+if (ret) {
+pr_dbg("Fail in rdma_backend_create_mr, err=%d\n", ret);
+ret = -EIO;
+goto out_dealloc_mr;
+}
 }
 
-if (!host_virt) {
-*lkey = mr->lkey = rdma_backend_mr_lkey(>backend_mr);
-*rkey = mr->rkey = rdma_backend_mr_rkey(>backend_mr);
-} else {
-/* We keep mr_handle in lkey so send and recv get get mr ptr */
-*lkey = *mr_handle;
-*rkey = -1;
-}
+/* We keep mr_handle in lkey so send and recv get get mr ptr */
+*lkey = *mr_handle;
+*rkey = -1;
 
 mr->pd_handle = pd_handle;
 
@@ -214,7 +201,10 @@ void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, 
uint32_t mr_handle)
 
 if (mr) {
 rdma_backend_destroy_mr(>backend_mr);
-munmap(mr->virt, mr->length);
+pr_dbg("start=0x%" PRIx64 "\n", mr->start);
+if (mr->start) {
+munmap(mr->virt, mr->length);
+}
 res_tbl_dealloc(_res->mr_tbl, mr_handle);
 }
 }
-- 
2.17.1




[Qemu-devel] [PATCH v2 03/13] hw/rdma: Modify debug macros

2018-08-05 Thread Yuval Shaia
- Add line counter to ease navigation in log
- Print rdma instead of pvrdma

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/rdma_utils.c  |  4 
 hw/rdma/rdma_utils.h  | 16 
 hw/rdma/vmw/pvrdma_main.c |  2 ++
 3 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/hw/rdma/rdma_utils.c b/hw/rdma/rdma_utils.c
index d713f635f1..dc23f158f3 100644
--- a/hw/rdma/rdma_utils.c
+++ b/hw/rdma/rdma_utils.c
@@ -15,6 +15,10 @@
 
 #include "rdma_utils.h"
 
+#ifdef PVRDMA_DEBUG
+unsigned long pr_dbg_cnt;
+#endif
+
 void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t plen)
 {
 void *p;
diff --git a/hw/rdma/rdma_utils.h b/hw/rdma/rdma_utils.h
index 3dc07891bc..04c7c2ef5b 100644
--- a/hw/rdma/rdma_utils.h
+++ b/hw/rdma/rdma_utils.h
@@ -22,18 +22,26 @@
 #include "sysemu/dma.h"
 
 #define pr_info(fmt, ...) \
-fprintf(stdout, "%s: %-20s (%3d): " fmt, "pvrdma",  __func__, __LINE__,\
+fprintf(stdout, "%s: %-20s (%3d): " fmt, "rdma",  __func__, __LINE__,\
## __VA_ARGS__)
 
 #define pr_err(fmt, ...) \
-fprintf(stderr, "%s: Error at %-20s (%3d): " fmt, "pvrdma", __func__, \
+fprintf(stderr, "%s: Error at %-20s (%3d): " fmt, "rdma", __func__, \
 __LINE__, ## __VA_ARGS__)
 
 #ifdef PVRDMA_DEBUG
+extern unsigned long pr_dbg_cnt;
+
+#define init_pr_dbg(void) \
+{ \
+pr_dbg_cnt = 0; \
+}
+
 #define pr_dbg(fmt, ...) \
-fprintf(stdout, "%s: %-20s (%3d): " fmt, "pvrdma", __func__, __LINE__,\
-   ## __VA_ARGS__)
+fprintf(stdout, "%lx %ld: %-20s (%3d): " fmt, pthread_self(), 
pr_dbg_cnt++, \
+__func__, __LINE__, ## __VA_ARGS__)
 #else
+#define init_pr_dbg(void)
 #define pr_dbg(fmt, ...)
 #endif
 
diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c
index 6a5073974d..1b1330e113 100644
--- a/hw/rdma/vmw/pvrdma_main.c
+++ b/hw/rdma/vmw/pvrdma_main.c
@@ -577,6 +577,8 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp)
 Object *memdev_root;
 bool ram_shared = false;
 
+init_pr_dbg();
+
 pr_dbg("Initializing device %s %x.%x\n", pdev->name,
PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
 
-- 
2.17.1




[Qemu-devel] [PATCH v2 06/13] hw/rdma: Delete useless structure RdmaRmUserMR

2018-08-05 Thread Yuval Shaia
The structure RdmaRmUserMR has no benefits, remove it an move all its
fields to struct RdmaRmMR.

Signed-off-by: Yuval Shaia 
---
 hw/rdma/rdma_backend.c |  3 +--
 hw/rdma/rdma_rm.c  | 16 
 hw/rdma/rdma_rm_defs.h | 10 +++---
 3 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c
index 647e16399f..52981d652d 100644
--- a/hw/rdma/rdma_backend.c
+++ b/hw/rdma/rdma_backend.c
@@ -271,8 +271,7 @@ static int build_host_sge_array(RdmaDeviceResources 
*rdma_dev_res,
 return VENDOR_ERR_INVLKEY | ssge[ssge_idx].lkey;
 }
 
-dsge->addr = (uintptr_t)mr->user_mr.host_virt + ssge[ssge_idx].addr -
- mr->user_mr.guest_start;
+dsge->addr = (uintptr_t)mr->virt + ssge[ssge_idx].addr - mr->start;
 dsge->length = ssge[ssge_idx].length;
 dsge->lkey = rdma_backend_mr_lkey(>backend_mr);
 
diff --git a/hw/rdma/rdma_rm.c b/hw/rdma/rdma_rm.c
index 415da15efe..7403d24674 100644
--- a/hw/rdma/rdma_rm.c
+++ b/hw/rdma/rdma_rm.c
@@ -165,15 +165,15 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, 
uint32_t pd_handle,
 length = TARGET_PAGE_SIZE;
 addr = g_malloc(length);
 } else {
-mr->user_mr.host_virt = host_virt;
-pr_dbg("host_virt=0x%p\n", mr->user_mr.host_virt);
-mr->user_mr.length = guest_length;
+mr->virt = host_virt;
+pr_dbg("host_virt=0x%p\n", mr->virt);
+mr->length = guest_length;
 pr_dbg("length=%zu\n", guest_length);
-mr->user_mr.guest_start = guest_start;
-pr_dbg("guest_start=0x%" PRIx64 "\n", mr->user_mr.guest_start);
+mr->start = guest_start;
+pr_dbg("guest_start=0x%" PRIx64 "\n", mr->start);
 
-length = mr->user_mr.length;
-addr = mr->user_mr.host_virt;
+length = mr->length;
+addr = mr->virt;
 }
 
 ret = rdma_backend_create_mr(>backend_mr, >backend_pd, addr, 
length,
@@ -214,7 +214,7 @@ void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, 
uint32_t mr_handle)
 
 if (mr) {
 rdma_backend_destroy_mr(>backend_mr);
-munmap(mr->user_mr.host_virt, mr->user_mr.length);
+munmap(mr->virt, mr->length);
 res_tbl_dealloc(_res->mr_tbl, mr_handle);
 }
 }
diff --git a/hw/rdma/rdma_rm_defs.h b/hw/rdma/rdma_rm_defs.h
index 226011176d..7228151239 100644
--- a/hw/rdma/rdma_rm_defs.h
+++ b/hw/rdma/rdma_rm_defs.h
@@ -55,16 +55,12 @@ typedef struct RdmaRmCQ {
 bool notify;
 } RdmaRmCQ;
 
-typedef struct RdmaRmUserMR {
-void *host_virt;
-uint64_t guest_start;
-size_t length;
-} RdmaRmUserMR;
-
 /* MR (DMA region) */
 typedef struct RdmaRmMR {
 RdmaBackendMR backend_mr;
-RdmaRmUserMR user_mr;
+void *virt;
+uint64_t start;
+size_t length;
 uint32_t pd_handle;
 uint32_t lkey;
 uint32_t rkey;
-- 
2.17.1




[Qemu-devel] [PATCH v2 08/13] hw/rdma: Reorder resource cleanup

2018-08-05 Thread Yuval Shaia
To be consistence with allocation do the reverse order in deallocation

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/rdma_rm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/rdma/rdma_rm.c b/hw/rdma/rdma_rm.c
index bf4a5c71b4..1f014b4ab2 100644
--- a/hw/rdma/rdma_rm.c
+++ b/hw/rdma/rdma_rm.c
@@ -543,8 +543,9 @@ void rdma_rm_fini(RdmaDeviceResources *dev_res)
 res_tbl_free(_res->uc_tbl);
 res_tbl_free(_res->cqe_ctx_tbl);
 res_tbl_free(_res->qp_tbl);
-res_tbl_free(_res->cq_tbl);
 res_tbl_free(_res->mr_tbl);
+res_tbl_free(_res->cq_tbl);
 res_tbl_free(_res->pd_tbl);
+
 g_hash_table_destroy(dev_res->qp_hash);
 }
-- 
2.17.1




[Qemu-devel] [PATCH v2 01/13] hw/rdma: Make distinction between device init and start modes

2018-08-05 Thread Yuval Shaia
There are certain operations that are well considered as part of device
configuration while others are needed only when "start" command is
triggered by the guest driver. An example of device initialization step
is msix_init and example of "device start" stage is the creation of a CQ
completion handler thread.

Driver expects such distinction - implement it.

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/rdma_backend.c  |  96 +--
 hw/rdma/rdma_backend.h  |   2 +
 hw/rdma/rdma_backend_defs.h |   3 +-
 hw/rdma/vmw/pvrdma_main.c   | 129 +---
 4 files changed, 155 insertions(+), 75 deletions(-)

diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c
index e9ced6f9ef..647e16399f 100644
--- a/hw/rdma/rdma_backend.c
+++ b/hw/rdma/rdma_backend.c
@@ -35,6 +35,7 @@
 #define VENDOR_ERR_MR_SMALL 0x208
 
 #define THR_NAME_LEN 16
+#define THR_POLL_TO  5000
 
 typedef struct BackendCtx {
 uint64_t req_id;
@@ -91,35 +92,82 @@ static void *comp_handler_thread(void *arg)
 int rc;
 struct ibv_cq *ev_cq;
 void *ev_ctx;
+int flags;
+GPollFD pfds[1];
+
+/* Change to non-blocking mode */
+flags = fcntl(backend_dev->channel->fd, F_GETFL);
+rc = fcntl(backend_dev->channel->fd, F_SETFL, flags | O_NONBLOCK);
+if (rc < 0) {
+pr_dbg("Fail to change to non-blocking mode\n");
+return NULL;
+}
 
 pr_dbg("Starting\n");
 
+pfds[0].fd = backend_dev->channel->fd;
+pfds[0].events = G_IO_IN | G_IO_HUP | G_IO_ERR;
+
+backend_dev->comp_thread.is_running = true;
+
 while (backend_dev->comp_thread.run) {
-pr_dbg("Waiting for completion on channel %p\n", backend_dev->channel);
-rc = ibv_get_cq_event(backend_dev->channel, _cq, _ctx);
-pr_dbg("ibv_get_cq_event=%d\n", rc);
-if (unlikely(rc)) {
-pr_dbg("---> ibv_get_cq_event (%d)\n", rc);
-continue;
-}
+do {
+rc = qemu_poll_ns(pfds, 1, THR_POLL_TO * (int64_t)SCALE_MS);
+} while (!rc && backend_dev->comp_thread.run);
+
+if (backend_dev->comp_thread.run) {
+pr_dbg("Waiting for completion on channel %p\n", 
backend_dev->channel);
+rc = ibv_get_cq_event(backend_dev->channel, _cq, _ctx);
+pr_dbg("ibv_get_cq_event=%d\n", rc);
+if (unlikely(rc)) {
+pr_dbg("---> ibv_get_cq_event (%d)\n", rc);
+continue;
+}
 
-rc = ibv_req_notify_cq(ev_cq, 0);
-if (unlikely(rc)) {
-pr_dbg("Error %d from ibv_req_notify_cq\n", rc);
-}
+rc = ibv_req_notify_cq(ev_cq, 0);
+if (unlikely(rc)) {
+pr_dbg("Error %d from ibv_req_notify_cq\n", rc);
+}
 
-poll_cq(backend_dev->rdma_dev_res, ev_cq);
+poll_cq(backend_dev->rdma_dev_res, ev_cq);
 
-ibv_ack_cq_events(ev_cq, 1);
+ibv_ack_cq_events(ev_cq, 1);
+}
 }
 
 pr_dbg("Going down\n");
 
 /* TODO: Post cqe for all remaining buffs that were posted */
 
+backend_dev->comp_thread.is_running = false;
+
+qemu_thread_exit(0);
+
 return NULL;
 }
 
+static void stop_comp_thread(RdmaBackendDev *backend_dev)
+{
+backend_dev->comp_thread.run = false;
+while (backend_dev->comp_thread.is_running) {
+pr_dbg("Waiting for thread to complete\n");
+sleep(THR_POLL_TO / SCALE_US / 2);
+}
+}
+
+static void start_comp_thread(RdmaBackendDev *backend_dev)
+{
+char thread_name[THR_NAME_LEN] = {0};
+
+stop_comp_thread(backend_dev);
+
+snprintf(thread_name, sizeof(thread_name), "rdma_comp_%s",
+ ibv_get_device_name(backend_dev->ib_dev));
+backend_dev->comp_thread.run = true;
+qemu_thread_create(_dev->comp_thread.thread, thread_name,
+   comp_handler_thread, backend_dev, QEMU_THREAD_DETACHED);
+}
+
 void rdma_backend_register_comp_handler(void (*handler)(int status,
 unsigned int vendor_err, void *ctx))
 {
@@ -706,7 +754,6 @@ int rdma_backend_init(RdmaBackendDev *backend_dev,
 int i;
 int ret = 0;
 int num_ibv_devices;
-char thread_name[THR_NAME_LEN] = {0};
 struct ibv_device **dev_list;
 struct ibv_port_attr port_attr;
 
@@ -800,11 +847,8 @@ int rdma_backend_init(RdmaBackendDev *backend_dev,
 pr_dbg("interface_id=0x%" PRIx64 "\n",
be64_to_cpu(backend_dev->gid.global.interface_id));
 
-snprintf(thread_name, sizeof(thread_name), "rdma_comp_%s",
- ibv_get_device_name(backend_dev->ib_dev));
-backend_dev->comp_thread.run = true;
-qemu_thread_create(_dev->comp_thread.thread, thread_name,
-   comp_handler_thread, backend_dev, QEMU_THREAD_DETACHED);
+backend_dev->comp_thread.run = false;
+backend_dev->comp_thread.is_running = false;
 
 ah_cache_init();
 
@@ -823,8 +867,22 @@ out:
 

[Qemu-devel] [PATCH v2 02/13] hw/pvrdma: Bugfix - provide the correct attr_mask to query_qp

2018-08-05 Thread Yuval Shaia
Calling rdma_rm_query_qp with attr_mask equals to -1 leads to error
where backend query_qp fails to retrieve the needed QP attributes.
Fix it by providing the attr_mask we got from driver.

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/vmw/pvrdma_cmd.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_cmd.c
index 14255d609f..e7d6589cdc 100644
--- a/hw/rdma/vmw/pvrdma_cmd.c
+++ b/hw/rdma/vmw/pvrdma_cmd.c
@@ -524,6 +524,7 @@ static int query_qp(PVRDMADev *dev, union pvrdma_cmd_req 
*req,
 struct ibv_qp_init_attr init_attr;
 
 pr_dbg("qp_handle=%d\n", cmd->qp_handle);
+pr_dbg("attr_mask=0x%x\n", cmd->attr_mask);
 
 memset(rsp, 0, sizeof(*rsp));
 rsp->hdr.response = cmd->hdr.response;
@@ -531,8 +532,8 @@ static int query_qp(PVRDMADev *dev, union pvrdma_cmd_req 
*req,
 
 rsp->hdr.err = rdma_rm_query_qp(>rdma_dev_res, >backend_dev,
 cmd->qp_handle,
-(struct ibv_qp_attr *)>attrs, -1,
-_attr);
+(struct ibv_qp_attr *)>attrs,
+cmd->attr_mask, _attr);
 
 pr_dbg("ret=%d\n", rsp->hdr.err);
 return rsp->hdr.err;
-- 
2.17.1




[Qemu-devel] [PATCH v2 05/13] hw/pvrdma: Make default pkey 0xFFFF

2018-08-05 Thread Yuval Shaia
0x7FFF is not the default pkey - fix it.

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/vmw/pvrdma.h | 3 +++
 hw/rdma/vmw/pvrdma_cmd.c | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h
index 81e0e0e99c..e2d9f93cdf 100644
--- a/hw/rdma/vmw/pvrdma.h
+++ b/hw/rdma/vmw/pvrdma.h
@@ -50,6 +50,9 @@
 #define PVRDMA_HW_VERSION17
 #define PVRDMA_FW_VERSION14
 
+/* Some defaults */
+#define PVRDMA_PKEY  0x7FFF
+
 typedef struct DSRInfo {
 dma_addr_t dma;
 struct pvrdma_device_shared_region *dsr;
diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_cmd.c
index e7d6589cdc..4f74b29936 100644
--- a/hw/rdma/vmw/pvrdma_cmd.c
+++ b/hw/rdma/vmw/pvrdma_cmd.c
@@ -166,7 +166,7 @@ static int query_pkey(PVRDMADev *dev, union pvrdma_cmd_req 
*req,
 resp->hdr.ack = PVRDMA_CMD_QUERY_PKEY_RESP;
 resp->hdr.err = 0;
 
-resp->pkey = 0x7FFF;
+resp->pkey = PVRDMA_PKEY;
 pr_dbg("pkey=0x%x\n", resp->pkey);
 
 return 0;
-- 
2.17.1




[Qemu-devel] [PATCH v2 04/13] hw/pvrdma: Clean CQE before use

2018-08-05 Thread Yuval Shaia
Next CQE is fetched from CQ ring, clean it before usage as it still
carries old CQE values.

Signed-off-by: Yuval Shaia 
Reviewed-by: Marcel Apfelbaum
---
 hw/rdma/vmw/pvrdma_qp_ops.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/rdma/vmw/pvrdma_qp_ops.c b/hw/rdma/vmw/pvrdma_qp_ops.c
index 99bb5e..a8664f40c8 100644
--- a/hw/rdma/vmw/pvrdma_qp_ops.c
+++ b/hw/rdma/vmw/pvrdma_qp_ops.c
@@ -69,6 +69,7 @@ static int pvrdma_post_cqe(PVRDMADev *dev, uint32_t cq_handle,
 return -EINVAL;
 }
 
+memset(cqe1, 0, sizeof(*cqe1));
 cqe1->wr_id = cqe->wr_id;
 cqe1->qp = cqe->qp;
 cqe1->opcode = cqe->opcode;
-- 
2.17.1




[Qemu-devel] [PATCH v2 00/13] Misc fixes for pvrdma device

2018-08-05 Thread Yuval Shaia
Hi,
Please review some changes i've made for pvrdma device.

v1 -> v2:
* Fix various stuff pointed by Marcel
* Add Marcel's r-b

Yuval Shaia (13):
  hw/rdma: Make distinction between device init and start modes
  hw/pvrdma: Bugfix - provide the correct attr_mask to query_qp
  hw/rdma: Modify debug macros
  hw/pvrdma: Clean CQE before use
  hw/pvrdma: Make default pkey 0x
  hw/rdma: Delete useless structure RdmaRmUserMR
  hw/rdma: Do not allocate memory for non-dma MR
  hw/rdma: Reorder resource cleanup
  hw/pvrdma: Cosmetic change - indent right
  hw/rdma: Cosmetic change - move to generic function
  hw/rdma: Print backend QP number in hex format
  hw/rdma: Bugfix - Support non-aligned buffers
  hw/rdma: Add reference to pci_dev in backend_dev

 hw/rdma/rdma_backend.c  | 105 +--
 hw/rdma/rdma_backend.h  |   4 +-
 hw/rdma/rdma_backend_defs.h |   3 +-
 hw/rdma/rdma_rm.c   |  69 --
 hw/rdma/rdma_rm_defs.h  |  10 +--
 hw/rdma/rdma_utils.c|   4 ++
 hw/rdma/rdma_utils.h|  16 +++--
 hw/rdma/vmw/pvrdma.h|   3 +
 hw/rdma/vmw/pvrdma_cmd.c|   8 ++-
 hw/rdma/vmw/pvrdma_main.c   | 137 +---
 hw/rdma/vmw/pvrdma_qp_ops.c |   5 +-
 11 files changed, 228 insertions(+), 136 deletions(-)

-- 
2.17.1




[Qemu-devel] [Bug 1785485] [NEW] Mouse moves erratically when using scroll wheel on Windows NT 4, Windows 95, and Windows 3.1 guests

2018-08-05 Thread John Arbuckle
Public bug reported:

QEMU version: 3.0.0 RC3
Guests: Windows NT 4.0, Windows 95, Windows 3.1

Program: When the user uses the scroll wheel, the mouse's movement
becomes erratic.

This is noticed immediately when the scroll wheel is used. Sometimes the
problem can be fixed by moving the scroll wheel some more.

My theory is this problem is because of the lack of support for the
Microsoft Intellimouse in these guest operating systems.

** Affects: qemu
 Importance: Undecided
 Status: New


** Tags: qemu-system-i386

** Tags added: qemu-system-i386

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1785485

Title:
  Mouse moves erratically when using scroll wheel on Windows NT 4,
  Windows 95, and Windows 3.1 guests

Status in QEMU:
  New

Bug description:
  QEMU version: 3.0.0 RC3
  Guests: Windows NT 4.0, Windows 95, Windows 3.1

  Program: When the user uses the scroll wheel, the mouse's movement
  becomes erratic.

  This is noticed immediately when the scroll wheel is used. Sometimes
  the problem can be fixed by moving the scroll wheel some more.

  My theory is this problem is because of the lack of support for the
  Microsoft Intellimouse in these guest operating systems.

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1785485/+subscriptions



Re: [Qemu-devel] [PATCH 07/13] hw/rdma: Do not allocate memory for non-dma MR

2018-08-05 Thread Yuval Shaia
On Tue, Jul 24, 2018 at 03:19:52PM +0300, Marcel Apfelbaum wrote:
> 
> Hi Yuval,
> 
> On 07/16/2018 10:40 AM, Yuval Shaia wrote:
> > There is no use in the memory allocated for non-dma MR (one with
> > host_virt equals to NULL).
> 
> No need for the (one with...)

Will remove.

> 
> > Delete the code that allocates it.
> > 
> > Signed-off-by: Yuval Shaia 
> > ---
> >   hw/rdma/rdma_rm.c | 52 +++
> >   1 file changed, 21 insertions(+), 31 deletions(-)
> > 
> > diff --git a/hw/rdma/rdma_rm.c b/hw/rdma/rdma_rm.c
> > index 7403d24674..bf4a5c71b4 100644
> > --- a/hw/rdma/rdma_rm.c
> > +++ b/hw/rdma/rdma_rm.c
> > @@ -144,8 +144,6 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, 
> > uint32_t pd_handle,
> >   RdmaRmMR *mr;
> >   int ret = 0;
> >   RdmaRmPD *pd;
> > -void *addr;
> > -size_t length;
> >   pd = rdma_rm_get_pd(dev_res, pd_handle);
> >   if (!pd) {
> > @@ -158,40 +156,29 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, 
> > uint32_t pd_handle,
> >   pr_dbg("Failed to allocate obj in table\n");
> >   return -ENOMEM;
> >   }
> > +pr_dbg("mr_handle=%d\n", *mr_handle);
> > -if (!host_virt) {
> > -/* TODO: This is my guess but not so sure that this needs to be
> > - * done */
> > -length = TARGET_PAGE_SIZE;
> > -addr = g_malloc(length);
> > -} else {
> > +pr_dbg("host_virt=0x%p\n", host_virt);
> > +pr_dbg("guest_start=0x%" PRIx64 "\n", guest_start);
> > +pr_dbg("length=%zu\n", guest_length);
> > +
> > +if (host_virt) {
> >   mr->virt = host_virt;
> > -pr_dbg("host_virt=0x%p\n", mr->virt);
> > -mr->length = guest_length;
> > -pr_dbg("length=%zu\n", guest_length);
> >   mr->start = guest_start;

[1]

> > -pr_dbg("guest_start=0x%" PRIx64 "\n", mr->start);
> > -
> > -length = mr->length;
> > -addr = mr->virt;
> > -}
> > +mr->length = guest_length;
> > -ret = rdma_backend_create_mr(>backend_mr, >backend_pd, addr, 
> > length,
> > - access_flags);
> > -if (ret) {
> > -pr_dbg("Fail in rdma_backend_create_mr, err=%d\n", ret);
> > -ret = -EIO;
> > -goto out_dealloc_mr;
> > +ret = rdma_backend_create_mr(>backend_mr, >backend_pd, 
> > mr->virt,
> > + mr->length, access_flags);
> > +if (ret) {
> > +pr_dbg("Fail in rdma_backend_create_mr, err=%d\n", ret);
> > +ret = -EIO;
> > +goto out_dealloc_mr;
> > +}
> >   }
> > -if (!host_virt) {
> > -*lkey = mr->lkey = rdma_backend_mr_lkey(>backend_mr);
> > -*rkey = mr->rkey = rdma_backend_mr_rkey(>backend_mr);
> > -} else {
> > -/* We keep mr_handle in lkey so send and recv get get mr ptr */
> > -*lkey = *mr_handle;
> > -*rkey = -1;
> > -}
> > +/* We keep mr_handle in lkey so send and recv get get mr ptr */
> > +*lkey = *mr_handle;
> > +*rkey = -1;
> 
> Before this change rkey whould get a value when !host_virt.
> But I suppose is OK since Remote DMA operations are not implemented yet.

The entire code that handled the case where host_virt is NULL was wrong
thus removed.
And yes, RDMA verb is not yet implemented so rkey is anyway not needed.

> 
> >   mr->pd_handle = pd_handle;
> > @@ -214,7 +201,10 @@ void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, 
> > uint32_t mr_handle)
> >   if (mr) {
> >   rdma_backend_destroy_mr(>backend_mr);
> > -munmap(mr->virt, mr->length);
> > +pr_dbg("start=0x%" PRIx64 "\n", mr->start);
> > +if (mr->start) {
> 
> When is the mr->start inited?

res_tbl_alloc cleans the MR before giving it to caller so we expect
mr->start to be NULL.
Then if host_virt is given then mr->start is set to guest virtual address
[1].

> 
> Thanks,
> Marcel
> 
> > +munmap(mr->virt, mr->length);
> > +}
> >   res_tbl_dealloc(_res->mr_tbl, mr_handle);
> >   }
> >   }
> 



Re: [Qemu-devel] [Qemu-ppc] [PATCH 7/7] target/ppc: Use non-arithmetic conversions for fp load/store

2018-08-05 Thread Mark Cave-Ayland

On 06/07/18 10:03, Mark Cave-Ayland wrote:


On 05/07/18 17:48, Richard Henderson wrote:


On 07/05/2018 09:31 AM, Programmingkid wrote:
On Jul 3, 2018, at 11:17 AM, Richard Henderson 
 wrote:


Memory operations have no side effects on fp state.
The use of a "real" conversions between float64 and float32
would raise exceptions for SNaN and out-of-range inputs.


Would you have any documentation that tells us about converting
between 64 bit and 32 bit floating points?


Spelled out right at the beginning of sections 4.6 (load) and 4.7 
(store) of

Book 1 of the Power ISA manual (version 3.0B) [0].

I've double-checked vs RISU[1] testing of LFS and STFS, with master 
traces
generated on Power 8 ppc64le, so I don't see anything immediately 
wrong with

the patch.  But I haven't had time to look further than that.


I've had a quick look at this with the attached patch to compare the 
helper results before your patch and after, writing any differences to 
the console.


With this patch applied to ppc-for-3.1 I've booted MacOS 9 and recorded 
the output below:



$ ./qemu-system-ppc -cdrom MacOS921-macsbug.iso -boot d -M mac99

helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret: 
3bf0
helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret: 
3bf0


(note: MacOS 9 will hang here unless the line marked "Uncommenting this 
allows MacOS to run" in my patch is enabled)


helper_todouble diff for arg: 3f00  d.ll: 3fe0  ret: 
3be0
helper_todouble diff for arg: 3f00  d.ll: 3fe0  ret: 
3be0
helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret: 
3bf0
helper_todouble diff for arg: 3f80  d.ll: 3ff0  ret: 
3bf0
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_todouble diff for arg: be61b08a  d.ll: bfcc36114000  ret: 
bbcc36114000
helper_todouble diff for arg: 3fdf81a5  d.ll: 3ffbf034a000  ret: 
3bfbf034a000
helper_todouble diff for arg: bf402647  d.ll: bfe804c8e000  ret: 
bbe804c8e000
helper_todouble diff for arg: 3e61b08a  d.ll: 3fcc36114000  ret: 
3bcc36114000
helper_tosingle diff for arg: bfcc36114000  f.l: be61b08a  ret: 
9e61b08a
helper_todouble diff for arg: 3f0d  d.ll: 3fe1a000  ret: 
3be1a000
helper_tosingle diff for arg: 3ffbf034a000  f.l: 3fdf81a5  ret: 
1fdf81a5
helper_tosingle diff for arg: bfe804c8e000  f.l: bf402647  ret: 
9f402647
helper_tosingle diff for arg: 3fcc36114000  f.l: 3e61b08a  ret: 
1e61b08a
helper_tosingle diff for arg: 3fe1a000  f.l: 3f0d  ret: 
1f0d
helper_todouble diff for arg: 3b80  d.ll: 3f70  ret: 
3b70
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_todouble diff for arg: 3b80  d.ll: 3f70  ret: 
3b70
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80
helper_tosingle diff for arg: 3ff0  f.l: 3f80  ret: 
1f80



It looks like the differences are related to a flag or flags in the MSB 
byte of ret.


Hi Richard,

Have you had a chance to look at this yet? I've been working on top of 
David's ppc-for-3.1 branch over the weekend and ran into this again 
during my testing :/



ATB,

Mark.



[Qemu-devel] [PATCH 2/2] fw_cfg: set the get_boot_devices_list() ignore_suffixes parameter from machine property

2018-08-05 Thread Mark Cave-Ayland
For the older machines (such as Mac and SPARC) the DT nodes representing
bootdevices for disk nodes are irregular for mainly historical reasons, and
should be handled on an individual basis via a custom FWPathProvider.

Since the majority of bootdevice nodes for these machines either do not have a
separate disk node or require different (custom) names then it is much easier
to allow the ignore_suffixes parameter to be set on a per-machine basis via
a machine property.

The default value for this new fwcfg_bootdevice_ignore_suffixes machine
property is false to preserve compatibility for existing machines.

Signed-off-by: Mark Cave-Ayland 
---
 hw/core/machine.c   | 3 +++
 hw/nvram/fw_cfg.c   | 5 -
 include/hw/boards.h | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index a9aeb22f03..fbadb35865 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -525,6 +525,9 @@ static void machine_class_init(ObjectClass *oc, void *data)
 mc->default_ram_size = 128 * MiB;
 mc->rom_file_has_mr = true;
 
+/* Default to using fwcfg bootdevice suffixes */
+mc->fwcfg_bootdevice_ignore_suffixes = false;
+
 /* numa node memory size aligned on 8MB by default.
  * On Linux, each node's border has to be 8MB aligned
  */
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index b23e7f64a8..ec6b8113ab 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -861,7 +861,10 @@ static void fw_cfg_machine_reset(void *opaque)
 void *ptr;
 size_t len;
 FWCfgState *s = opaque;
-char *bootindex = get_boot_devices_list(, false);
+MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
+
+char *bootindex = get_boot_devices_list(,
+  mc->fwcfg_bootdevice_ignore_suffixes);
 
 ptr = fw_cfg_modify_file(s, "bootorder", (uint8_t *)bootindex, len);
 g_free(ptr);
diff --git a/include/hw/boards.h b/include/hw/boards.h
index d139a431a6..2cf76d82a6 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -204,6 +204,7 @@ struct MachineClass {
 const char **valid_cpu_types;
 strList *allowed_dynamic_sysbus_devices;
 bool auto_enable_numa_with_memhp;
+bool fwcfg_bootdevice_ignore_suffixes;
 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
  int nb_nodes, ram_addr_t size);
 
-- 
2.11.0




[Qemu-devel] [PATCH 0/2] machine: preparation for adding SPARC64/PPC bootindex support

2018-08-05 Thread Mark Cave-Ayland
Here is a patchset that contains the preparatory work to enable upcoming
bootindex support in OpenBIOS for SPARC64/PPC.

Patch 1 enables the OFW address generated via the sysbus 
explicit_ofw_unit_address()
method to always take precendence when generating fw paths, and has already been
discussed on-list with a R-B from Laszlo.

Patch 2 may require further review and discussion and is a consequence of older
device trees having irregular naming conventions for disk nodes. Rather than add
extra string handling complexity in OpenBIOS for handling "/disk" nodes on a
per-interface basis, it is much easier to provide a per-machine option to remove
them completely for these machines and handle the logic in QEMU via a custom
FWPathProvider instead.

Signed-off-by: Mark Cave-Ayland 


Mark Cave-Ayland (2):
  sysbus: always allow explicit_ofw_unit_address() to override address
generation
  fw_cfg: set the get_boot_devices_list() ignore_suffixes parameter from
machine property

 hw/core/machine.c   |  3 +++
 hw/core/sysbus.c| 15 +++
 hw/nvram/fw_cfg.c   |  5 -
 include/hw/boards.h |  1 +
 4 files changed, 15 insertions(+), 9 deletions(-)

-- 
2.11.0




[Qemu-devel] [PATCH 1/2] sysbus: always allow explicit_ofw_unit_address() to override address generation

2018-08-05 Thread Mark Cave-Ayland
Some SysBusDevices either use sysbus_init_mmio() without
sysbus_mmio_map() or the first MMIO memory region doesn't represent the
bus address, causing a firmware device path with an invalid address to
be generated.

SysBusDeviceClass does provide a virtual explicit_ofw_unit_address()
method that can be used to override this process, but it was originally intended
only as as a fallback option meaning that any existing MMIO memory regions still
take priority whilst determining the firmware device address.

There is currently only one user of explicit_ofw_unit_address() and that
is the PCI expander bridge (PXB) device which has no MMIO/PIO resources
defined. This enables us to allow explicit_ofw_unit_address() to take
priority without affecting backwards compatibility, allowing the address
to be customised as required.

Signed-off-by: Mark Cave-Ayland 
Reviewed-by: Laszlo Ersek 
---
 hw/core/sysbus.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index 3c8e53b188..7ac36ad3e7 100644
--- a/hw/core/sysbus.c
+++ b/hw/core/sysbus.c
@@ -293,16 +293,8 @@ static char *sysbus_get_fw_dev_path(DeviceState *dev)
 {
 SysBusDevice *s = SYS_BUS_DEVICE(dev);
 SysBusDeviceClass *sbc = SYS_BUS_DEVICE_GET_CLASS(s);
-/* for the explicit unit address fallback case: */
 char *addr, *fw_dev_path;
 
-if (s->num_mmio) {
-return g_strdup_printf("%s@" TARGET_FMT_plx, qdev_fw_name(dev),
-   s->mmio[0].addr);
-}
-if (s->num_pio) {
-return g_strdup_printf("%s@i%04x", qdev_fw_name(dev), s->pio[0]);
-}
 if (sbc->explicit_ofw_unit_address) {
 addr = sbc->explicit_ofw_unit_address(s);
 if (addr) {
@@ -311,6 +303,13 @@ static char *sysbus_get_fw_dev_path(DeviceState *dev)
 return fw_dev_path;
 }
 }
+if (s->num_mmio) {
+return g_strdup_printf("%s@" TARGET_FMT_plx, qdev_fw_name(dev),
+   s->mmio[0].addr);
+}
+if (s->num_pio) {
+return g_strdup_printf("%s@i%04x", qdev_fw_name(dev), s->pio[0]);
+}
 return g_strdup(qdev_fw_name(dev));
 }
 
-- 
2.11.0