[PATCH 1/2] cpu: use ROUND_UP() to define xxx_PAGE_ALIGN

[Wei Yang]

Use ROUND_UP() to define, which is a little bit easy to read.

Signed-off-by: Wei Yang 
---
 include/exec/cpu-all.h | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index ad9ab85eb3..255bb186ac 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -220,7 +220,7 @@ extern int target_page_bits;
 
 #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
 #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
-#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & 
TARGET_PAGE_MASK)
+#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE)
 
 /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even
  * when intptr_t is 32-bit and we are aligning a long long.
@@ -228,9 +228,8 @@ extern int target_page_bits;
 extern uintptr_t qemu_host_page_size;
 extern intptr_t qemu_host_page_mask;
 
-#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & 
qemu_host_page_mask)
-#define REAL_HOST_PAGE_ALIGN(addr) (((addr) + qemu_real_host_page_size - 1) & \
-qemu_real_host_page_mask)
+#define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size)
+#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size)
 
 /* same as PROT_xxx */
 #define PAGE_READ  0x0001
-- 
2.17.1

[PATCH 2/2] core: replace getpagesize() with qemu_real_host_page_size

[Wei Yang]

There are three page size in qemu:

  real host page size
  host page size
  target page size

All of them have dedicate variable to represent. For the last two, we
use the same form in the whole qemu project, while for the first one we
use two forms: qemu_real_host_page_size and getpagesize().

qemu_real_host_page_size is defined to be a replacement of
getpagesize(), so let it serve the role.

[Note] Not fully tested for some arch or device.

Signed-off-by: Wei Yang 
---
 accel/kvm/kvm-all.c|  6 +++---
 backends/hostmem.c |  2 +-
 block.c|  4 ++--
 block/file-posix.c |  9 +
 block/io.c |  2 +-
 block/parallels.c  |  2 +-
 block/qcow2-cache.c|  2 +-
 contrib/vhost-user-gpu/vugbm.c |  2 +-
 exec.c |  6 +++---
 hw/intc/s390_flic_kvm.c|  2 +-
 hw/ppc/mac_newworld.c  |  2 +-
 hw/ppc/spapr_pci.c |  2 +-
 hw/rdma/vmw/pvrdma_main.c  |  2 +-
 hw/vfio/spapr.c|  7 ---
 include/exec/ram_addr.h|  2 +-
 include/qemu/osdep.h   |  4 ++--
 migration/migration.c  |  2 +-
 migration/postcopy-ram.c   |  4 ++--
 monitor/misc.c |  2 +-
 target/ppc/kvm.c   |  2 +-
 tests/vhost-user-bridge.c  |  8 
 util/mmap-alloc.c  | 10 +-
 util/oslib-posix.c |  4 ++--
 util/oslib-win32.c |  2 +-
 util/vfio-helpers.c| 12 ++--
 25 files changed, 52 insertions(+), 50 deletions(-)

diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index d2d96d73e8..140b0bd8f6 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -52,7 +52,7 @@
 /* KVM uses PAGE_SIZE in its definition of KVM_COALESCED_MMIO_MAX. We
  * need to use the real host PAGE_SIZE, as that's what KVM will use.
  */
-#define PAGE_SIZE getpagesize()
+#define PAGE_SIZE qemu_real_host_page_size
 
 //#define DEBUG_KVM
 
@@ -507,7 +507,7 @@ static int 
kvm_get_dirty_pages_log_range(MemoryRegionSection *section,
 {
 ram_addr_t start = section->offset_within_region +
memory_region_get_ram_addr(section->mr);
-ram_addr_t pages = int128_get64(section->size) / getpagesize();
+ram_addr_t pages = int128_get64(section->size) / qemu_real_host_page_size;
 
 cpu_physical_memory_set_dirty_lebitmap(bitmap, start, pages);
 return 0;
@@ -1841,7 +1841,7 @@ static int kvm_init(MachineState *ms)
  * even with KVM.  TARGET_PAGE_SIZE is assumed to be the minimum
  * page size for the system though.
  */
-assert(TARGET_PAGE_SIZE <= getpagesize());
+assert(TARGET_PAGE_SIZE <= qemu_real_host_page_size);
 
 s->sigmask_len = 8;
 
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 6d333dc23c..e773bdfa6e 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -304,7 +304,7 @@ size_t host_memory_backend_pagesize(HostMemoryBackend 
*memdev)
 #else
 size_t host_memory_backend_pagesize(HostMemoryBackend *memdev)
 {
-return getpagesize();
+return qemu_real_host_page_size;
 }
 #endif
 
diff --git a/block.c b/block.c
index 5944124845..98f47e2902 100644
--- a/block.c
+++ b/block.c
@@ -106,7 +106,7 @@ size_t bdrv_opt_mem_align(BlockDriverState *bs)
 {
 if (!bs || !bs->drv) {
 /* page size or 4k (hdd sector size) should be on the safe side */
-return MAX(4096, getpagesize());
+return MAX(4096, qemu_real_host_page_size);
 }
 
 return bs->bl.opt_mem_alignment;
@@ -116,7 +116,7 @@ size_t bdrv_min_mem_align(BlockDriverState *bs)
 {
 if (!bs || !bs->drv) {
 /* page size or 4k (hdd sector size) should be on the safe side */
-return MAX(4096, getpagesize());
+return MAX(4096, qemu_real_host_page_size);
 }
 
 return bs->bl.min_mem_alignment;
diff --git a/block/file-posix.c b/block/file-posix.c
index f12c06de2d..f60ac3f93f 100644
--- a/block/file-posix.c
+++ b/block/file-posix.c
@@ -322,7 +322,7 @@ static void raw_probe_alignment(BlockDriverState *bs, int 
fd, Error **errp)
 {
 BDRVRawState *s = bs->opaque;
 char *buf;
-size_t max_align = MAX(MAX_BLOCKSIZE, getpagesize());
+size_t max_align = MAX(MAX_BLOCKSIZE, qemu_real_host_page_size);
 size_t alignments[] = {1, 512, 1024, 2048, 4096};
 
 /* For SCSI generic devices the alignment is not really used.
@@ -1131,13 +1131,14 @@ static void raw_refresh_limits(BlockDriverState *bs, 
Error **errp)
 
 ret = sg_get_max_segments(s->fd);
 if (ret > 0) {
-bs->bl.max_transfer = MIN(bs->bl.max_transfer, ret * 
getpagesize());
+bs->bl.max_transfer = MIN(bs->bl.max_transfer,
+  ret * qemu_real_host_page_size);
 }
 }
 
 raw_probe_alignment(bs, s->fd, errp);
 bs->bl.min_mem_alignment = s->buf_align;
-bs->bl.opt_mem_alignment = MAX(s->buf_align, getpagesize());
+bs->bl.opt_mem_alignment = 

[PATCH 0/2] cleanup on page size

[Wei Yang]

Patch 1 simplify the definition of xxx_PAGE_ALIGN.
Patch 2 replaces getpagesize() with qemu_real_host_page_size. This one touch a
volume of code. If some point is not correct, I'd appreciate your
notification.

Wei Yang (2):
  cpu: use ROUND_UP() to define xxx_PAGE_ALIGN
  core: replace getpagesize() with qemu_real_host_page_size

 accel/kvm/kvm-all.c|  6 +++---
 backends/hostmem.c |  2 +-
 block.c|  4 ++--
 block/file-posix.c |  9 +
 block/io.c |  2 +-
 block/parallels.c  |  2 +-
 block/qcow2-cache.c|  2 +-
 contrib/vhost-user-gpu/vugbm.c |  2 +-
 exec.c |  6 +++---
 hw/intc/s390_flic_kvm.c|  2 +-
 hw/ppc/mac_newworld.c  |  2 +-
 hw/ppc/spapr_pci.c |  2 +-
 hw/rdma/vmw/pvrdma_main.c  |  2 +-
 hw/vfio/spapr.c|  7 ---
 include/exec/cpu-all.h |  7 +++
 include/exec/ram_addr.h|  2 +-
 include/qemu/osdep.h   |  4 ++--
 migration/migration.c  |  2 +-
 migration/postcopy-ram.c   |  4 ++--
 monitor/misc.c |  2 +-
 target/ppc/kvm.c   |  2 +-
 tests/vhost-user-bridge.c  |  8 
 util/mmap-alloc.c  | 10 +-
 util/oslib-posix.c |  4 ++--
 util/oslib-win32.c |  2 +-
 util/vfio-helpers.c| 12 ++--
 26 files changed, 55 insertions(+), 54 deletions(-)

-- 
2.17.1

Re: [PATCH V6] target/riscv: Ignore reserved bits in PTE for RV64

[Jonathan Behrens]

There is nowhere in the spec that ever says what hardware has to do if
any of those reserved bits are non-zero. Hardware is certainly not
required to ignore them and treat the PTE as being valid (which is
what this patch does). I'd argue that since only buggy code would ever
set these bits, QEMU should treat any PTE with them set as being
invalid so that programmers can realize they've made a mistake.

Jonathan


On Sat, Oct 12, 2019 at 8:16 PM Guo Ren  wrote:
>
> The patch didn't wrap the physical address space directly, just follow the 
> spec.
> I admit that I am trying to use the compliance specification to allow
> qemu to support some non-standard software.
> But compliance specification and wrapping the physical address space
> are different things.
> I'm preparing c910 pachset for linux riscv and you can question me there.
>
> On Sun, Oct 13, 2019 at 1:33 AM Palmer Dabbelt  wrote:
> >
> > On Wed, 25 Sep 2019 17:14:21 PDT (-0700), guo...@kernel.org wrote:
> > > From: Guo Ren 
> > >
> > > Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
> > > need to ignore them. They cannot be a part of ppn.
> > >
> > > 1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture
> > >4.4 Sv39: Page-Based 39-bit Virtual-Memory System
> > >4.5 Sv48: Page-Based 48-bit Virtual-Memory System
> > >
> > > Signed-off-by: Guo Ren 
> > > Tested-by: Bin Meng 
> > > Reviewed-by: Liu Zhiwei 
> > > Reviewed-by: Bin Meng 
> > > Reviewed-by: Alistair Francis 
> > > ---
> > >  target/riscv/cpu_bits.h   | 7 +++
> > >  target/riscv/cpu_helper.c | 2 +-
> > >  2 files changed, 8 insertions(+), 1 deletion(-)
> > >
> > >  Changelog V6:
> > >   - Add Reviewer: Alistair Francis
> > >
> > >  Changelog V5:
> > >   - Add Reviewer and Tester: Bin Meng
> > >
> > >  Changelog V4:
> > >   - Change title to Ignore not Bugfix
> > >   - Use PTE_PPN_MASK for RV32 and RV64
> > >
> > >  Changelog V3:
> > >   - Use UUL define for PTE_RESERVED
> > >   - Keep ppn >> PTE_PPN_SHIFT
> > >
> > >  Changelog V2:
> > >   - Bugfix pte destroyed cause boot fail
> > >   - Change to AND with a mask instead of shifting both directions
> > >
> > > diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> > > index e998348..399c2c6 100644
> > > --- a/target/riscv/cpu_bits.h
> > > +++ b/target/riscv/cpu_bits.h
> > > @@ -473,6 +473,13 @@
> > >  /* Page table PPN shift amount */
> > >  #define PTE_PPN_SHIFT   10
> > >
> > > +/* Page table PPN mask */
> > > +#if defined(TARGET_RISCV32)
> > > +#define PTE_PPN_MASK0xUL
> > > +#elif defined(TARGET_RISCV64)
> > > +#define PTE_PPN_MASK0x3fULL
> > > +#endif
> > > +
> > >  /* Leaf page shift amount */
> > >  #define PGSHIFT 12
> > >
> > > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> > > index 87dd6a6..9961b37 100644
> > > --- a/target/riscv/cpu_helper.c
> > > +++ b/target/riscv/cpu_helper.c
> > > @@ -261,7 +261,7 @@ restart:
> > >  #elif defined(TARGET_RISCV64)
> > >  target_ulong pte = ldq_phys(cs->as, pte_addr);
> > >  #endif
> > > -hwaddr ppn = pte >> PTE_PPN_SHIFT;
> > > +hwaddr ppn = (pte & PTE_PPN_MASK) >> PTE_PPN_SHIFT;
> > >
> > >  if (!(pte & PTE_V)) {
> > >  /* Invalid PTE */
> >
> > I know I'm a bit late to the party here, but I don't like this.  There's 
> > ample
> > evidence that wrapping the physical address space is a bad idea, and just
> > because the ISA allows implementations to do this doesn't mean we should.
>
>
>
> --
> Best Regards
>  Guo Ren
>
> ML: https://lore.kernel.org/linux-csky/
>

Re: [PATCH V6] target/riscv: Ignore reserved bits in PTE for RV64

[Guo Ren]

The patch didn't wrap the physical address space directly, just follow the spec.
I admit that I am trying to use the compliance specification to allow
qemu to support some non-standard software.
But compliance specification and wrapping the physical address space
are different things.
I'm preparing c910 pachset for linux riscv and you can question me there.

On Sun, Oct 13, 2019 at 1:33 AM Palmer Dabbelt  wrote:
>
> On Wed, 25 Sep 2019 17:14:21 PDT (-0700), guo...@kernel.org wrote:
> > From: Guo Ren 
> >
> > Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
> > need to ignore them. They cannot be a part of ppn.
> >
> > 1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture
> >4.4 Sv39: Page-Based 39-bit Virtual-Memory System
> >4.5 Sv48: Page-Based 48-bit Virtual-Memory System
> >
> > Signed-off-by: Guo Ren 
> > Tested-by: Bin Meng 
> > Reviewed-by: Liu Zhiwei 
> > Reviewed-by: Bin Meng 
> > Reviewed-by: Alistair Francis 
> > ---
> >  target/riscv/cpu_bits.h   | 7 +++
> >  target/riscv/cpu_helper.c | 2 +-
> >  2 files changed, 8 insertions(+), 1 deletion(-)
> >
> >  Changelog V6:
> >   - Add Reviewer: Alistair Francis
> >
> >  Changelog V5:
> >   - Add Reviewer and Tester: Bin Meng
> >
> >  Changelog V4:
> >   - Change title to Ignore not Bugfix
> >   - Use PTE_PPN_MASK for RV32 and RV64
> >
> >  Changelog V3:
> >   - Use UUL define for PTE_RESERVED
> >   - Keep ppn >> PTE_PPN_SHIFT
> >
> >  Changelog V2:
> >   - Bugfix pte destroyed cause boot fail
> >   - Change to AND with a mask instead of shifting both directions
> >
> > diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> > index e998348..399c2c6 100644
> > --- a/target/riscv/cpu_bits.h
> > +++ b/target/riscv/cpu_bits.h
> > @@ -473,6 +473,13 @@
> >  /* Page table PPN shift amount */
> >  #define PTE_PPN_SHIFT   10
> >
> > +/* Page table PPN mask */
> > +#if defined(TARGET_RISCV32)
> > +#define PTE_PPN_MASK0xUL
> > +#elif defined(TARGET_RISCV64)
> > +#define PTE_PPN_MASK0x3fULL
> > +#endif
> > +
> >  /* Leaf page shift amount */
> >  #define PGSHIFT 12
> >
> > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> > index 87dd6a6..9961b37 100644
> > --- a/target/riscv/cpu_helper.c
> > +++ b/target/riscv/cpu_helper.c
> > @@ -261,7 +261,7 @@ restart:
> >  #elif defined(TARGET_RISCV64)
> >  target_ulong pte = ldq_phys(cs->as, pte_addr);
> >  #endif
> > -hwaddr ppn = pte >> PTE_PPN_SHIFT;
> > +hwaddr ppn = (pte & PTE_PPN_MASK) >> PTE_PPN_SHIFT;
> >
> >  if (!(pte & PTE_V)) {
> >  /* Invalid PTE */
>
> I know I'm a bit late to the party here, but I don't like this.  There's ample
> evidence that wrapping the physical address space is a bad idea, and just
> because the ISA allows implementations to do this doesn't mean we should.



--
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

Re: [PATCH] target/riscv: PMP violation due to wrong size parameter

[Dayeol Lee]

No it doesn't mean that.
But the following code will make the size TARGET_PAGE_SIZE - (page offset)
if the address is not aligned.

pmp_size = -(address | TARGET_PAGE_MASK)


On Fri, Oct 11, 2019, 7:37 PM Jonathan Behrens  wrote:

> How do you know that the access won't straddle a page boundary? Is there a
> guarantee somewhere that size=0 means that the access is naturally aligned?
>
> Jonathan
>
>
> On Fri, Oct 11, 2019 at 7:14 PM Dayeol Lee  wrote:
>
>> riscv_cpu_tlb_fill() uses the `size` parameter to check PMP violation
>> using pmp_hart_has_privs().
>> However, if the size is unknown (=0), the ending address will be
>> `addr - 1` as it is `addr + size - 1` in `pmp_hart_has_privs()`.
>> This always causes a false PMP violation on the starting address of the
>> range, as `addr - 1` is not in the range.
>>
>> In order to fix, we just assume that all bytes from addr to the end of
>> the page will be accessed if the size is unknown.
>>
>> Signed-off-by: Dayeol Lee 
>> Reviewed-by: Richard Henderson 
>> ---
>>  target/riscv/cpu_helper.c | 13 -
>>  1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
>> index e32b6126af..7d9a22b601 100644
>> --- a/target/riscv/cpu_helper.c
>> +++ b/target/riscv/cpu_helper.c
>> @@ -441,6 +441,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address,
>> int size,
>>  CPURISCVState *env = >env;
>>  hwaddr pa = 0;
>>  int prot;
>> +int pmp_size = 0;
>>  bool pmp_violation = false;
>>  int ret = TRANSLATE_FAIL;
>>  int mode = mmu_idx;
>> @@ -460,9 +461,19 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address,
>> int size,
>>"%s address=%" VADDR_PRIx " ret %d physical "
>> TARGET_FMT_plx
>>" prot %d\n", __func__, address, ret, pa, prot);
>>
>> +/*
>> + * if size is unknown (0), assume that all bytes
>> + * from addr to the end of the page will be accessed.
>> + */
>> +if (size == 0) {
>> +pmp_size = -(address | TARGET_PAGE_MASK);
>> +} else {
>> +pmp_size = size;
>> +}
>> +
>>  if (riscv_feature(env, RISCV_FEATURE_PMP) &&
>>  (ret == TRANSLATE_SUCCESS) &&
>> -!pmp_hart_has_privs(env, pa, size, 1 << access_type, mode)) {
>> +!pmp_hart_has_privs(env, pa, pmp_size, 1 << access_type, mode)) {
>>  ret = TRANSLATE_PMP_FAIL;
>>  }
>>  if (ret == TRANSLATE_PMP_FAIL) {
>> --
>> 2.20.1
>>
>>
>>

Re: [PATCH v3 0/6] target/mips: Misc cleanups for September/October 2019

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/1570901866-9548-1-git-send-email-aleksandar.marko...@rt-rk.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PATCH v3 0/6] target/mips: Misc cleanups for September/October 2019 
Type: series
Message-id: 1570901866-9548-1-git-send-email-aleksandar.marko...@rt-rk.com

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
bb57bcb target/mips: msa: Split helpers for ILV.
d75ac24 target/mips: msa: Split helpers for _.
ccb136e target/mips: msa: Split helpers for _A.
ca86289 MAINTAINERS: Update mail address of Aleksandar Rikalo
8c31deb target/mips: Clean up op_helper.c
61e19fa target/mips: Clean up helper.c

=== OUTPUT BEGIN ===
1/6 Checking commit 61e19fa130a4 (target/mips: Clean up helper.c)
2/6 Checking commit 8c31deb3c4d7 (target/mips: Clean up op_helper.c)
ERROR: spaces required around that '*' (ctx:WxV)
#1058: FILE: target/mips/op_helper.c:3871:
+  float_status *status)  \
^

total: 1 errors, 0 warnings, 1681 lines checked

Patch 2/6 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/6 Checking commit ca862897070f (MAINTAINERS: Update mail address of 
Aleksandar Rikalo)
4/6 Checking commit ccb136eabf82 (target/mips: msa: Split helpers for 
_A.)
5/6 Checking commit d75ac249e00b (target/mips: msa: Split helpers for 
_.)
6/6 Checking commit bb57bcbf0b97 (target/mips: msa: Split helpers for 
ILV.)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/1570901866-9548-1-git-send-email-aleksandar.marko...@rt-rk.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: [Qemu-devel] [PATCH v30 4/8] target/avr: Add instruction translation

[Aleksandar Markovic]

On Sat, Oct 12, 2019 at 6:34 PM Michael Rolnik  wrote:
>
> Hi Aleksandar.
>
> If I break it to multiple patches, does every patch have to compile?
>

Micheal,

Well, it does. This is because people are using various automated or
semi-automated
"bisect" scripts when they want to find what commit caused certain
problem, and if
any patch breaks build, this may make those "bisect" scripts not work.

But... since I see others are inclined to accept this patch 4 as-is, I
am not going to
place obstacles on that. So, it looks you can leave patch 4 as-is.

How ever, in future, when you hopefully submit some other larger piece of code,
I recommend to you to try not to place all code in a single patch, but
in several
logical sub-parts. This makes your patches easier to review, and there are some
other reasons too - for example, it is easier to spot a bug in a
smaller patch than
in a larger.

Again, for now, do not spend your time doing tedious job of splitting
this patch.

Yours,
Aleksandar

> On Fri, Oct 11, 2019 at 5:13 PM Aleksandar Markovic
>  wrote:
> >
> >
> >
> > On Monday, September 2, 2019, Michael Rolnik  wrote:
> >>
> >> This includes:
> >> - TCG translations for each instruction
> >>
> >> Signed-off-by: Michael Rolnik 
> >> ---
> >>  target/avr/translate.c | 2888 
> >>  1 file changed, 2888 insertions(+)
> >>  create mode 100644 target/avr/translate.c
> >>
> >
> > Hi, Michael,
> >
> >
> > This patch is way too large. I suggest splitting it into:
> >
> > - register definitions
> > - load instruction handling
> > - store instruction handling
> > - logic instruction handling
> >
> > etc.
> >
> > Thanks, Aleksandar
> >
> > P.S. One more hurdle with your communication on the list is that you don't 
> > use "inline responding" while replaying, please use it in future. See other 
> > messages in the mailing list how "inline responding" looks.
> >
> >
> >
> >
> >>
> >> diff --git a/target/avr/translate.c b/target/avr/translate.c
> >> new file mode 100644
> >> index 00..42cb4a690c
> >> --- /dev/null
> >> +++ b/target/avr/translate.c
> >> @@ -0,0 +1,2888 @@
> >> +/*
> >> + * QEMU AVR CPU
> >> + *
> >> + * Copyright (c) 2019 Michael Rolnik
> >> + *
> >> + * This library is free software; you can redistribute it and/or
> >> + * modify it under the terms of the GNU Lesser General Public
> >> + * License as published by the Free Software Foundation; either
> >> + * version 2.1 of the License, or (at your option) any later version.
> >> + *
> >> + * This library is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> >> + * Lesser General Public License for more details.
> >> + *
> >> + * You should have received a copy of the GNU Lesser General Public
> >> + * License along with this library; if not, see
> >> + * 
> >> + */
> >> +
> >> +#include "qemu/osdep.h"
> >> +#include "qemu/qemu-print.h"
> >> +#include "tcg/tcg.h"
> >> +#include "cpu.h"
> >> +#include "exec/exec-all.h"
> >> +#include "disas/disas.h"
> >> +#include "tcg-op.h"
> >> +#include "exec/cpu_ldst.h"
> >> +#include "exec/helper-proto.h"
> >> +#include "exec/helper-gen.h"
> >> +#include "exec/log.h"
> >> +#include "exec/gdbstub.h"
> >> +#include "exec/translator.h"
> >> +
> >> +/*
> >> + *  Define if you want a BREAK instruction translated to a breakpoint
> >> + *  Active debugging connection is assumed
> >> + *  This is for
> >> + *  
> >> https://github.com/seharris/qemu-avr-tests/tree/master/instruction-tests
> >> + *  tests
> >> + */
> >> +#undef BREAKPOINT_ON_BREAK
> >> +
> >> +static TCGv cpu_pc;
> >> +
> >> +static TCGv cpu_Cf;
> >> +static TCGv cpu_Zf;
> >> +static TCGv cpu_Nf;
> >> +static TCGv cpu_Vf;
> >> +static TCGv cpu_Sf;
> >> +static TCGv cpu_Hf;
> >> +static TCGv cpu_Tf;
> >> +static TCGv cpu_If;
> >> +
> >> +static TCGv cpu_rampD;
> >> +static TCGv cpu_rampX;
> >> +static TCGv cpu_rampY;
> >> +static TCGv cpu_rampZ;
> >> +
> >> +static TCGv cpu_r[NO_CPU_REGISTERS];
> >> +static TCGv cpu_eind;
> >> +static TCGv cpu_sp;
> >> +
> >> +static TCGv cpu_skip;
> >> +
> >> +static const char reg_names[NO_CPU_REGISTERS][8] = {
> >> +"r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
> >> +"r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
> >> +"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
> >> +"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
> >> +};
> >> +#define REG(x) (cpu_r[x])
> >> +
> >> +enum {
> >> +DISAS_EXIT   = DISAS_TARGET_0,  /* We want return to the cpu main 
> >> loop.  */
> >> +DISAS_LOOKUP = DISAS_TARGET_1,  /* We have a variable condition exit. 
> >>  */
> >> +DISAS_CHAIN  = DISAS_TARGET_2,  /* We have a single condition exit.  
> >> */
> >> +};
> >> +
> >> +typedef struct DisasContext DisasContext;
> >> +
> >> +/* This is the state at 

[PATCH v3 1/6] target/mips: Clean up helper.c

[Aleksandar Markovic]

From: Aleksandar Markovic 

Mostly fix errors and warnings reported by 'checkpatch.pl -f'.

Signed-off-by: Aleksandar Markovic 
---
 target/mips/helper.c | 128 +++
 1 file changed, 78 insertions(+), 50 deletions(-)

diff --git a/target/mips/helper.c b/target/mips/helper.c
index a2b6459..2411a2c 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -39,8 +39,8 @@ enum {
 #if !defined(CONFIG_USER_ONLY)
 
 /* no MMU emulation */
-int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
-target_ulong address, int rw, int access_type)
+int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
+   target_ulong address, int rw, int access_type)
 {
 *physical = address;
 *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
@@ -48,26 +48,28 @@ int no_mmu_map_address (CPUMIPSState *env, hwaddr 
*physical, int *prot,
 }
 
 /* fixed mapping MMU emulation */
-int fixed_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
-   target_ulong address, int rw, int access_type)
+int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
+  target_ulong address, int rw, int access_type)
 {
 if (address <= (int32_t)0x7FFFUL) {
-if (!(env->CP0_Status & (1 << CP0St_ERL)))
+if (!(env->CP0_Status & (1 << CP0St_ERL))) {
 *physical = address + 0x4000UL;
-else
+} else {
 *physical = address;
-} else if (address <= (int32_t)0xBFFFUL)
+}
+} else if (address <= (int32_t)0xBFFFUL) {
 *physical = address & 0x1FFF;
-else
+} else {
 *physical = address;
+}
 
 *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
 return TLBRET_MATCH;
 }
 
 /* MIPS32/MIPS64 R4000-style MMU emulation */
-int r4k_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type)
+int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
+target_ulong address, int rw, int access_type)
 {
 uint16_t ASID = env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask;
 int i;
@@ -99,8 +101,9 @@ int r4k_map_address (CPUMIPSState *env, hwaddr *physical, 
int *prot,
 if (rw != MMU_DATA_STORE || (n ? tlb->D1 : tlb->D0)) {
 *physical = tlb->PFN[n] | (address & (mask >> 1));
 *prot = PAGE_READ;
-if (n ? tlb->D1 : tlb->D0)
+if (n ? tlb->D1 : tlb->D0) {
 *prot |= PAGE_WRITE;
+}
 if (!(n ? tlb->XI1 : tlb->XI0)) {
 *prot |= PAGE_EXEC;
 }
@@ -130,8 +133,11 @@ static int is_seg_am_mapped(unsigned int am, bool eu, int 
mmu_idx)
 int32_t adetlb_mask;
 
 switch (mmu_idx) {
-case 3 /* ERL */:
-/* If EU is set, always unmapped */
+case 3:
+/*
+ * ERL
+ * If EU is set, always unmapped
+ */
 if (eu) {
 return 0;
 }
@@ -204,7 +210,7 @@ static int get_segctl_physical_address(CPUMIPSState *env, 
hwaddr *physical,
 pa & ~(hwaddr)segmask);
 }
 
-static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
+static int get_physical_address(CPUMIPSState *env, hwaddr *physical,
 int *prot, target_ulong real_address,
 int rw, int access_type, int mmu_idx)
 {
@@ -252,14 +258,15 @@ static int get_physical_address (CPUMIPSState *env, 
hwaddr *physical,
 } else {
 segctl = env->CP0_SegCtl2 >> 16;
 }
-ret = get_segctl_physical_address(env, physical, prot, real_address, 
rw,
-  access_type, mmu_idx, segctl,
-  0x3FFF);
+ret = get_segctl_physical_address(env, physical, prot,
+  real_address, rw, access_type,
+  mmu_idx, segctl, 0x3FFF);
 #if defined(TARGET_MIPS64)
 } else if (address < 0x4000ULL) {
 /* xuseg */
 if (UX && address <= (0x3FFFULL & env->SEGMask)) {
-ret = env->tlb->map_address(env, physical, prot, real_address, rw, 
access_type);
+ret = env->tlb->map_address(env, physical, prot,
+real_address, rw, access_type);
 } else {
 ret = TLBRET_BADADDR;
 }
@@ -267,7 +274,8 @@ static int get_physical_address (CPUMIPSState *env, hwaddr 
*physical,
 /* xsseg */
 if ((supervisor_mode || kernel_mode) &&
 SX && address <= (0x7FFFULL & env->SEGMask)) {
-ret = env->tlb->map_address(env, physical, prot, real_address, rw, 
access_type);
+ret = 

[PATCH v3 2/6] target/mips: Clean up op_helper.c

[Aleksandar Markovic]

From: Aleksandar Markovic 

Mostly fix errors and warnings reported by 'checkpatch.pl -f'.

Signed-off-by: Aleksandar Markovic 
---
 target/mips/op_helper.c | 1010 +++
 1 file changed, 663 insertions(+), 347 deletions(-)

diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 4de6465..18fcee4 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -64,8 +64,7 @@ static inline type do_##name(CPUMIPSState *env, target_ulong 
addr,  \
 static inline type do_##name(CPUMIPSState *env, target_ulong addr,  \
  int mem_idx, uintptr_t retaddr)\
 {   \
-switch (mem_idx)\
-{   \
+switch (mem_idx) {  \
 case 0: return (type) cpu_##insn##_kernel_ra(env, addr, retaddr);   \
 case 1: return (type) cpu_##insn##_super_ra(env, addr, retaddr);\
 default:\
@@ -92,12 +91,17 @@ static inline void do_##name(CPUMIPSState *env, 
target_ulong addr,  \
 static inline void do_##name(CPUMIPSState *env, target_ulong addr,  \
  type val, int mem_idx, uintptr_t retaddr)  \
 {   \
-switch (mem_idx)\
-{   \
-case 0: cpu_##insn##_kernel_ra(env, addr, val, retaddr); break; \
-case 1: cpu_##insn##_super_ra(env, addr, val, retaddr); break;  \
+switch (mem_idx) {  \
+case 0: \
+cpu_##insn##_kernel_ra(env, addr, val, retaddr);\
+break;  \
+case 1: \
+cpu_##insn##_super_ra(env, addr, val, retaddr); \
+break;  \
 default:\
-case 2: cpu_##insn##_user_ra(env, addr, val, retaddr); break;   \
+case 2: \
+cpu_##insn##_user_ra(env, addr, val, retaddr);  \
+break;  \
 case 3: \
 cpu_##insn##_error_ra(env, addr, val, retaddr); \
 break;  \
@@ -114,7 +118,8 @@ HELPER_ST(sd, stq, uint64_t)
 /* 64 bits arithmetic for 32 bits hosts */
 static inline uint64_t get_HILO(CPUMIPSState *env)
 {
-return ((uint64_t)(env->active_tc.HI[0]) << 32) | 
(uint32_t)env->active_tc.LO[0];
+return ((uint64_t)(env->active_tc.HI[0]) << 32) |
+   (uint32_t)env->active_tc.LO[0];
 }
 
 static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
@@ -435,9 +440,10 @@ void helper_swr(CPUMIPSState *env, target_ulong arg1, 
target_ulong arg2,
 }
 
 #if defined(TARGET_MIPS64)
-/* "half" load and stores.  We must do the memory access inline,
-   or fault handling won't work.  */
-
+/*
+ * "half" load and stores.  We must do the memory access inline,
+ * or fault handling won't work.
+ */
 #ifdef TARGET_WORDS_BIGENDIAN
 #define GET_LMASK64(v) ((v) & 7)
 #else
@@ -535,7 +541,7 @@ void helper_lwm(CPUMIPSState *env, target_ulong addr, 
target_ulong reglist,
 target_ulong base_reglist = reglist & 0xf;
 target_ulong do_r31 = reglist & 0x10;
 
-if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) {
+if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {
 target_ulong i;
 
 for (i = 0; i < base_reglist; i++) {
@@ -557,7 +563,7 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, 
target_ulong reglist,
 target_ulong base_reglist = reglist & 0xf;
 target_ulong do_r31 = reglist & 0x10;
 
-if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) {
+if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {
 target_ulong i;
 
 for (i = 0; i < base_reglist; i++) {
@@ -579,7 +585,7 @@ void helper_ldm(CPUMIPSState *env, target_ulong addr, 
target_ulong reglist,
 target_ulong base_reglist = reglist & 0xf;
 target_ulong do_r31 = reglist & 0x10;
 
-if (base_reglist > 0 && base_reglist <= ARRAY_SIZE (multiple_regs)) {
+if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {
 target_ulong i;
 
 for (i = 0; i < base_reglist; i++) {

[PATCH v3 6/6] target/mips: msa: Split helpers for ILV.

[Aleksandar Markovic]

From: Aleksandar Markovic 

Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic 
---
 target/mips/helper.h |  21 +-
 target/mips/msa_helper.c | 768 +--
 target/mips/translate.c  |  76 -
 3 files changed, 496 insertions(+), 369 deletions(-)

diff --git a/target/mips/helper.h b/target/mips/helper.h
index 6419bb8..f3df187 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -912,6 +912,23 @@ DEF_HELPER_4(msa_mod_s_h, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_mod_s_w, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_mod_s_d, void, env, i32, i32, i32)
 
+DEF_HELPER_4(msa_ilvev_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvev_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvev_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvev_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvod_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvod_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvod_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvod_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvl_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvl_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvl_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvl_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvr_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvr_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvr_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_ilvr_d, void, env, i32, i32, i32)
+
 DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32)
@@ -984,10 +1001,6 @@ DEF_HELPER_5(msa_sld_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_splat_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_pckev_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_pckod_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_ilvl_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_ilvr_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_ilvev_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_ilvod_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_vshf_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_srar_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_srlr_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 65df15d..499fcde 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -2432,7 +2432,421 @@ void helper_msa_mod_u_d(CPUMIPSState *env,
  * +---+--+
  */
 
-/* TODO: insert Interleave group helpers here */
+
+void helper_msa_ilvev_b(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+#if defined(HOST_WORDS_BIGENDIAN)
+pwd->b[8]  = pws->b[9];
+pwd->b[9]  = pwt->b[9];
+pwd->b[10] = pws->b[11];
+pwd->b[11] = pwt->b[11];
+pwd->b[12] = pws->b[13];
+pwd->b[13] = pwt->b[13];
+pwd->b[14] = pws->b[15];
+pwd->b[15] = pwt->b[15];
+pwd->b[0]  = pws->b[1];
+pwd->b[1]  = pwt->b[1];
+pwd->b[2]  = pws->b[3];
+pwd->b[3]  = pwt->b[3];
+pwd->b[4]  = pws->b[5];
+pwd->b[5]  = pwt->b[5];
+pwd->b[6]  = pws->b[7];
+pwd->b[7]  = pwt->b[7];
+#else
+pwd->b[15] = pws->b[14];
+pwd->b[14] = pwt->b[14];
+pwd->b[13] = pws->b[12];
+pwd->b[12] = pwt->b[12];
+pwd->b[11] = pws->b[10];
+pwd->b[10] = pwt->b[10];
+pwd->b[9]  = pws->b[8];
+pwd->b[8]  = pwt->b[8];
+pwd->b[7]  = pws->b[6];
+pwd->b[6]  = pwt->b[6];
+pwd->b[5]  = pws->b[4];
+pwd->b[4]  = pwt->b[4];
+pwd->b[3]  = pws->b[2];
+pwd->b[2]  = pwt->b[2];
+pwd->b[1]  = pws->b[0];
+pwd->b[0]  = pwt->b[0];
+#endif
+}
+
+void helper_msa_ilvev_h(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+#if defined(HOST_WORDS_BIGENDIAN)
+pwd->h[4] = pws->h[5];
+pwd->h[5] = pwt->h[5];
+pwd->h[6] = pws->h[7];
+pwd->h[7] = pwt->h[7];
+pwd->h[0] = pws->h[1];
+pwd->h[1] = pwt->h[1];
+pwd->h[2] = pws->h[3];
+pwd->h[3] = pwt->h[3];
+#else
+pwd->h[7] = pws->h[6];
+pwd->h[6] = pwt->h[6];
+pwd->h[5] = pws->h[4];
+pwd->h[4] = pwt->h[4];
+pwd->h[3] = pws->h[2];
+pwd->h[2] = pwt->h[2];
+pwd->h[1] = pws->h[0];
+pwd->h[0] = pwt->h[0];
+#endif
+}
+
+void helper_msa_ilvev_w(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+#if defined(HOST_WORDS_BIGENDIAN)
+pwd->w[2] = 

[PATCH v3 3/6] MAINTAINERS: Update mail address of Aleksandar Rikalo

[Aleksandar Markovic]

From: Aleksandar Markovic 

Aleksandar Rikalo wishes to change his primary mail address for QEMU.
Some minor line order is corrected in .mailmap to be alphabetical,
too.

Signed-off-by: Aleksandar Markovic 
---
 .mailmap|  5 +++--
 MAINTAINERS | 18 +-
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/.mailmap b/.mailmap
index 0756a0b..3816e4e 100644
--- a/.mailmap
+++ b/.mailmap
@@ -39,10 +39,11 @@ Julia Suvorova  Julia Suvorova via 
Qemu-devel  Justin Terry (VM) via Qemu-devel 

 
 # Next, replace old addresses by a more recent one.
-Anthony Liguori  Anthony Liguori 
-James Hogan  
 Aleksandar Markovic  
 Aleksandar Markovic  
+Aleksandar Rikalo  
+Anthony Liguori  Anthony Liguori 
+James Hogan  
 Paul Burton  
 Paul Burton  
 Paul Burton  
diff --git a/MAINTAINERS b/MAINTAINERS
index 3ca8148..4964fbb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -208,7 +208,7 @@ F: disas/microblaze.c
 MIPS TCG CPUs
 M: Aurelien Jarno 
 M: Aleksandar Markovic 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Maintained
 F: target/mips/
 F: default-configs/*mips*
@@ -363,7 +363,7 @@ F: target/arm/kvm.c
 
 MIPS KVM CPUs
 M: James Hogan 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Maintained
 F: target/mips/kvm.c
 
@@ -934,7 +934,7 @@ MIPS Machines
 -
 Jazz
 M: Hervé Poussineau 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Maintained
 F: hw/mips/mips_jazz.c
 F: hw/display/jazz_led.c
@@ -942,7 +942,7 @@ F: hw/dma/rc4030.c
 
 Malta
 M: Aurelien Jarno 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Maintained
 F: hw/mips/mips_malta.c
 F: hw/mips/gt64xxx_pci.c
@@ -950,20 +950,20 @@ F: tests/acceptance/linux_ssh_mips_malta.py
 
 Mipssim
 M: Aleksandar Markovic 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Odd Fixes
 F: hw/mips/mips_mipssim.c
 F: hw/net/mipsnet.c
 
 R4000
 M: Aurelien Jarno 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Maintained
 F: hw/mips/mips_r4k.c
 
 Fulong 2E
 M: Aleksandar Markovic 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Odd Fixes
 F: hw/mips/mips_fulong2e.c
 F: hw/isa/vt82c686.c
@@ -972,7 +972,7 @@ F: include/hw/isa/vt82c686.h
 
 Boston
 M: Paul Burton 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Maintained
 F: hw/core/loader-fit.c
 F: hw/mips/boston.c
@@ -2348,7 +2348,7 @@ F: disas/i386.c
 
 MIPS TCG target
 M: Aurelien Jarno 
-R: Aleksandar Rikalo 
+R: Aleksandar Rikalo 
 S: Maintained
 F: tcg/mips/
 
-- 
2.7.4

[PATCH v3 5/6] target/mips: msa: Split helpers for _.

[Aleksandar Markovic]

From: Aleksandar Markovic 

Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic 
---
 target/mips/helper.h |  20 ++-
 target/mips/msa_helper.c | 320 ++-
 target/mips/translate.c  |  76 +--
 3 files changed, 372 insertions(+), 44 deletions(-)

diff --git a/target/mips/helper.h b/target/mips/helper.h
index cef4de6..6419bb8 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -881,10 +881,26 @@ DEF_HELPER_4(msa_max_a_b, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_max_a_h, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_max_a_w, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_max_a_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_s_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_s_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_s_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_s_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_u_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_u_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_u_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_u_d, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_min_a_b, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_min_a_h, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_min_a_w, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_min_a_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_s_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_s_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_s_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_s_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_u_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_u_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_u_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_u_d, void, env, i32, i32, i32)
 
 DEF_HELPER_4(msa_mod_u_b, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_mod_u_h, void, env, i32, i32, i32)
@@ -945,10 +961,6 @@ DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_addv_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_subv_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_max_s_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_max_u_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_min_s_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_min_u_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 3eb0ab1..65df15d 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1810,6 +1810,152 @@ void helper_msa_max_a_d(CPUMIPSState *env,
 }
 
 
+static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+return arg1 > arg2 ? arg1 : arg2;
+}
+
+void helper_msa_max_s_b(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+pwd->b[0]  = msa_max_s_df(DF_BYTE, pws->b[0],  pwt->b[0]);
+pwd->b[1]  = msa_max_s_df(DF_BYTE, pws->b[1],  pwt->b[1]);
+pwd->b[2]  = msa_max_s_df(DF_BYTE, pws->b[2],  pwt->b[2]);
+pwd->b[3]  = msa_max_s_df(DF_BYTE, pws->b[3],  pwt->b[3]);
+pwd->b[4]  = msa_max_s_df(DF_BYTE, pws->b[4],  pwt->b[4]);
+pwd->b[5]  = msa_max_s_df(DF_BYTE, pws->b[5],  pwt->b[5]);
+pwd->b[6]  = msa_max_s_df(DF_BYTE, pws->b[6],  pwt->b[6]);
+pwd->b[7]  = msa_max_s_df(DF_BYTE, pws->b[7],  pwt->b[7]);
+pwd->b[8]  = msa_max_s_df(DF_BYTE, pws->b[8],  pwt->b[8]);
+pwd->b[9]  = msa_max_s_df(DF_BYTE, pws->b[9],  pwt->b[9]);
+pwd->b[10] = msa_max_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
+pwd->b[11] = msa_max_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
+pwd->b[12] = msa_max_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
+pwd->b[13] = msa_max_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
+pwd->b[14] = msa_max_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
+pwd->b[15] = msa_max_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
+}
+
+void helper_msa_max_s_h(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+pwd->h[0]  = msa_max_s_df(DF_HALF, pws->h[0],  pwt->h[0]);
+pwd->h[1]  = msa_max_s_df(DF_HALF, pws->h[1],  pwt->h[1]);
+pwd->h[2]  = msa_max_s_df(DF_HALF, pws->h[2],  pwt->h[2]);
+pwd->h[3]  = msa_max_s_df(DF_HALF, pws->h[3],  pwt->h[3]);
+pwd->h[4]  = msa_max_s_df(DF_HALF, pws->h[4],  pwt->h[4]);
+pwd->h[5]  = msa_max_s_df(DF_HALF, pws->h[5],  pwt->h[5]);
+pwd->h[6]  = msa_max_s_df(DF_HALF, pws->h[6],  pwt->h[6]);
+pwd->h[7]  = msa_max_s_df(DF_HALF, pws->h[7],  pwt->h[7]);
+}
+
+void 

[PATCH v3 4/6] target/mips: msa: Split helpers for _A.

[Aleksandar Markovic]

From: Aleksandar Markovic 

Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic 
---
 target/mips/helper.h |  11 +++-
 target/mips/msa_helper.c | 163 ++-
 target/mips/translate.c  |  38 +--
 3 files changed, 187 insertions(+), 25 deletions(-)

diff --git a/target/mips/helper.h b/target/mips/helper.h
index d615c83..cef4de6 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -877,6 +877,15 @@ DEF_HELPER_4(msa_div_u_h, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_div_u_w, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_div_u_d, void, env, i32, i32, i32)
 
+DEF_HELPER_4(msa_max_a_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_a_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_a_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_max_a_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_a_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_a_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_a_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_min_a_d, void, env, i32, i32, i32)
+
 DEF_HELPER_4(msa_mod_u_b, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_mod_u_h, void, env, i32, i32, i32)
 DEF_HELPER_4(msa_mod_u_w, void, env, i32, i32, i32)
@@ -940,8 +949,6 @@ DEF_HELPER_5(msa_max_s_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_max_u_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_min_s_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_min_u_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_max_a_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_min_a_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32)
 DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index a2052ba..3eb0ab1 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1736,7 +1736,152 @@ void helper_msa_div_u_d(CPUMIPSState *env,
  * +---+--+
  */
 
-/* TODO: insert Int Max Min group helpers here */
+static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
+uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
+return abs_arg1 > abs_arg2 ? arg1 : arg2;
+}
+
+void helper_msa_max_a_b(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+pwd->b[0]  = msa_max_a_df(DF_BYTE, pws->b[0],  pwt->b[0]);
+pwd->b[1]  = msa_max_a_df(DF_BYTE, pws->b[1],  pwt->b[1]);
+pwd->b[2]  = msa_max_a_df(DF_BYTE, pws->b[2],  pwt->b[2]);
+pwd->b[3]  = msa_max_a_df(DF_BYTE, pws->b[3],  pwt->b[3]);
+pwd->b[4]  = msa_max_a_df(DF_BYTE, pws->b[4],  pwt->b[4]);
+pwd->b[5]  = msa_max_a_df(DF_BYTE, pws->b[5],  pwt->b[5]);
+pwd->b[6]  = msa_max_a_df(DF_BYTE, pws->b[6],  pwt->b[6]);
+pwd->b[7]  = msa_max_a_df(DF_BYTE, pws->b[7],  pwt->b[7]);
+pwd->b[8]  = msa_max_a_df(DF_BYTE, pws->b[8],  pwt->b[8]);
+pwd->b[9]  = msa_max_a_df(DF_BYTE, pws->b[9],  pwt->b[9]);
+pwd->b[10] = msa_max_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
+pwd->b[11] = msa_max_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
+pwd->b[12] = msa_max_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
+pwd->b[13] = msa_max_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
+pwd->b[14] = msa_max_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
+pwd->b[15] = msa_max_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
+}
+
+void helper_msa_max_a_h(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+pwd->h[0]  = msa_max_a_df(DF_HALF, pws->h[0],  pwt->h[0]);
+pwd->h[1]  = msa_max_a_df(DF_HALF, pws->h[1],  pwt->h[1]);
+pwd->h[2]  = msa_max_a_df(DF_HALF, pws->h[2],  pwt->h[2]);
+pwd->h[3]  = msa_max_a_df(DF_HALF, pws->h[3],  pwt->h[3]);
+pwd->h[4]  = msa_max_a_df(DF_HALF, pws->h[4],  pwt->h[4]);
+pwd->h[5]  = msa_max_a_df(DF_HALF, pws->h[5],  pwt->h[5]);
+pwd->h[6]  = msa_max_a_df(DF_HALF, pws->h[6],  pwt->h[6]);
+pwd->h[7]  = msa_max_a_df(DF_HALF, pws->h[7],  pwt->h[7]);
+}
+
+void helper_msa_max_a_w(CPUMIPSState *env,
+uint32_t wd, uint32_t ws, uint32_t wt)
+{
+wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+pwd->w[0]  = msa_max_a_df(DF_WORD, pws->w[0],  pwt->w[0]);
+pwd->w[1]  = msa_max_a_df(DF_WORD, pws->w[1],  pwt->w[1]);
+pwd->w[2]  = msa_max_a_df(DF_WORD, pws->w[2],  pwt->w[2]);
+pwd->w[3]  = msa_max_a_df(DF_WORD, pws->w[3],  pwt->w[3]);
+}
+
+void 

[PATCH v3 0/6] target/mips: Misc cleanups for September/October 2019

[Aleksandar Markovic]

From: Aleksandar Markovic 

Mostly cosmetic changes.

v2->v3:

  - removed all patches that were already integrated
  - patches 1 and 2 are improved from v2
  - added patches 3-6

v1->v2:

  - minor corrections to satisfy reviews
  - added several more patches

Aleksandar Markovic (6):
  target/mips: Clean up helper.c
  target/mips: Clean up op_helper.c
  MAINTAINERS: Update mail address of Aleksandar Rikalo
  target/mips: msa: Split helpers for _A.
  target/mips: msa: Split helpers for _.
  target/mips: msa: Split helpers for ILV.

 .mailmap |5 +-
 MAINTAINERS  |   18 +-
 target/mips/helper.c |  128 +++--
 target/mips/helper.h |   52 +-
 target/mips/msa_helper.c | 1299 +++---
 target/mips/op_helper.c  | 1010 ++-
 target/mips/translate.c  |  190 +--
 7 files changed, 1832 insertions(+), 870 deletions(-)

-- 
2.7.4

Re: [PATCH V6] target/riscv: Ignore reserved bits in PTE for RV64

[Palmer Dabbelt]

On Wed, 25 Sep 2019 17:14:21 PDT (-0700), guo...@kernel.org wrote:

From: Guo Ren 

Highest 10 bits of PTE are reserved in riscv-privileged, ref: [1], so we
need to ignore them. They cannot be a part of ppn.

1: The RISC-V Instruction Set Manual, Volume II: Privileged Architecture
   4.4 Sv39: Page-Based 39-bit Virtual-Memory System
   4.5 Sv48: Page-Based 48-bit Virtual-Memory System

Signed-off-by: Guo Ren 
Tested-by: Bin Meng 
Reviewed-by: Liu Zhiwei 
Reviewed-by: Bin Meng 
Reviewed-by: Alistair Francis 
---
 target/riscv/cpu_bits.h   | 7 +++
 target/riscv/cpu_helper.c | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

 Changelog V6:
  - Add Reviewer: Alistair Francis

 Changelog V5:
  - Add Reviewer and Tester: Bin Meng

 Changelog V4:
  - Change title to Ignore not Bugfix
  - Use PTE_PPN_MASK for RV32 and RV64

 Changelog V3:
  - Use UUL define for PTE_RESERVED
  - Keep ppn >> PTE_PPN_SHIFT

 Changelog V2:
  - Bugfix pte destroyed cause boot fail
  - Change to AND with a mask instead of shifting both directions

diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index e998348..399c2c6 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -473,6 +473,13 @@
 /* Page table PPN shift amount */
 #define PTE_PPN_SHIFT   10

+/* Page table PPN mask */
+#if defined(TARGET_RISCV32)
+#define PTE_PPN_MASK0xUL
+#elif defined(TARGET_RISCV64)
+#define PTE_PPN_MASK0x3fULL
+#endif
+
 /* Leaf page shift amount */
 #define PGSHIFT 12

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 87dd6a6..9961b37 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -261,7 +261,7 @@ restart:
 #elif defined(TARGET_RISCV64)
 target_ulong pte = ldq_phys(cs->as, pte_addr);
 #endif
-hwaddr ppn = pte >> PTE_PPN_SHIFT;
+hwaddr ppn = (pte & PTE_PPN_MASK) >> PTE_PPN_SHIFT;

 if (!(pte & PTE_V)) {
 /* Invalid PTE */


I know I'm a bit late to the party here, but I don't like this.  There's ample 
evidence that wrapping the physical address space is a bad idea, and just 
because the ISA allows implementations to do this doesn't mean we should.

Re: [Qemu-devel] [PATCH v30 4/8] target/avr: Add instruction translation

[Michael Rolnik]

Hi Aleksandar.

If I break it to multiple patches, does every patch have to compile?

On Fri, Oct 11, 2019 at 5:13 PM Aleksandar Markovic
 wrote:
>
>
>
> On Monday, September 2, 2019, Michael Rolnik  wrote:
>>
>> This includes:
>> - TCG translations for each instruction
>>
>> Signed-off-by: Michael Rolnik 
>> ---
>>  target/avr/translate.c | 2888 
>>  1 file changed, 2888 insertions(+)
>>  create mode 100644 target/avr/translate.c
>>
>
> Hi, Michael,
>
>
> This patch is way too large. I suggest splitting it into:
>
> - register definitions
> - load instruction handling
> - store instruction handling
> - logic instruction handling
>
> etc.
>
> Thanks, Aleksandar
>
> P.S. One more hurdle with your communication on the list is that you don't 
> use "inline responding" while replaying, please use it in future. See other 
> messages in the mailing list how "inline responding" looks.
>
>
>
>
>>
>> diff --git a/target/avr/translate.c b/target/avr/translate.c
>> new file mode 100644
>> index 00..42cb4a690c
>> --- /dev/null
>> +++ b/target/avr/translate.c
>> @@ -0,0 +1,2888 @@
>> +/*
>> + * QEMU AVR CPU
>> + *
>> + * Copyright (c) 2019 Michael Rolnik
>> + *
>> + * This library is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU Lesser General Public
>> + * License as published by the Free Software Foundation; either
>> + * version 2.1 of the License, or (at your option) any later version.
>> + *
>> + * This library is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> + * Lesser General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU Lesser General Public
>> + * License along with this library; if not, see
>> + * 
>> + */
>> +
>> +#include "qemu/osdep.h"
>> +#include "qemu/qemu-print.h"
>> +#include "tcg/tcg.h"
>> +#include "cpu.h"
>> +#include "exec/exec-all.h"
>> +#include "disas/disas.h"
>> +#include "tcg-op.h"
>> +#include "exec/cpu_ldst.h"
>> +#include "exec/helper-proto.h"
>> +#include "exec/helper-gen.h"
>> +#include "exec/log.h"
>> +#include "exec/gdbstub.h"
>> +#include "exec/translator.h"
>> +
>> +/*
>> + *  Define if you want a BREAK instruction translated to a breakpoint
>> + *  Active debugging connection is assumed
>> + *  This is for
>> + *  https://github.com/seharris/qemu-avr-tests/tree/master/instruction-tests
>> + *  tests
>> + */
>> +#undef BREAKPOINT_ON_BREAK
>> +
>> +static TCGv cpu_pc;
>> +
>> +static TCGv cpu_Cf;
>> +static TCGv cpu_Zf;
>> +static TCGv cpu_Nf;
>> +static TCGv cpu_Vf;
>> +static TCGv cpu_Sf;
>> +static TCGv cpu_Hf;
>> +static TCGv cpu_Tf;
>> +static TCGv cpu_If;
>> +
>> +static TCGv cpu_rampD;
>> +static TCGv cpu_rampX;
>> +static TCGv cpu_rampY;
>> +static TCGv cpu_rampZ;
>> +
>> +static TCGv cpu_r[NO_CPU_REGISTERS];
>> +static TCGv cpu_eind;
>> +static TCGv cpu_sp;
>> +
>> +static TCGv cpu_skip;
>> +
>> +static const char reg_names[NO_CPU_REGISTERS][8] = {
>> +"r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",
>> +"r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
>> +"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
>> +"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
>> +};
>> +#define REG(x) (cpu_r[x])
>> +
>> +enum {
>> +DISAS_EXIT   = DISAS_TARGET_0,  /* We want return to the cpu main loop. 
>>  */
>> +DISAS_LOOKUP = DISAS_TARGET_1,  /* We have a variable condition exit.  
>> */
>> +DISAS_CHAIN  = DISAS_TARGET_2,  /* We have a single condition exit.  */
>> +};
>> +
>> +typedef struct DisasContext DisasContext;
>> +
>> +/* This is the state at translation time. */
>> +struct DisasContext {
>> +TranslationBlock *tb;
>> +
>> +CPUAVRState *env;
>> +CPUState *cs;
>> +
>> +target_long npc;
>> +uint32_t opcode;
>> +
>> +/* Routine used to access memory */
>> +int memidx;
>> +int bstate;
>> +int singlestep;
>> +
>> +TCGv skip_var0;
>> +TCGv skip_var1;
>> +TCGCond skip_cond;
>> +bool free_skip_var0;
>> +};
>> +
>> +static int to_A(DisasContext *ctx, int indx) { return 16 + (indx % 16); }
>> +static int to_B(DisasContext *ctx, int indx) { return 16 + (indx % 8); }
>> +static int to_C(DisasContext *ctx, int indx) { return 24 + (indx % 4) * 2; }
>> +static int to_D(DisasContext *ctx, int indx) { return (indx % 16) * 2; }
>> +
>> +static uint16_t next_word(DisasContext *ctx)
>> +{
>> +return cpu_lduw_code(ctx->env, ctx->npc++ * 2);
>> +}
>> +
>> +static int append_16(DisasContext *ctx, int x)
>> +{
>> +return x << 16 | next_word(ctx);
>> +}
>> +
>> +static bool decode_insn(DisasContext *ctx, uint16_t insn);
>> +#include "decode_insn.inc.c"
>> +
>> +static bool avr_have_feature(DisasContext *ctx, int feature)
>> +{
>> +if (!avr_feature(ctx->env, feature)) {

Re: [PATCH 2/3] MAINTAINERS: Cc the qemu-...@nongnu.org for the ARM machines

[Alistair Francis]

On Fri, Oct 11, 2019 at 11:56 PM Philippe Mathieu-Daudé
 wrote:
>
> Not all ARM machines sections Cc the qemu-...@nongnu.org list,
> fix this.
>
> Signed-off-by: Philippe Mathieu-Daudé 

Reviewed-by: Alistair Francis 

Alistair

> ---
>  MAINTAINERS | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 47eae9fc46..65fbc6d7b4 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -805,6 +805,7 @@ F: hw/arm/virt-acpi-build.c
>  STM32F205
>  M: Alistair Francis 
>  M: Peter Maydell 
> +L: qemu-...@nongnu.org
>  S: Maintained
>  F: hw/arm/stm32f205_soc.c
>  F: hw/misc/stm32f2xx_syscfg.c
> @@ -817,12 +818,14 @@ F: include/hw/*/stm32*.h
>  Netduino 2
>  M: Alistair Francis 
>  M: Peter Maydell 
> +L: qemu-...@nongnu.org
>  S: Maintained
>  F: hw/arm/netduino2.c
>
>  SmartFusion2
>  M: Subbaraya Sundeep 
>  M: Peter Maydell 
> +L: qemu-...@nongnu.org
>  S: Maintained
>  F: hw/arm/msf2-soc.c
>  F: hw/misc/msf2-sysreg.c
> @@ -836,6 +839,7 @@ F: include/hw/ssi/mss-spi.h
>  Emcraft M2S-FG484
>  M: Subbaraya Sundeep 
>  M: Peter Maydell 
> +L: qemu-...@nongnu.org
>  S: Maintained
>  F: hw/arm/msf2-som.c
>
> @@ -1349,6 +1353,7 @@ T: git https://github.com/jnsnow/qemu.git ide
>
>  OMAP
>  M: Peter Maydell 
> +L: qemu-...@nongnu.org
>  S: Maintained
>  F: hw/*/omap*
>  F: include/hw/arm/omap.h
> --
> 2.21.0
>
>

[Bug 1847861] [NEW] Guest stuttering under high disk IO (virtio)

[Emanuele Faranda]

Public bug reported:

Performing io intensive tasks on virtualized Windows causes the system
to visually stutter. I can often reproduce the problem by running fio on
windows:

fio --randrepeat=1 --ioengine=windowsaio --direct=1 --gtod_reduce=1
--name=test --filename=\\.\PhysicalDrive0 --bs=4k --iodepth=128
--size=4G --readwrite=randread

While the fio command is running, moving the mouse pointer will be be
laggy. The stuttering does not appear with iodepth <= 32 . The
stuttering also manifests while playing games, the music and video
pauses for a fraction of second in a playable but disturbing way.

Here are my system specs:

Host OS: archlinux
Guest OS: Windows 10 Enterprise
qemu version: qemu-git 8:v4.1.0.r1378.g98b2e3c9ab-1 (from AUR, compiled with 
-march=native)
CPU: AMD Ryzen Threadripper 1900X 8-Core Processor
Huge Pages: vm.nr_hugepages=4128
Disk: nvme type=raw, io=threads bus=virtio
GPU (passthrough): Radeon RX 570

Here are some fio test results on my windows guest:

[size=512M,iodepth=1 -> min=30k,avg=31k,stddev=508]
[size=2G,iodepth=8 -> min=203k,avg=207k,stddev=2.3k]
[size=2G,iodepth=16 -> min=320k,avg=330k,stddev=4.3k]
[size=4G,iodepth=32 -> min=300k,avg=310k,stddev=4.8k]
[size=4G,iodepth=64 -> min=278k,avg=366k,stddev=68.6k] -> STUTTER
[size=4G,iodepth=64 -> min=358k,avg=428k,stddev=52.6k] -> STUTTER
[size=4G,iodepth=128 -> min=92k,avg=217k,stddev=185k] -> STUTTER
[size=4G,iodepth=128 -> min=241k,avg=257k,stddev=14k] -> same config as above, 
but no stuttering

The min and avg values are the bandwidth values reported in KB/s by fio.
You can see that, when the stuttering occurs, the stardard deviation is
high and the minimum bandwidth is way below the average.

Additional note: the bandwidth reported with `fio` on my linux host is
about 2x the one reported in the guest:

sudo fio --randrepeat=1 --ioengine=libaio --direct=1 --gtod_reduce=1
--name=test --filename=/dev/nvme0n1 --bs=4k --iodepth=64 --size=512M
--readwrite=randread

read: IOPS=279k, BW=1092MiB/s (1145MB/s)(512MiB/469msec)

** Affects: qemu
 Importance: Undecided
 Status: New

** Description changed:

  Performing io intensive tasks on virtualized Windows causes the system
  to visually stutter. I can often reproduce the problem by running fio on
  windows:
  
  fio --randrepeat=1 --ioengine=windowsaio --direct=1 --gtod_reduce=1
  --name=test --filename=\\.\PhysicalDrive0 --bs=4k --iodepth=128
  --size=4G --readwrite=randread
  
  While the fio command is running, moving the mouse pointer will be be
  laggy. The stuttering does not appear with iodepth <= 32 . The
  stuttering also manifests while playing games, the music and video
  pauses for a fraction of second in a playable but disturbing way.
  
  Here are my system specs:
  
  Host OS: archlinux
  Guest OS: Windows 10 Enterprise
  qemu version: qemu-git 8:v4.1.0.r1378.g98b2e3c9ab-1 (from AUR, compiled with 
-march=native)
  CPU: AMD Ryzen Threadripper 1900X 8-Core Processor
  Huge Pages: vm.nr_hugepages=4128
  Disk: nvme type=raw, io=threads bus=virtio
  GPU (passthrough): Radeon RX 570
  
  Here are some fio test results on my windows guest:
  
  [size=512M,iodepth=1 -> min=30k,avg=31k,stddev=508]
  [size=2G,iodepth=8 -> min=203k,avg=207k,stddev=2.3k]
  [size=2G,iodepth=16 -> min=320k,avg=330k,stddev=4.3k]
  [size=4G,iodepth=32 -> min=300k,avg=310k,stddev=4.8k]
  [size=4G,iodepth=64 -> min=278k,avg=366k,stddev=68.6k] -> STUTTER
  [size=4G,iodepth=64 -> min=358k,avg=428k,stddev=52.6k] -> STUTTER
  [size=4G,iodepth=128 -> min=92k,avg=217k,stddev=185k] -> STUTTER
  [size=4G,iodepth=128 -> min=241k,avg=257k,stddev=14k] -> same config as 
above, but no stuttering
  
  The min and avg values are the bandwidth values reported in KB/s by fio.
  You can see that, when the stuttering occurs, the stardard deviation is
  high and the minimum bandwidth is way below the average.
+ 
+ Additional note: the bandwidth reported with `fio` on my linux host is
+ about 2x the one reported in the guest:
+ 
+ sudo fio --randrepeat=1 --ioengine=libaio --direct=1 --gtod_reduce=1
+ --name=test --filename=/dev/nvme0n1 --bs=4k --iodepth=64 --size=512M
+ --readwrite=randread
+ 
+ read: IOPS=279k, BW=1092MiB/s (1145MB/s)(512MiB/469msec)

-- 
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1847861

Title:
  Guest stuttering under high disk IO (virtio)

Status in QEMU:
  New

Bug description:
  Performing io intensive tasks on virtualized Windows causes the system
  to visually stutter. I can often reproduce the problem by running fio
  on windows:

  fio --randrepeat=1 --ioengine=windowsaio --direct=1 --gtod_reduce=1
  --name=test --filename=\\.\PhysicalDrive0 --bs=4k --iodepth=128
  --size=4G --readwrite=randread

  While the fio command is running, moving the mouse pointer will be be
  laggy. The stuttering does not appear with iodepth <= 32 . The
  stuttering also manifests while playing games, the 

[Bug 1847861] Re: Guest stuttering under high disk IO (virtio)

[Emanuele Faranda]

** Description changed:

  Performing io intensive tasks on virtualized Windows causes the system
  to visually stutter. I can often reproduce the problem by running fio on
  windows:
  
  fio --randrepeat=1 --ioengine=windowsaio --direct=1 --gtod_reduce=1
  --name=test --filename=\\.\PhysicalDrive0 --bs=4k --iodepth=128
  --size=4G --readwrite=randread
  
  While the fio command is running, moving the mouse pointer will be be
  laggy. The stuttering does not appear with iodepth <= 32 . The
  stuttering also manifests while playing games, the music and video
  pauses for a fraction of second in a playable but disturbing way.
  
  Here are my system specs:
  
  Host OS: archlinux
  Guest OS: Windows 10 Enterprise
  qemu version: qemu-git 8:v4.1.0.r1378.g98b2e3c9ab-1 (from AUR, compiled with 
-march=native)
  CPU: AMD Ryzen Threadripper 1900X 8-Core Processor
  Huge Pages: vm.nr_hugepages=4128
  Disk: nvme type=raw, io=threads bus=virtio
  GPU (passthrough): Radeon RX 570
  
  Here are some fio test results on my windows guest:
  
  [size=512M,iodepth=1 -> min=30k,avg=31k,stddev=508]
  [size=2G,iodepth=8 -> min=203k,avg=207k,stddev=2.3k]
  [size=2G,iodepth=16 -> min=320k,avg=330k,stddev=4.3k]
  [size=4G,iodepth=32 -> min=300k,avg=310k,stddev=4.8k]
  [size=4G,iodepth=64 -> min=278k,avg=366k,stddev=68.6k] -> STUTTER
  [size=4G,iodepth=64 -> min=358k,avg=428k,stddev=52.6k] -> STUTTER
  [size=4G,iodepth=128 -> min=92k,avg=217k,stddev=185k] -> STUTTER
  [size=4G,iodepth=128 -> min=241k,avg=257k,stddev=14k] -> same config as 
above, but no stuttering
  
  The min and avg values are the bandwidth values reported in KB/s by fio.
  You can see that, when the stuttering occurs, the stardard deviation is
  high and the minimum bandwidth is way below the average.
  
  Additional note: the bandwidth reported with `fio` on my linux host is
  about 2x the one reported in the guest:
  
  sudo fio --randrepeat=1 --ioengine=libaio --direct=1 --gtod_reduce=1
  --name=test --filename=/dev/nvme0n1 --bs=4k --iodepth=64 --size=512M
  --readwrite=randread
  
  read: IOPS=279k, BW=1092MiB/s (1145MB/s)(512MiB/469msec)
+ 
+ Moreover, during the fio tests on the guest I've noticed that the CPU
+ usage on the host is very high (around 450%) whereas on the guest is
+ only 10%

-- 
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1847861

Title:
  Guest stuttering under high disk IO (virtio)

Status in QEMU:
  New

Bug description:
  Performing io intensive tasks on virtualized Windows causes the system
  to visually stutter. I can often reproduce the problem by running fio
  on windows:

  fio --randrepeat=1 --ioengine=windowsaio --direct=1 --gtod_reduce=1
  --name=test --filename=\\.\PhysicalDrive0 --bs=4k --iodepth=128
  --size=4G --readwrite=randread

  While the fio command is running, moving the mouse pointer will be be
  laggy. The stuttering does not appear with iodepth <= 32 . The
  stuttering also manifests while playing games, the music and video
  pauses for a fraction of second in a playable but disturbing way.

  Here are my system specs:

  Host OS: archlinux
  Guest OS: Windows 10 Enterprise
  qemu version: qemu-git 8:v4.1.0.r1378.g98b2e3c9ab-1 (from AUR, compiled with 
-march=native)
  CPU: AMD Ryzen Threadripper 1900X 8-Core Processor
  Huge Pages: vm.nr_hugepages=4128
  Disk: nvme type=raw, io=threads bus=virtio
  GPU (passthrough): Radeon RX 570

  Here are some fio test results on my windows guest:

  [size=512M,iodepth=1 -> min=30k,avg=31k,stddev=508]
  [size=2G,iodepth=8 -> min=203k,avg=207k,stddev=2.3k]
  [size=2G,iodepth=16 -> min=320k,avg=330k,stddev=4.3k]
  [size=4G,iodepth=32 -> min=300k,avg=310k,stddev=4.8k]
  [size=4G,iodepth=64 -> min=278k,avg=366k,stddev=68.6k] -> STUTTER
  [size=4G,iodepth=64 -> min=358k,avg=428k,stddev=52.6k] -> STUTTER
  [size=4G,iodepth=128 -> min=92k,avg=217k,stddev=185k] -> STUTTER
  [size=4G,iodepth=128 -> min=241k,avg=257k,stddev=14k] -> same config as 
above, but no stuttering

  The min and avg values are the bandwidth values reported in KB/s by
  fio. You can see that, when the stuttering occurs, the stardard
  deviation is high and the minimum bandwidth is way below the average.

  Additional note: the bandwidth reported with `fio` on my linux host is
  about 2x the one reported in the guest:

  sudo fio --randrepeat=1 --ioengine=libaio --direct=1 --gtod_reduce=1
  --name=test --filename=/dev/nvme0n1 --bs=4k --iodepth=64 --size=512M
  --readwrite=randread

  read: IOPS=279k, BW=1092MiB/s (1145MB/s)(512MiB/469msec)

  Moreover, during the fio tests on the guest I've noticed that the CPU
  usage on the host is very high (around 450%) whereas on the guest is
  only 10%

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1847861/+subscriptions

[Bug 1778966] Re: Windows 1803 and later crashes on KVM

[Emanuele Faranda]

I ran into the same problem on threadripper 1900X. I was using cpu type
"host-passthough" and it crashed. I fixed the crash by disabling the MSR
with

kvm.ignore_msrs=1

as describe in https://forum.level1techs.com/t/windows-10-1803-as-guest-
with-qemu-kvm-bsod-under-install/127425/10

-- 
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https://bugs.launchpad.net/bugs/1778966

Title:
  Windows 1803 and later crashes on KVM

Status in QEMU:
  New

Bug description:
  For a bionic host, using the current public kvm modules, KVM is not
  capable of booting a WindowsInsider or msdn Windows 1803 Windows
  Server iso. In snstalling from an ISO from a started windows 2016
  guest results in an unbootable and unrepairable guest.

  The hardware is a threadripper 1920x with 32GB of main memory, disk
  mydigital BPX SSD and WD based 4 column RAID 5 via mdadm.

To manage notifications about this bug go to:
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[Bug 1847861] Re: Guest stuttering under high disk IO (virtio)

[Emanuele Faranda]

You can find my libvirt XML attached. Here is the full qemu command
(taken from the ps output):

/usr/bin/qemu-system-x86_64 -name guest=win10,debug-threads=on -S
-object
secret,id=masterKey0,format=raw,file=/var/lib/libvirt/qemu/domain-7-win10
/master-key.aes -machine pc-q35-3.1,accel=kvm,usb=off,vmport=off,dump-
guest-core=off -cpu host,topoext=on,hv-time,hv-relaxed,hv-vapic,hv-
spinlocks=0x1fff -drive
file=/usr/share/ovmf/x64/OVMF_CODE.fd,if=pflash,format=raw,unit=0,readonly=on
-drive
file=/var/lib/libvirt/qemu/nvram/win10_VARS.fd,if=pflash,format=raw,unit=1
-m 8192 -overcommit mem-lock=off -smp 16,sockets=1,cores=8,threads=2
-object iothread,id=iothread1 -mem-prealloc -mem-path
/dev/hugepages/libvirt/qemu/7-win10 -numa
node,nodeid=0,cpus=0-7,mem=4096 -numa node,nodeid=1,cpus=8-15,mem=4096
-uuid d1c03f35-3846-4b76-a139-b798b497b95c -display none -no-user-config
-nodefaults -chardev socket,id=charmonitor,fd=34,server,nowait -mon
chardev=charmonitor,id=monitor,mode=control -rtc
base=localtime,driftfix=slew -global kvm-pit.lost_tick_policy=delay -no-
hpet -no-shutdown -global ICH9-LPC.disable_s3=1 -global
ICH9-LPC.disable_s4=1 -boot strict=on -device pcie-root-
port,port=0x10,chassis=1,id=pci.1,bus=pcie.0,multifunction=on,addr=0x2
-device pcie-root-
port,port=0x11,chassis=2,id=pci.2,bus=pcie.0,addr=0x2.0x1 -device pcie-
root-port,port=0x12,chassis=3,id=pci.3,bus=pcie.0,addr=0x2.0x2 -device
pcie-root-port,port=0x13,chassis=4,id=pci.4,bus=pcie.0,addr=0x2.0x3
-device pcie-root-
port,port=0x14,chassis=5,id=pci.5,bus=pcie.0,addr=0x2.0x4 -device pcie-
root-port,port=0x15,chassis=6,id=pci.6,bus=pcie.0,addr=0x2.0x5 -device
pcie-root-port,port=0x16,chassis=7,id=pci.7,bus=pcie.0,addr=0x2.0x6
-device pcie-root-
port,port=0x17,chassis=8,id=pci.8,bus=pcie.0,addr=0x2.0x7 -device pcie-
root-
port,port=0x18,chassis=9,id=pci.9,bus=pcie.0,multifunction=on,addr=0x3
-device pcie-root-
port,port=0x19,chassis=10,id=pci.10,bus=pcie.0,addr=0x3.0x1 -device
pcie-pci-bridge,id=pci.11,bus=pci.3,addr=0x0 -device qemu-
xhci,p2=15,p3=15,id=usb,bus=pci.2,addr=0x0 -device
lsi,id=scsi0,bus=pci.11,addr=0x1 -drive
file=/dev/nvme0n1p3,format=raw,if=none,id=drive-virtio-
disk0,cache=none,aio=threads -device virtio-blk-
pci,scsi=off,bus=pci.8,addr=0x0,drive=drive-virtio-disk0,id=virtio-
disk0,bootindex=1,write-cache=on -drive if=none,id=drive-
sata0-0-0,readonly=on -device ide-cd,bus=ide.0,drive=drive-
sata0-0-0,id=sata0-0-0 -netdev tap,fd=37,id=hostnet0,vhost=on,vhostfd=38
-device virtio-net-
pci,netdev=hostnet0,id=net0,mac=52:54:00:7c:10:fc,bus=pci.1,addr=0x0
-chardev pty,id=charserial0 -device isa-
serial,chardev=charserial0,id=serial0 -chardev
spicevmc,id=charredir0,name=usbredir -device usb-
redir,chardev=charredir0,id=redir0,bus=usb.0,port=2 -chardev
spicevmc,id=charredir1,name=usbredir -device usb-
redir,chardev=charredir1,id=redir1,bus=usb.0,port=3 -device vfio-
pci,host=41:00.0,id=hostdev0,bus=pci.4,addr=0x0 -device vfio-
pci,host=41:00.1,id=hostdev1,bus=pci.5,addr=0x0 -device virtio-balloon-
pci,id=balloon0,bus=pci.6,addr=0x0 -object input-
linux,id=mouse1,evdev=/dev/input/by-path/pci-:42:00.3-usb-0:3:1.0
-event-mouse -object input-linux,id=kbd1,evdev=/dev/input/by-
path/pci-:42:00.3-usb-0:4:1.0-event-kbd,grab_all=on,repeat=on
-sandbox
on,obsolete=deny,elevateprivileges=deny,spawn=deny,resourcecontrol=deny
-msg timestamp=on

Additional note: the performance of fio in the linux host is about 2x
the one on the guest:

fio --randrepeat=1 --ioengine=libaio --direct=1 --gtod_reduce=1
--name=test --filename=/dev/nvme0n1 --bs=4k --iodepth=64 --size=512M
--readwrite=randread

read: IOPS=279k, BW=1092MiB/s (1145MB/s)(512MiB/469msec)

** Attachment added: "win10.xml"
   
https://bugs.launchpad.net/qemu/+bug/1847861/+attachment/5296726/+files/win10.xml

-- 
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1847861

Title:
  Guest stuttering under high disk IO (virtio)

Status in QEMU:
  New

Bug description:
  Performing io intensive tasks on virtualized Windows causes the system
  to visually stutter. I can often reproduce the problem by running fio
  on windows:

  fio --randrepeat=1 --ioengine=windowsaio --direct=1 --gtod_reduce=1
  --name=test --filename=\\.\PhysicalDrive0 --bs=4k --iodepth=128
  --size=4G --readwrite=randread

  While the fio command is running, moving the mouse pointer will be be
  laggy. The stuttering does not appear with iodepth <= 32 . The
  stuttering also manifests while playing games, the music and video
  pauses for a fraction of second in a playable but disturbing way.

  Here are my system specs:

  Host OS: archlinux
  Guest OS: Windows 10 Enterprise
  qemu version: qemu-git 8:v4.1.0.r1378.g98b2e3c9ab-1 (from AUR, compiled with 
-march=native)
  CPU: AMD Ryzen Threadripper 1900X 8-Core Processor
  Huge Pages: vm.nr_hugepages=4128
  Disk: nvme type=raw, io=threads bus=virtio
  GPU (passthrough): Radeon RX 570

  

Re: [PATCH 0/3] Add CPU model for intel processor Cooper Lake

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/1570863638-22272-1-git-send-email-cathy.zh...@intel.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PATCH 0/3] Add CPU model for intel processor Cooper Lake
Type: series
Message-id: 1570863638-22272-1-git-send-email-cathy.zh...@intel.com

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
c16a74f i386: Add new CPU model Cooperlake
c70bdd0 i386: Add macro for stibp
073abd3 i386: Add MSR feature bit for MDS-NO

=== OUTPUT BEGIN ===
1/3 Checking commit 073abd367191 (i386: Add MSR feature bit for MDS-NO)
2/3 Checking commit c70bdd0665f0 (i386: Add macro for stibp)
WARNING: line over 80 characters
#23: FILE: target/i386/cpu.h:720:
+#define CPUID_7_0_EDX_STIBP (1U << 27) /* Single Thread Indirect Branch 
Predictors */

total: 0 errors, 1 warnings, 7 lines checked

Patch 2/3 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/3 Checking commit c16a74f138e1 (i386: Add new CPU model Cooperlake)
ERROR: trailing whitespace
#52: FILE: target/i386/cpu.c:2644:
+CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | $

ERROR: trailing whitespace
#61: FILE: target/i386/cpu.c:2653:
+CPUID_7_0_EDX_SPEC_CTRL_SSBD | CPUID_7_0_EDX_ARCH_CAPABILITIES, $

WARNING: Block comments use a leading /* on a separate line
#67: FILE: target/i386/cpu.c:2659:
+/* Missing: XSAVES (not supported by some Linux versions,

WARNING: Block comments should align the * on each line
#68: FILE: target/i386/cpu.c:2660:
+/* Missing: XSAVES (not supported by some Linux versions,
+* including v4.1 to v4.12).

total: 2 errors, 2 warnings, 65 lines checked

Patch 3/3 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/1570863638-22272-1-git-send-email-cathy.zh...@intel.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: [RFC v5 009/126] 9pfs: well form error hint helpers

[Greg Kurz]

On Fri, 11 Oct 2019 19:03:55 +0300
Vladimir Sementsov-Ogievskiy  wrote:

> Make error_append_security_model_hint and
> error_append_socket_sockfd_hint hint append helpers well formed:
> rename errp to errp_in, as it is IN-parameter here (which is unusual
> for errp).
> 
> Signed-off-by: Vladimir Sementsov-Ogievskiy 
> ---

Acked-by: Greg Kurz 

>  hw/9pfs/9p-local.c | 4 ++--
>  hw/9pfs/9p-proxy.c | 5 +++--
>  2 files changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/9pfs/9p-local.c b/hw/9pfs/9p-local.c
> index 08e673a79c..35635e7e7e 100644
> --- a/hw/9pfs/9p-local.c
> +++ b/hw/9pfs/9p-local.c
> @@ -1469,9 +1469,9 @@ static void local_cleanup(FsContext *ctx)
>  g_free(data);
>  }
>  
> -static void error_append_security_model_hint(Error **errp)
> +static void error_append_security_model_hint(Error **errp_in)
>  {
> -error_append_hint(errp, "Valid options are: security_model="
> +error_append_hint(errp_in, "Valid options are: security_model="
>"[passthrough|mapped-xattr|mapped-file|none]\n");
>  }
>  
> diff --git a/hw/9pfs/9p-proxy.c b/hw/9pfs/9p-proxy.c
> index 57a8c1c808..0cea8b19fa 100644
> --- a/hw/9pfs/9p-proxy.c
> +++ b/hw/9pfs/9p-proxy.c
> @@ -1114,9 +1114,10 @@ static int connect_namedsocket(const char *path, Error 
> **errp)
>  return sockfd;
>  }
>  
> -static void error_append_socket_sockfd_hint(Error **errp)
> +static void error_append_socket_sockfd_hint(Error **errp_in)
>  {
> -error_append_hint(errp, "Either specify socket=/some/path where 
> /some/path"
> +error_append_hint(errp_in,
> +  "Either specify socket=/some/path where /some/path"
>" points to a listening AF_UNIX socket or sock_fd=fd"
>" where fd is a file descriptor to a connected AF_UNIX"
>" socket\n");

Re: [Qemu-devel] [PATCH v29 8/8] target/avr: Add tests

[Pavel Dovgalyuk]

On 12.10.2019 10:17, Philippe Mathieu-Daudé wrote:

Hi Pavel,

On 8/27/19 11:29 AM, Pavel Dovgalyuk wrote:

From: Alex Bennée [mailto:alex.ben...@linaro.org]
Richard Henderson  writes:


On 8/26/19 2:23 AM, Alex Bennée wrote:
Are there any compilers available so we can add the multiarch 
tests to "check-tcg"?


Debian has a gcc-avr package.


Looking at the bios "bytes" it should be easy enough to do a simple
serial based test. We can add it after it's merged though... is it 
ready

to go yet?


I tried running this series with ASCIITable example from Arduino IDE.
Everything worked and I've got an ASCII table in the console.


Does that mean we can add your Tested-by tag?



Right.


Pavel Dovgalyuk

Re: [Qemu-devel] [PULL 12/12] qemu-ga: Convert invocation documentation to rST

[Eduardo Habkost]

On Thu, Sep 19, 2019 at 04:39:00PM +0100, Peter Maydell wrote:
> On Thu, 19 Sep 2019 at 16:37, Eric Blake  wrote:
> >
> > On 9/19/19 10:22 AM, Peter Maydell wrote:
> >
> > > Alex looked at this and suggests the problem is probably because
> > > you're doing an in-tree build.
> >
> > Bingo.  I thought we wanted to get rid of that, though.  What's the
> > status on forcing out-of-tree builds?  (I'll adapt, but only once
> > patches are in that force me to).
> 
> I think the general consensus was that it would probably
> be a good idea, but nobody's actually written any code :-)
> (Among other things, various bits of CI infra, probably
> the tests/vm code, etc, need updating to not try to do
> an in-tree build.)

We have another issue introduced by this patch and not fixed yet,
caused by this sphinx-build bug:
https://github.com/sphinx-doc/sphinx/issues/2946

We're triggering that bug because the interop/index.html and
interop/qemu-ga.8 rules are using the same doctree cache
directory.

-- 
Eduardo

sphinx-build parallel build failures (was Re: [PATCH v3] target/i386: Add Snowridge-v2 (no MPX) CPU model)

[Eduardo Habkost]

On Sat, Oct 12, 2019 at 07:40:30PM +0800, Xiaoyao Li wrote:
> On Sat, 2019-10-12 at 01:56 -0700, no-re...@patchew.org wrote:
> > Patchew URL: 
> > https://patchew.org/QEMU/20191012024748.127135-1-xiaoyao...@intel.com/
> > 
> > 
> > 
> > Hi,
> > 
> > This series failed the docker-mingw@fedora build test. Please find the 
> > testing
> > commands and
> > their output below. If you have Docker installed, you can probably reproduce
> > it
> > locally.
> > 
> > === TEST SCRIPT BEGIN ===
> > #! /bin/bash
> > export ARCH=x86_64
> > make docker-image-fedora V=1 NETWORK=1
> > time make docker-test-mingw@fedora J=14 NETWORK=1
> > === TEST SCRIPT END ===
> > 
> >   CC  stubs/machine-init-done.o
> >   CC  stubs/migr-blocker.o
> >   CC  stubs/change-state-handler.o
> > make: *** [Makefile:994: docs/interop/index.html] Error 2
> > make: *** Waiting for unfinished jobs

This looks like the sphinx-build parallel build failures I am
also seeing in my builds:
https://github.com/sphinx-doc/sphinx/issues/2946


> > Traceback (most recent call last):
> >   File "./tests/docker/docker.py", line 662, in 
> 
> Seems something wrong with the python script not this patch?
> 
> > ---
> > raise CalledProcessError(retcode, cmd)
> > subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', '
> > --label', 'com.qemu.instance.uuid=afcfcefa439c40f9ad532249a5058f20', '-u',
> > '1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 
> > 'TARGET_LIST=',
> > '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', 
> > '-e', 
> > 'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v',
> > '/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v',
> > '/var/tmp/patchew-tester-tmp-rfbm0qix/src/docker-src.2019-10-12-
> > 04.54.38.19439:/var/tmp/qemu:z,ro', 'qemu:fedora', '/var/tmp/qemu/run', 
> > 'test-
> > mingw']' returned non-zero exit status 2.
> > filter=--filter=label=com.qemu.instance.uuid=afcfcefa439c40f9ad532249a5058f20
> > make[1]: *** [docker-run] Error 1
> > make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-rfbm0qix/src'
> > make: *** [docker-run-test-mingw@fedora] Error 2
> > 
> > real2m1.965s
> > user0m7.638s
> > 
> > 
> > The full log is available at
> > http://patchew.org/logs/20191012024748.127135-1-xiaoyao...@intel.com/testing.docker-mingw@fedora/?type=message.
> > ---
> > Email generated automatically by Patchew [https://patchew.org/].
> > Please send your feedback to patchew-de...@redhat.com
> 

-- 
Eduardo

Re: [PATCH] MAINTAINERS: Add a TILE-Gx section

[Aleksandar Markovic]

12.10.2019. 09.12, "Philippe Mathieu-Daudé"  је
написао/ла:
>
> The TILE-Gx architecture was missing its section, add it.
>
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  MAINTAINERS | 5 +
>  1 file changed, 5 insertions(+)
>

It is certainly good that there is a maintainer for each QEMU component.
But:

- is Chen Gang available and willing to assume the role?

- sadly, tilegx arch support was recently removed from kernel upstream.
That does not mean (in my understanding) automatic removal from QEMU, but
certainly raises some eyebrows. Should we continue supporting tilegx?
Isthete any feedback from users, or the company that owns tilegx?

Sincerely,
Aleksandar

> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3ca814850e..a3be0a4a31 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -299,6 +299,11 @@ F: hw/sparc64/
>  F: include/hw/sparc/sparc64.h
>  F: disas/sparc.c
>
> +TILE-Gx CPUs
> +M: Chen Gang 
> +S: Maintained
> +F: target/tilegx/
> +
>  UniCore32 TCG CPUs
>  M: Guan Xuetao 
>  S: Maintained
> --
> 2.21.0
>
>

Re: [Qemu-devel] [PATCH v1 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file

[Aleksandar Markovic]

12.10.2019. 09.31, "Philippe Mathieu-Daudé"  је
написао/ла:
>
> Hi Sarah,
>
>
> On 5/10/19 1:17 PM, Sarah Harris wrote:
>>
>> Hi Richard,
>>
>> Having discussed with my colleagues, we don't have the resources to
maintain this.
>> If you wanted to take up Michael's offer then I'm happy to respond to
queries and provide minor fixes.
>> Otherwise, we will make our repository publicly available in the near
future for anyone who wants to use it.
>
>
> Would you agree to be listed as reviewer for AVR (Michael being the
maintainer)?
>

I support this idea, and hopefully Sarah agrees. Reviewer role typically
require mucj less tome resources.

>   M: Mail patches to: FullName 
>  Maintainers are looking after a certain area and must be CCed on
>  patches. They are considered the main contact point.
>   R: Designated reviewer: FullName 
>  These reviewers should be CCed on patches.
>  Reviewers are familiar with the subject matter and provide feedback
>  even though they are not maintainers.
>
>
>> Kind regards,
>> Sarah Harris
>>
>> On Sun, 5 May 2019 09:10:00 -0700
>> Michael Rolnik  wrote:
>>
>>> Hi Richard.
>>>
>>> I can maintain it
>>>
>>> Sent from my cell phone, please ignore typos
>>>
>>> On Sun, May 5, 2019, 8:57 AM Richard Henderson <
richard.hender...@linaro.org>
>>> wrote:
>>>
 On 5/4/19 1:36 AM, Sarah Harris wrote:
>
> Signed-off-by: Sarah Harris 

 ...
>
>
> +AVR
> +M: Michael Rolnik 
> +S: Odd Fixes
> +F: target-avr/
> +F: hw/avr/
> +


 This is not how things work.  Michael wasn't up to maintaining the
code 2
 years
 ago; that's why it was never committed.

 You would need to maintain this yourself, and for more than "Odd
Fixes".


 r~

>>
>
>

[PATCH 1/3] i386: Add MSR feature bit for MDS-NO

[Cathy Zhang]

Define MSR_ARCH_CAP_MDS_NO in the IA32_ARCH_CAPABILITIES MSR to allow
CPU models to report the feature when host supports it.

Signed-off-by: Cathy Zhang 
---
 target/i386/cpu.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index eaa5395..e757149 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -777,6 +777,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
 #define MSR_ARCH_CAP_RSBA   (1U << 2)
 #define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3)
 #define MSR_ARCH_CAP_SSB_NO (1U << 4)
+#define MSR_ARCH_CAP_MDS_NO (1U << 5)
 
 #define MSR_CORE_CAP_SPLIT_LOCK_DETECT  (1U << 5)
 
-- 
1.8.3.1

[PATCH 2/3] i386: Add macro for stibp

[Cathy Zhang]

stibp feature is already added through the following commit.
https://github.com/qemu/qemu/commit/0e8916582991b9fd0b94850a8444b8b80d0a0955

Add a macro for it to allow CPU models report it when host supports.

Signed-off-by: Cathy Zhang 
---
 target/i386/cpu.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index e757149..c47bcb5 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -717,6 +717,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
 #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network 
Instructions */
 #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation 
Single Precision */
 #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */
+#define CPUID_7_0_EDX_STIBP (1U << 27) /* Single Thread Indirect Branch 
Predictors */
 #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29)  /*Arch Capabilities*/
 #define CPUID_7_0_EDX_CORE_CAPABILITY   (1U << 30)  /*Core Capability*/
 #define CPUID_7_0_EDX_SPEC_CTRL_SSBD  (1U << 31) /* Speculative Store Bypass 
Disable */
-- 
1.8.3.1

[PATCH 3/3] i386: Add new CPU model Cooperlake

[Cathy Zhang]

Cooper Lake is intel's successor to Cascade Lake, the new
CPU model inherits features from Cascadelake-Server, while
add one platform associated new feature: AVX512_BF16, and
STIBP for speculative execution.

Signed-off-by: Cathy Zhang 
---
 target/i386/cpu.c | 59 +++
 1 file changed, 59 insertions(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 44f1bbd..be86686 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2612,6 +2612,65 @@ static X86CPUDefinition builtin_x86_defs[] = {
 }
 },
 {
+.name = "Cooperlake",
+.level = 0xd,
+.vendor = CPUID_VENDOR_INTEL,
+.family = 6,
+.model = 85,
+.stepping = 10,
+.features[FEAT_1_EDX] =
+CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
+CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
+CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
+CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
+CPUID_DE | CPUID_FP87,
+.features[FEAT_1_ECX] =
+CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
+CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
+CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
+CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
+CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
+CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
+.features[FEAT_8000_0001_EDX] =
+CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
+CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
+.features[FEAT_8000_0001_ECX] =
+CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
+.features[FEAT_7_0_EBX] =
+CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
+CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
+CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
+CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
+CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB | 
+CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
+CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
+CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT,
+.features[FEAT_7_0_ECX] =
+CPUID_7_0_ECX_PKU |
+CPUID_7_0_ECX_AVX512VNNI,
+.features[FEAT_7_0_EDX] =
+CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_STIBP |
+CPUID_7_0_EDX_SPEC_CTRL_SSBD | CPUID_7_0_EDX_ARCH_CAPABILITIES, 
+.features[FEAT_ARCH_CAPABILITIES] =
+MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL |
+MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO,
+.features[FEAT_7_1_EAX] =
+CPUID_7_1_EAX_AVX512_BF16,
+/* Missing: XSAVES (not supported by some Linux versions,
+* including v4.1 to v4.12).
+* KVM doesn't yet expose any XSAVES state save component,
+* and the only one defined in Skylake (processor tracing)
+* probably will block migration anyway.
+*/
+.features[FEAT_XSAVE] =
+CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
+CPUID_XSAVE_XGETBV1,
+.features[FEAT_6_EAX] =
+CPUID_6_EAX_ARAT,
+.xlevel = 0x8008,
+.model_id = "Intel Xeon Processor (Cooperlake)",
+},
+{
 .name = "Icelake-Client",
 .level = 0xd,
 .vendor = CPUID_VENDOR_INTEL,
-- 
1.8.3.1

[PATCH 0/3] Add CPU model for intel processor Cooper Lake

[Cathy Zhang]

This patchset is to add CPU model for intel processor Cooper Lake. It 
will inherit features from the existing CPU model Cascadelake-Server, 
meanwhile, add the platform associated new instruction and feature
for speculative execution which the host supports. There are associated
feature bit and macro defined here as needed. 

Cathy Zhang (3):
  i386: Add MSR feature bit for MDS-NO
  i386: Add macro for stibp
  i386: Add new CPU model Cooperlake

 target/i386/cpu.c | 59 +++
 target/i386/cpu.h |  2 ++
 2 files changed, 61 insertions(+)

-- 
1.8.3.1

Re: [PATCH] MAINTAINERS: Replace tab indent by spaces in the Status description

[Aleksandar Markovic]

12.10.2019. 09.16, "Philippe Mathieu-Daudé"  је
написао/ла:
>
> The Status description has a mix of tabs and spaces and displays
> unaligned. Unify using spaces.
>
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  MAINTAINERS | 18 +-
>  1 file changed, 9 insertions(+), 9 deletions(-)
>

Reviewed-by: Aleksandar Markovic 

> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3ca814850e..b9093e4dac 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -24,15 +24,15 @@ Descriptions of section entries:
> Q: Patchwork web based patch tracking system site
> T: SCM tree type and location.  Type is one of: git, hg, quilt,
stgit.
> S: Status, one of the following:
> -  Supported:   Someone is actually paid to look after this.
> -  Maintained:  Someone actually looks after it.
> -  Odd Fixes:   It has a maintainer but they don't have time to do
> -   much other than throw the odd patch in. See below.
> -  Orphan:  No current maintainer [but maybe you could take
the
> -   role as you write your new code].
> -  Obsolete:Old code. Something tagged obsolete generally
means
> -   it has been replaced by a better system and you
> -   should be using that.
> +  Supported:   Someone is actually paid to look after this.
> +  Maintained:  Someone actually looks after it.
> +  Odd Fixes:   It has a maintainer but they don't have time to do
> +   much other than throw the odd patch in. See below.
> +  Orphan:  No current maintainer [but maybe you could take
the
> +   role as you write your new code].
> +  Obsolete:Old code. Something tagged obsolete generally
means
> +   it has been replaced by a better system and you
> +   should be using that.
> F: Files and directories with wildcard patterns.
>A trailing slash includes all files and subdirectory files.
>F:   drivers/net/all files in and below drivers/net
> --
> 2.21.0
>
>

Re: [PATCH v3] target/i386: Add Snowridge-v2 (no MPX) CPU model

[Xiaoyao Li]

On Sat, 2019-10-12 at 01:56 -0700, no-re...@patchew.org wrote:
> Patchew URL: 
> https://patchew.org/QEMU/20191012024748.127135-1-xiaoyao...@intel.com/
> 
> 
> 
> Hi,
> 
> This series failed the docker-mingw@fedora build test. Please find the testing
> commands and
> their output below. If you have Docker installed, you can probably reproduce
> it
> locally.
> 
> === TEST SCRIPT BEGIN ===
> #! /bin/bash
> export ARCH=x86_64
> make docker-image-fedora V=1 NETWORK=1
> time make docker-test-mingw@fedora J=14 NETWORK=1
> === TEST SCRIPT END ===
> 
>   CC  stubs/machine-init-done.o
>   CC  stubs/migr-blocker.o
>   CC  stubs/change-state-handler.o
> make: *** [Makefile:994: docs/interop/index.html] Error 2
> make: *** Waiting for unfinished jobs
> Traceback (most recent call last):
>   File "./tests/docker/docker.py", line 662, in 

Seems something wrong with the python script not this patch?

> ---
> raise CalledProcessError(retcode, cmd)
> subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', '
> --label', 'com.qemu.instance.uuid=afcfcefa439c40f9ad532249a5058f20', '-u',
> '1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=',
> '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', 
> '-e', 
> 'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v',
> '/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v',
> '/var/tmp/patchew-tester-tmp-rfbm0qix/src/docker-src.2019-10-12-
> 04.54.38.19439:/var/tmp/qemu:z,ro', 'qemu:fedora', '/var/tmp/qemu/run', 'test-
> mingw']' returned non-zero exit status 2.
> filter=--filter=label=com.qemu.instance.uuid=afcfcefa439c40f9ad532249a5058f20
> make[1]: *** [docker-run] Error 1
> make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-rfbm0qix/src'
> make: *** [docker-run-test-mingw@fedora] Error 2
> 
> real2m1.965s
> user0m7.638s
> 
> 
> The full log is available at
> http://patchew.org/logs/20191012024748.127135-1-xiaoyao...@intel.com/testing.docker-mingw@fedora/?type=message.
> ---
> Email generated automatically by Patchew [https://patchew.org/].
> Please send your feedback to patchew-de...@redhat.com

[PULL 0/1] qemu-openbios queue 20191012

[Mark Cave-Ayland]

The following changes since commit 98b2e3c9ab3abfe476a2b02f8f51813edb90e72d:

  Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into 
staging (2019-10-08 16:08:35 +0100)

are available in the Git repository at:

  git://github.com/mcayland/qemu.git tags/qemu-openbios-20191012

for you to fetch changes up to 25bf1811cffc2772fedaa9345026cb5375ae11b4:

  Update OpenBIOS images to f28e16f9 built from submodule. (2019-10-12 10:18:18 
+0100)


qemu-openbios queue


Mark Cave-Ayland (1):
  Update OpenBIOS images to f28e16f9 built from submodule.

 pc-bios/openbios-ppc | Bin 767256 -> 696908 bytes
 pc-bios/openbios-sparc32 | Bin 382048 -> 382048 bytes
 pc-bios/openbios-sparc64 | Bin 1593408 -> 1593408 bytes
 roms/openbios|   2 +-
 4 files changed, 1 insertion(+), 1 deletion(-)

[PATCH 1/2] arm/smmuv3: use helper to be more easier to understand when using abstract QOM parent functions.

[Mao Zhongyi]

Philippe introduced a series of helpers to make the
device class_init() easier to understand when a
device class change the parent hooks, device smmuv3
missed helper, so convert it.

Cc: eric.au...@redhat.com
Cc: peter.mayd...@linaro.org
Cc: f4...@amsat.org
Signed-off-by: Mao Zhongyi 
---
 hw/arm/smmuv3.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index e2fbb8357e..65b6b158e5 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1465,8 +1465,7 @@ static void smmuv3_class_init(ObjectClass *klass, void 
*data)
 
 dc->vmsd = _smmuv3;
 device_class_set_parent_reset(dc, smmu_reset, >parent_reset);
-c->parent_realize = dc->realize;
-dc->realize = smmu_realize;
+device_class_set_parent_realize(dc, smmu_realize, >parent_realize);
 }
 
 static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu,
-- 
2.17.1

[PATCH 2/2] isa/pc87312: use helper to be more easier to understand when using abstract QOM parent functions.

[Mao Zhongyi]

Philippe introduced a series of helpers to make the
device class_init() easier to understand when a
device class change the parent hooks, device pc87312
missed helper, so convert it.

Cc: hpous...@reactos.org
Cc: f4...@amsat.org
Signed-off-by: Mao Zhongyi 
---
 hw/isa/pc87312.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index b9bd57471e..13c1c43d2f 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -338,8 +338,7 @@ static void pc87312_class_init(ObjectClass *klass, void 
*data)
 DeviceClass *dc = DEVICE_CLASS(klass);
 ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
 
-sc->parent_realize = dc->realize;
-dc->realize = pc87312_realize;
+device_class_set_parent_realize(dc, pc87312_realize, >parent_realize);
 dc->reset = pc87312_reset;
 dc->vmsd = _pc87312;
 dc->props = pc87312_properties;
-- 
2.17.1

[PATCH 0/2] use helper when using abstract QOM parent functions

[Mao Zhongyi]

Philippe introduced a series of helpers to make the
device class_init() easier to understand when a device
class change the parent hooks, some devices in the
source tree missed helper, so convert it.

Cc: eric.au...@redhat.com
Cc: peter.mayd...@linaro.org
Cc: hpous...@reactos.org
Cc: f4...@amsat.org

Mao Zhongyi (2):
  arm/smmuv3: use helpers to be more easier to understand when using
abstract QOM parent functions.
  isa/pc87312: use helpers to be more easier to understand when using
abstract QOM parent functions.

 hw/arm/smmuv3.c  | 3 +--
 hw/isa/pc87312.c | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

-- 
2.17.1

Re: [Qemu-devel] [PATCH v2 0/2] refine memory_device_get_free_addr

[Wei Yang]

On Sat, Sep 14, 2019 at 03:40:41PM -0400, Michael S. Tsirkin wrote:
>On Fri, Sep 13, 2019 at 11:47:46PM +, Wei Yang wrote:
>> On Tue, Jul 30, 2019 at 08:37:38AM +0800, Wei Yang wrote:
>> >When we iterate the memory-device list to get the available range, it is not
>> >necessary to iterate the whole list.
>> >
>> >1) no more overlap for hinted range if tmp exceed it
>> >
>> >v2:
>> >   * remove #2 as suggested by Igor and David
>> >   * add some comment to inform address assignment stay the same as before
>> > this change 
>> >
>> >Wei Yang (2):
>> >  memory-device: not necessary to use goto for the last check
>> >  memory-device: break the loop if tmp exceed the hinted range
>> >
>> > hw/mem/memory-device.c | 3 ++-
>> > 1 file changed, 2 insertions(+), 1 deletion(-)
>> >
>> 
>> Would someone take this patch set?
>
>yes looks good to me too.
>Eduardo?
>

Hmm... I don't see this any where. May I ask the status?

>> >-- 
>> >2.17.1
>> >
>> 
>> -- 
>> Wei Yang
>> Help you, Help me

-- 
Wei Yang
Help you, Help me

Re: [PATCH v3] target/i386: Add Snowridge-v2 (no MPX) CPU model

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/20191012024748.127135-1-xiaoyao...@intel.com/



Hi,

This series failed the docker-mingw@fedora build test. Please find the testing 
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#! /bin/bash
export ARCH=x86_64
make docker-image-fedora V=1 NETWORK=1
time make docker-test-mingw@fedora J=14 NETWORK=1
=== TEST SCRIPT END ===

  CC  stubs/machine-init-done.o
  CC  stubs/migr-blocker.o
  CC  stubs/change-state-handler.o
make: *** [Makefile:994: docs/interop/index.html] Error 2
make: *** Waiting for unfinished jobs
Traceback (most recent call last):
  File "./tests/docker/docker.py", line 662, in 
---
raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', 
'--label', 'com.qemu.instance.uuid=afcfcefa439c40f9ad532249a5058f20', '-u', 
'1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', 
'-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 
'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', 
'/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', 
'/var/tmp/patchew-tester-tmp-rfbm0qix/src/docker-src.2019-10-12-04.54.38.19439:/var/tmp/qemu:z,ro',
 'qemu:fedora', '/var/tmp/qemu/run', 'test-mingw']' returned non-zero exit 
status 2.
filter=--filter=label=com.qemu.instance.uuid=afcfcefa439c40f9ad532249a5058f20
make[1]: *** [docker-run] Error 1
make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-rfbm0qix/src'
make: *** [docker-run-test-mingw@fedora] Error 2

real2m1.965s
user0m7.638s


The full log is available at
http://patchew.org/logs/20191012024748.127135-1-xiaoyao...@intel.com/testing.docker-mingw@fedora/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: [Qemu-devel] [PATCH v1 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file

[Philippe Mathieu-Daudé]

Hi Sarah,

On 5/10/19 1:17 PM, Sarah Harris wrote:

Hi Richard,

Having discussed with my colleagues, we don't have the resources to maintain 
this.
If you wanted to take up Michael's offer then I'm happy to respond to queries 
and provide minor fixes.
Otherwise, we will make our repository publicly available in the near future 
for anyone who wants to use it.


Would you agree to be listed as reviewer for AVR (Michael being the 
maintainer)?


  M: Mail patches to: FullName 
 Maintainers are looking after a certain area and must be CCed on
 patches. They are considered the main contact point.
  R: Designated reviewer: FullName 
 These reviewers should be CCed on patches.
 Reviewers are familiar with the subject matter and provide feedback
 even though they are not maintainers.


Kind regards,
Sarah Harris

On Sun, 5 May 2019 09:10:00 -0700
Michael Rolnik  wrote:


Hi Richard.

I can maintain it

Sent from my cell phone, please ignore typos

On Sun, May 5, 2019, 8:57 AM Richard Henderson 
wrote:


On 5/4/19 1:36 AM, Sarah Harris wrote:

Signed-off-by: Sarah Harris 

...


+AVR
+M: Michael Rolnik 
+S: Odd Fixes
+F: target-avr/
+F: hw/avr/
+


This is not how things work.  Michael wasn't up to maintaining the code 2
years
ago; that's why it was never committed.

You would need to maintain this yourself, and for more than "Odd Fixes".


r~

Re: [Qemu-devel] [PATCH v29 1/8] target/avr: Add outward facing interfaces and core CPU logic

[Philippe Mathieu-Daudé]

On 8/27/19 12:59 PM, Sarah Harris wrote:

I don't mind if you want to drop my signed-off-by for commits that were based 
on Michael's work.
You probably want to keep my sign-off for the USART/timer commit though as that 
was new code.


Linux offers a Co-developed-by, some QEMU developers started to use it.

  Co-developed-by: states that the patch was co-created by multiple
  developers; it is a used to give attribution to co-authors (in
  addition to the author attributed by the From: tag) when several
  people work on a single patch. Since Co-developed-by: denotes
  authorship, every Co-developed-by: must be immediately followed
  by a Signed-off-by: of the associated co-author. Standard sign-off
  procedure applies, i.e. the ordering of Signed-off-by: tags should
  reflect the chronological history of the patch insofar as possible,
  regardless of whether the author is attributed via From: or
  Co-developed-by:. Notably, the last Signed-off-by: must always be
  that of the developer submitting the patch.

https://www.kernel.org/doc/html/latest/process/submitting-patches.html#when-to-use-acked-by-cc-and-co-developed-by



Regards,
Sarah Harris

On Mon, 26 Aug 2019 10:00:51 +0200
Thomas Huth  wrote:


On 26/08/2019 09.53, Michael Rolnik wrote:

the commit was originally mine. Then Sarah rearranged it, signed and
submitted. She no longer maintains it. So' I believe I can remove her sob.
what do you think?.


Fine for me, but maybe you should mention her in the patch description
if she made significant changes?

Sarah, what do you think?

Anyway, if the patch is originally from you, you should also remove the
"From: Sarah ..." line from the patch. For this, you likely have to
change the author of the patch in your git tree with "git commit --amend
--reset-author".

  Thomas

Re: [Qemu-devel] [PATCH v29 8/8] target/avr: Add tests

[Philippe Mathieu-Daudé]

Hi Pavel,

On 8/27/19 11:29 AM, Pavel Dovgalyuk wrote:

From: Alex Bennée [mailto:alex.ben...@linaro.org]
Richard Henderson  writes:


On 8/26/19 2:23 AM, Alex Bennée wrote:

Are there any compilers available so we can add the multiarch tests to 
"check-tcg"?


Debian has a gcc-avr package.


Looking at the bios "bytes" it should be easy enough to do a simple
serial based test. We can add it after it's merged though... is it ready
to go yet?


I tried running this series with ASCIITable example from Arduino IDE.
Everything worked and I've got an ASCII table in the console.


Does that mean we can add your Tested-by tag?

[PATCH] MAINTAINERS: Replace tab indent by spaces in the Status description

[Philippe Mathieu-Daudé]

The Status description has a mix of tabs and spaces and displays
unaligned. Unify using spaces.

Signed-off-by: Philippe Mathieu-Daudé 
---
 MAINTAINERS | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 3ca814850e..b9093e4dac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -24,15 +24,15 @@ Descriptions of section entries:
Q: Patchwork web based patch tracking system site
T: SCM tree type and location.  Type is one of: git, hg, quilt, stgit.
S: Status, one of the following:
-  Supported:   Someone is actually paid to look after this.
-  Maintained:  Someone actually looks after it.
-  Odd Fixes:   It has a maintainer but they don't have time to do
-   much other than throw the odd patch in. See below.
-  Orphan:  No current maintainer [but maybe you could take the
-   role as you write your new code].
-  Obsolete:Old code. Something tagged obsolete generally means
-   it has been replaced by a better system and you
-   should be using that.
+  Supported:   Someone is actually paid to look after this.
+  Maintained:  Someone actually looks after it.
+  Odd Fixes:   It has a maintainer but they don't have time to do
+   much other than throw the odd patch in. See below.
+  Orphan:  No current maintainer [but maybe you could take the
+   role as you write your new code].
+  Obsolete:Old code. Something tagged obsolete generally means
+   it has been replaced by a better system and you
+   should be using that.
F: Files and directories with wildcard patterns.
   A trailing slash includes all files and subdirectory files.
   F:   drivers/net/all files in and below drivers/net
-- 
2.21.0

Re: [RFC v5 124/126] target/tilegx/cpu.c: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:05 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  target/tilegx/cpu.c | 7 +++
  1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c
index 2b2a7ccc31..79bfe27856 100644
--- a/target/tilegx/cpu.c
+++ b/target/tilegx/cpu.c
@@ -81,13 +81,12 @@ static void tilegx_cpu_reset(CPUState *s)
  
  static void tilegx_cpu_realizefn(DeviceState *dev, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  CPUState *cs = CPU(dev);
  TileGXCPUClass *tcc = TILEGX_CPU_GET_CLASS(dev);
-Error *local_err = NULL;
  
-cpu_exec_realizefn(cs, _err);

-if (local_err != NULL) {
-error_propagate(errp, local_err);
+cpu_exec_realizefn(cs, errp);
+if (*errp) {
  return;
  }
  



Reviewed-by: Philippe Mathieu-Daudé 

[PATCH] MAINTAINERS: Add a TILE-Gx section

[Philippe Mathieu-Daudé]

The TILE-Gx architecture was missing its section, add it.

Signed-off-by: Philippe Mathieu-Daudé 
---
 MAINTAINERS | 5 +
 1 file changed, 5 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 3ca814850e..a3be0a4a31 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -299,6 +299,11 @@ F: hw/sparc64/
 F: include/hw/sparc/sparc64.h
 F: disas/sparc.c
 
+TILE-Gx CPUs
+M: Chen Gang 
+S: Maintained
+F: target/tilegx/
+
 UniCore32 TCG CPUs
 M: Guan Xuetao 
 S: Maintained
-- 
2.21.0

[PATCH 2/3] MAINTAINERS: Cc the qemu-...@nongnu.org for the ARM machines

[Philippe Mathieu-Daudé]

Not all ARM machines sections Cc the qemu-...@nongnu.org list,
fix this.

Signed-off-by: Philippe Mathieu-Daudé 
---
 MAINTAINERS | 5 +
 1 file changed, 5 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 47eae9fc46..65fbc6d7b4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -805,6 +805,7 @@ F: hw/arm/virt-acpi-build.c
 STM32F205
 M: Alistair Francis 
 M: Peter Maydell 
+L: qemu-...@nongnu.org
 S: Maintained
 F: hw/arm/stm32f205_soc.c
 F: hw/misc/stm32f2xx_syscfg.c
@@ -817,12 +818,14 @@ F: include/hw/*/stm32*.h
 Netduino 2
 M: Alistair Francis 
 M: Peter Maydell 
+L: qemu-...@nongnu.org
 S: Maintained
 F: hw/arm/netduino2.c
 
 SmartFusion2
 M: Subbaraya Sundeep 
 M: Peter Maydell 
+L: qemu-...@nongnu.org
 S: Maintained
 F: hw/arm/msf2-soc.c
 F: hw/misc/msf2-sysreg.c
@@ -836,6 +839,7 @@ F: include/hw/ssi/mss-spi.h
 Emcraft M2S-FG484
 M: Subbaraya Sundeep 
 M: Peter Maydell 
+L: qemu-...@nongnu.org
 S: Maintained
 F: hw/arm/msf2-som.c
 
@@ -1349,6 +1353,7 @@ T: git https://github.com/jnsnow/qemu.git ide
 
 OMAP
 M: Peter Maydell 
+L: qemu-...@nongnu.org
 S: Maintained
 F: hw/*/omap*
 F: include/hw/arm/omap.h
-- 
2.21.0

[PATCH 1/3] MAINTAINERS: Add hw/sd/ssi-sd.c in the SD section

[Philippe Mathieu-Daudé]

The hw/sd/ssi-sd.c file is orphean, add it to the SD section.

Signed-off-by: Philippe Mathieu-Daudé 
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 3ca814850e..47eae9fc46 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1445,6 +1445,7 @@ S: Odd Fixes
 F: include/hw/sd/sd*
 F: hw/sd/core.c
 F: hw/sd/sd*
+F: hw/sd/ssi-sd.c
 F: tests/sd*
 
 USB
-- 
2.21.0

[PATCH 3/3] MAINTAINERS: Move the OMAP section inside the ARM Machines one

[Philippe Mathieu-Daudé]

Add the Siemens SX1 (OMAP310) machines with the other ARM machines.

Signed-off-by: Philippe Mathieu-Daudé 
---
 MAINTAINERS | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 65fbc6d7b4..87afc1126a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -558,6 +558,13 @@ F: include/hw/arm/digic.h
 F: hw/*/digic*
 F: include/hw/*/digic*
 
+OMAP
+M: Peter Maydell 
+L: qemu-...@nongnu.org
+S: Maintained
+F: hw/*/omap*
+F: include/hw/arm/omap.h
+
 Gumstix
 M: Peter Maydell 
 R: Philippe Mathieu-Daudé 
@@ -1351,13 +1358,6 @@ F: include/hw/block/fdc.h
 F: tests/fdc-test.c
 T: git https://github.com/jnsnow/qemu.git ide
 
-OMAP
-M: Peter Maydell 
-L: qemu-...@nongnu.org
-S: Maintained
-F: hw/*/omap*
-F: include/hw/arm/omap.h
-
 IPack
 M: Alberto Garcia 
 S: Odd Fixes
-- 
2.21.0

[PATCH 0/3] MAINTAINERS: ARM & SD fixes

[Philippe Mathieu-Daudé]

Few fixes after looking at Vladimir's commit-per-subsystem.py script:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg651545.html

Philippe Mathieu-Daudé (3):
  MAINTAINERS: Add hw/sd/ssi-sd.c in the SD section
  MAINTAINERS: Cc the qemu-...@nongnu.org for the ARM machines
  MAINTAINERS: Move the OMAP section inside the ARM Machines one

 MAINTAINERS | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

-- 
2.21.0

Re: [RFC v5 121/126] hw/sd/ssi-sd.c: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:05 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  hw/sd/ssi-sd.c | 14 --
  1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index 91db069212..f42204d649 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -241,10 +241,10 @@ static const VMStateDescription vmstate_ssi_sd = {
  
  static void ssi_sd_realize(SSISlave *d, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  ssi_sd_state *s = FROM_SSI_SLAVE(ssi_sd_state, d);
  DeviceState *carddev;
  DriveInfo *dinfo;
-Error *err = NULL;
  
  qbus_create_inplace(>sdbus, sizeof(s->sdbus), TYPE_SD_BUS,

  DEVICE(d), "sd-bus");
@@ -254,12 +254,14 @@ static void ssi_sd_realize(SSISlave *d, Error **errp)
  dinfo = drive_get_next(IF_SD);
  carddev = qdev_create(BUS(>sdbus), TYPE_SD_CARD);
  if (dinfo) {
-qdev_prop_set_drive(carddev, "drive", blk_by_legacy_dinfo(dinfo), 
);
+qdev_prop_set_drive(carddev, "drive", blk_by_legacy_dinfo(dinfo),
+errp);


This fits 72 chars, can you keep it in the same line?


  }
-object_property_set_bool(OBJECT(carddev), true, "spi", );
-object_property_set_bool(OBJECT(carddev), true, "realized", );
-if (err) {
-error_setg(errp, "failed to init SD card: %s", error_get_pretty(err));
+object_property_set_bool(OBJECT(carddev), true, "spi", errp);
+object_property_set_bool(OBJECT(carddev), true, "realized", errp);
+if (*errp) {
+error_setg(errp, "failed to init SD card: %s",
+   error_get_pretty(*errp));


Ditto...


  return;
  }
  }



If possible please squash with "47/126 SD (Secure Card)"

Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 119/126] hw/core/bus.c: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:05 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  hw/core/bus.c | 15 +++
  1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/hw/core/bus.c b/hw/core/bus.c
index 7f3d2a3dbd..0a1e508963 100644
--- a/hw/core/bus.c
+++ b/hw/core/bus.c
@@ -146,14 +146,14 @@ static bool bus_get_realized(Object *obj, Error **errp)
  
  static void bus_set_realized(Object *obj, bool value, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  BusState *bus = BUS(obj);
  BusClass *bc = BUS_GET_CLASS(bus);
  BusChild *kid;
-Error *local_err = NULL;
  
  if (value && !bus->realized) {

  if (bc->realize) {
-bc->realize(bus, _err);
+bc->realize(bus, errp);
  }
  
  /* TODO: recursive realization */

@@ -161,18 +161,17 @@ static void bus_set_realized(Object *obj, bool value, 
Error **errp)
  QTAILQ_FOREACH(kid, >children, sibling) {
  DeviceState *dev = kid->child;
  object_property_set_bool(OBJECT(dev), false, "realized",
- _err);
-if (local_err != NULL) {
+ errp);


You can add it at the end of the previous line.

Regardless:
Reviewed-by: Philippe Mathieu-Daudé 


+if (*errp) {
  break;
  }
  }
-if (bc->unrealize && local_err == NULL) {
-bc->unrealize(bus, _err);
+if (bc->unrealize && *errp == NULL) {
+bc->unrealize(bus, errp);
  }
  }
  
-if (local_err != NULL) {

-error_propagate(errp, local_err);
+if (*errp) {
  return;
  }
  

Re: [RFC v5 085/126] Tracing: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:05 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  trace/qmp.c | 14 ++
  1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/trace/qmp.c b/trace/qmp.c
index 38246e1aa6..05335f2da4 100644
--- a/trace/qmp.c
+++ b/trace/qmp.c
@@ -70,7 +70,7 @@ TraceEventInfoList *qmp_trace_event_get_state(const char 
*name,
bool has_vcpu, int64_t vcpu,
Error **errp)
  {
-Error *err = NULL;
+ERRP_AUTO_PROPAGATE();
  TraceEventInfoList *events = NULL;
  TraceEventIter iter;
  TraceEvent *ev;
@@ -78,9 +78,8 @@ TraceEventInfoList *qmp_trace_event_get_state(const char 
*name,
  CPUState *cpu;
  
  /* Check provided vcpu */

-cpu = get_cpu(has_vcpu, vcpu, );
-if (err) {
-error_propagate(errp, err);
+cpu = get_cpu(has_vcpu, vcpu, errp);
+if (*errp) {
  return NULL;
  }
  
@@ -135,16 +134,15 @@ void qmp_trace_event_set_state(const char *name, bool enable,

 bool has_vcpu, int64_t vcpu,
 Error **errp)
  {
-Error *err = NULL;
+ERRP_AUTO_PROPAGATE();
  TraceEventIter iter;
  TraceEvent *ev;
  bool is_pattern = trace_event_is_pattern(name);
  CPUState *cpu;
  
  /* Check provided vcpu */

-cpu = get_cpu(has_vcpu, vcpu, );
-if (err) {
-error_propagate(errp, err);
+cpu = get_cpu(has_vcpu, vcpu, errp);
+if (*errp) {
  return;
  }
  



Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 084/126] SLIRP: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:05 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  net/slirp.c | 7 +++
  1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/net/slirp.c b/net/slirp.c
index c4334ee876..cbde9ba2a9 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -941,6 +941,7 @@ static ssize_t guestfwd_write(const void *buf, size_t len, 
void *chr)
  
  static int slirp_guestfwd(SlirpState *s, const char *config_str, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  /* TODO: IPv6 */
  struct in_addr server = { .s_addr = 0 };
  struct GuestFwd *fwd;
@@ -979,7 +980,6 @@ static int slirp_guestfwd(SlirpState *s, const char 
*config_str, Error **errp)
  return -1;
  }
  } else {
-Error *err = NULL;
  /*
   * FIXME: sure we want to support implicit
   * muxed monitors here?
@@ -993,9 +993,8 @@ static int slirp_guestfwd(SlirpState *s, const char 
*config_str, Error **errp)
  }
  
  fwd = g_new(struct GuestFwd, 1);

-qemu_chr_fe_init(>hd, chr, );
-if (err) {
-error_propagate(errp, err);
+qemu_chr_fe_init(>hd, chr, errp);
+if (*errp) {
  object_unparent(OBJECT(chr));
  g_free(fwd);
  return -1;



Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 075/126] Main loop: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:05 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  util/main-loop.c |  5 ++---
  vl.c | 14 ++
  2 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/util/main-loop.c b/util/main-loop.c
index e3eaa55866..fdd7f50fc8 100644
--- a/util/main-loop.c
+++ b/util/main-loop.c
@@ -145,9 +145,9 @@ static GArray *gpollfds;
  
  int qemu_init_main_loop(Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  int ret;
  GSource *src;
-Error *local_error = NULL;
  
  init_clocks(qemu_timer_notify_cb);
  
@@ -156,9 +156,8 @@ int qemu_init_main_loop(Error **errp)

  return ret;
  }
  
-qemu_aio_context = aio_context_new(_error);

+qemu_aio_context = aio_context_new(errp);
  if (!qemu_aio_context) {
-error_propagate(errp, local_error);
  return -EMFILE;
  }
  qemu_notify_bh = qemu_bh_new(notify_event_cb, NULL);
diff --git a/vl.c b/vl.c
index 002bf4919e..7499ff5691 100644
--- a/vl.c
+++ b/vl.c
@@ -2213,11 +2213,10 @@ static int device_init_func(void *opaque, QemuOpts 
*opts, Error **errp)
  
  static int chardev_init_func(void *opaque, QemuOpts *opts, Error **errp)

  {
-Error *local_err = NULL;
+ERRP_AUTO_PROPAGATE();
  
-if (!qemu_chr_new_from_opts(opts, NULL, _err)) {

-if (local_err) {
-error_propagate(errp, local_err);
+if (!qemu_chr_new_from_opts(opts, NULL, errp)) {
+if (*errp) {
  return -1;
  }
  exit(0);
@@ -2613,8 +2612,8 @@ static int machine_set_property(void *opaque,
  const char *name, const char *value,
  Error **errp)
  {
+ERRP_AUTO_PROPAGATE();
  Object *obj = OBJECT(opaque);
-Error *local_err = NULL;
  char *p, *qom_name;
  
  if (strcmp(name, "type") == 0) {

@@ -2628,11 +2627,10 @@ static int machine_set_property(void *opaque,
  }
  }
  
-object_property_parse(obj, value, qom_name, _err);

+object_property_parse(obj, value, qom_name, errp);
  g_free(qom_name);
  
-if (local_err) {

-error_propagate(errp, local_err);
+if (*errp) {
  return -1;
  }
  



Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 034/126] MIPS Machines: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

Hi Vladimir,

On 10/11/19 6:04 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  hw/core/loader-fit.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/hw/core/loader-fit.c b/hw/core/loader-fit.c
index 3ee9fb2f2e..84f35a1fe2 100644
--- a/hw/core/loader-fit.c
+++ b/hw/core/loader-fit.c
@@ -120,6 +120,7 @@ static int fit_load_kernel(const struct fit_loader *ldr, 
const void *itb,
 int cfg, void *opaque, hwaddr *pend,
 Error **errp)
  {
+ERRP_AUTO_PROPAGATE();


This certainly looks odd and took me some time to figure it out.

Per include/qapi/error.h:

/*
 * ERRP_AUTO_PROPAGATE
 *
 * This macro is created to be the first line of a function with Error 
*errp
 * OUT parameter. It's needed only in cases where we want to use 
rror_prepend,

 * error_append_hint or dereference *errp. It's still safe (but useless) in
 * other cases.

This function indeed uses error_prepend():

load_data = data = fit_load_image_alloc(itb, name, _off, , 
errp);

if (!data) {
error_prepend(errp, "unable to load kernel image from FIT: ");
return -EINVAL;
}

err = fit_image_addr(itb, img_off, "load", _addr, errp);
if (err) {
error_prepend(errp, "unable to read kernel load address from 
FIT: ");

ret = err;
goto out;
}

err = fit_image_addr(itb, img_off, "entry", _addr, errp);
if (err) {
error_prepend(errp, "unable to read kernel entry address from 
FIT: ");

ret = err;
goto out;
}

Generating the patch with more lines context would have help a bit.

Can you add a line about error_prepend() in the commit description?


  const char *name;
  const void *data;
  const void *load_data;
@@ -178,6 +179,7 @@ static int fit_load_fdt(const struct fit_loader *ldr, const 
void *itb,
  int cfg, void *opaque, const void *match_data,
  hwaddr kernel_end, Error **errp)
  {
+ERRP_AUTO_PROPAGATE();
  const char *name;
  const void *data;
  const void *load_data;



Ditto:

load_data = data = fit_load_image_alloc(itb, name, _off, , 
errp);

if (!data) {
error_prepend(errp, "unable to load FDT image from FIT: ");
return -EINVAL;
}

err = fit_image_addr(itb, img_off, "load", _addr, errp);
if (err == -ENOENT) {
load_addr = ROUND_UP(kernel_end, 64 * KiB) + (10 * MiB);
error_free(*errp);
} else if (err) {
error_prepend(errp, "unable to read FDT load address from FIT: ");
ret = err;
goto out;
}

Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 064/126] fw_cfg: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:04 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  hw/nvram/fw_cfg.c | 14 ++
  1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index 7dc3ac378e..e10687c876 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -1104,12 +1104,11 @@ static Property fw_cfg_io_properties[] = {
  
  static void fw_cfg_io_realize(DeviceState *dev, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  FWCfgIoState *s = FW_CFG_IO(dev);
-Error *local_err = NULL;
  
-fw_cfg_file_slots_allocate(FW_CFG(s), _err);

-if (local_err) {
-error_propagate(errp, local_err);
+fw_cfg_file_slots_allocate(FW_CFG(s), errp);
+if (*errp) {
  return;
  }
  
@@ -1155,14 +1154,13 @@ static Property fw_cfg_mem_properties[] = {
  
  static void fw_cfg_mem_realize(DeviceState *dev, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  FWCfgMemState *s = FW_CFG_MEM(dev);
  SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
  const MemoryRegionOps *data_ops = _cfg_data_mem_ops;
-Error *local_err = NULL;
  
-fw_cfg_file_slots_allocate(FW_CFG(s), _err);

-if (local_err) {
-error_propagate(errp, local_err);
+fw_cfg_file_slots_allocate(FW_CFG(s), errp);
+if (*errp) {
  return;
  }
  



Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 047/126] SD (Secure Card): introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:04 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  hw/sd/sdhci-pci.c |  7 +++
  hw/sd/sdhci.c | 21 +
  2 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c
index 2c8d8f59b5..b1448cf22e 100644
--- a/hw/sd/sdhci-pci.c
+++ b/hw/sd/sdhci-pci.c
@@ -29,13 +29,12 @@ static Property sdhci_pci_properties[] = {
  
  static void sdhci_pci_realize(PCIDevice *dev, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  SDHCIState *s = PCI_SDHCI(dev);
-Error *local_err = NULL;
  
  sdhci_initfn(s);

-sdhci_common_realize(s, _err);
-if (local_err) {
-error_propagate(errp, local_err);
+sdhci_common_realize(s, errp);
+if (*errp) {
  return;
  }
  
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c

index e56031b5e4..db9e9add82 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1293,7 +1293,7 @@ static const MemoryRegionOps sdhci_mmio_ops = {
  
  static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)

  {
-Error *local_err = NULL;
+ERRP_AUTO_PROPAGATE();
  
  switch (s->sd_spec_version) {

  case 2 ... 3:
@@ -1304,9 +1304,8 @@ static void sdhci_init_readonly_registers(SDHCIState *s, 
Error **errp)
  }
  s->version = (SDHC_HCVER_VENDOR << 8) | (s->sd_spec_version - 1);
  
-sdhci_check_capareg(s, _err);

-if (local_err) {
-error_propagate(errp, local_err);
+sdhci_check_capareg(s, errp);
+if (*errp) {
  return;
  }
  }
@@ -1337,11 +1336,10 @@ void sdhci_uninitfn(SDHCIState *s)
  
  void sdhci_common_realize(SDHCIState *s, Error **errp)

  {
-Error *local_err = NULL;
+ERRP_AUTO_PROPAGATE();
  
-sdhci_init_readonly_registers(s, _err);

-if (local_err) {
-error_propagate(errp, local_err);
+sdhci_init_readonly_registers(s, errp);
+if (*errp) {
  return;
  }
  s->buf_maxsz = sdhci_get_fifolen(s);
@@ -1461,13 +1459,12 @@ static void sdhci_sysbus_finalize(Object *obj)
  
  static void sdhci_sysbus_realize(DeviceState *dev, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  SDHCIState *s = SYSBUS_SDHCI(dev);
  SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
-Error *local_err = NULL;
  
-sdhci_common_realize(s, _err);

-if (local_err) {
-error_propagate(errp, local_err);
+sdhci_common_realize(s, errp);
+if (*errp) {
  return;
  }
  



Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 045/126] pflash: introduce ERRP_AUTO_PROPAGATE

[Philippe Mathieu-Daudé]

On 10/11/19 6:04 PM, Vladimir Sementsov-Ogievskiy wrote:

If we want to add some info to errp (by error_prepend() or
error_append_hint()), we must use the ERRP_AUTO_PROPAGATE macro.
Otherwise, this info will not be added when errp == _err
(the program will exit prior to the error_append_hint() or
error_prepend() call).  Fix such cases.

If we want to check error after errp-function call, we need to
introduce local_err and than propagate it to errp. Instead, use
ERRP_AUTO_PROPAGATE macro, benefits are:
1. No need of explicit error_propagate call
2. No need of explicit local_err variable: use errp directly
3. ERRP_AUTO_PROPAGATE leaves errp as is if it's not NULL or
_fatel, this means that we don't break error_abort
(we'll abort on error_set, not on error_propagate)

This commit (together with its neighbors) was generated by

for f in $(git grep -l errp \*.[ch]); do \
 spatch --sp-file scripts/coccinelle/auto-propagated-errp.cocci \
 --macro-file scripts/cocci-macro-file.h --in-place --no-show-diff $f; \
done;

then fix a bit of compilation problems: coccinelle for some reason
leaves several
f() {
 ...
 goto out;
 ...
 out:
}
patterns, with "out:" at function end.

then
./python/commit-per-subsystem.py MAINTAINERS "$(< auto-msg)"

(auto-msg was a file with this commit message)

Still, for backporting it may be more comfortable to use only the first
command and then do one huge commit.

Reported-by: Kevin Wolf 
Reported-by: Greg Kurz 
Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  hw/block/pflash_cfi01.c | 7 +++
  hw/block/pflash_cfi02.c | 7 +++
  2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 566c0acb77..37571b6efb 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -700,12 +700,12 @@ static const MemoryRegionOps pflash_cfi01_ops = {
  
  static void pflash_cfi01_realize(DeviceState *dev, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  PFlashCFI01 *pfl = PFLASH_CFI01(dev);
  uint64_t total_len;
  int ret;
  uint64_t blocks_per_device, sector_len_per_device, device_len;
  int num_devices;
-Error *local_err = NULL;
  
  if (pfl->sector_len == 0) {

  error_setg(errp, "attribute \"sector-length\" not specified or 
zero.");
@@ -739,9 +739,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Error 
**errp)
  >mem, OBJECT(dev),
  _cfi01_ops,
  pfl,
-pfl->name, total_len, _err);
-if (local_err) {
-error_propagate(errp, local_err);
+pfl->name, total_len, errp);
+if (*errp) {
  return;
  }
  
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c

index 4baca701b7..9dcdc13289 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -719,9 +719,9 @@ static const MemoryRegionOps pflash_cfi02_ops = {
  
  static void pflash_cfi02_realize(DeviceState *dev, Error **errp)

  {
+ERRP_AUTO_PROPAGATE();
  PFlashCFI02 *pfl = PFLASH_CFI02(dev);
  int ret;
-Error *local_err = NULL;
  
  if (pfl->uniform_sector_len == 0 && pfl->sector_len[0] == 0) {

  error_setg(errp, "attribute \"sector-length\" not specified or 
zero.");
@@ -787,9 +787,8 @@ static void pflash_cfi02_realize(DeviceState *dev, Error 
**errp)
  
  memory_region_init_rom_device(>orig_mem, OBJECT(pfl),

_cfi02_ops, pfl, pfl->name,
-  pfl->chip_len, _err);
-if (local_err) {
-error_propagate(errp, local_err);
+  pfl->chip_len, errp);
+if (*errp) {
  return;
  }
  



Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 022/126] backends/cryptodev: drop local_err from cryptodev_backend_complete()

[Philippe Mathieu-Daudé]

On 10/11/19 6:04 PM, Vladimir Sementsov-Ogievskiy wrote:

No reason for local_err here, use errp directly instead.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  backends/cryptodev.c | 11 +--
  1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index 3c071eab95..5a9735684e 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -176,19 +176,10 @@ cryptodev_backend_complete(UserCreatable *uc, Error 
**errp)
  {
  CryptoDevBackend *backend = CRYPTODEV_BACKEND(uc);
  CryptoDevBackendClass *bc = CRYPTODEV_BACKEND_GET_CLASS(uc);
-Error *local_err = NULL;
  
  if (bc->init) {

-bc->init(backend, _err);
-if (local_err) {
-goto out;
-}
+bc->init(backend, errp);
  }
-
-return;
-
-out:
-error_propagate(errp, local_err);
  }
  
  void cryptodev_backend_set_used(CryptoDevBackend *backend, bool used)




Reviewed-by: Philippe Mathieu-Daudé 

Re: [RFC v5 020/126] include/qom/object.h: rename Error ** parameter to more common errp

[Philippe Mathieu-Daudé]

On 10/11/19 6:04 PM, Vladimir Sementsov-Ogievskiy wrote:

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  include/qom/object.h | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/qom/object.h b/include/qom/object.h
index 128d00c77f..716f6f655d 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -1635,9 +1635,9 @@ void object_class_property_add_uint32_ptr(ObjectClass 
*klass, const char *name,
   * property of type 'uint64'.
   */
  void object_property_add_uint64_ptr(Object *obj, const char *name,
-const uint64_t *v, Error **Errp);
+const uint64_t *v, Error **errp);
  void object_class_property_add_uint64_ptr(ObjectClass *klass, const char 
*name,
-  const uint64_t *v, Error **Errp);
+  const uint64_t *v, Error **errp);


Oddly the implementation already use lowercase.

Reviewed-by: Philippe Mathieu-Daudé 

  
  /**

   * object_property_add_alias:

Re: [RFC v5 002/126] net/net: Clean up variable shadowing in net_client_init()

[Philippe Mathieu-Daudé]

On 10/11/19 6:03 PM, Vladimir Sementsov-Ogievskiy wrote:

Variable int err in inner scope shadows Error *err in outer scope.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
Reviewed-by: Eric Blake 
---
  net/net.c | 17 +++--
  1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/net/net.c b/net/net.c
index 84aa6d8d00..9e93c3f8a1 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1126,16 +1126,13 @@ static int net_client_init(QemuOpts *opts, bool 
is_netdev, Error **errp)
  
  prefix_addr = substrings[0];
  
-if (substrings[1]) {

-/* User-specified prefix length.  */
-int err;
-
-err = qemu_strtoul(substrings[1], NULL, 10, _len);
-if (err) {
-error_setg(errp, QERR_INVALID_PARAMETER_VALUE,
-   "ipv6-prefixlen", "a number");
-goto out;
-}
+/* Handle user-specified prefix length. */
+if (substrings[1] &&
+qemu_strtoul(substrings[1], NULL, 10, _len))
+{
+error_setg(errp, QERR_INVALID_PARAMETER_VALUE,
+   "ipv6-prefixlen", "a number");
+goto out;
  }
  
  qemu_opt_set(opts, "ipv6-prefix", prefix_addr, _abort);




Reviewed-by: Philippe Mathieu-Daudé