Re: [PATCH v2 29/58] vhost-user-gpu: Move QOM macro to header
On Wed, Aug 19, 2020 at 08:12:07PM -0400, Eduardo Habkost wrote: > Move the VHOST_USER_GPU type checking macro to virtio-gpu.h, > close to the TYPE_VHOST_USER_GPU #define. > > This will make future conversion to OBJECT_DECLARE* easier. > > Signed-off-by: Eduardo Habkost Reviewed-by: Gerd Hoffmann
Re: [PATCH v7 13/13] tests/acceptance: console boot tests for quanta-gsj
On 8/20/20 7:29 AM, Philippe Mathieu-Daudé wrote:
> +Eric / Richard for compiler optimizations.
>
> On 8/20/20 3:53 AM, Havard Skinnemoen wrote:
>> On Tue, Aug 11, 2020 at 8:26 PM Havard Skinnemoen
>> wrote:
>>>
>>> On Tue, Aug 11, 2020 at 1:48 AM Philippe Mathieu-Daudé
>>> wrote:
INTERRUPTED: Test interrupted by SIGTERM
Runner error occurred: Timeout reached
(240.45 s)
Is that expected?
>>>
>>> I'm not sure why it only happens when running direct kernel boot with
>>> unoptimized qemu, but it seems a little happier if I enable a few more
>>> peripherals that I have queued up (sd, ehci, ohci and rng), though not
>>> enough.
>>>
>>> It still stalls for an awfully long time on "console: Run /init as
>>> init process" though. I'm not sure what it's doing there. With -O2 it
>>> only takes a couple of seconds to move on.
>>
>> So it turns out that the kernel gets _really_ sluggish when skipping
>> the clock initialization normally done by the boot loader.
Hmm IIRC other boards are affected (raspi and orange-pi).
Maybe it is time to define some static inlined boolean function
in "qemu/compiler.h", maybe qemu_build_optimized()? Or not inlined
function but simply expand to true/false:
/**
* qemu_build_not_reached()
*
* The compiler, during optimization, is expected to prove that a call
* to this function cannot be reached and remove it. If the compiler
* supports QEMU_ERROR, this will be reported at compile time; o therwise
* this will be reported at link time due to the missing symbol.
*/
#if defined(__OPTIMIZE__) && !defined(__NO_INLINE__)
extern void QEMU_NORETURN QEMU_ERROR("code path is reachable")
qemu_build_not_reached(void);
#else
#define qemu_build_not_reached() g_assert_not_reached()
#endif
+
+#if defined(__OPTIMIZE__)
+#define qemu_build_optimized() true
+#else
+#define qemu_build_optimized() false
+#endif
>>
>> I changed the reset value of CLKSEL like this:
>>
>> diff --git a/hw/misc/npcm7xx_clk.c b/hw/misc/npcm7xx_clk.c
>> index 21ab4200d1..5e9849410f 100644
>> --- a/hw/misc/npcm7xx_clk.c
>> +++ b/hw/misc/npcm7xx_clk.c
>> @@ -67,7 +67,7 @@ enum NPCM7xxCLKRegisters {
>> */
>> static const uint32_t cold_reset_values[NPCM7XX_CLK_NR_REGS] = {
>> [NPCM7XX_CLK_CLKEN1]= 0x,
>> -[NPCM7XX_CLK_CLKSEL]= 0x004a,
>> +[NPCM7XX_CLK_CLKSEL]= 0x004aaba9,
>> [NPCM7XX_CLK_CLKDIV1] = 0x5413f855,
>> [NPCM7XX_CLK_PLLCON0] = 0x00222101 | PLLCON_LOKI,
>> [NPCM7XX_CLK_PLLCON1] = 0x00202101 | PLLCON_LOKI,
>>
>> which switches the CPU core and UART to run from PLL2 instead of
>> CLKREF (25 MHz).
>>
>> With this change, the test passes without optimization:
>>
>> (02/19)
>> tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_quanta_gsj_initrd:
>> PASS (39.62 s)
>>
>> It doesn't look like this change hurts booting from the bootrom (IIUC
>> the nuvoton bootblock overwrites CLKSEL anyway), but it's not super
>> clean.
>>
>> Perhaps I should make it conditional on kernel_filename being set? Or
>> would it be better to provide a write_board_setup hook for this?
>
> QEMU prefers to avoid ifdef'ry at all cost. However I find this
> approach acceptable (anyway up to the maintainer):
>
> +static void npcm7xx_clk_cold_reset_fixup(NPCM7xxCLKState *s)
> +{
> +#ifndef __OPTIMIZE__
> +/*
> + * When built without optimization, ...
> + * so run CPU core and UART from PLL2 instead of CLKREF.
> + */
> +s->regs[NPCM7XX_CLK_CLKSEL] |= 0x103,
> +#endif
> +}
>
> static void npcm7xx_clk_enter_reset(Object *obj, ResetType type)
> {
> NPCM7xxCLKState *s = NPCM7XX_CLK(obj);
>
> QEMU_BUILD_BUG_ON(sizeof(s->regs) != sizeof(cold_reset_values));
>
> switch (type) {
> case RESET_TYPE_COLD:
> memcpy(s->regs, cold_reset_values, sizeof(cold_reset_values));
> +npcm7xx_clk_cold_reset_fixup(s);
> s->ref_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
> return;
> }
> ...
>
> Regards,
>
> Phil.
>
Re: [PATCH v5 1/1] audio/jack: fix use after free segfault
Hi, > > +qemu_bh_cancel(c->shutdown_bh); > > Looks like a potential race. Quote from the API doc of qemu_bh_cancel(): > > "While cancellation itself is also wait-free and thread-safe, it can of > > course race with the loop that executes bottom halves unless you are > holding the iothread mutex. This makes it mostly useless if you are > not > holding the mutex." Should not be a problem, all auto backend code should only be called while qemu holds the iothread mutex. With the exception of the shutdown handler which jack might call from signal context (which is why we need the BH in the first place). take care, Gerd
Re: [PATCH v7 13/13] tests/acceptance: console boot tests for quanta-gsj
+Eric / Richard for compiler optimizations.
On 8/20/20 3:53 AM, Havard Skinnemoen wrote:
> On Tue, Aug 11, 2020 at 8:26 PM Havard Skinnemoen
> wrote:
>>
>> On Tue, Aug 11, 2020 at 1:48 AM Philippe Mathieu-Daudé
>> wrote:
>>> INTERRUPTED: Test interrupted by SIGTERM
>>> Runner error occurred: Timeout reached
>>> (240.45 s)
>>>
>>> Is that expected?
>>
>> I'm not sure why it only happens when running direct kernel boot with
>> unoptimized qemu, but it seems a little happier if I enable a few more
>> peripherals that I have queued up (sd, ehci, ohci and rng), though not
>> enough.
>>
>> It still stalls for an awfully long time on "console: Run /init as
>> init process" though. I'm not sure what it's doing there. With -O2 it
>> only takes a couple of seconds to move on.
>
> So it turns out that the kernel gets _really_ sluggish when skipping
> the clock initialization normally done by the boot loader.
>
> I changed the reset value of CLKSEL like this:
>
> diff --git a/hw/misc/npcm7xx_clk.c b/hw/misc/npcm7xx_clk.c
> index 21ab4200d1..5e9849410f 100644
> --- a/hw/misc/npcm7xx_clk.c
> +++ b/hw/misc/npcm7xx_clk.c
> @@ -67,7 +67,7 @@ enum NPCM7xxCLKRegisters {
> */
> static const uint32_t cold_reset_values[NPCM7XX_CLK_NR_REGS] = {
> [NPCM7XX_CLK_CLKEN1]= 0x,
> -[NPCM7XX_CLK_CLKSEL]= 0x004a,
> +[NPCM7XX_CLK_CLKSEL]= 0x004aaba9,
> [NPCM7XX_CLK_CLKDIV1] = 0x5413f855,
> [NPCM7XX_CLK_PLLCON0] = 0x00222101 | PLLCON_LOKI,
> [NPCM7XX_CLK_PLLCON1] = 0x00202101 | PLLCON_LOKI,
>
> which switches the CPU core and UART to run from PLL2 instead of
> CLKREF (25 MHz).
>
> With this change, the test passes without optimization:
>
> (02/19)
> tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_quanta_gsj_initrd:
> PASS (39.62 s)
>
> It doesn't look like this change hurts booting from the bootrom (IIUC
> the nuvoton bootblock overwrites CLKSEL anyway), but it's not super
> clean.
>
> Perhaps I should make it conditional on kernel_filename being set? Or
> would it be better to provide a write_board_setup hook for this?
QEMU prefers to avoid ifdef'ry at all cost. However I find this
approach acceptable (anyway up to the maintainer):
+static void npcm7xx_clk_cold_reset_fixup(NPCM7xxCLKState *s)
+{
+#ifndef __OPTIMIZE__
+/*
+ * When built without optimization, ...
+ * so run CPU core and UART from PLL2 instead of CLKREF.
+ */
+s->regs[NPCM7XX_CLK_CLKSEL] |= 0x103,
+#endif
+}
static void npcm7xx_clk_enter_reset(Object *obj, ResetType type)
{
NPCM7xxCLKState *s = NPCM7XX_CLK(obj);
QEMU_BUILD_BUG_ON(sizeof(s->regs) != sizeof(cold_reset_values));
switch (type) {
case RESET_TYPE_COLD:
memcpy(s->regs, cold_reset_values, sizeof(cold_reset_values));
+npcm7xx_clk_cold_reset_fixup(s);
s->ref_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
return;
}
...
Regards,
Phil.
Re: QEMU Library support
>> Hi team, >> >> Lately, I have been working on QEMU modeling and interfacing it into the >> existing platform. What actually I wanted to check is; whether QEMU >> supports library that gives developers a clean interface to develop and >> integrate peripheral model in to QEMU. I know of the Greensocs SystemC >> bridge - but that was quite difficult to work with in past. > Not really - with a few exceptions like vhost-user and in KVM device > emulation all devices are emulated in the QEMU code base. As a result > the best way to maintain a device is to have it integrated upstream > (along with some tests to ensure it is working). > As you note there are various forks of QEMU that support device > modelling but none of these features have been merged upstream and would > likely need to assuage worries about such interfaces being used to avoid > GPL compliance. > What sort of devices are you looking to model? Are these existing > devices or experimental/research things? Alex, to answer your earlier question, this is only for experimental purposes - to learn Qemu device modeling API better. I am trying to understand QEMU build hierarchy and proceed to see whether I can find any solution out of it. Also - wanted to set right one point. The Greensocs SystemC bridge is definitely an option if one wants to integrate device models in SystemC - but in my case, I wanted to better understand Qemu internals. Regards, Pratik On Mon, Aug 10, 2020 at 3:18 PM Alex Bennée wrote: > > Pratik Parvati writes: > > > Hi team, > > > > Lately, I have been working on QEMU modeling and interfacing it into the > > existing platform. What actually I wanted to check is; whether QEMU > > supports library that gives developers a clean interface to develop and > > integrate peripheral model in to QEMU. I know of the Greensocs SystemC > > bridge - but that was quite difficult to work with in past. > > Not really - with a few exceptions like vhost-user and in KVM device > emulation all devices are emulated in the QEMU code base. As a result > the best way to maintain a device is to have it integrated upstream > (along with some tests to ensure it is working). > > As you note there are various forks of QEMU that support device > modelling but none of these features have been merged upstream and would > likely need to assuage worries about such interfaces being used to avoid > GPL compliance. > > What sort of devices are you looking to model? Are these existing > devices or experimental/research things? > > -- > Alex Bennée >
Re: device compatibility interface for live migration with assigned devices
On Thu, 2020-08-20 at 12:01 +0800, Yan Zhao wrote: > On Thu, Aug 20, 2020 at 02:29:07AM +0100, Sean Mooney wrote: > > On Thu, 2020-08-20 at 08:39 +0800, Yan Zhao wrote: > > > On Tue, Aug 18, 2020 at 11:36:52AM +0200, Cornelia Huck wrote: > > > > On Tue, 18 Aug 2020 10:16:28 +0100 > > > > Daniel P. Berrangé wrote: > > > > > > > > > On Tue, Aug 18, 2020 at 05:01:51PM +0800, Jason Wang wrote: > > > > > >On 2020/8/18 下午4:55, Daniel P. Berrangé wrote: > > > > > > > > > > > > On Tue, Aug 18, 2020 at 11:24:30AM +0800, Jason Wang wrote: > > > > > > > > > > > > On 2020/8/14 下午1:16, Yan Zhao wrote: > > > > > > > > > > > > On Thu, Aug 13, 2020 at 12:24:50PM +0800, Jason Wang wrote: > > > > > > > > > > > > On 2020/8/10 下午3:46, Yan Zhao wrote: > > > > > > we actually can also retrieve the same information through sysfs, > > > > > > .e.g > > > > > > > > > > > > |- [path to device] > > > > > > |--- migration > > > > > > | |--- self > > > > > > | | |---device_api > > > > > > || |---mdev_type > > > > > > || |---software_version > > > > > > || |---device_id > > > > > > || |---aggregator > > > > > > | |--- compatible > > > > > > | | |---device_api > > > > > > || |---mdev_type > > > > > > || |---software_version > > > > > > || |---device_id > > > > > > || |---aggregator > > > > > > > > > > > > > > > > > > Yes but: > > > > > > > > > > > > - You need one file per attribute (one syscall for one attribute) > > > > > > - Attribute is coupled with kobject > > > > > > > > Is that really that bad? You have the device with an embedded kobject > > > > anyway, and you can just put things into an attribute group? > > > > > > > > [Also, I think that self/compatible split in the example makes things > > > > needlessly complex. Shouldn't semantic versioning and matching already > > > > cover nearly everything? I would expect very few cases that are more > > > > complex than that. Maybe the aggregation stuff, but I don't think we > > > > need that self/compatible split for that, either.] > > > > > > Hi Cornelia, > > > > > > The reason I want to declare compatible list of attributes is that > > > sometimes it's not a simple 1:1 matching of source attributes and target > > > attributes > > > as I demonstrated below, > > > source mdev of (mdev_type i915-GVTg_V5_2 + aggregator 1) is compatible to > > > target mdev of (mdev_type i915-GVTg_V5_4 + aggregator 2), > > >(mdev_type i915-GVTg_V5_8 + aggregator 4) > > > > the way you are doing the nameing is till really confusing by the way > > if this has not already been merged in the kernel can you chagne the mdev > > so that mdev_type i915-GVTg_V5_2 is 2 of mdev_type i915-GVTg_V5_1 instead > > of half the device > > > > currently you need to deived the aggratod by the number at the end of the > > mdev type to figure out > > how much of the phsicial device is being used with is a very unfridly api > > convention > > > > the way aggrator are being proposed in general is not really someting i > > like but i thin this at least > > is something that should be able to correct. > > > > with the complexity in the mdev type name + aggrator i suspect that this > > will never be support > > in openstack nova directly requireing integration via cyborg unless we can > > pre partion the > > device in to mdevs staicaly and just ignore this. > > > > this is way to vendor sepecif to integrate into something like openstack in > > nova unless we can guarentee > > taht how aggreator work will be portable across vendors genericly. > > > > > > > > and aggragator may be just one of such examples that 1:1 matching does not > > > fit. > > > > for openstack nova i dont see us support anything beyond the 1:1 case where > > the mdev type does not change. > > > > hi Sean, > I understand it's hard for openstack. but 1:N is always meaningful. > e.g. > if source device 1 has cap A, it is compatible to > device 2: cap A, > device 3: cap A+B, > device 4: cap A+B+C > > to allow openstack to detect it correctly, in compatible list of > device 2, we would say compatible cap is A; > device 3, compatible cap is A or A+B; > device 4, compatible cap is A or A+B, or A+B+C; > > then if openstack finds device A's self cap A is contained in compatible > cap of device 2/3/4, it can migrate device 1 to device 2,3,4. > > conversely, device 1's compatible cap is only A, > so it is able to migrate device 2 to device 1, and it is not able to > migrate device 3/4 to device 1. yes we build the palcement servce aroudn the idea of capablites as traits on resocue providres. which is why i originally asked if we coudl model compatibality with feature flags we can seaislyt model deivce as aupport A, A+B or A+B+C and then select hosts and evice based on that but the list of compatable deivce you are propsoeing hide this feature infomation which whould be what
Re: [PATCH 08/10] spapr: introduce SpaprMachineClass::numa_assoc_domains
On Fri, Aug 14, 2020 at 05:54:22PM -0300, Daniel Henrique Barboza wrote:
> We can't use the input from machine->numa_state->nodes directly
> in the pSeries machine because PAPR does not work with raw distance
> values, like ACPI SLIT does. We need to determine common
> associativity domains, based on similar performance/distance of the
> resources, and set these domains in the associativy array that goes
> to the FDT of each resource.
>
> To ease the translation between regular ACPI NUMA distance info
> to our PAPR dialect, let's create a matrix called numa_assoc_domains
> in the SpaprMachineClass. This matrix will be initiated during
> machine init, where we will read NUMA information from user input,
> apply a heuristic to determine the associativity domains for each node,
> then populate numa_assoc_domains accordingly.
>
> The changes are mostly centered in the spapr_set_associativity()
> helper that will use the values of numa_assoc_domains instead of
> using 0x0, with spapr_dt_dynamic_reconfiguration_memory() and
> h_home_node_associativity() being the exceptions.
>
> To keep the changes under control, we'll plug in the matrix usage
> in the existing code first. The actual heuristic to determine
> the associativity domains for each NUMA node will come in a follow-up
> patch.
>
> Note that the matrix is initiated with zeros, meaning that there is
> no guest changes implemented in this patch. We'll keep these
> changes from legacy NUMA guests by not initiating the matrix
> in these cases.
>
> Signed-off-by: Daniel Henrique Barboza
IIUC, what this is basically doing is that instead of doing the
translation from qemu's internal NUMA representation to PAPRs at the
point(s) we emit the PAPR information, we're moving it to persistent
data we calculate for each (qemu) numa node then just copy out when we
emit the information?
That could be a reasonable idea, and indeed the rest of the series
might be easier to understand if this change were earlier in the
series. In particular it means we might be able localise all the
hacks for calculating the right vectors depending on machine
version/options into one place.
A couple of nits, though:
> ---
> hw/ppc/spapr.c| 46 +++
> hw/ppc/spapr_hcall.c | 13 --
> hw/ppc/spapr_nvdimm.c | 13 +-
> hw/ppc/spapr_pci.c| 3 ++-
> include/hw/ppc/spapr.h| 7 +-
> include/hw/ppc/spapr_nvdimm.h | 5 ++--
> 6 files changed, 59 insertions(+), 28 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index b80a6f6936..4f50ab21ee 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -201,8 +201,13 @@ static int spapr_fixup_cpu_smt_dt(void *fdt, int offset,
> PowerPCCPU *cpu,
> return ret;
> }
>
> -void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index)
> +void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index,
> + MachineState *machine)
> {
> +SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
> +uint8_t assoc_domain1 = smc->numa_assoc_domains[node_id][0];
> +uint8_t assoc_domain2 = smc->numa_assoc_domains[node_id][1];
> +uint8_t assoc_domain3 = smc->numa_assoc_domains[node_id][2];
> uint8_t assoc_size = 0x4;
>
> if (cpu_index >= 0) {
> @@ -211,17 +216,18 @@ void spapr_set_associativity(uint32_t *assoc, int
> node_id, int cpu_index)
> }
>
> assoc[0] = cpu_to_be32(assoc_size);
> -assoc[1] = cpu_to_be32(0x0);
> -assoc[2] = cpu_to_be32(0x0);
> -assoc[3] = cpu_to_be32(0x0);
> +assoc[1] = cpu_to_be32(assoc_domain1);
> +assoc[2] = cpu_to_be32(assoc_domain2);
> +assoc[3] = cpu_to_be32(assoc_domain3);
> assoc[4] = cpu_to_be32(node_id);
So spapr_set_associativity() is already a slightly dangerous function,
because the required buffer space for 'assoc' varies in a non-obvious
way depending on if cpu_index is >= 0. I didn't comment on that when
it was introduced, because it's not really any worse than what it
replaced.
But with this change, I think we can do better. I'd suggest storing
the full PAPR associativity vector for each qemu numa node verbatim,
so it can just be copied straight into the device tree without
interpretation. Then the helper can actually do the property set, and
we don't need magically sized locals any more.
Obviously there will need to be some more handling for the extra layer
we add on cpu assoc vectors. We could store a vector for each vcpu as
well, or just have a hack to adjust these (fdt_appendprop() might be
useful).
> }
>
> -static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu)
> +static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu,
> + MachineState *machine)
> {
> int index = spapr_get_vcpu_id(cpu);
> uint32_t associativity[6];
> -spapr_set_associativity(associativity, cpu->node_id,
Re: [PATCH 02/10] numa: introduce MachineClass::forbid_asymmetrical_numa
On Wed, Aug 19, 2020 at 10:11:28PM -0400, Eduardo Habkost wrote:
> On Thu, Aug 20, 2020 at 11:17:26AM +1000, David Gibson wrote:
> > On Fri, Aug 14, 2020 at 05:54:16PM -0300, Daniel Henrique Barboza wrote:
> > > The pSeries machine does not support asymmetrical NUMA
> > > configurations.
> >
> > This seems a bit oddly specific to have as a global machine class
> > property.
> >
> > Would it make more sense for machines with specific NUMA constraints
> > to just verify those during their initialization?
>
> This would be much simpler. However, I like the idea of
> representing machine-specific configuration validation rules as
> data that can eventually be exported to management software.
Ah, ok, so basically the usual tradeoff between flexibility and
advertisability.
So, in that case, I guess the question is whether we envisage "no
assymmetry" as a constraint common enough that it's worth creating an
advertisable rule or not. If we only ever have one user, then we
haven't really done any better than hard coding the constraint in the
manageent software.
Of course to complicate matters, in the longer term we're looking at
removing that constraint from pseries - but doing so will be dependent
on the guest kernel understanding a new format for the NUMA
information in the device tree. So qemu alone won't have enough
information to tell if such a configuration is possible or not.
> (CCing John Snow, who had spent some time thinking about
> configuration validation recently.)
>
>
> > >
> > > CC: Eduardo Habkost
> > > CC: Marcel Apfelbaum
> > > Signed-off-by: Daniel Henrique Barboza
> > > ---
> > > hw/core/numa.c | 7 +++
> > > hw/ppc/spapr.c | 1 +
> > > include/hw/boards.h | 1 +
> > > 3 files changed, 9 insertions(+)
> > >
> > > diff --git a/hw/core/numa.c b/hw/core/numa.c
> > > index d1a94a14f8..1e81233c1d 100644
> > > --- a/hw/core/numa.c
> > > +++ b/hw/core/numa.c
> > > @@ -547,6 +547,7 @@ static int parse_numa(void *opaque, QemuOpts *opts,
> > > Error **errp)
> > > */
> > > static void validate_numa_distance(MachineState *ms)
> > > {
> > > +MachineClass *mc = MACHINE_GET_CLASS(ms);
> > > int src, dst;
> > > bool is_asymmetrical = false;
> > > int nb_numa_nodes = ms->numa_state->num_nodes;
> > > @@ -575,6 +576,12 @@ static void validate_numa_distance(MachineState *ms)
> > > }
> > >
> > > if (is_asymmetrical) {
> > > +if (mc->forbid_asymmetrical_numa) {
> > > +error_report("This machine type does not support "
> > > + "asymmetrical numa distances.");
> > > +exit(EXIT_FAILURE);
> > > +}
> > > +
> > > for (src = 0; src < nb_numa_nodes; src++) {
> > > for (dst = 0; dst < nb_numa_nodes; dst++) {
> > > if (src != dst && numa_info[src].distance[dst] == 0) {
> > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > > index dd2fa4826b..3b16edaf4c 100644
> > > --- a/hw/ppc/spapr.c
> > > +++ b/hw/ppc/spapr.c
> > > @@ -4512,6 +4512,7 @@ static void spapr_machine_class_init(ObjectClass
> > > *oc, void *data)
> > > */
> > > mc->numa_mem_align_shift = 28;
> > > mc->auto_enable_numa = true;
> > > +mc->forbid_asymmetrical_numa = true;
> > >
> > > smc->default_caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
> > > smc->default_caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_ON;
> > > diff --git a/include/hw/boards.h b/include/hw/boards.h
> > > index bc5b82ad20..dc6cdd1c53 100644
> > > --- a/include/hw/boards.h
> > > +++ b/include/hw/boards.h
> > > @@ -215,6 +215,7 @@ struct MachineClass {
> > > bool nvdimm_supported;
> > > bool numa_mem_supported;
> > > bool auto_enable_numa;
> > > +bool forbid_asymmetrical_numa;
> > > const char *default_ram_id;
> > >
> > > HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
> >
>
>
>
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: device compatibility interface for live migration with assigned devices
On Thu, Aug 20, 2020 at 02:29:07AM +0100, Sean Mooney wrote: > On Thu, 2020-08-20 at 08:39 +0800, Yan Zhao wrote: > > On Tue, Aug 18, 2020 at 11:36:52AM +0200, Cornelia Huck wrote: > > > On Tue, 18 Aug 2020 10:16:28 +0100 > > > Daniel P. Berrangé wrote: > > > > > > > On Tue, Aug 18, 2020 at 05:01:51PM +0800, Jason Wang wrote: > > > > >On 2020/8/18 下午4:55, Daniel P. Berrangé wrote: > > > > > > > > > > On Tue, Aug 18, 2020 at 11:24:30AM +0800, Jason Wang wrote: > > > > > > > > > > On 2020/8/14 下午1:16, Yan Zhao wrote: > > > > > > > > > > On Thu, Aug 13, 2020 at 12:24:50PM +0800, Jason Wang wrote: > > > > > > > > > > On 2020/8/10 下午3:46, Yan Zhao wrote: > > > > > we actually can also retrieve the same information through sysfs, > > > > > .e.g > > > > > > > > > > |- [path to device] > > > > > |--- migration > > > > > | |--- self > > > > > | | |---device_api > > > > > || |---mdev_type > > > > > || |---software_version > > > > > || |---device_id > > > > > || |---aggregator > > > > > | |--- compatible > > > > > | | |---device_api > > > > > || |---mdev_type > > > > > || |---software_version > > > > > || |---device_id > > > > > || |---aggregator > > > > > > > > > > > > > > > Yes but: > > > > > > > > > > - You need one file per attribute (one syscall for one attribute) > > > > > - Attribute is coupled with kobject > > > > > > Is that really that bad? You have the device with an embedded kobject > > > anyway, and you can just put things into an attribute group? > > > > > > [Also, I think that self/compatible split in the example makes things > > > needlessly complex. Shouldn't semantic versioning and matching already > > > cover nearly everything? I would expect very few cases that are more > > > complex than that. Maybe the aggregation stuff, but I don't think we > > > need that self/compatible split for that, either.] > > > > Hi Cornelia, > > > > The reason I want to declare compatible list of attributes is that > > sometimes it's not a simple 1:1 matching of source attributes and target > > attributes > > as I demonstrated below, > > source mdev of (mdev_type i915-GVTg_V5_2 + aggregator 1) is compatible to > > target mdev of (mdev_type i915-GVTg_V5_4 + aggregator 2), > >(mdev_type i915-GVTg_V5_8 + aggregator 4) > the way you are doing the nameing is till really confusing by the way > if this has not already been merged in the kernel can you chagne the mdev > so that mdev_type i915-GVTg_V5_2 is 2 of mdev_type i915-GVTg_V5_1 instead of > half the device > > currently you need to deived the aggratod by the number at the end of the > mdev type to figure out > how much of the phsicial device is being used with is a very unfridly api > convention > > the way aggrator are being proposed in general is not really someting i like > but i thin this at least > is something that should be able to correct. > > with the complexity in the mdev type name + aggrator i suspect that this will > never be support > in openstack nova directly requireing integration via cyborg unless we can > pre partion the > device in to mdevs staicaly and just ignore this. > > this is way to vendor sepecif to integrate into something like openstack in > nova unless we can guarentee > taht how aggreator work will be portable across vendors genericly. > > > > > and aggragator may be just one of such examples that 1:1 matching does not > > fit. > for openstack nova i dont see us support anything beyond the 1:1 case where > the mdev type does not change. > hi Sean, I understand it's hard for openstack. but 1:N is always meaningful. e.g. if source device 1 has cap A, it is compatible to device 2: cap A, device 3: cap A+B, device 4: cap A+B+C to allow openstack to detect it correctly, in compatible list of device 2, we would say compatible cap is A; device 3, compatible cap is A or A+B; device 4, compatible cap is A or A+B, or A+B+C; then if openstack finds device A's self cap A is contained in compatible cap of device 2/3/4, it can migrate device 1 to device 2,3,4. conversely, device 1's compatible cap is only A, so it is able to migrate device 2 to device 1, and it is not able to migrate device 3/4 to device 1. Thanks Yan > i woudl really prefer if there was just one mdev type that repsented the > minimal allcatable unit and the > aggragaotr where used to create compostions of that. i.e instad of > i915-GVTg_V5_2 beign half the device, > have 1 mdev type i915-GVTg and if the device support 8 of them then we can > aggrate 4 of i915-GVTg > > if you want to have muplie mdev type to model the different amoutn of the > resouce e.g. i915-GVTg_small i915-GVTg_large > that is totlaly fine too or even i915-GVTg_4 indcating it sis 4 of i915-GVTg > > failing that i would just expose an mdev type per composable resouce and > allow us to compose them a the user level with >
Re: [PATCH 07/10] spapr: create helper to set ibm,associativity
On Fri, Aug 14, 2020 at 05:54:21PM -0300, Daniel Henrique Barboza wrote:
> We have several places around hw/ppc files where we use the
> same code to set the ibm,associativity array. This patch
> creates a helper called spapr_set_associativity() to do
> that in a single place. It'll also make it saner to change
> the value of ibm,associativity in the next patches.
>
> After this patch, only 2 places are left with open code
> ibm,associativity assignment:
>
> - spapr_dt_dynamic_reconfiguration_memory()
> - h_home_node_associativity() in spapr_hcall.c
>
> The update of associativity values will be made in these places
> manually later on.
>
> Signed-off-by: Daniel Henrique Barboza
Reviewed-by: David Gibson
I like this - any chance you could move this to the front of the
series so that we can make this code easier to follow while we're
still discussing the more meaningful changes?
> ---
> hw/ppc/spapr.c | 32 +---
> hw/ppc/spapr_nvdimm.c | 8 +++-
> hw/ppc/spapr_pci.c | 8 +++-
> include/hw/ppc/spapr.h | 1 +
> 4 files changed, 28 insertions(+), 21 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index bc51d2db90..b80a6f6936 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -201,15 +201,27 @@ static int spapr_fixup_cpu_smt_dt(void *fdt, int
> offset, PowerPCCPU *cpu,
> return ret;
> }
>
> +void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index)
> +{
> +uint8_t assoc_size = 0x4;
> +
> +if (cpu_index >= 0) {
> +assoc_size = 0x5;
> +assoc[5] = cpu_to_be32(cpu_index);
> +}
> +
> +assoc[0] = cpu_to_be32(assoc_size);
> +assoc[1] = cpu_to_be32(0x0);
> +assoc[2] = cpu_to_be32(0x0);
> +assoc[3] = cpu_to_be32(0x0);
> +assoc[4] = cpu_to_be32(node_id);
> +}
> +
> static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu)
> {
> int index = spapr_get_vcpu_id(cpu);
> -uint32_t associativity[] = {cpu_to_be32(0x5),
> -cpu_to_be32(0x0),
> -cpu_to_be32(0x0),
> -cpu_to_be32(0x0),
> -cpu_to_be32(cpu->node_id),
> -cpu_to_be32(index)};
> +uint32_t associativity[6];
> +spapr_set_associativity(associativity, cpu->node_id, index);
>
> /* Advertise NUMA via ibm,associativity */
> return fdt_setprop(fdt, offset, "ibm,associativity", associativity,
> @@ -325,15 +337,13 @@ static void add_str(GString *s, const gchar *s1)
> static int spapr_dt_memory_node(void *fdt, int nodeid, hwaddr start,
> hwaddr size)
> {
> -uint32_t associativity[] = {
> -cpu_to_be32(0x4), /* length */
> -cpu_to_be32(0x0), cpu_to_be32(0x0),
> -cpu_to_be32(0x0), cpu_to_be32(nodeid)
> -};
> +uint32_t associativity[5];
> char mem_name[32];
> uint64_t mem_reg_property[2];
> int off;
>
> +spapr_set_associativity(associativity, nodeid, -1);
> +
> mem_reg_property[0] = cpu_to_be64(start);
> mem_reg_property[1] = cpu_to_be64(size);
>
> diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c
> index 81410aa63f..bd109bfc00 100644
> --- a/hw/ppc/spapr_nvdimm.c
> +++ b/hw/ppc/spapr_nvdimm.c
> @@ -115,15 +115,13 @@ int spapr_dt_nvdimm(void *fdt, int parent_offset,
> _abort);
> uint64_t slot = object_property_get_uint(OBJECT(nvdimm),
> PC_DIMM_SLOT_PROP,
> _abort);
> -uint32_t associativity[] = {
> -cpu_to_be32(0x4), /* length */
> -cpu_to_be32(0x0), cpu_to_be32(0x0),
> -cpu_to_be32(0x0), cpu_to_be32(node)
> -};
> +uint32_t associativity[5];
> uint64_t lsize = nvdimm->label_size;
> uint64_t size = object_property_get_int(OBJECT(nvdimm),
> PC_DIMM_SIZE_PROP,
> NULL);
>
> +spapr_set_associativity(associativity, node, -1);
> +
> drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot);
> g_assert(drc);
>
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 09ac58fd7f..c02ace226c 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -2321,11 +2321,8 @@ int spapr_dt_phb(SpaprMachineState *spapr,
> SpaprPhbState *phb,
> cpu_to_be32(1),
> cpu_to_be32(RTAS_IBM_RESET_PE_DMA_WINDOW)
> };
> -uint32_t associativity[] = {cpu_to_be32(0x4),
> -cpu_to_be32(0x0),
> -cpu_to_be32(0x0),
> -cpu_to_be32(0x0),
> -cpu_to_be32(phb->numa_node)};
> +uint32_t associativity[5];
> +
> SpaprTceTable *tcet;
> SpaprDrc *drc;
> Error *err = NULL;
> @@ -2358,6 +2355,7 @@ int spapr_dt_phb(SpaprMachineState *spapr,
> SpaprPhbState *phb,
>
> /* Advertise
Re: [PATCH 05/10] spapr: make ibm,max-associativity-domains scale with user input
On Fri, Aug 14, 2020 at 05:54:19PM -0300, Daniel Henrique Barboza wrote:
> The ibm,max-associativity-domains is considering that only a single
> associativity domain can exist in the same NUMA level. This is true
> today because we do not support any type of NUMA distance user
> customization, and all nodes are in the same distance to each other.
>
> To enhance NUMA distance support in the pSeries machine we need to
> make this limit flexible. This patch rewrites the max-associativity
> logic to consider that multiple associativity domains can co-exist
> in the same NUMA level. We're using the legacy_numa() helper to
> avoid leaking unneeded guest changes.
Hrm. I find the above a bit hard to understand. Having the limit be
one less than the number of nodes at every level except the last seems
kind of odd to me.
> Signed-off-by: Daniel Henrique Barboza
> ---
> hw/ppc/spapr.c | 18 --
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 073a59c47d..b0c4b80a23 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -919,13 +919,20 @@ static void spapr_dt_rtas(SpaprMachineState *spapr,
> void *fdt)
> cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE & 0x),
> cpu_to_be32(ms->smp.max_cpus / ms->smp.threads),
> };
> -uint32_t maxdomain = cpu_to_be32(spapr->extra_numa_nodes > 1 ? 1 : 0);
> +
> +/* The maximum domains for a given NUMA level, supposing that every
> + * additional NUMA node belongs to the same domain (aside from the
> + * 4th level, where we must support all available NUMA domains), is
> + * total number of domains - 1. */
> +uint32_t total_nodes_number = ms->numa_state->num_nodes +
> + spapr->extra_numa_nodes;
> +uint32_t maxdomain = cpu_to_be32(total_nodes_number - 1);
> uint32_t maxdomains[] = {
> cpu_to_be32(4),
> maxdomain,
> maxdomain,
> maxdomain,
> -cpu_to_be32(ms->numa_state->num_nodes + spapr->extra_numa_nodes),
> +cpu_to_be32(total_nodes_number),
> };
>
> _FDT(rtas = fdt_add_subnode(fdt, 0, "rtas"));
> @@ -962,6 +969,13 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void
> *fdt)
> qemu_hypertas->str, qemu_hypertas->len));
> g_string_free(qemu_hypertas, TRUE);
>
> +if (spapr_machine_using_legacy_numa(spapr)) {
> +maxdomain = cpu_to_be32(spapr->extra_numa_nodes > 1 ? 1 : 0);
> +maxdomains[1] = maxdomain;
> +maxdomains[2] = maxdomain;
> +maxdomains[3] = maxdomain;
> +}
> +
> if (smc->pre_5_1_assoc_refpoints) {
> nr_refpoints = 2;
> }
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: [PATCH 04/10] spapr: add spapr_machine_using_legacy_numa() helper
On Fri, Aug 14, 2020 at 05:54:18PM -0300, Daniel Henrique Barboza wrote:
> The changes to come to NUMA support are all guest visible. In
> theory we could just create a new 5_1 class option flag to
> avoid the changes to cascade to 5.1 and under. The reality is that
> these changes are only relevant if the machine has more than one
> NUMA node. There is no need to change guest behavior that has
> been around for years needlesly.
>
> This new helper will be used by the next patches to determine
> whether we should retain the (soon to be) legacy NUMA behavior
> in the pSeries machine. The new behavior will only be exposed
> if::
>
> - machine is pseries-5.2 and newer;
> - more than one NUMA node is declared in NUMA state.
>
> Signed-off-by: Daniel Henrique Barboza
Seems reasonable.
Reviewed-by: David Gibson
> ---
> hw/ppc/spapr.c | 12
> include/hw/ppc/spapr.h | 2 ++
> 2 files changed, 14 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 22e78cfc84..073a59c47d 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -308,6 +308,15 @@ static hwaddr spapr_node0_size(MachineState *machine)
> return machine->ram_size;
> }
>
> +bool spapr_machine_using_legacy_numa(SpaprMachineState *spapr)
> +{
> +MachineState *machine = MACHINE(spapr);
> +SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
> +
> +return smc->pre_5_2_numa_associativity ||
> + machine->numa_state->num_nodes <= 1;
> +}
> +
> static void add_str(GString *s, const gchar *s1)
> {
> g_string_append_len(s, s1, strlen(s1) + 1);
> @@ -4602,8 +4611,11 @@ DEFINE_SPAPR_MACHINE(5_2, "5.2", true);
> */
> static void spapr_machine_5_1_class_options(MachineClass *mc)
> {
> +SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
> +
> spapr_machine_5_2_class_options(mc);
> compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len);
> +smc->pre_5_2_numa_associativity = true;
> }
>
> DEFINE_SPAPR_MACHINE(5_1, "5.1", false);
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 739a6a4942..d9f1afa8b2 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -130,6 +130,7 @@ struct SpaprMachineClass {
> bool smp_threads_vsmt; /* set VSMT to smp_threads by default */
> hwaddr rma_limit; /* clamp the RMA to this size */
> bool pre_5_1_assoc_refpoints;
> +bool pre_5_2_numa_associativity;
>
> void (*phb_placement)(SpaprMachineState *spapr, uint32_t index,
>uint64_t *buid, hwaddr *pio,
> @@ -847,6 +848,7 @@ int spapr_max_server_number(SpaprMachineState *spapr);
> void spapr_store_hpte(PowerPCCPU *cpu, hwaddr ptex,
>uint64_t pte0, uint64_t pte1);
> void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered);
> +bool spapr_machine_using_legacy_numa(SpaprMachineState *spapr);
>
> /* DRC callbacks. */
> void spapr_core_release(DeviceState *dev);
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: [PATCH 03/10] spapr: robustify NVLink2 NUMA node logic
On Fri, Aug 14, 2020 at 05:54:17PM -0300, Daniel Henrique Barboza wrote:
> NVLink2 GPUs are allocated in their own NUMA node, at maximum
> distance from every other resource in the board. The existing
> logic makes some assumptions that don't scale well:
>
> - only NVLink2 GPUs will ever require such mechanism, meaning
> that the GPU logic is tightly coupled with the NUMA setup of
> the machine, via how ibm,max-associativity-domains is set.
>
> - the code is relying on the lack of support for sparse NUMA
> nodes in QEMU. Eventually this support can be implemented, and
> then the assumption that spapr->gpu_numa_id represents the total
> of NUMA nodes plus all generated NUMA ids for the GPUs, which
> relies on all QEMU NUMA nodes not being sparsed, has a good
> potential for disaster.
>
> This patch aims to fix both assumptions by creating a generic
> mechanism to get an available NUMA node, regardless of the
> NUMA setup being sparse or not. The idea is to rename the existing
> spapr->gpu_numa_id to spapr->current_numa_id and add a new
> spapr->extra_numa_nodes attribute. They are used in a new function
> called spapr_pci_get_available_numa_id(), that takes into account
> that the NUMA conf can be sparsed or not, to retrieve an available
> NUMA id for the caller. Each consecutive call of
> spapr_pci_get_available_numa_id() will generate a new ID, up
> to the limit of numa_state->num_nodes + spapr->extra_numa_nodes
> exceeding MAX_NODES. This is a generic code being used only by
> NVLink2 ATM, being available to be used in the future by any
> other device.
>
> With this new function in place, we can decouple
> ibm,max-associativity-domains logic from NVLink2 logic by
> using the new spapr->extra_numa_nodes to define the maxdomains
> of the forth NUMA level. Instead of defining it as gpu_numa_id,
> use num_nodes + extra_numa_nodes. This also makes it resilient
> to any future change in the support of sparse NUMA nodes.
>
> Despite all the code juggling, no functional change was made
> because sparse NUMA nodes isn't a thing and we do not support
> distinct NUMA distances via user input. Next patches will
> change that.
>
> Signed-off-by: Daniel Henrique Barboza
> ---
> hw/ppc/spapr.c | 15 ++-
> hw/ppc/spapr_pci.c | 33 +
> hw/ppc/spapr_pci_nvlink2.c | 10 ++
> include/hw/pci-host/spapr.h | 2 ++
> include/hw/ppc/spapr.h | 4 +++-
> 5 files changed, 54 insertions(+), 10 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 3b16edaf4c..22e78cfc84 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -910,13 +910,13 @@ static void spapr_dt_rtas(SpaprMachineState *spapr,
> void *fdt)
> cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE & 0x),
> cpu_to_be32(ms->smp.max_cpus / ms->smp.threads),
> };
> -uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0);
> +uint32_t maxdomain = cpu_to_be32(spapr->extra_numa_nodes > 1 ? 1 : 0);
> uint32_t maxdomains[] = {
> cpu_to_be32(4),
> maxdomain,
> maxdomain,
> maxdomain,
> -cpu_to_be32(spapr->gpu_numa_id),
> +cpu_to_be32(ms->numa_state->num_nodes + spapr->extra_numa_nodes),
> };
>
> _FDT(rtas = fdt_add_subnode(fdt, 0, "rtas"));
> @@ -2824,13 +2824,18 @@ static void spapr_machine_init(MachineState *machine)
> /*
> * NVLink2-connected GPU RAM needs to be placed on a separate NUMA node.
> * We assign a new numa ID per GPU in spapr_pci_collect_nvgpu() which is
> - * called from vPHB reset handler so we initialize the counter here.
> + * called from vPHB reset handler. We have code to generate an extra numa
> + * id to place the GPU via 'extra_numa_nodes' and 'current_numa_node',
> which
> + * are initialized here.
> + *
> * If no NUMA is configured from the QEMU side, we start from 1 as GPU
> RAM
> * must be equally distant from any other node.
> - * The final value of spapr->gpu_numa_id is going to be written to
> + *
> + * The extra NUMA node ids generated for GPU usage will be written to
> * max-associativity-domains in spapr_build_fdt().
> */
> -spapr->gpu_numa_id = MAX(1, machine->numa_state->num_nodes);
> +spapr->current_numa_id = 0;
> +spapr->extra_numa_nodes = 0;
>
> if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) &&
> ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0,
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 0a418f1e67..09ac58fd7f 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -2492,3 +2492,36 @@ void spapr_pci_switch_vga(bool big_endian)
> _endian);
> }
> }
> +
> +unsigned spapr_pci_get_available_numa_id(Error **errp)
> +{
> +MachineState *machine = MACHINE(qdev_get_machine());
> +SpaprMachineState *spapr = SPAPR_MACHINE(machine);
> +NodeInfo
Re: device compatibility interface for live migration with assigned devices
On Wed, Aug 19, 2020 at 09:22:34PM -0600, Alex Williamson wrote:
> On Thu, 20 Aug 2020 08:39:22 +0800
> Yan Zhao wrote:
>
> > On Tue, Aug 18, 2020 at 11:36:52AM +0200, Cornelia Huck wrote:
> > > On Tue, 18 Aug 2020 10:16:28 +0100
> > > Daniel P. Berrangé wrote:
> > >
> > > > On Tue, Aug 18, 2020 at 05:01:51PM +0800, Jason Wang wrote:
> > > > >On 2020/8/18 下午4:55, Daniel P. Berrangé wrote:
> > > > >
> > > > > On Tue, Aug 18, 2020 at 11:24:30AM +0800, Jason Wang wrote:
> > > > >
> > > > > On 2020/8/14 下午1:16, Yan Zhao wrote:
> > > > >
> > > > > On Thu, Aug 13, 2020 at 12:24:50PM +0800, Jason Wang wrote:
> > > > >
> > > > > On 2020/8/10 下午3:46, Yan Zhao wrote:
> > > >
> > > > > we actually can also retrieve the same information through sysfs,
> > > > > .e.g
> > > > >
> > > > > |- [path to device]
> > > > > |--- migration
> > > > > | |--- self
> > > > > | | |---device_api
> > > > > || |---mdev_type
> > > > > || |---software_version
> > > > > || |---device_id
> > > > > || |---aggregator
> > > > > | |--- compatible
> > > > > | | |---device_api
> > > > > || |---mdev_type
> > > > > || |---software_version
> > > > > || |---device_id
> > > > > || |---aggregator
> > > > >
> > > > >
> > > > > Yes but:
> > > > >
> > > > > - You need one file per attribute (one syscall for one attribute)
> > > > > - Attribute is coupled with kobject
> > >
> > > Is that really that bad? You have the device with an embedded kobject
> > > anyway, and you can just put things into an attribute group?
> > >
> > > [Also, I think that self/compatible split in the example makes things
> > > needlessly complex. Shouldn't semantic versioning and matching already
> > > cover nearly everything? I would expect very few cases that are more
> > > complex than that. Maybe the aggregation stuff, but I don't think we
> > > need that self/compatible split for that, either.]
> > Hi Cornelia,
> >
> > The reason I want to declare compatible list of attributes is that
> > sometimes it's not a simple 1:1 matching of source attributes and target
> > attributes
> > as I demonstrated below,
> > source mdev of (mdev_type i915-GVTg_V5_2 + aggregator 1) is compatible to
> > target mdev of (mdev_type i915-GVTg_V5_4 + aggregator 2),
> >(mdev_type i915-GVTg_V5_8 + aggregator 4)
> >
> > and aggragator may be just one of such examples that 1:1 matching does not
> > fit.
>
> If you're suggesting that we need a new 'compatible' set for every
> aggregation, haven't we lost the purpose of aggregation? For example,
> rather than having N mdev types to represent all the possible
> aggregation values, we have a single mdev type with N compatible
> migration entries, one for each possible aggregation value. BTW, how do
> we have multiple compatible directories? compatible0001,
> compatible0002? Thanks,
>
do you think the bin_attribute I proposed yesterday good?
Then we can have a single compatible with a variable in the mdev_type and
aggregator.
mdev_type=i915-GVTg_V5_{val1:int:2,4,8}
aggregator={val1}/2
Thanks
Yan
Re: device compatibility interface for live migration with assigned devices
On Wed, Aug 19, 2020 at 09:13:45PM -0600, Alex Williamson wrote: > On Thu, 20 Aug 2020 08:18:10 +0800 > Yan Zhao wrote: > > > On Wed, Aug 19, 2020 at 11:50:21AM -0600, Alex Williamson wrote: > > <...> > > > > > > > What I care about is that we have a *standard* userspace API for > > > > > > > performing device compatibility checking / state migration, for > > > > > > > use by > > > > > > > QEMU/libvirt/ OpenStack, such that we can write code without > > > > > > > countless > > > > > > > vendor specific code paths. > > > > > > > > > > > > > > If there is vendor specific stuff on the side, that's fine as we > > > > > > > can > > > > > > > ignore that, but the core functionality for device compat / > > > > > > > migration > > > > > > > needs to be standardized. > > > > > > > > > > > > To summarize: > > > > > > - choose one of sysfs or devlink > > > > > > - have a common interface, with a standardized way to add > > > > > > vendor-specific attributes > > > > > > ? > > > > > > > > > > Please refer to my previous email which has more example and details. > > > > > > > > > hi Parav, > > > > the example is based on a new vdpa tool running over netlink, not based > > > > on devlink, right? > > > > For vfio migration compatibility, we have to deal with both mdev and > > > > physical > > > > pci devices, I don't think it's a good idea to write a new tool for it, > > > > given > > > > we are able to retrieve the same info from sysfs and there's already an > > > > mdevctl from Alex (https://github.com/mdevctl/mdevctl). > > > > > > > > hi All, > > > > could we decide that sysfs is the interface that every VFIO vendor > > > > driver > > > > needs to provide in order to support vfio live migration, otherwise the > > > > userspace management tool would not list the device into the compatible > > > > list? > > > > > > > > if that's true, let's move to the standardizing of the sysfs interface. > > > > (1) content > > > > common part: (must) > > > >- software_version: (in major.minor.bugfix scheme) > > > >- device_api: vfio-pci or vfio-ccw ... > > > >- type: mdev type for mdev device or > > > >a signature for physical device which is a counterpart for > > > >mdev type. > > > > > > > > device api specific part: (must) > > > > - pci id: pci id of mdev parent device or pci id of physical pci > > > > device (device_api is vfio-pci) > > > > > > As noted previously, the parent PCI ID should not matter for an mdev > > > device, if a vendor has a dependency on matching the parent device PCI > > > ID, that's a vendor specific restriction. An mdev device can also > > > expose a vfio-pci device API without the parent device being PCI. For > > > a physical PCI device, shouldn't the PCI ID be encompassed in the > > > signature? Thanks, > > > > > you are right. I need to put the PCI ID as a vendor specific field. > > I didn't do that because I wanted all fields in vendor specific to be > > configurable by management tools, so they can configure the target device > > according to the value of a vendor specific field even they don't know > > the meaning of the field. > > But maybe they can just ignore the field when they can't find a matching > > writable field to configure the target. > > > If fields can be ignored, what's the point of reporting them? Seems > it's no longer a requirement. Thanks, > sorry about the confusion. I mean this condition: about to migrate, openstack searches if there are existing matching MDEVs, if yes, i.e. all common/vendor specific fields match, then just create a VM with the matching target MDEV. (in this condition, the PCI ID field is not ignored); if not, openstack tries to create one MDEV according to mdev_type, and configures MDEV according to the vendor specific attributes. as PCI ID is not a configurable field, it just ignore the field. Thanks Yan
Re: device compatibility interface for live migration with assigned devices
On Thu, 20 Aug 2020 08:39:22 +0800 Yan Zhao wrote: > On Tue, Aug 18, 2020 at 11:36:52AM +0200, Cornelia Huck wrote: > > On Tue, 18 Aug 2020 10:16:28 +0100 > > Daniel P. Berrangé wrote: > > > > > On Tue, Aug 18, 2020 at 05:01:51PM +0800, Jason Wang wrote: > > > >On 2020/8/18 下午4:55, Daniel P. Berrangé wrote: > > > > > > > > On Tue, Aug 18, 2020 at 11:24:30AM +0800, Jason Wang wrote: > > > > > > > > On 2020/8/14 下午1:16, Yan Zhao wrote: > > > > > > > > On Thu, Aug 13, 2020 at 12:24:50PM +0800, Jason Wang wrote: > > > > > > > > On 2020/8/10 下午3:46, Yan Zhao wrote: > > > > > > > we actually can also retrieve the same information through sysfs, .e.g > > > > > > > > |- [path to device] > > > > |--- migration > > > > | |--- self > > > > | | |---device_api > > > > || |---mdev_type > > > > || |---software_version > > > > || |---device_id > > > > || |---aggregator > > > > | |--- compatible > > > > | | |---device_api > > > > || |---mdev_type > > > > || |---software_version > > > > || |---device_id > > > > || |---aggregator > > > > > > > > > > > > Yes but: > > > > > > > > - You need one file per attribute (one syscall for one attribute) > > > > - Attribute is coupled with kobject > > > > Is that really that bad? You have the device with an embedded kobject > > anyway, and you can just put things into an attribute group? > > > > [Also, I think that self/compatible split in the example makes things > > needlessly complex. Shouldn't semantic versioning and matching already > > cover nearly everything? I would expect very few cases that are more > > complex than that. Maybe the aggregation stuff, but I don't think we > > need that self/compatible split for that, either.] > Hi Cornelia, > > The reason I want to declare compatible list of attributes is that > sometimes it's not a simple 1:1 matching of source attributes and target > attributes > as I demonstrated below, > source mdev of (mdev_type i915-GVTg_V5_2 + aggregator 1) is compatible to > target mdev of (mdev_type i915-GVTg_V5_4 + aggregator 2), >(mdev_type i915-GVTg_V5_8 + aggregator 4) > > and aggragator may be just one of such examples that 1:1 matching does not > fit. If you're suggesting that we need a new 'compatible' set for every aggregation, haven't we lost the purpose of aggregation? For example, rather than having N mdev types to represent all the possible aggregation values, we have a single mdev type with N compatible migration entries, one for each possible aggregation value. BTW, how do we have multiple compatible directories? compatible0001, compatible0002? Thanks, Alex
Re: device compatibility interface for live migration with assigned devices
On Thu, 20 Aug 2020 08:18:10 +0800
Yan Zhao wrote:
> On Wed, Aug 19, 2020 at 11:50:21AM -0600, Alex Williamson wrote:
> <...>
> > > > > > What I care about is that we have a *standard* userspace API for
> > > > > > performing device compatibility checking / state migration, for use
> > > > > > by
> > > > > > QEMU/libvirt/ OpenStack, such that we can write code without
> > > > > > countless
> > > > > > vendor specific code paths.
> > > > > >
> > > > > > If there is vendor specific stuff on the side, that's fine as we can
> > > > > > ignore that, but the core functionality for device compat /
> > > > > > migration
> > > > > > needs to be standardized.
> > > > >
> > > > > To summarize:
> > > > > - choose one of sysfs or devlink
> > > > > - have a common interface, with a standardized way to add
> > > > > vendor-specific attributes
> > > > > ?
> > > >
> > > > Please refer to my previous email which has more example and details.
> > > >
> > > hi Parav,
> > > the example is based on a new vdpa tool running over netlink, not based
> > > on devlink, right?
> > > For vfio migration compatibility, we have to deal with both mdev and
> > > physical
> > > pci devices, I don't think it's a good idea to write a new tool for it,
> > > given
> > > we are able to retrieve the same info from sysfs and there's already an
> > > mdevctl from Alex (https://github.com/mdevctl/mdevctl).
> > >
> > > hi All,
> > > could we decide that sysfs is the interface that every VFIO vendor driver
> > > needs to provide in order to support vfio live migration, otherwise the
> > > userspace management tool would not list the device into the compatible
> > > list?
> > >
> > > if that's true, let's move to the standardizing of the sysfs interface.
> > > (1) content
> > > common part: (must)
> > >- software_version: (in major.minor.bugfix scheme)
> > >- device_api: vfio-pci or vfio-ccw ...
> > >- type: mdev type for mdev device or
> > >a signature for physical device which is a counterpart for
> > > mdev type.
> > >
> > > device api specific part: (must)
> > > - pci id: pci id of mdev parent device or pci id of physical pci
> > > device (device_api is vfio-pci)
> >
> > As noted previously, the parent PCI ID should not matter for an mdev
> > device, if a vendor has a dependency on matching the parent device PCI
> > ID, that's a vendor specific restriction. An mdev device can also
> > expose a vfio-pci device API without the parent device being PCI. For
> > a physical PCI device, shouldn't the PCI ID be encompassed in the
> > signature? Thanks,
> >
> you are right. I need to put the PCI ID as a vendor specific field.
> I didn't do that because I wanted all fields in vendor specific to be
> configurable by management tools, so they can configure the target device
> according to the value of a vendor specific field even they don't know
> the meaning of the field.
> But maybe they can just ignore the field when they can't find a matching
> writable field to configure the target.
If fields can be ignored, what's the point of reporting them? Seems
it's no longer a requirement. Thanks,
Alex
> > > - subchannel_type (device_api is vfio-ccw)
> > >
> > > vendor driver specific part: (optional)
> > > - aggregator
> > > - chpid_type
> > > - remote_url
> > >
> > > NOTE: vendors are free to add attributes in this part with a
> > > restriction that this attribute is able to be configured with the same
> > > name in sysfs too. e.g.
> > > for aggregator, there must be a sysfs attribute in device node
> > > /sys/devices/pci:00/:00:02.0/882cc4da-dede-11e7-9180-078a62063ab1/intel_vgpu/aggregator,
> > > so that the userspace tool is able to configure the target device
> > > according to source device's aggregator attribute.
> > >
> > >
> > > (2) where and structure
> > > proposal 1:
> > > |- [path to device]
> > > |--- migration
> > > | |--- self
> > > | ||-software_version
> > > | ||-device_api
> > > | ||-type
> > > | ||-[pci_id or subchannel_type]
> > > | ||-
> > > | |--- compatible
> > > | ||-software_version
> > > | ||-device_api
> > > | ||-type
> > > | ||-[pci_id or subchannel_type]
> > > | ||-
> > > multiple compatible is allowed.
> > > attributes should be ASCII text files, preferably with only one value
> > > per file.
> > >
> > >
> > > proposal 2: use bin_attribute.
> > > |- [path to device]
> > > |--- migration
> > > | |--- self
> > > | |--- compatible
> > >
> > > so we can continue use multiline format. e.g.
> > > cat compatible
> > > software_version=0.1.0
> > > device_api=vfio_pci
> > > type=i915-GVTg_V5_{val1:int:1,2,4,8}
> > > pci_id=80865963
> > > aggregator={val1}/2
> > >
> > > Thanks
> > > Yan
> > >
> >
>
Re: [RFC v3 1/1] memory: Skip bad range assertion if notifier supports arbitrary masks
On 2020/8/19 下午11:50, Peter Xu wrote: On Wed, Aug 19, 2020 at 03:15:26PM +0800, Jason Wang wrote: Yes, actually, I feel confused after reading the codes. Is notifier->start IOVA or GPA? In vfio.c, we did: iommu_notifier_init(>n, vfio_iommu_map_notify, IOMMU_NOTIFIER_ALL, section->offset_within_region, int128_get64(llend), iommu_idx); So it looks to me the start and end are GPA, but the assertion above check it against IOVA which seems to be wrong It should be iova; both section->offset_within_region and llend are for the device's iova address space. Thanks, Interesting, how can memory region know which IOVA is used by guest? Thanks
Re: [PATCH 02/10] numa: introduce MachineClass::forbid_asymmetrical_numa
On Thu, Aug 20, 2020 at 11:17:26AM +1000, David Gibson wrote:
> On Fri, Aug 14, 2020 at 05:54:16PM -0300, Daniel Henrique Barboza wrote:
> > The pSeries machine does not support asymmetrical NUMA
> > configurations.
>
> This seems a bit oddly specific to have as a global machine class
> property.
>
> Would it make more sense for machines with specific NUMA constraints
> to just verify those during their initialization?
This would be much simpler. However, I like the idea of
representing machine-specific configuration validation rules as
data that can eventually be exported to management software.
(CCing John Snow, who had spent some time thinking about
configuration validation recently.)
> >
> > CC: Eduardo Habkost
> > CC: Marcel Apfelbaum
> > Signed-off-by: Daniel Henrique Barboza
> > ---
> > hw/core/numa.c | 7 +++
> > hw/ppc/spapr.c | 1 +
> > include/hw/boards.h | 1 +
> > 3 files changed, 9 insertions(+)
> >
> > diff --git a/hw/core/numa.c b/hw/core/numa.c
> > index d1a94a14f8..1e81233c1d 100644
> > --- a/hw/core/numa.c
> > +++ b/hw/core/numa.c
> > @@ -547,6 +547,7 @@ static int parse_numa(void *opaque, QemuOpts *opts,
> > Error **errp)
> > */
> > static void validate_numa_distance(MachineState *ms)
> > {
> > +MachineClass *mc = MACHINE_GET_CLASS(ms);
> > int src, dst;
> > bool is_asymmetrical = false;
> > int nb_numa_nodes = ms->numa_state->num_nodes;
> > @@ -575,6 +576,12 @@ static void validate_numa_distance(MachineState *ms)
> > }
> >
> > if (is_asymmetrical) {
> > +if (mc->forbid_asymmetrical_numa) {
> > +error_report("This machine type does not support "
> > + "asymmetrical numa distances.");
> > +exit(EXIT_FAILURE);
> > +}
> > +
> > for (src = 0; src < nb_numa_nodes; src++) {
> > for (dst = 0; dst < nb_numa_nodes; dst++) {
> > if (src != dst && numa_info[src].distance[dst] == 0) {
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index dd2fa4826b..3b16edaf4c 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -4512,6 +4512,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
> > void *data)
> > */
> > mc->numa_mem_align_shift = 28;
> > mc->auto_enable_numa = true;
> > +mc->forbid_asymmetrical_numa = true;
> >
> > smc->default_caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
> > smc->default_caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_ON;
> > diff --git a/include/hw/boards.h b/include/hw/boards.h
> > index bc5b82ad20..dc6cdd1c53 100644
> > --- a/include/hw/boards.h
> > +++ b/include/hw/boards.h
> > @@ -215,6 +215,7 @@ struct MachineClass {
> > bool nvdimm_supported;
> > bool numa_mem_supported;
> > bool auto_enable_numa;
> > +bool forbid_asymmetrical_numa;
> > const char *default_ram_id;
> >
> > HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
>
> --
> David Gibson | I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au| minimalist, thank you. NOT _the_
> _other_
> | _way_ _around_!
> http://www.ozlabs.org/~dgibson
--
Eduardo
Re: [PATCH v6 0/8] Generalize start-powered-off property from ARM
David Gibson writes: > On Wed, Aug 19, 2020 at 01:42:58PM -0300, Thiago Jung Bauermann wrote: >> This version has one small fix in patch 7, and adds Philippe's Reviewed-bys. >> >> Applies cleanly on dgibson/ppc-for-5.2. >> >> Original cover letter below, followed by changelog: >> >> >> The ARM code has a start-powered-off property in ARMCPU, which is a >> subclass of CPUState. This property causes arm_cpu_reset() to set >> CPUState::halted to 1, signalling that the CPU should start in a halted >> state. Other architectures also have code which aim to achieve the same >> effect, but without using a property. >> >> The ppc/spapr version has a bug where QEMU does a KVM_RUN on the vcpu >> before cs->halted is set to 1, causing the vcpu to run while it's still in >> an unitialized state (more details in patch 3). >> >> Peter Maydell mentioned the ARM start-powered-off property and >> Eduardo Habkost suggested making it generic, so this patch series does >> that, for all cases which I was able to find via grep in the code. >> >> The only problem is that I was only able to test these changes on a ppc64le >> pseries KVM guest, so except for patches 2 and 3, all others are only >> build-tested. Also, my grasp of QOM lifecycle is basically non-existant so >> please be aware of that when reviewing this series. >> >> The last patch may be wrong, as pointed out by Eduardo, so I marked it as >> RFC. It may make sense to drop it. > > Applied to ppc-for-5.2. Great news. Thanks! -- Thiago Jung Bauermann IBM Linux Technology Center
Re: [PATCH v4 4/4] iotests: Test node/bitmap aliases during migration
On 8/18/20 8:32 AM, Max Reitz wrote:
Signed-off-by: Max Reitz
---
tests/qemu-iotests/300 | 595 +
tests/qemu-iotests/300.out | 5 +
Rather sparse output (I hate debugging those sorts of outputs when the
test is failing).
tests/qemu-iotests/group | 1 +
3 files changed, 601 insertions(+)
create mode 100755 tests/qemu-iotests/300
create mode 100644 tests/qemu-iotests/300.out
+# Dirty some random megabytes
+for _ in range(9):
+mb_ofs = random.randrange(1024)
+self.vm_a.hmp_qemu_io(self.src_node_name, f'write {mb_ofs}M 1M')
It turns out that the discard operation likewise dirties the bitmap, but
slightly faster (see edb90bbd). We could optimize it on top, but I'm
not going to require a micro-optimizing to get it in. The test takes
about 12 seconds to run for me, but you didn't mark it as such in
'group', so that's good; but it turns up a problem:
300 fail [20:55:54] [20:56:06]output
mismatch (see 300.out.bad)
--- /home/eblake/qemu-tmp2/tests/qemu-iotests/300.out 2020-08-19
20:53:11.087791988 -0500
+++ /home/eblake/qemu-tmp2/tests/qemu-iotests/300.out.bad 2020-08-19
20:56:06.092428756 -0500
@@ -1,5 +1,41 @@
-.
+WARNING:qemu.machine:qemu received signal 11; command:
"/home/eblake/qemu-tmp2/tests/qemu-iotests/../../x86_64-softmmu/qemu-system-x86_64
-display none -vga none -chardev
socket,id=mon,path=/tmp/tmp.qT831UThme/qemu-b-798452-monitor.sock -mon
chardev=mon,mode=control -qtest
unix:path=/tmp/tmp.qT831UThme/qemu-b-798452-qtest.sock -accel qtest
-nodefaults -display none -accel qtest -blockdev
node-name=node0,driver=null-co -incoming unix:/tmp/tmp.qT831UThme/mig_sock"
+.FE...
+==
+ERROR: test_migratee_bitmap_is_not_mapped_on_dst
(__main__.TestBlockBitmapMappingErrors)
+--
+Traceback (most recent call last):
+ File
"/home/eblake/qemu-tmp2/tests/qemu-iotests/../../python/qemu/machine.py",
line 435, in _do_shutdown
+self._soft_shutdown(timeout, has_quit)
+ File
"/home/eblake/qemu-tmp2/tests/qemu-iotests/../../python/qemu/machine.py",
line 415, in _soft_shutdown
+self._qmp.cmd('quit')
+ File
"/home/eblake/qemu-tmp2/tests/qemu-iotests/../../python/qemu/qmp.py",
line 266, in cmd
+return self.cmd_obj(qmp_cmd)
+ File
"/home/eblake/qemu-tmp2/tests/qemu-iotests/../../python/qemu/qmp.py",
line 246, in cmd_obj
+self.__sock.sendall(json.dumps(qmp_cmd).encode('utf-8'))
+BrokenPipeError: [Errno 32] Broken pipe
+
+The above exception was the direct cause of the following exception:
+
+Traceback (most recent call last):
+ File "300", line 76, in tearDown
+self.vm_b.shutdown()
+ File
"/home/eblake/qemu-tmp2/tests/qemu-iotests/../../python/qemu/machine.py",
line 465, in shutdown
+self._do_shutdown(timeout, has_quit)
+ File
"/home/eblake/qemu-tmp2/tests/qemu-iotests/../../python/qemu/machine.py",
line 438, in _do_shutdown
+raise AbnormalShutdown("Could not perform graceful shutdown") \
+qemu.machine.AbnormalShutdown: Could not perform graceful shutdown
+
+==
+FAIL: test_migratee_bitmap_is_not_mapped_on_dst
(__main__.TestBlockBitmapMappingErrors)
+--
+Traceback (most recent call last):
+ File "300", line 384, in test_migratee_bitmap_is_not_mapped_on_dst
+self.migrate(False)
+ File "300", line 99, in migrate
+self.assertEqual(self.vm_a.wait_migration('postmigrate'),
+AssertionError: False != True
+
--
Ran 37 tests
-OK
+FAILED (failures=1, errors=1)
I'm not sure why I'm seeing that, but it looks like you've got a bad
deref somewhere in the alias code.
+class TestLongBitmapNames(TestAliasMigration):
+# Giving long bitmap names is OK, as long as there is a short alias for
+# migration
+src_bmap_name = 'a' * 512
+dst_bmap_name = 'b' * 512
This part's new compared to v3 ;) Looks like you've made several
enhancements.
--
Eric Blake, Principal Software Engineer
Red Hat, Inc. +1-919-301-3226
Virtualization: qemu.org | libvirt.org
Re: [PATCH v7 13/13] tests/acceptance: console boot tests for quanta-gsj
On Tue, Aug 11, 2020 at 8:26 PM Havard Skinnemoen
wrote:
>
> On Tue, Aug 11, 2020 at 1:48 AM Philippe Mathieu-Daudé
> wrote:
> > INTERRUPTED: Test interrupted by SIGTERM
> > Runner error occurred: Timeout reached
> > (240.45 s)
> >
> > Is that expected?
>
> I'm not sure why it only happens when running direct kernel boot with
> unoptimized qemu, but it seems a little happier if I enable a few more
> peripherals that I have queued up (sd, ehci, ohci and rng), though not
> enough.
>
> It still stalls for an awfully long time on "console: Run /init as
> init process" though. I'm not sure what it's doing there. With -O2 it
> only takes a couple of seconds to move on.
So it turns out that the kernel gets _really_ sluggish when skipping
the clock initialization normally done by the boot loader.
I changed the reset value of CLKSEL like this:
diff --git a/hw/misc/npcm7xx_clk.c b/hw/misc/npcm7xx_clk.c
index 21ab4200d1..5e9849410f 100644
--- a/hw/misc/npcm7xx_clk.c
+++ b/hw/misc/npcm7xx_clk.c
@@ -67,7 +67,7 @@ enum NPCM7xxCLKRegisters {
*/
static const uint32_t cold_reset_values[NPCM7XX_CLK_NR_REGS] = {
[NPCM7XX_CLK_CLKEN1]= 0x,
-[NPCM7XX_CLK_CLKSEL]= 0x004a,
+[NPCM7XX_CLK_CLKSEL]= 0x004aaba9,
[NPCM7XX_CLK_CLKDIV1] = 0x5413f855,
[NPCM7XX_CLK_PLLCON0] = 0x00222101 | PLLCON_LOKI,
[NPCM7XX_CLK_PLLCON1] = 0x00202101 | PLLCON_LOKI,
which switches the CPU core and UART to run from PLL2 instead of
CLKREF (25 MHz).
With this change, the test passes without optimization:
(02/19)
tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_quanta_gsj_initrd:
PASS (39.62 s)
It doesn't look like this change hurts booting from the bootrom (IIUC
the nuvoton bootblock overwrites CLKSEL anyway), but it's not super
clean.
Perhaps I should make it conditional on kernel_filename being set? Or
would it be better to provide a write_board_setup hook for this?
Re: [PATCH v6 0/8] Generalize start-powered-off property from ARM
On Wed, Aug 19, 2020 at 01:42:58PM -0300, Thiago Jung Bauermann wrote: > This version has one small fix in patch 7, and adds Philippe's Reviewed-bys. > > Applies cleanly on dgibson/ppc-for-5.2. > > Original cover letter below, followed by changelog: > > > The ARM code has a start-powered-off property in ARMCPU, which is a > subclass of CPUState. This property causes arm_cpu_reset() to set > CPUState::halted to 1, signalling that the CPU should start in a halted > state. Other architectures also have code which aim to achieve the same > effect, but without using a property. > > The ppc/spapr version has a bug where QEMU does a KVM_RUN on the vcpu > before cs->halted is set to 1, causing the vcpu to run while it's still in > an unitialized state (more details in patch 3). > > Peter Maydell mentioned the ARM start-powered-off property and > Eduardo Habkost suggested making it generic, so this patch series does > that, for all cases which I was able to find via grep in the code. > > The only problem is that I was only able to test these changes on a ppc64le > pseries KVM guest, so except for patches 2 and 3, all others are only > build-tested. Also, my grasp of QOM lifecycle is basically non-existant so > please be aware of that when reviewing this series. > > The last patch may be wrong, as pointed out by Eduardo, so I marked it as > RFC. It may make sense to drop it. Applied to ppc-for-5.2. > > Changes since v5: > > Patch "ppc/e500: Use start-powered-off CPUState property" > Patch "mips/cps: Use start-powered-off CPUState property" > Patch "sparc/sun4m: Remove main_cpu_reset()" > Patch "target/s390x: Use start-powered-off CPUState property" > - Added Philippe's Reviewed-by. > > Patch "sparc/sun4m: Use start-powered-off CPUState property" > - Move call to qdev_realize_and_unref() right after > object_property_set_bool(), > as suggested by Philippe. > > Changes since v4: > > Patch "ppc/e500: Use start-powered-off CPUState property" > Patch "sparc/sun4m: Use start-powered-off CPUState property" > - Use qdev_realize_and_unref() instead of qdev_realize(), as suggested > by Igor. > - Pass _fatal to qdev_realize_and_unref() instead of manually > reporting the error and exiting QEMU, as suggested by Philippe. > - Changed object_property_set_bool() to use _fatal instead of > _abort. > > Patch "mips/cps: Use start-powered-off CPUState property" > - Use qdev_realize_and_unref() instead of qdev_realize(), as suggested > by Igor. > - Use existing errp argument to propagate error back to the caller, as > suggested by Philippe. > - Changed object_property_set_bool() to use existing errp argument to > propagate error back to the caller instead of using _abort. > > Changes since v3: > > General: > - Added David's, Greg's and Cornelia's Reviewed-by and Acked-by to some > of the patches. > - Rebased on top of dgibson/ppc-for-5.2. > > Patch "ppc/e500: Use start-powered-off CPUState property" > Patch "mips/cps: Use start-powered-off CPUState property" > Patch "sparc/sun4m: Use start-powered-off CPUState property" > - Initialize CPU object with object_new() and qdev_realize() instead > of cpu_create(). > - Removed Reviewed-by's and Acked-by's from these patches because of > these changes. > > Changes since v2: > > General: > - Added Philippe's Reviewed-by to some of the patches. > > Patch "ppc/spapr: Use start-powered-off CPUState property" > - Set the CPUState::start_powered_off variable directly rather than using > object_property_set_bool(). Suggested by Philippe. > > Patch "sparc/sun4m: Remove main_cpu_reset()" > - New patch. Suggested by Philippe. > > Patch "sparc/sun4m: Use start-powered-off CPUState property" > - Remove secondary_cpu_reset(). Suggested by Philippe. > - Remove setting of `cs->halted = 1` from cpu_devinit(). Suggested by > Philippe. > > Patch "Don't set CPUState::halted in cpu_devinit()" > - Squashed into previous patch. Suggested by Philippe. > > Patch "sparc/sun4m: Use one cpu_reset() function for main and secondary CPUs" > - Dropped. > > Patch "target/s390x: Use start-powered-off CPUState property" > - Set the CPUState::start_powered_off variable directly rather than using > object_property_set_bool(). Suggested by Philippe. > - Mention in the commit message Eduardo's observation that before this > patch, the code didn't set cs->halted on reset. > > Thiago Jung Bauermann (8): > target/arm: Move start-powered-off property to generic CPUState > target/arm: Move setting of CPU halted state to generic code > ppc/spapr: Use start-powered-off CPUState property > ppc/e500: Use start-powered-off CPUState property > mips/cps: Use start-powered-off CPUState property > sparc/sun4m: Remove main_cpu_reset() > sparc/sun4m: Use start-powered-off CPUState property > target/s390x: Use start-powered-off CPUState property > > exec.c | 1 + > hw/core/cpu.c | 2 +- > hw/mips/cps.c | 14 ++ >
Re: [PATCH 02/10] numa: introduce MachineClass::forbid_asymmetrical_numa
On Fri, Aug 14, 2020 at 05:54:16PM -0300, Daniel Henrique Barboza wrote:
> The pSeries machine does not support asymmetrical NUMA
> configurations.
This seems a bit oddly specific to have as a global machine class
property.
Would it make more sense for machines with specific NUMA constraints
to just verify those during their initialization?
>
> CC: Eduardo Habkost
> CC: Marcel Apfelbaum
> Signed-off-by: Daniel Henrique Barboza
> ---
> hw/core/numa.c | 7 +++
> hw/ppc/spapr.c | 1 +
> include/hw/boards.h | 1 +
> 3 files changed, 9 insertions(+)
>
> diff --git a/hw/core/numa.c b/hw/core/numa.c
> index d1a94a14f8..1e81233c1d 100644
> --- a/hw/core/numa.c
> +++ b/hw/core/numa.c
> @@ -547,6 +547,7 @@ static int parse_numa(void *opaque, QemuOpts *opts, Error
> **errp)
> */
> static void validate_numa_distance(MachineState *ms)
> {
> +MachineClass *mc = MACHINE_GET_CLASS(ms);
> int src, dst;
> bool is_asymmetrical = false;
> int nb_numa_nodes = ms->numa_state->num_nodes;
> @@ -575,6 +576,12 @@ static void validate_numa_distance(MachineState *ms)
> }
>
> if (is_asymmetrical) {
> +if (mc->forbid_asymmetrical_numa) {
> +error_report("This machine type does not support "
> + "asymmetrical numa distances.");
> +exit(EXIT_FAILURE);
> +}
> +
> for (src = 0; src < nb_numa_nodes; src++) {
> for (dst = 0; dst < nb_numa_nodes; dst++) {
> if (src != dst && numa_info[src].distance[dst] == 0) {
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index dd2fa4826b..3b16edaf4c 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -4512,6 +4512,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
> void *data)
> */
> mc->numa_mem_align_shift = 28;
> mc->auto_enable_numa = true;
> +mc->forbid_asymmetrical_numa = true;
>
> smc->default_caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
> smc->default_caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_ON;
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index bc5b82ad20..dc6cdd1c53 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -215,6 +215,7 @@ struct MachineClass {
> bool nvdimm_supported;
> bool numa_mem_supported;
> bool auto_enable_numa;
> +bool forbid_asymmetrical_numa;
> const char *default_ram_id;
>
> HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: [PATCH 3/8] spapr/xive: Query the characteristics of a source in KVM
On Wed, Aug 19, 2020 at 03:08:38PM +0200, Cédric Le Goater wrote:
> When running a guest with a kernel IRQ chip enabled, the XIVE
> characteristics of the interrupts are advertised to the guest in the
> H_INT_GET_SOURCE_INFO hcall. These characteristics depend on the
> underlying HW interrupts but today, QEMU simply advertises its own
> without checking what the host supports. It is not a problem for the
> moment, but POWER10 will (re)add support for StoreEOI and we need a
> way to in sync with the host.
>
> The KVM_DEV_XIVE_GRP_SOURCE_INFO command lets QEMU query the XIVE
> characteristics of the underlying HW interrupts and override any
> previous setting done by QEMU. This allows the fallback mode, when the
> XIVE device is emulated by QEMU, to use its own custom settings on the
> sources but makes sure that we don't let a guest run with features
> incompatible with KVM.
>
> It only applies to the StoreEOI feature for the moment.
Urgh. This means that the source characteristics can change across a
migration, that's kind of a problem.
> Signed-off-by: Cédric Le Goater
> ---
> include/hw/ppc/spapr_xive.h | 2 ++
> hw/intc/spapr_xive.c| 20
> hw/intc/spapr_xive_kvm.c| 26 ++
> 3 files changed, 48 insertions(+)
>
> diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
> index 1dddcbcb9cdd..3f325723ea74 100644
> --- a/include/hw/ppc/spapr_xive.h
> +++ b/include/hw/ppc/spapr_xive.h
> @@ -84,6 +84,8 @@ void kvmppc_xive_disconnect(SpaprInterruptController *intc);
> void kvmppc_xive_reset(SpaprXive *xive, Error **errp);
> int kvmppc_xive_set_source_config(SpaprXive *xive, uint32_t lisn, XiveEAS
> *eas,
>Error **errp);
> +int kvmppc_xive_get_source_info(SpaprXive *xive, uint32_t lisn, uint64_t
> *flags,
> + Error **errp);
> void kvmppc_xive_sync_source(SpaprXive *xive, uint32_t lisn, Error **errp);
> uint64_t kvmppc_xive_esb_rw(XiveSource *xsrc, int srcno, uint32_t offset,
> uint64_t data, bool write);
> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
> index 1fa09f287ac0..943b9958a68b 100644
> --- a/hw/intc/spapr_xive.c
> +++ b/hw/intc/spapr_xive.c
> @@ -932,6 +932,26 @@ static target_ulong h_int_get_source_info(PowerPCCPU
> *cpu,
> args[0] |= SPAPR_XIVE_SRC_STORE_EOI;
> }
>
> +if (kvm_irqchip_in_kernel()) {
> +Error *local_err = NULL;
> +uint64_t flags = 0;
> +
> +kvmppc_xive_get_source_info(xive, lisn, , _err);
> +if (local_err) {
> +error_report_err(local_err);
> +return H_HARDWARE;
> +}
> +
> +/*
> + * Override QEMU settings with KVM values
> + */
> +if (flags & XIVE_SRC_STORE_EOI) {
> +args[0] |= SPAPR_XIVE_SRC_STORE_EOI;
> +} else {
> +args[0] &= ~SPAPR_XIVE_SRC_STORE_EOI;
> +}
> +}
> +
> /*
> * Force the use of the H_INT_ESB hcall in case of an LSI
> * interrupt. This is necessary under KVM to re-trigger the
> diff --git a/hw/intc/spapr_xive_kvm.c b/hw/intc/spapr_xive_kvm.c
> index e8667ce5f621..90f4509e6959 100644
> --- a/hw/intc/spapr_xive_kvm.c
> +++ b/hw/intc/spapr_xive_kvm.c
> @@ -217,6 +217,32 @@ int kvmppc_xive_set_source_config(SpaprXive *xive,
> uint32_t lisn, XiveEAS *eas,
> _src, true, errp);
> }
>
> +int kvmppc_xive_get_source_info(SpaprXive *xive, uint32_t lisn, uint64_t
> *flags,
> + Error **errp)
> +{
> +struct kvm_ppc_xive_src kvm_src = { 0 };
> +int ret;
> +
> +/*
> + * Check that KVM supports the new attribute to query source
> + * characteristics.
> + */
> +if (!kvm_device_check_attr(xive->fd, KVM_DEV_XIVE_GRP_SOURCE_INFO, 0)) {
> +return 0;
> +}
> +
> +ret = kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_SOURCE_INFO, lisn,
> +_src, false, errp);
> +if (ret < 0) {
> +return ret;
> +}
> +
> +if (kvm_src.flags & KVM_XIVE_SOURCE_FLAG_STORE_EOI) {
> +*flags |= XIVE_SRC_STORE_EOI;
> +}
> +return 0;
> +}
> +
> void kvmppc_xive_sync_source(SpaprXive *xive, uint32_t lisn, Error **errp)
> {
> kvm_device_access(xive->fd, KVM_DEV_XIVE_GRP_SOURCE_SYNC, lisn,
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: [PATCH 7/8] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends
On Wed, Aug 19, 2020 at 03:08:42PM +0200, Cédric Le Goater wrote:
I can see why this is a good idea, but it really needs a rationale in
the comment for posterity.
> Signed-off-by: Cédric Le Goater
> ---
> hw/ppc/spapr_irq.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
> index 80cf1c3d6bb2..d036c8fef519 100644
> --- a/hw/ppc/spapr_irq.c
> +++ b/hw/ppc/spapr_irq.c
> @@ -172,7 +172,7 @@ static int spapr_irq_check(SpaprMachineState *spapr,
> Error **errp)
> * To cover both and not confuse the OS, add an early failure in
> * QEMU.
> */
> -if (spapr->irq == _irq_xive) {
> +if (!spapr->irq->xics) {
> error_setg(errp, "XIVE-only machines require a POWER9 CPU");
> return -1;
> }
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: [PATCH v7 0/7] coroutines: generate wrapper code
On 7/27/20 7:59 AM, Vladimir Sementsov-Ogievskiy wrote: 27.07.2020 15:48, Stefan Hajnoczi wrote: On Wed, Jun 10, 2020 at 01:03:29PM +0300, Vladimir Sementsov-Ogievskiy wrote: Hi all! The aim of the series is to reduce code-duplication and writing parameters structure-packing by hand around coroutine function wrappers. Benefits:  - no code duplication  - less indirection Please add documentation so others know when and how to use this. I suggest adding a docs/devel/coroutine-wrapper.rst document and adding a code comment to #define generated_co_wrapper pointing to the documentation. Please rename coroutine-wrapper.py to block-coroutine-wrapper.py since it is specific to the block layer. OK, will do. Thanks for taking a look! As this series touched Makefile to add a generated .c, you'll also need to rebase that part to apply on top of Paolo's meson conversion (cc'ing him if you need help figuring it out) -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3226 Virtualization: qemu.org | libvirt.org
Re: device compatibility interface for live migration with assigned devices
On Thu, 2020-08-20 at 08:39 +0800, Yan Zhao wrote: > On Tue, Aug 18, 2020 at 11:36:52AM +0200, Cornelia Huck wrote: > > On Tue, 18 Aug 2020 10:16:28 +0100 > > Daniel P. Berrangé wrote: > > > > > On Tue, Aug 18, 2020 at 05:01:51PM +0800, Jason Wang wrote: > > > >On 2020/8/18 下午4:55, Daniel P. Berrangé wrote: > > > > > > > > On Tue, Aug 18, 2020 at 11:24:30AM +0800, Jason Wang wrote: > > > > > > > > On 2020/8/14 下午1:16, Yan Zhao wrote: > > > > > > > > On Thu, Aug 13, 2020 at 12:24:50PM +0800, Jason Wang wrote: > > > > > > > > On 2020/8/10 下午3:46, Yan Zhao wrote: > > > > we actually can also retrieve the same information through sysfs, .e.g > > > > > > > > |- [path to device] > > > > |--- migration > > > > | |--- self > > > > | | |---device_api > > > > || |---mdev_type > > > > || |---software_version > > > > || |---device_id > > > > || |---aggregator > > > > | |--- compatible > > > > | | |---device_api > > > > || |---mdev_type > > > > || |---software_version > > > > || |---device_id > > > > || |---aggregator > > > > > > > > > > > > Yes but: > > > > > > > > - You need one file per attribute (one syscall for one attribute) > > > > - Attribute is coupled with kobject > > > > Is that really that bad? You have the device with an embedded kobject > > anyway, and you can just put things into an attribute group? > > > > [Also, I think that self/compatible split in the example makes things > > needlessly complex. Shouldn't semantic versioning and matching already > > cover nearly everything? I would expect very few cases that are more > > complex than that. Maybe the aggregation stuff, but I don't think we > > need that self/compatible split for that, either.] > > Hi Cornelia, > > The reason I want to declare compatible list of attributes is that > sometimes it's not a simple 1:1 matching of source attributes and target > attributes > as I demonstrated below, > source mdev of (mdev_type i915-GVTg_V5_2 + aggregator 1) is compatible to > target mdev of (mdev_type i915-GVTg_V5_4 + aggregator 2), >(mdev_type i915-GVTg_V5_8 + aggregator 4) the way you are doing the nameing is till really confusing by the way if this has not already been merged in the kernel can you chagne the mdev so that mdev_type i915-GVTg_V5_2 is 2 of mdev_type i915-GVTg_V5_1 instead of half the device currently you need to deived the aggratod by the number at the end of the mdev type to figure out how much of the phsicial device is being used with is a very unfridly api convention the way aggrator are being proposed in general is not really someting i like but i thin this at least is something that should be able to correct. with the complexity in the mdev type name + aggrator i suspect that this will never be support in openstack nova directly requireing integration via cyborg unless we can pre partion the device in to mdevs staicaly and just ignore this. this is way to vendor sepecif to integrate into something like openstack in nova unless we can guarentee taht how aggreator work will be portable across vendors genericly. > > and aggragator may be just one of such examples that 1:1 matching does not > fit. for openstack nova i dont see us support anything beyond the 1:1 case where the mdev type does not change. i woudl really prefer if there was just one mdev type that repsented the minimal allcatable unit and the aggragaotr where used to create compostions of that. i.e instad of i915-GVTg_V5_2 beign half the device, have 1 mdev type i915-GVTg and if the device support 8 of them then we can aggrate 4 of i915-GVTg if you want to have muplie mdev type to model the different amoutn of the resouce e.g. i915-GVTg_small i915-GVTg_large that is totlaly fine too or even i915-GVTg_4 indcating it sis 4 of i915-GVTg failing that i would just expose an mdev type per composable resouce and allow us to compose them a the user level with some other construct mudeling a attament to the device. e.g. create composed mdev or somethig that is an aggreateion of multiple sub resouces each of which is an mdev. so kind of like how bond port work. we would create an mdev for each of the sub resouces and then create a bond or aggrated mdev by reference the other mdevs by uuid then attach only the aggreated mdev to the instance. the current aggrator syntax and sematic however make me rather uncofrotable when i think about orchestating vms on top of it even to boot them let alone migrate them. > > So, we explicitly list out self/compatible attributes, and management > tools only need to check if self attributes is contained compatible > attributes. > > or do you mean only compatible list is enough, and the management tools > need to find out self list by themselves? > But I think provide a self list is easier for management tools. > > Thanks > Yan >
Re: [PATCH] virtio: vdpa: omit check return of g_malloc
Philippe Mathieu-Daudé 于2020年8月19日周三 下午11:07写道：
>
> On 8/19/20 4:43 PM, Li Qiang wrote:
> > If g_malloc fails, the application will be terminated.
>
> Which we don't want... better to use g_try_malloc() instead?
I don't think so. If g_malloc return NULL it means a critical
situation I think terminate the application
is OK. Though I don't find any rule/practices the qemu code base uses
g_malloc far more than
g_try_malloc.
Thanks,
Li Qiang
>
> > No need to check the return value of g_malloc.
> >
> > Signed-off-by: Li Qiang
> > ---
> > hw/virtio/vhost-vdpa.c | 7 +--
> > 1 file changed, 1 insertion(+), 6 deletions(-)
> >
> > diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
> > index 4580f3efd8..403ae3ae07 100644
> > --- a/hw/virtio/vhost-vdpa.c
> > +++ b/hw/virtio/vhost-vdpa.c
> > @@ -320,10 +320,8 @@ static int vhost_vdpa_set_config(struct vhost_dev
> > *dev, const uint8_t *data,
> > struct vhost_vdpa_config *config;
> > int ret;
> > unsigned long config_size = offsetof(struct vhost_vdpa_config, buf);
> > +
> > config = g_malloc(size + config_size);
> > -if (config == NULL) {
> > -return -1;
> > -}
> > config->off = offset;
> > config->len = size;
> > memcpy(config->buf, data, size);
> > @@ -340,9 +338,6 @@ static int vhost_vdpa_get_config(struct vhost_dev *dev,
> > uint8_t *config,
> > int ret;
> >
> > v_config = g_malloc(config_len + config_size);
> > -if (v_config == NULL) {
> > -return -1;
> > -}
> > v_config->len = config_len;
> > v_config->off = 0;
> > ret = vhost_vdpa_call(dev, VHOST_VDPA_GET_CONFIG, v_config);
> >
>
Re: [PATCH] qtest: add fuzz test case
Alexander Bulekov 于2020年8月20日周四 上午12:23写道： > > On 200819 2250, Li Qiang wrote: > > Philippe Mathieu-Daudé 于2020年8月19日周三 下午10:38写道： > > > > > On 8/19/20 4:15 PM, Li Qiang wrote: > > > > Currently the device fuzzer find a more and more issues. > > > > For every fuzz case, we need not only the fixes but also > > > > the coressponding test case. We can analysis the reproducer > > > > > > Typo "corresponding" > > > > > > > Will correct in next revision. > > > > > > > > > > > for every case and find what happened in where and write > > > > a beautiful test case. However the raw data of reproducer is not > > > > friendly to analysis. It will take a very long time, even far more > > > > than the fixes itself. So let's create a new file to hold all of > > > > the fuzz test cases and just use the raw data to act as the test > > > > case. This way nobody will be afraid of writing a test case for > > > > the fuzz reproducer. > > > > > > Ahaha nice :) > > > > > So the problem is that QOS isn't built out-enough for all of the devices > that we want to test, and it would take a lot of time to translate the > fuzzer-generated reproducer each time we want to add a test? Yes > > > If we want some context for the crashing trace, but cannot build out a > full test, we could add trace events to the actual device code. This > should be a small amount of work compared to building a full-fledged > tests, but maybe I'm wrong. The issue here is not find the context for crashing(which I think you mean the root cause of crash?). In fact we can easily point the root cause and find where is wrong in most cases. The issue here is that we construct a meaningful test-case from scratch. Take this megasas as an example, I analysis the crash from where it starts find find it is caused by considering 'iov_count=0' (megasas_map_sgl) success so megasas_handle_io will continue process it and cause the assert failure. However when I try to construct a qtest case for this. I need to find a code path to this function. they are: megasas_mmio_write->megasas_handle_frame->megasas_handle_io. In this path, it does a lot of DMA map, so I need to construct the data structure carefully, and also I should be carefully to pass all the error check path. Compared with the reproducer raw data, it just have a few lines, it write to the northbridge port to reconfigure the megasas device which I think we can't do this in a meaningful testcase. So here the time costs is not getting context from reproducer raw data. It is constructing a meaningful test case. > > > For the issue in question, there are already some trace points. > If I run the repro with -trace 'pci*' -trace 'megasas*' -trace 'scsi*' : > Reformat the trace somewhat and add some annotations for the data that > comes from DMA: > > # megasas_init Using 80 sges, 1000 cmds, raid mode > # scsi_device_set_ua target 0 lun 0 key 0x06 asc 0x29 ascq 0x00 > # megasas_reset firmware state 0xb000 > outl 0xcf8 0x80001818 > outl 0xcfc 0xc101 > # pci_cfg_write megasas 03:0 @0x18 <- 0xc101 > outl 0xcf8 0x8000181c > outl 0xcf8 0x80001804 > outw 0xcfc 0x7 > # pci_cfg_write megasas 03:0 @0x4 <- 0x7 > # pci_update_mappings_add d=0x7fd3b8fbd800 00:03.0 2,0xc100+0x100 > outl 0xcf8 0x8000186a > write 0x14 0x1 0xfe # DMA Buffer > write 0x0 0x1 0x02 # DMA Buffer > outb 0xc1c0 0x17 > # megasas_mmio_writel reg MFI_IQPL: 0x17 > # megasas_qf_new frame 0x0 addr 0x0 > # megasas_qf_enqueue frame 0x0 count 11 context 0x0 head 0x0 tail 0x0 busy 1 > # LD Write dev 0/0 lba 0x0 count 254 > # len 0 limit 520192 > # scsi_req_parsed target 0 lun 0 tag 0 command 138 dir 2 length 520192 > # scsi_req_parsed_lba target 0 lun 0 tag 0 command 138 lba 0 > # scsi_req_alloc target 0 lun 0 tag 0 > # scsi_disk_new_request Command: lun=0 tag=0x0 data= 0x8a 0x00 0x00 0x00 0x00 > 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xfe 0x00 0x00 > # scsi_disk_dma_command_WRITE Write (sector 0, count 254) > # scsi_req_continue target 0 lun 0 tag 0 > > I don't know how useful this trace is, but maybe we can provide it > alongside the reproducer that we commit to the repo. Maybe it could be > improved with better trace events. Just a suggestion if we want more > context around the raw qtest trace.. I agree with Paolo this is useful adding this in the commit message. It can be as a reference for the people want to investigate the issue. > > > > > > > > > This patch adds the issue LP#1878263 test case. > > > > > > > > Signed-off-by: Li Qiang > > > > --- > > > > tests/qtest/Makefile.include | 2 ++ > > > > tests/qtest/fuzz-test.c | 45 > > > > 2 files changed, 47 insertions(+) > > > > create mode 100644 tests/qtest/fuzz-test.c > > > > > > > > diff --git a/tests/qtest/Makefile.include b/tests/qtest/Makefile.include > > > > index b0204e44f2..ff460179c5 100644 > > > > --- a/tests/qtest/Makefile.include > > > > +++ b/tests/qtest/Makefile.include > > > > @@ -7,6 +7,7 @@ check-qtest-generic-y +=
Re: [PATCH v4 3/4] iotests.py: Let wait_migration() return on failure
On 8/18/20 8:32 AM, Max Reitz wrote: Let wait_migration() return on failure (with the return value indicating whether the migration was completed or has failed), so we can use it for migrations that are expected to fail, too. Signed-off-by: Max Reitz --- tests/qemu-iotests/iotests.py | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) Reviewed-by: Eric Blake -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3226 Virtualization: qemu.org | libvirt.org
Re: [PATCH v4 2/4] iotests.py: Add wait_for_runstate()
On 8/18/20 8:32 AM, Max Reitz wrote:
Signed-off-by: Max Reitz
---
tests/qemu-iotests/iotests.py | 4
1 file changed, 4 insertions(+)
Reviewed-by: Eric Blake
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 717b5b652c..ee93cf22db 100644
--- a/tests/qemu-iotests/iotests.py
+++ b/tests/qemu-iotests/iotests.py
@@ -833,6 +833,10 @@ class VM(qtest.QEMUQtestMachine):
'Found node %s under %s (but expected %s)' % \
(node['name'], path, expected_node)
+def wait_for_runstate(self, runstate: str) -> None:
+while self.qmp('query-status')['return']['status'] != runstate:
+time.sleep(0.2)
This looks like it could inf-loop if we have a bug where the status
never changes as expected; but I guess CI bots have timeouts at higher
layers that would detect if such a bug sneaks in.
+
index_re = re.compile(r'([^\[]+)\[([^\]]+)\]')
class QMPTestCase(unittest.TestCase):
--
Eric Blake, Principal Software Engineer
Red Hat, Inc. +1-919-301-3226
Virtualization: qemu.org | libvirt.org
Re: [PATCH v4 1/4] migration: Add block-bitmap-mapping parameter
On 8/18/20 8:32 AM, Max Reitz wrote:
This migration parameter allows mapping block node names and bitmap
names to aliases for the purpose of block dirty bitmap migration.
This way, management tools can use different node and bitmap names on
the source and destination and pass the mapping of how bitmaps are to be
transferred to qemu (on the source, the destination, or even both with
arbitrary aliases in the migration stream).
While touching this code, fix a bug where bitmap names longer than 255
bytes would fail an assertion in qemu_put_counted_string().
Suggested-by: Vladimir Sementsov-Ogievskiy
Signed-off-by: Max Reitz
---
+##
+# @BitmapMigrationNodeAlias:
+#
+# Maps a block node name and the bitmaps it has to aliases for dirty
+# bitmap migration.
+#
+# @node-name: A block node name.
+#
+# @alias: An alias block node name for migration (for example the
+# node name on the opposite site).
+#
+# @bitmaps: Mappings for the bitmaps on this node.
+#
+# Since: 5.2
+##
+{ 'struct': 'BitmapMigrationNodeAlias',
+ 'data': {
+ 'node-name': 'str',
+ 'alias': 'str',
+ 'bitmaps': [ 'BitmapMigrationBitmapAlias' ]
+ } }
Possible change: should 'alias' be optional (if absent, it defaults to
'node-name')? But that can be done on top, if we like it.
+static GHashTable *construct_alias_map(const BitmapMigrationNodeAliasList *bbm,
+ bool name_to_alias,
+ Error **errp)
+{
+GHashTable *alias_map;
+size_t max_node_name_len =
+sizeof(((BlockDriverState *)NULL)->node_name) - 1;
Looks a bit nicer as = sizeof_field(BlockDriverState, node_name) - 1.
+
+alias_map = g_hash_table_new_full(g_str_hash, g_str_equal,
+ g_free, free_alias_map_inner_node);
+
+for (; bbm; bbm = bbm->next) {
+const BitmapMigrationNodeAlias *bmna = bbm->value;
+const BitmapMigrationBitmapAliasList *bmbal;
+AliasMapInnerNode *amin;
+GHashTable *bitmaps_map;
+const char *node_map_from, *node_map_to;
+
+if (!id_wellformed(bmna->alias)) {
+error_setg(errp, "The node alias '%s' is not well-formed",
+ bmna->alias);
+goto fail;
+}
+
+if (strlen(bmna->alias) > 255) {
Magic number. UINT8_MAX seems better (since the limit really is due to
our migration format limiting to one byte).
...
+g_hash_table_insert(alias_map, g_strdup(node_map_from), amin);
+
+for (bmbal = bmna->bitmaps; bmbal; bmbal = bmbal->next) {
+const BitmapMigrationBitmapAlias *bmba = bmbal->value;
+const char *bmap_map_from, *bmap_map_to;
+
+if (strlen(bmba->alias) > 255) {
and again
+error_setg(errp,
+ "The bitmap alias '%s' is longer than 255 bytes",
+ bmba->alias);
+goto fail;
+}
Thanks for adding in the length checking since last revision!
@@ -326,12 +538,29 @@ static int add_bitmaps_to_list(DBMSaveState *s,
BlockDriverState *bs,
return -1;
}
+if (bitmap_aliases) {
+bitmap_alias = g_hash_table_lookup(bitmap_aliases, bitmap_name);
+if (!bitmap_alias) {
+/* Skip bitmaps with no alias */
+continue;
+}
+} else {
+if (strlen(bitmap_name) > 255) {
+error_report("Cannot migrate bitmap '%s' on node '%s': "
+ "Name is longer than 255 bytes",
+ bitmap_name, bs_name);
+return -1;
Another one.
Reviewed-by: Eric Blake
I'm happy to make those touchups, and put this on my bitmaps queue for a
pull request as soon as Paolo's meson stuff stabilizes.
--
Eric Blake, Principal Software Engineer
Red Hat, Inc. +1-919-301-3226
Virtualization: qemu.org | libvirt.org
Re: [PATCH v2 00/58] qom: Automated conversion of type checking boilerplate
Patchew URL:
https://patchew.org/QEMU/20200820001236.1284548-1-ehabk...@redhat.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker-image-centos7 V=1 NETWORK=1
time make docker-test-quick@centos7 SHOW_ENV=1 J=14 NETWORK=1
=== TEST SCRIPT END ===
LINKtests/test-opts-visitor
LINKtests/test-coroutine
**
ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
LINKtests/test-visitor-serialization
LINKfp-test
**
ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
**
ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
LINKtests/test-iov
LINKtests/test-bitmap
LINKtests/test-aio
---
TESTcheck-qtest-x86_64: tests/qtest/endianness-test
TESTcheck-qtest-aarch64: tests/qtest/arm-cpu-features
**
ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
**
ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
TESTcheck-unit: tests/check-qdict
TESTiotest-qcow2: 008
TESTiotest-qcow2: 009
---
TESTcheck-unit: tests/test-crypto-cipher
TESTcheck-unit: tests/test-crypto-secret
**
ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
ERROR test-crypto-secret - Bail out!
ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
make: *** [check-unit] Error 1
make: *** Waiting for unfinished jobs
TESTiotest-qcow2: 034
socket_accept failed: Resource temporarily unavailable
socket_accept failed: Resource temporarily unavailable
**
ERROR:/tmp/qemu-test/src/tests/qtest/libqtest.c:301:qtest_init_without_qmp_handshake:
assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
**
ERROR:/tmp/qemu-test/src/tests/qtest/libqtest.c:301:qtest_init_without_qmp_handshake:
assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
/tmp/qemu-test/src/tests/qtest/libqtest.c:175: kill_qemu() detected QEMU death
from signal 6 (Aborted) (core dumped)
/tmp/qemu-test/src/tests/qtest/libqtest.c:175: kill_qemu() detected QEMU death
from signal 6 (Aborted) (core dumped)
ERROR arm-cpu-features - Bail out!
ERROR:/tmp/qemu-test/src/tests/qtest/libqtest.c:301:qtest_init_without_qmp_handshake:
assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
ERROR endianness-test - Bail out!
ERROR:/tmp/qemu-test/src/tests/qtest/libqtest.c:301:qtest_init_without_qmp_handshake:
assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
make: *** [check-qtest-x86_64] Error 1
make: *** [check-qtest-aarch64] Error 1
TESTiotest-qcow2: 035
TESTiotest-qcow2: 036
TESTiotest-qcow2: 037
---
qemu-img create -f qcow2 --object secret,id=sec0,data=123456 -o
encryption=on,encrypt.key-secret=sec0 TEST_DIR/t.qcow2 64M
-Formatting 'TEST_DIR/t.qcow2', fmt=qcow2 encryption=on encrypt.key-secret=sec0
cluster_size=65536 compression_type=zlib size=67108864 lazy_refcounts=off
refcount_bits=16
+**
+ERROR:TEST_DIR/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
+./common.rc: line 171: 26499 Aborted (core dumped) (
VALGRIND_QEMU="${VALGRIND_QEMU_IMG}" _qemu_proc_exec "${VALGRIND_LOGFILE}"
"$QEMU_IMG_PROG" $QEMU_IMG_OPTIONS "$@" )
== Check lazy_refcounts option (only with v3) ==
---
-{"return": {}}
-{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event":
"SHUTDOWN", "data": {"guest": false, "reason": "host-qmp-quit"}}
+**
+ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
+./common.rc: line 156: 28773 Aborted (core dumped) ( if [ -n
"${QEMU_NEED_PID}" ]; then
+echo $BASHPID > "${QEMU_TEST_DIR}/qemu-${_QEMU_HANDLE}.pid";
+fi; VALGRIND_QEMU="${VALGRIND_QEMU_VM}" _qemu_proc_exec "${VALGRIND_LOGFILE}"
"$QEMU_PROG" $QEMU_OPTIONS "$@" )
---
-{"return": {}}
-{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event":
"SHUTDOWN", "data": {"guest": false, "reason": "host-qmp-quit"}}
+**
+ERROR:/tmp/qemu-test/src/qom/object.c:314:type_initialize: assertion failed:
(parent->class_size <= ti->class_size)
+./common.rc: Aborted (core dumped) ( if [ -n
"${QEMU_NEED_PID}" ]; then
+echo $BASHPID > "${QEMU_TEST_DIR}/qemu-${_QEMU_HANDLE}.pid";
+fi; VALGRIND_QEMU="${VALGRIND_QEMU_VM}" _qemu_proc_exec "${VALGRIND_LOGFILE}"
"$QEMU_PROG" $QEMU_OPTIONS "$@" )
---
QA output created by 134
-Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 encryption=on
+**
Re: [PATCH v2 00/58] qom: Automated conversion of type checking boilerplate
Patchew URL: https://patchew.org/QEMU/20200820001236.1284548-1-ehabk...@redhat.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #! /bin/bash export ARCH=x86_64 make docker-image-fedora V=1 NETWORK=1 time make docker-test-mingw@fedora J=14 NETWORK=1 === TEST SCRIPT END === CC util/lockcnt.o CC util/iov.o CC util/iova-tree.o /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'parent_class' not described in 'IOMMUMemoryRegionClass' /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'translate' not described in 'IOMMUMemoryRegionClass' /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'get_min_page_size' not described in 'IOMMUMemoryRegionClass' /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'notify_flag_changed' not described in 'IOMMUMemoryRegionClass' /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'replay' not described in 'IOMMUMemoryRegionClass' /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'get_attr' not described in 'IOMMUMemoryRegionClass' /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'attrs_to_index' not described in 'IOMMUMemoryRegionClass' /tmp/qemu-test/src/docs/../include/exec/memory.h:353: warning: Function parameter or member 'num_indexes' not described in 'IOMMUMemoryRegionClass' Warning, treated as error: /tmp/qemu-test/src/docs/../include/exec/memory.h:231:Unexpected indentation. CC util/hbitmap.o CC util/nvdimm-utils.o --- CC authz/trace.o CC block/trace.o CC io/trace.o make: *** [Makefile:1091: docs/devel/index.html] Error 2 make: *** Waiting for unfinished jobs CC nbd/trace.o Traceback (most recent call last): --- raise CalledProcessError(retcode, cmd) subprocess.CalledProcessError: Command '['sudo', '-n', 'docker', 'run', '--label', 'com.qemu.instance.uuid=62d463591f654fe38bc353aec9affcb0', '-u', '1003', '--security-opt', 'seccomp=unconfined', '--rm', '-e', 'TARGET_LIST=', '-e', 'EXTRA_CONFIGURE_OPTS=', '-e', 'V=', '-e', 'J=14', '-e', 'DEBUG=', '-e', 'SHOW_ENV=', '-e', 'CCACHE_DIR=/var/tmp/ccache', '-v', '/home/patchew2/.cache/qemu-docker-ccache:/var/tmp/ccache:z', '-v', '/var/tmp/patchew-tester-tmp-gpils9at/src/docker-src.2020-08-19-20.57.29.24703:/var/tmp/qemu:z,ro', 'qemu/fedora', '/var/tmp/qemu/run', 'test-mingw']' returned non-zero exit status 2. filter=--filter=label=com.qemu.instance.uuid=62d463591f654fe38bc353aec9affcb0 make[1]: *** [docker-run] Error 1 make[1]: Leaving directory `/var/tmp/patchew-tester-tmp-gpils9at/src' make: *** [docker-run-test-mingw@fedora] Error 2 real3m14.229s user0m8.051s The full log is available at http://patchew.org/logs/20200820001236.1284548-1-ehabk...@redhat.com/testing.docker-mingw@fedora/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
Re: [PATCH 1/8] spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priority
On Wed, Aug 19, 2020 at 03:08:36PM +0200, Cédric Le Goater wrote:
> On POWER9, the KVM XIVE device uses priority 7 for the escalation
> interrupts. On POWER10, the host can use a reduced set of priorities
> and KVM will configure the escalation priority to a lower number. In
> any case, the guest is allowed to use priorities in a single range :
>
> [ 0 .. (maxprio - 1) ].
>
> Introduce a 'hv-prio' property to represent the escalation priority
> number and use it to compute the "ibm,plat-res-int-priorities"
> property defining the priority ranges reserved by the hypervisor.
>
> Signed-off-by: Cédric Le Goater
Applied to ppc-for-5.2.
> ---
> include/hw/ppc/spapr_xive.h | 2 ++
> hw/intc/spapr_xive.c| 33 ++---
> 2 files changed, 16 insertions(+), 19 deletions(-)
>
> diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
> index 0ffbe0be0280..1dddcbcb9cdd 100644
> --- a/include/hw/ppc/spapr_xive.h
> +++ b/include/hw/ppc/spapr_xive.h
> @@ -49,6 +49,8 @@ typedef struct SpaprXive {
> void *tm_mmap;
> MemoryRegion tm_mmio_kvm;
> VMChangeStateEntry *change;
> +
> +uint8_t hv_prio;
> } SpaprXive;
>
> typedef struct SpaprXiveClass {
> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
> index 4bd0d606ba17..1fa09f287ac0 100644
> --- a/hw/intc/spapr_xive.c
> +++ b/hw/intc/spapr_xive.c
> @@ -595,6 +595,7 @@ static Property spapr_xive_properties[] = {
> DEFINE_PROP_UINT32("nr-ends", SpaprXive, nr_ends, 0),
> DEFINE_PROP_UINT64("vc-base", SpaprXive, vc_base, SPAPR_XIVE_VC_BASE),
> DEFINE_PROP_UINT64("tm-base", SpaprXive, tm_base, SPAPR_XIVE_TM_BASE),
> +DEFINE_PROP_UINT8("hv-prio", SpaprXive, hv_prio, 7),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -692,12 +693,13 @@ static void spapr_xive_dt(SpaprInterruptController
> *intc, uint32_t nr_servers,
> cpu_to_be32(16), /* 64K */
> };
> /*
> - * The following array is in sync with the reserved priorities
> - * defined by the 'spapr_xive_priority_is_reserved' routine.
> + * QEMU/KVM only needs to define a single range to reserve the
> + * escalation priority. A priority bitmask would have been more
> + * appropriate.
> */
> uint32_t plat_res_int_priorities[] = {
> -cpu_to_be32(7),/* start */
> -cpu_to_be32(0xf8), /* count */
> +cpu_to_be32(xive->hv_prio),/* start */
> +cpu_to_be32(0xff - xive->hv_prio), /* count */
> };
>
> /* Thread Interrupt Management Area : User (ring 3) and OS (ring 2) */
> @@ -844,19 +846,12 @@ type_init(spapr_xive_register_types)
> */
>
> /*
> - * Linux hosts under OPAL reserve priority 7 for their own escalation
> - * interrupts (DD2.X POWER9). So we only allow the guest to use
> - * priorities [0..6].
> + * On POWER9, the KVM XIVE device uses priority 7 for the escalation
> + * interrupts. So we only allow the guest to use priorities [0..6].
> */
> -static bool spapr_xive_priority_is_reserved(uint8_t priority)
> +static bool spapr_xive_priority_is_reserved(SpaprXive *xive, uint8_t
> priority)
> {
> -switch (priority) {
> -case 0 ... 6:
> -return false;
> -case 7: /* OPAL escalation queue */
> -default:
> -return true;
> -}
> +return priority >= xive->hv_prio;
> }
>
> /*
> @@ -1053,7 +1048,7 @@ static target_ulong h_int_set_source_config(PowerPCCPU
> *cpu,
> new_eas.w = eas.w & cpu_to_be64(~EAS_MASKED);
> }
>
> -if (spapr_xive_priority_is_reserved(priority)) {
> +if (spapr_xive_priority_is_reserved(xive, priority)) {
> qemu_log_mask(LOG_GUEST_ERROR, "XIVE: priority " TARGET_FMT_ld
>" is reserved\n", priority);
> return H_P4;
> @@ -1212,7 +1207,7 @@ static target_ulong h_int_get_queue_info(PowerPCCPU
> *cpu,
> * This is not needed when running the emulation under QEMU
> */
>
> -if (spapr_xive_priority_is_reserved(priority)) {
> +if (spapr_xive_priority_is_reserved(xive, priority)) {
> qemu_log_mask(LOG_GUEST_ERROR, "XIVE: priority " TARGET_FMT_ld
>" is reserved\n", priority);
> return H_P3;
> @@ -1299,7 +1294,7 @@ static target_ulong h_int_set_queue_config(PowerPCCPU
> *cpu,
> * This is not needed when running the emulation under QEMU
> */
>
> -if (spapr_xive_priority_is_reserved(priority)) {
> +if (spapr_xive_priority_is_reserved(xive, priority)) {
> qemu_log_mask(LOG_GUEST_ERROR, "XIVE: priority " TARGET_FMT_ld
>" is reserved\n", priority);
> return H_P3;
> @@ -1466,7 +1461,7 @@ static target_ulong h_int_get_queue_config(PowerPCCPU
> *cpu,
> * This is not needed when running the emulation under QEMU
> */
>
> -if (spapr_xive_priority_is_reserved(priority)) {
> +if (spapr_xive_priority_is_reserved(xive, priority)) {
>
Re: [PATCH 2/8] linux-headers: Update for KVM_DEV_XIVE_GRP_SOURCE_INFO
On Wed, Aug 19, 2020 at 03:08:37PM +0200, Cédric Le Goater wrote:
> To be sent with the linux-headers update when support is merged.
Ah, so this isn't ready to go just yet.
>
> Signed-off-by: Cédric Le Goater
> ---
> linux-headers/asm-powerpc/kvm.h | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kvm.h
> index 264e266a85bf..aeb8e8c4633b 100644
> --- a/linux-headers/asm-powerpc/kvm.h
> +++ b/linux-headers/asm-powerpc/kvm.h
> @@ -690,6 +690,7 @@ struct kvm_ppc_cpu_char {
> #define KVM_DEV_XIVE_GRP_SOURCE_CONFIG 3 /* 64-bit source
> identifier */
> #define KVM_DEV_XIVE_GRP_EQ_CONFIG 4 /* 64-bit EQ identifier */
> #define KVM_DEV_XIVE_GRP_SOURCE_SYNC 5 /* 64-bit source identifier */
> +#define KVM_DEV_XIVE_GRP_SOURCE_INFO 6 /* 64-bit source identifier */
>
> /* Layout of 64-bit XIVE source attribute values */
> #define KVM_XIVE_LEVEL_SENSITIVE (1ULL << 0)
> @@ -721,6 +722,13 @@ struct kvm_ppc_xive_eq {
> __u8 pad[40];
> };
>
> +#define KVM_XIVE_SOURCE_FLAG_STORE_EOI 0x0001
> +
> +/* Layout of source characteristics (8 bytes) */
> +struct kvm_ppc_xive_src {
> + __u64 flags;
> +};
> +
> #define KVM_XIVE_EQ_ALWAYS_NOTIFY0x0001
>
> #define KVM_XIVE_TIMA_PAGE_OFFSET0
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: [PATCH] spapr/xive: Allocate IPIs from the vCPU contexts
On Sun, Aug 16, 2020 at 03:38:20PM +0200, Cédric Le Goater wrote:
> On 8/16/20 6:30 AM, David Gibson wrote:
> > On Fri, Aug 14, 2020 at 05:08:13PM +0200, Cédric Le Goater wrote:
> >>
> >> This works as expected with a 128 vCPUs guest with pinned vcpus. The
> >> first 64 IPIs are allocated on the first chip and the remaining 64
> >> on the second chip.
> >>
> >> Still, this is more an RFC. We have time before the end of the merge
> >> window.
> >
> > It looks reasonable to me. AFAICT it makes things better than they
> > were, and even if we can improve it further, that won't break
> > migration or other interfaces we need to preserve.
>
> Yeah. What I don't like is this test below. I am not sure that
> machine->smp.cpus is the correct way to test the number of currently
> active vCPUs.
Ah, yeah. It should be correct at initial startup, but might not be
after a bunch of hotplugs/unplugs, which could result in a sparse set
of active vcpus.
Usually this code will be called during initial setup, but I think
there are some edge cases where it won't be (e.g. boot a XICS kernel,
do some vcpu plugs/unplugs, reboot into a XIVE kernel).
So I think we need to explicitly check for each vcpu # if it's
currently active. Using... spapr_find_cpu(), I guess?
>
> >>> +if (srcno < machine->smp.cpus) {
> >>> +return kvmppc_xive_reset_ipi(xive, srcno, errp);
> >>> +}
> >>> +
> >>> if (xive_source_irq_is_lsi(xsrc, srcno)) {
> >>> state |= KVM_XIVE_LEVEL_SENSITIVE;
> >>> if (xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
>
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
Re: device compatibility interface for live migration with assigned devices
On Tue, Aug 18, 2020 at 11:36:52AM +0200, Cornelia Huck wrote: > On Tue, 18 Aug 2020 10:16:28 +0100 > Daniel P. Berrangé wrote: > > > On Tue, Aug 18, 2020 at 05:01:51PM +0800, Jason Wang wrote: > > >On 2020/8/18 下午4:55, Daniel P. Berrangé wrote: > > > > > > On Tue, Aug 18, 2020 at 11:24:30AM +0800, Jason Wang wrote: > > > > > > On 2020/8/14 下午1:16, Yan Zhao wrote: > > > > > > On Thu, Aug 13, 2020 at 12:24:50PM +0800, Jason Wang wrote: > > > > > > On 2020/8/10 下午3:46, Yan Zhao wrote: > > > > > we actually can also retrieve the same information through sysfs, .e.g > > > > > > |- [path to device] > > > |--- migration > > > | |--- self > > > | | |---device_api > > > || |---mdev_type > > > || |---software_version > > > || |---device_id > > > || |---aggregator > > > | |--- compatible > > > | | |---device_api > > > || |---mdev_type > > > || |---software_version > > > || |---device_id > > > || |---aggregator > > > > > > > > > Yes but: > > > > > > - You need one file per attribute (one syscall for one attribute) > > > - Attribute is coupled with kobject > > Is that really that bad? You have the device with an embedded kobject > anyway, and you can just put things into an attribute group? > > [Also, I think that self/compatible split in the example makes things > needlessly complex. Shouldn't semantic versioning and matching already > cover nearly everything? I would expect very few cases that are more > complex than that. Maybe the aggregation stuff, but I don't think we > need that self/compatible split for that, either.] Hi Cornelia, The reason I want to declare compatible list of attributes is that sometimes it's not a simple 1:1 matching of source attributes and target attributes as I demonstrated below, source mdev of (mdev_type i915-GVTg_V5_2 + aggregator 1) is compatible to target mdev of (mdev_type i915-GVTg_V5_4 + aggregator 2), (mdev_type i915-GVTg_V5_8 + aggregator 4) and aggragator may be just one of such examples that 1:1 matching does not fit. So, we explicitly list out self/compatible attributes, and management tools only need to check if self attributes is contained compatible attributes. or do you mean only compatible list is enough, and the management tools need to find out self list by themselves? But I think provide a self list is easier for management tools. Thanks Yan
Re: [PATCH v2 00/58] qom: Automated conversion of type checking boilerplate
Patchew URL: https://patchew.org/QEMU/20200820001236.1284548-1-ehabk...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20200820001236.1284548-1-ehabk...@redhat.com Subject: [PATCH v2 00/58] qom: Automated conversion of type checking boilerplate === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === From https://github.com/patchew-project/qemu * [new tag] patchew/20200820001236.1284548-1-ehabk...@redhat.com -> patchew/20200820001236.1284548-1-ehabk...@redhat.com Switched to a new branch 'test' 2c07647 crypto: use QOM macros for declaration/definition of TLS creds types 3e7aa6f crypto: use QOM macros for declaration/definition of secret types 5165b3c Use OBJECT_DECLARE_SIMPLE_TYPE when possible d5cb09a Use OBJECT_DECLARE_TYPE where possible e384d74 Use DECLARE_*CHECKER* when possible (--force mode) e5fd745ed Use DECLARE_*CHECKER* macros e72847b Move QOM typedefs and add missing includes 8633876 Use TYPE_INFO macro ac2b53e Delete duplicate QOM typedefs c514337 codeconverter: script for automating QOM code cleanups 98bc659 qom: TYPE_INFO macro 9fd130d qom: Make type checker functions accept const pointers 300bf50 qom: DECLARE_*_CHECKERS macros 996101e qom: Allow class type name to be specified in OBJECT_DECLARE* 4b52466 qom: provide convenient macros for declaring and defining types 7d4c50b qom: make object_ref/unref use a void * instead of Object *. 015012b vfio/pci: Move QOM macros to header 45826c3 kvm: Move QOM macros to kvm.h 09eddbf mptsas: Move QOM macros to header a13d791 pxa2xx: Move QOM macros to header 12586d7 rocker: Move QOM macros to header 9d33500 auxbus: Move QOM macros to header de4f45f piix: Move QOM macros to header 41a38b2 virtio-serial-bus: Move QOM macros to header bfd8f57 vmbus: Move QOM macros to vmbus.h 98c8e55 pckbd: Move QOM macro to header 819bc97 ahci: Move QOM macro to header d16f97d i8257: Move QOM macro to header 2d99e4e ahci: Move QOM macros to header f01b1f4 vhost-user-gpu: Move QOM macro to header d7f96b1 s390x: Move typedef SCLPEventFacility to event-facility.h 84e90b9 spapr: Move typedef SpaprMachineState to spapr.h fbf8890 xen-legacy-backend: Add missing typedef XenLegacyDevice 1ecaa93 armsse: Rename QOM macros to avoid conflicts 201e419 platform-bus: Delete macros for non-existing typedef db1c2f3 nubus: Delete unused NUBUS_BRIDGE macro a25c30b can_emu: Delete macros for non-existing typedef 68aacc3 s390_flic: Move KVMS390FLICState typedef to header 53e7b5e mcf_fec: Move mcf_fec_state typedef to header 9984567 hvf: Move HVFState typedef to hvf.h 5fae80e i8254: Move PITCommonState/PITCommonClass typedefs to i8254.h f77900a pci: Move PCIBusClass typedef to pci.h 60d3bdb throttle-groups: Move ThrottleGroup typedef to header 5c015d1 tulip: Move TulipState typedef to header aa5fa56 hcd-dwc2: Rename USB_*CLASS macros for consistency 8963a12 hvf: Add missing include acbd352 virtio-ccw: Fix definition of VIRTIO_CCW_BUS_GET_CLASS 5b73cbf versatile: Fix typo in PCI_VPB_HOST definition deb8bfb aspeed_timer: Fix ASPEED_TIMER macro definition e408ed4 sifive_u: Rename memmap enum constants 9faf429 sifive_e: Rename memmap enum constants cf281bb opentitan: Rename memmap enum constants 9f27b92 aspeed_soc: Rename memmap/irqmap enum constants 1f3ef9c allwinner-h3: Rename memmap enum constants 76717ce pl110: Rename pl110_version enum values 8699bb0 vmw_pvscsi: Rename QOM class cast macros e9add89 megasas: Rename QOM class cast macros b1de232 e1000: Rename QOM class cast macros === OUTPUT BEGIN === 1/58 Checking commit b1de2322cd1a (e1000: Rename QOM class cast macros) 2/58 Checking commit e9add89a2ce7 (megasas: Rename QOM class cast macros) 3/58 Checking commit 8699bb0e7a65 (vmw_pvscsi: Rename QOM class cast macros) 4/58 Checking commit 76717ce2750b (pl110: Rename pl110_version enum values) 5/58 Checking commit 1f3ef9ce5d89 (allwinner-h3: Rename memmap enum constants) WARNING: line over 80 characters #129: FILE: hw/arm/allwinner-h3.c:328: +memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_A1], WARNING: line over 80 characters #132: FILE: hw/arm/allwinner-h3.c:330: +memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_A2], WARNING: line over 80 characters #135: FILE: hw/arm/allwinner-h3.c:332: +memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_C], WARNING: line over 80 characters #146: FILE: hw/arm/allwinner-h3.c:341: +sysbus_mmio_map(SYS_BUS_DEVICE(>sysctrl), 0, s->memmap[AW_H3_DEV_SYSCTRL]); WARNING: line over 80 characters #255: FILE: hw/arm/orangepi.c:82: +object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_DEV_SDRAM], WARNING: line over 80 characters #264: FILE:
Re: device compatibility interface for live migration with assigned devices
On Wed, Aug 19, 2020 at 11:50:21AM -0600, Alex Williamson wrote:
<...>
> > > > > What I care about is that we have a *standard* userspace API for
> > > > > performing device compatibility checking / state migration, for use by
> > > > > QEMU/libvirt/ OpenStack, such that we can write code without countless
> > > > > vendor specific code paths.
> > > > >
> > > > > If there is vendor specific stuff on the side, that's fine as we can
> > > > > ignore that, but the core functionality for device compat / migration
> > > > > needs to be standardized.
> > > >
> > > > To summarize:
> > > > - choose one of sysfs or devlink
> > > > - have a common interface, with a standardized way to add
> > > > vendor-specific attributes
> > > > ?
> > >
> > > Please refer to my previous email which has more example and details.
> > hi Parav,
> > the example is based on a new vdpa tool running over netlink, not based
> > on devlink, right?
> > For vfio migration compatibility, we have to deal with both mdev and
> > physical
> > pci devices, I don't think it's a good idea to write a new tool for it,
> > given
> > we are able to retrieve the same info from sysfs and there's already an
> > mdevctl from Alex (https://github.com/mdevctl/mdevctl).
> >
> > hi All,
> > could we decide that sysfs is the interface that every VFIO vendor driver
> > needs to provide in order to support vfio live migration, otherwise the
> > userspace management tool would not list the device into the compatible
> > list?
> >
> > if that's true, let's move to the standardizing of the sysfs interface.
> > (1) content
> > common part: (must)
> >- software_version: (in major.minor.bugfix scheme)
> >- device_api: vfio-pci or vfio-ccw ...
> >- type: mdev type for mdev device or
> >a signature for physical device which is a counterpart for
> >mdev type.
> >
> > device api specific part: (must)
> > - pci id: pci id of mdev parent device or pci id of physical pci
> > device (device_api is vfio-pci)
>
> As noted previously, the parent PCI ID should not matter for an mdev
> device, if a vendor has a dependency on matching the parent device PCI
> ID, that's a vendor specific restriction. An mdev device can also
> expose a vfio-pci device API without the parent device being PCI. For
> a physical PCI device, shouldn't the PCI ID be encompassed in the
> signature? Thanks,
>
you are right. I need to put the PCI ID as a vendor specific field.
I didn't do that because I wanted all fields in vendor specific to be
configurable by management tools, so they can configure the target device
according to the value of a vendor specific field even they don't know
the meaning of the field.
But maybe they can just ignore the field when they can't find a matching
writable field to configure the target.
Thanks
Yan
> > - subchannel_type (device_api is vfio-ccw)
> >
> > vendor driver specific part: (optional)
> > - aggregator
> > - chpid_type
> > - remote_url
> >
> > NOTE: vendors are free to add attributes in this part with a
> > restriction that this attribute is able to be configured with the same
> > name in sysfs too. e.g.
> > for aggregator, there must be a sysfs attribute in device node
> > /sys/devices/pci:00/:00:02.0/882cc4da-dede-11e7-9180-078a62063ab1/intel_vgpu/aggregator,
> > so that the userspace tool is able to configure the target device
> > according to source device's aggregator attribute.
> >
> >
> > (2) where and structure
> > proposal 1:
> > |- [path to device]
> > |--- migration
> > | |--- self
> > | ||-software_version
> > | ||-device_api
> > | ||-type
> > | ||-[pci_id or subchannel_type]
> > | ||-
> > | |--- compatible
> > | ||-software_version
> > | ||-device_api
> > | ||-type
> > | ||-[pci_id or subchannel_type]
> > | ||-
> > multiple compatible is allowed.
> > attributes should be ASCII text files, preferably with only one value
> > per file.
> >
> >
> > proposal 2: use bin_attribute.
> > |- [path to device]
> > |--- migration
> > | |--- self
> > | |--- compatible
> >
> > so we can continue use multiline format. e.g.
> > cat compatible
> > software_version=0.1.0
> > device_api=vfio_pci
> > type=i915-GVTg_V5_{val1:int:1,2,4,8}
> > pci_id=80865963
> > aggregator={val1}/2
> >
> > Thanks
> > Yan
> >
>
Re: [PATCH v7 0/1] audio/jack: fix use after free segfault
Forgot to update this cover letter too, sorry for the spam, there are no changes to spice-input.c anymore On 2020-08-20 10:27, Geoffrey McRae wrote: v7: * removed accidental inclusion of spice-input changes Geoffrey McRae (1): audio/jack: fix use after free segfault audio/jackaudio.c | 51 +-- ui/spice-input.c | 2 ++ 2 files changed, 38 insertions(+), 15 deletions(-)
[PATCH v6 0/1] audio/jack: fix use after free segfault
v6: * delete the QEMUBH when finished * fix possible race by taking the iothread mutex * removed whitespace changes Geoffrey McRae (1): audio/jack: fix use after free segfault audio/jackaudio.c | 51 +-- ui/spice-input.c | 2 ++ 2 files changed, 38 insertions(+), 15 deletions(-) -- 2.20.1
Re: [PATCH v13 00/11] iotests: Dump QCOW2 dirty bitmaps metadata
On 8/14/20 6:56 AM, Andrey Shinkevich wrote: Dear Eric! Vladimir has compeated reviewing this series. I have not received any other responses to it so far. So, is it good for pull request now? Would you please consider taking this series as you did it with the Vladimir's related one? I've spent some time playing with this; I have now queued it on my bitmaps tree, and will be posting a pull request as soon as Paolo's meson changes settle. I also made the tweaks suggested on 9/11. -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3226 Virtualization: qemu.org | libvirt.org
[PATCH v6 1/1] audio/jack: fix use after free segfault
This change registers a bottom handler to close the JACK client
connection when a server shutdown signal is recieved. Without this
libjack2 attempts to "clean up" old clients and causes a use after free
segfault.
Signed-off-by: Geoffrey McRae
---
audio/jackaudio.c | 51 +--
ui/spice-input.c | 2 ++
2 files changed, 38 insertions(+), 15 deletions(-)
diff --git a/audio/jackaudio.c b/audio/jackaudio.c
index 72ed7c4929..3492c6b63b 100644
--- a/audio/jackaudio.c
+++ b/audio/jackaudio.c
@@ -25,6 +25,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
#include "qemu/atomic.h"
+#include "qemu/main-loop.h"
#include "qemu-common.h"
#include "audio.h"
@@ -63,6 +64,7 @@ typedef struct QJackClient {
QJackState state;
jack_client_t *client;
jack_nframes_t freq;
+QEMUBH *shutdown_bh;
struct QJack *j;
int nchannels;
@@ -306,21 +308,27 @@ static int qjack_xrun(void *arg)
return 0;
}
+static void qjack_shutdown_bh(void *opaque)
+{
+QJackClient *c = (QJackClient *)opaque;
+qjack_client_fini(c);
+}
+
static void qjack_shutdown(void *arg)
{
QJackClient *c = (QJackClient *)arg;
c->state = QJACK_STATE_SHUTDOWN;
+qemu_bh_schedule(c->shutdown_bh);
}
static void qjack_client_recover(QJackClient *c)
{
-if (c->state == QJACK_STATE_SHUTDOWN) {
-qjack_client_fini(c);
+if (c->state != QJACK_STATE_DISCONNECTED) {
+return;
}
/* packets is used simply to throttle this */
-if (c->state == QJACK_STATE_DISCONNECTED &&
-c->packets % 100 == 0) {
+if (c->packets % 100 == 0) {
/* if enabled then attempt to recover */
if (c->enabled) {
@@ -417,6 +425,7 @@ static int qjack_client_init(QJackClient *c)
options |= JackServerName;
}
+c->shutdown_bh = qemu_bh_new(qjack_shutdown_bh, c);
c->client = jack_client_open(client_name, options, ,
c->opt->server_name);
@@ -489,8 +498,6 @@ static int qjack_init_out(HWVoiceOut *hw, struct
audsettings *as,
QJackOut *jo = (QJackOut *)hw;
Audiodev *dev = (Audiodev *)drv_opaque;
-qjack_client_fini(>c);
-
jo->c.out = true;
jo->c.enabled = false;
jo->c.nchannels = as->nchannels;
@@ -525,8 +532,6 @@ static int qjack_init_in(HWVoiceIn *hw, struct audsettings
*as,
QJackIn *ji = (QJackIn *)hw;
Audiodev *dev = (Audiodev *)drv_opaque;
-qjack_client_fini(>c);
-
ji->c.out = false;
ji->c.enabled = false;
ji->c.nchannels = as->nchannels;
@@ -563,29 +568,45 @@ static void qjack_client_fini(QJackClient *c)
/* fallthrough */
case QJACK_STATE_SHUTDOWN:
+qemu_bh_delete(c->shutdown_bh);
+c->shutdown_bh = NULL;
+
jack_client_close(c->client);
+c->client = NULL;
+
+qjack_buffer_free(>fifo);
+g_free(c->port);
+
+c->state = QJACK_STATE_DISCONNECTED;
/* fallthrough */
case QJACK_STATE_DISCONNECTED:
break;
}
-
-qjack_buffer_free(>fifo);
-g_free(c->port);
-
-c->state = QJACK_STATE_DISCONNECTED;
}
static void qjack_fini_out(HWVoiceOut *hw)
{
QJackOut *jo = (QJackOut *)hw;
-qjack_client_fini(>c);
+
+qemu_mutex_lock_iothread();
+if (jo->c.state != QJACK_STATE_DISCONNECTED) {
+qemu_bh_cancel(jo->c.shutdown_bh);
+qjack_client_fini(>c);
+}
+qemu_mutex_unlock_iothread();
}
static void qjack_fini_in(HWVoiceIn *hw)
{
QJackIn *ji = (QJackIn *)hw;
-qjack_client_fini(>c);
+
+qemu_mutex_lock_iothread();
+if (ji->c.state != QJACK_STATE_DISCONNECTED) {
+qemu_bh_cancel(ji->c.shutdown_bh);
+qjack_client_fini(>c);
+}
+qemu_mutex_unlock_iothread();
}
static void qjack_enable_out(HWVoiceOut *hw, bool enable)
diff --git a/ui/spice-input.c b/ui/spice-input.c
index cd4bb0043f..82c74fdf58 100644
--- a/ui/spice-input.c
+++ b/ui/spice-input.c
@@ -123,6 +123,8 @@ static void spice_update_buttons(QemuSpicePointer *pointer,
[INPUT_BUTTON_RIGHT] = 0x02,
[INPUT_BUTTON_WHEEL_UP]= 0x10,
[INPUT_BUTTON_WHEEL_DOWN] = 0x20,
+[INPUT_BUTTON_SIDE]= 0x40,
+[INPUT_BUTTON_EXTRA] = 0x80
};
if (wheel < 0) {
--
2.20.1
Re: [PATCH v2 00/58] qom: Automated conversion of type checking boilerplate
CCing everybody who replied to the v1 thread. I've CCed people on individual patches using get_maintainer.pl, but forgot to CC people from the v1 thread (sorry!). On Wed, Aug 19, 2020 at 08:11:38PM -0400, Eduardo Habkost wrote: > This is an extension of the series previously submitted by > Daniel[1], including a script that will convert existing type > checker macros automatically. > > Changes from series v1 to v2: > * Don't skip TypeCheckMacro conversion if typedefs > are found in typedefs.h > * Don't look for typedefs if type check macro uses "struct [...]" > * "qom: Fix G_DEFINE_AUTOPTR_CLEANUP_FUNC" was squashed > in the original buggy patch > * 18 new patches that fix inconsistencies in the code, > and make automated changes without --force possible > * pl110: > * Fix typo on commit message > * Rename enum values to VERSION_* > * "[automated]" patches (without --force): > * Re-ran script after after the changes mentioned above. > Now the patches change many more QOM type checker macros > * "[semi-automated] Use DECLARE_*CHECKER* when possible (--force mode)": > * Now the patch touches very few macros, and all of them > have comments explaining why they are unusual > * Maintainers are now CCed in the cleanup patches > (except for the automated ones, because they are too large) > * TYPE_INFO macro: added commit message note suggested by Daniel > * Added more details to commit message of "Rename enum constants" patches > * Removed confusing paragraph mentioning _Generic from "Make type > checker functions accept const pointers" commit message > > Link to series v1: > https://lore.kernel.org/qemu-devel/20200813222625.243136-1-ehabk...@redhat.co= > m/ > > The series is divided in the sections below: > > Constant renaming > - > > Patches 1-10 will just rename existing constants that will > conflict with the type checker function names. > > Fix and cleanups of existing code > - > > Patches 11-41 are changes to existing code > that will either fix existing issues, delete unused and broken > macros, or move typedefs around to make code conversion easier. > > Original patches from Daniel > > > Patches 42-43 are the ones originally submitted by Daniel. > > They introduce the macros: > * OBJECT_DECLARE_TYPE > * OBJECT_DECLARE_SIMPLE_TYPE > * OBJECT_DEFINE_TYPE > * OBJECT_DEFINE_TYPE_WITH_INTERFACES > * OBJECT_DEFINE_ABSTRACT_TYPE > > Changes to new macros > - > > Patches 44-48 extend the macros introduced by Daniel. It > includes small bug fixes, change the arguments to a few macros, > and introduce a few new macros: > > * DECLARE_INSTANCE_CHECKER > * DECLARE_CLASS_CHECKERS > * DECLARE_OBJ_CHECKERS > * TYPE_INFO > > Automated code conversion > - > > Patch 49 is the code conversion script that will look for common > patterns and change them to use the new macros. > > Patches 50-56 are all automatically generated by that script, to > gradually transform existing code into DECLARE_*CHECKER or > OBJECT_DECLARE*_TYPE macros. > > Original crypto QOM patches from Daniel > --- > > Patches 57-58 are the patches originally sent by Daniel to > convert the crypto QOM code to use the new macros, rebased and > updated to pass additional arguments to OBJECT_DECLARE_*. > > [1] https://lore.kernel.org/qemu-devel/20200723181410.3145233-1-berrange@redh= > at.com/ > > Daniel P. Berrang=C3=A9 (4): > qom: make object_ref/unref use a void * instead of Object *. > qom: provide convenient macros for declaring and defining types > crypto: use QOM macros for declaration/definition of secret types > crypto: use QOM macros for declaration/definition of TLS creds types > > Eduardo Habkost (54): > e1000: Rename QOM class cast macros > megasas: Rename QOM class cast macros > vmw_pvscsi: Rename QOM class cast macros > pl110: Rename pl110_version enum values > allwinner-h3: Rename memmap enum constants > aspeed_soc: Rename memmap/irqmap enum constants > opentitan: Rename memmap enum constants > sifive_e: Rename memmap enum constants > sifive_u: Rename memmap enum constants > aspeed_timer: Fix ASPEED_TIMER macro definition > versatile: Fix typo in PCI_VPB_HOST definition > virtio-ccw: Fix definition of VIRTIO_CCW_BUS_GET_CLASS > hvf: Add missing include > hcd-dwc2: Rename USB_*CLASS macros for consistency > tulip: Move TulipState typedef to header > throttle-groups: Move ThrottleGroup typedef to header > pci: Move PCIBusClass typedef to pci.h > i8254: Move PITCommonState/PITCommonClass typedefs to i8254.h > hvf: Move HVFState typedef to hvf.h > mcf_fec: Move mcf_fec_state typedef to header > s390_flic: Move KVMS390FLICState typedef to header > can_emu: Delete macros for non-existing typedef > nubus: Delete unused NUBUS_BRIDGE macro > platform-bus: Delete macros for non-existing typedef >
[PATCH v2 44/58] qom: provide convenient macros for declaring and defining types
From: Daniel P. Berrangé
When creating new QOM types, there is a lot of boilerplate code that
must be repeated using a standard pattern. This is tedious to write
and liable to suffer from subtle inconsistencies. Thus it would
benefit from some simple automation.
QOM was loosely inspired by GLib's GObject, and indeed GObject suffers
from the same burden of boilerplate code, but has long provided a set of
macros to eliminate this burden in the source implementation. More
recently it has also provided a set of macros to eliminate this burden
in the header declaration.
In GLib there are the G_DECLARE_* and G_DEFINE_* family of macros
for the header declaration and source implementation respectively:
https://developer.gnome.org/gobject/stable/chapter-gobject.html
https://developer.gnome.org/gobject/stable/howto-gobject.html
This patch takes inspiration from GObject to provide the equivalent
functionality for QOM.
In the header file, instead of:
typedef struct MyDevice MyDevice;
typedef struct MyDeviceClass MyDeviceClass;
G_DEFINE_AUTOPTR_CLEANUP_FUNC(MyDeviceClass, object_unref)
#define MY_DEVICE_GET_CLASS(void *obj) \
OBJECT_GET_CLASS(MyDeviceClass, obj, TYPE_MY_DEVICE)
#define MY_DEVICE_CLASS(void *klass) \
OBJECT_CLASS_CHECK(MyDeviceClass, klass, TYPE_MY_DEVICE)
#define MY_DEVICE(void *obj)
OBJECT_CHECK(MyDevice, obj, TYPE_MY_DEVICE)
struct MyDeviceClass {
DeviceClass parent_class;
};
We now have
OBJECT_DECLARE_SIMPLE_TYPE(MyDevice, my_device, MY_DEVICE, DEVICE)
In cases where the class needs some virtual methods, it can be left
to be implemented manually using
OBJECT_DECLARE_TYPE(MyDevice, my_device, MY_DEVICE)
Note that these macros are including support for g_autoptr() for the
object types, which is something previously only supported for variables
declared as the base Object * type.
Meanwhile in the source file, instead of:
static void my_device_finalize(Object *obj);
static void my_device_class_init(ObjectClass *oc, void *data);
static void my_device_init(Object *obj);
static const TypeInfo my_device_info = {
.parent = TYPE_DEVICE,
.name = TYPE_MY_DEVICE,
.instance_size = sizeof(MyDevice),
.instance_init = my_device_init,
.instance_finalize = my_device_finalize,
.class_size = sizeof(MyDeviceClass),
.class_init = my_device_class_init,
};
static void
my_device_register_types(void)
{
type_register_static(_device_info);
}
type_init(my_device_register_types);
We now have
OBJECT_DEFINE_TYPE(MyDevice, my_device, MY_DEVICE, DEVICE)
Or, if a class needs to implement interfaces:
OBJECT_DEFINE_TYPE_WITH_INTERFACES(MyDevice, my_device, MY_DEVICE, DEVICE,
{ TYPE_USER_CREATABLE }, { NULL })
Or, if a class needs to be abstract
OBJECT_DEFINE_ABSTRACT_TYPE(MyDevice, my_device, MY_DEVICE, DEVICE)
IOW, in both cases the maintainer now only has to think about the
interesting part of the code which implements useful functionality
and avoids much of the boilerplate.
Signed-off-by: Daniel P. Berrangé
Message-Id: <20200723181410.3145233-3-berra...@redhat.com>
[ehabkost: Fix G_DEFINE_AUTOPTR_CLEANUP_FUNC usage]
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Squashed "Fix G_DEFINE_AUTOPTR_CLEANUP_FUNC" into this patch
---
include/qom/object.h | 277 +++
1 file changed, 277 insertions(+)
diff --git a/include/qom/object.h b/include/qom/object.h
index 1f8aa2d48e..f515230f61 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -304,6 +304,119 @@ typedef struct InterfaceInfo InterfaceInfo;
*
* The first example of such a QOM method was #CPUClass.reset,
* another example is #DeviceClass.realize.
+ *
+ * # Standard type declaration and definition macros #
+ *
+ * A lot of the code outlined above follows a standard pattern and naming
+ * convention. To reduce the amount of boilerplate code that needs to be
+ * written for a new type there are two sets of macros to generate the
+ * common parts in a standard format.
+ *
+ * A type is declared using the OBJECT_DECLARE macro family. In types
+ * which do not require any virtual functions in the class, the
+ * OBJECT_DECLARE_SIMPLE_TYPE macro is suitable, and is commonly placed
+ * in the header file:
+ *
+ *
+ * Declaring a simple type
+ *
+ * OBJECT_DECLARE_SIMPLE_TYPE(MyDevice, my_device, MY_DEVICE, DEVICE)
+ *
+ *
+ *
+ * This is equivalent to the following:
+ *
+ *
+ * Expansion from declaring a simple type
+ *
+ * typedef struct MyDevice MyDevice;
+ * typedef struct MyDeviceClass MyDeviceClass;
+ *
+ * G_DEFINE_AUTOPTR_CLEANUP_FUNC(MyDeviceClass, object_unref)
+ *
+ * #define MY_DEVICE_GET_CLASS(void *obj) \
+ * OBJECT_GET_CLASS(MyDeviceClass, obj, TYPE_MY_DEVICE)
+ * #define MY_DEVICE_CLASS(void
[PATCH v2 58/58] crypto: use QOM macros for declaration/definition of TLS creds types
From: Daniel P. Berrangé
This introduces the use of the OBJECT_DEFINE and OBJECT_DECLARE macro
families in the TLS creds types, in order to eliminate boilerplate code.
Signed-off-by: Daniel P. Berrangé
Message-Id: <20200723181410.3145233-5-berra...@redhat.com>
[ehabkost: rebase, update to pass additional arguments to macro]
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
include/crypto/tlscreds.h | 13 ++---
include/crypto/tlscredsanon.h | 14 ++
include/crypto/tlscredspsk.h | 13 ++---
include/crypto/tlscredsx509.h | 13 ++---
crypto/tlscreds.c | 20 +++-
crypto/tlscredsanon.c | 24 +++-
crypto/tlscredspsk.c | 26 --
crypto/tlscredsx509.c | 24
8 files changed, 30 insertions(+), 117 deletions(-)
diff --git a/include/crypto/tlscreds.h b/include/crypto/tlscreds.h
index 079e376047..e9b9b8c20a 100644
--- a/include/crypto/tlscreds.h
+++ b/include/crypto/tlscreds.h
@@ -29,11 +29,8 @@
#endif
#define TYPE_QCRYPTO_TLS_CREDS "tls-creds"
-typedef struct QCryptoTLSCreds QCryptoTLSCreds;
-DECLARE_INSTANCE_CHECKER(QCryptoTLSCreds, QCRYPTO_TLS_CREDS,
- TYPE_QCRYPTO_TLS_CREDS)
-
-typedef struct QCryptoTLSCredsClass QCryptoTLSCredsClass;
+OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCreds, qcrypto_tls_creds,
+ QCRYPTO_TLS_CREDS, Object)
#define QCRYPTO_TLS_CREDS_DH_PARAMS "dh-params.pem"
@@ -58,10 +55,4 @@ struct QCryptoTLSCreds {
char *priority;
};
-
-struct QCryptoTLSCredsClass {
-ObjectClass parent_class;
-};
-
-
#endif /* QCRYPTO_TLSCREDS_H */
diff --git a/include/crypto/tlscredsanon.h b/include/crypto/tlscredsanon.h
index 3f464a3809..338b668b1d 100644
--- a/include/crypto/tlscredsanon.h
+++ b/include/crypto/tlscredsanon.h
@@ -25,12 +25,8 @@
#include "qom/object.h"
#define TYPE_QCRYPTO_TLS_CREDS_ANON "tls-creds-anon"
-typedef struct QCryptoTLSCredsAnon QCryptoTLSCredsAnon;
-DECLARE_INSTANCE_CHECKER(QCryptoTLSCredsAnon, QCRYPTO_TLS_CREDS_ANON,
- TYPE_QCRYPTO_TLS_CREDS_ANON)
-
-
-typedef struct QCryptoTLSCredsAnonClass QCryptoTLSCredsAnonClass;
+OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCredsAnon, qcrypto_tls_creds_anon,
+ QCRYPTO_TLS_CREDS_ANON, QCryptoTLSCreds)
/**
* QCryptoTLSCredsAnon:
@@ -103,10 +99,4 @@ struct QCryptoTLSCredsAnon {
#endif
};
-
-struct QCryptoTLSCredsAnonClass {
-QCryptoTLSCredsClass parent_class;
-};
-
-
#endif /* QCRYPTO_TLSCREDSANON_H */
diff --git a/include/crypto/tlscredspsk.h b/include/crypto/tlscredspsk.h
index d7e6bdb5ed..16e3f84f47 100644
--- a/include/crypto/tlscredspsk.h
+++ b/include/crypto/tlscredspsk.h
@@ -25,11 +25,8 @@
#include "qom/object.h"
#define TYPE_QCRYPTO_TLS_CREDS_PSK "tls-creds-psk"
-typedef struct QCryptoTLSCredsPSK QCryptoTLSCredsPSK;
-DECLARE_INSTANCE_CHECKER(QCryptoTLSCredsPSK, QCRYPTO_TLS_CREDS_PSK,
- TYPE_QCRYPTO_TLS_CREDS_PSK)
-
-typedef struct QCryptoTLSCredsPSKClass QCryptoTLSCredsPSKClass;
+OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCredsPSK, qcrypto_tls_creds_psk,
+ QCRYPTO_TLS_CREDS_PSK, QCryptoTLSCreds)
#define QCRYPTO_TLS_CREDS_PSKFILE "keys.psk"
@@ -98,10 +95,4 @@ struct QCryptoTLSCredsPSK {
#endif
};
-
-struct QCryptoTLSCredsPSKClass {
-QCryptoTLSCredsClass parent_class;
-};
-
-
#endif /* QCRYPTO_TLSCREDSPSK_H */
diff --git a/include/crypto/tlscredsx509.h b/include/crypto/tlscredsx509.h
index c6d89b7881..1197f33663 100644
--- a/include/crypto/tlscredsx509.h
+++ b/include/crypto/tlscredsx509.h
@@ -25,11 +25,8 @@
#include "qom/object.h"
#define TYPE_QCRYPTO_TLS_CREDS_X509 "tls-creds-x509"
-typedef struct QCryptoTLSCredsX509 QCryptoTLSCredsX509;
-DECLARE_INSTANCE_CHECKER(QCryptoTLSCredsX509, QCRYPTO_TLS_CREDS_X509,
- TYPE_QCRYPTO_TLS_CREDS_X509)
-
-typedef struct QCryptoTLSCredsX509Class QCryptoTLSCredsX509Class;
+OBJECT_DECLARE_SIMPLE_TYPE(QCryptoTLSCredsX509, qcrypto_tls_creds_x509,
+ QCRYPTO_TLS_CREDS_X509, QCryptoTLSCreds)
#define QCRYPTO_TLS_CREDS_X509_CA_CERT "ca-cert.pem"
#define QCRYPTO_TLS_CREDS_X509_CA_CRL "ca-crl.pem"
@@ -105,10 +102,4 @@ struct QCryptoTLSCredsX509 {
char *passwordid;
};
-
-struct QCryptoTLSCredsX509Class {
-QCryptoTLSCredsClass parent_class;
-};
-
-
#endif /* QCRYPTO_TLSCREDSX509_H */
diff --git a/crypto/tlscreds.c b/crypto/tlscreds.c
index bb3e6667b9..c238ff7d4b 100644
--- a/crypto/tlscreds.c
+++ b/crypto/tlscreds.c
@@ -24,6 +24,9 @@
#include "tlscredspriv.h"
#include "trace.h"
+OBJECT_DEFINE_ABSTRACT_TYPE(QCryptoTLSCreds, qcrypto_tls_creds,
+QCRYPTO_TLS_CREDS, OBJECT)
+
#define DH_BITS 2048
#ifdef CONFIG_GNUTLS
@@ -258,20 +261,3 @@ qcrypto_tls_creds_finalize(Object *obj)
g_free(creds->dir);
g_free(creds->priority);
}
-
-
-static const TypeInfo
[PATCH v2 48/58] qom: TYPE_INFO macro
Provide a TYPE_INFO macro that can be used to register a TypeInfo
struct declaratively. This will allow QOM type registration to
be 100% declarative.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
include/qom/object.h | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/include/qom/object.h b/include/qom/object.h
index 1d6a520d35..81bea3b4ed 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -655,6 +655,14 @@ struct Object
struct InstanceType##Class { ParentClassType parent_class; };
+#define TYPE_INFO(type_info_var) \
+static void \
+register_type_info_##type_info_var(void) \
+{ \
+type_register_static(_info_var); \
+} \
+type_init(register_type_info_##type_info_var);
+
/**
* OBJECT_DEFINE_TYPE_EXTENDED:
* @ModuleObjName: the object name with initial caps
@@ -700,12 +708,7 @@ struct Object
.interfaces = (InterfaceInfo[]) { __VA_ARGS__ } , \
}; \
\
-static void \
-module_obj_name##_register_types(void) \
-{ \
-type_register_static(_obj_name##_info); \
-} \
-type_init(module_obj_name##_register_types);
+TYPE_INFO(module_obj_name##_info)
/**
* OBJECT_DEFINE_TYPE:
--
2.26.2
[PATCH v2 55/58] [automated] Use OBJECT_DECLARE_TYPE where possible
Replace DECLARE_OBJ_CHECKERS with OBJECT_DECLARE_TYPE where the typedefs can be safely removed. Generated running: $ ./scripts/codeconverter/converter.py -i \ --pattern=DeclareObjCheckers $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Script re-run after typedefs and macros were moved, and now the patch also touches: - TYPE_ARM_SSE - TYPE_SD_BUS --- hw/audio/intel-hda.h| 6 ++ hw/display/virtio-vga.h | 6 ++ include/authz/base.h| 6 ++ include/authz/list.h| 6 ++ include/authz/listfile.h| 6 ++ include/authz/pamacct.h | 6 ++ include/authz/simple.h | 6 ++ include/crypto/secret_common.h | 6 ++ include/crypto/secret_keyring.h | 6 ++ include/hw/arm/armsse.h | 6 ++ include/hw/hyperv/vmbus.h | 6 ++ include/hw/i2c/i2c.h| 6 ++ include/hw/i2c/smbus_slave.h| 6 ++ include/hw/ipack/ipack.h| 6 ++ include/hw/ipmi/ipmi.h | 6 ++ include/hw/mem/pc-dimm.h| 6 ++ include/hw/ppc/pnv.h| 6 ++ include/hw/ppc/pnv_core.h | 6 ++ include/hw/ppc/pnv_homer.h | 6 ++ include/hw/ppc/pnv_occ.h| 6 ++ include/hw/ppc/pnv_psi.h| 6 ++ include/hw/ppc/pnv_xive.h | 6 ++ include/hw/ppc/spapr_cpu_core.h | 6 ++ include/hw/ppc/spapr_drc.h | 6 ++ include/hw/ppc/spapr_vio.h | 6 ++ include/hw/ppc/spapr_xive.h | 6 ++ include/hw/ppc/xics.h | 6 ++ include/hw/ppc/xive.h | 6 ++ include/hw/s390x/event-facility.h | 6 ++ include/hw/s390x/s390_flic.h| 6 ++ include/hw/s390x/sclp.h | 6 ++ include/hw/sd/sd.h | 6 ++ include/hw/ssi/ssi.h| 6 ++ include/hw/sysbus.h | 6 ++ include/hw/virtio/virtio-gpu.h | 6 ++ include/hw/virtio/virtio-input.h| 6 ++ include/hw/virtio/virtio-mem.h | 6 ++ include/hw/virtio/virtio-pmem.h | 6 ++ include/hw/virtio/virtio-serial.h | 6 ++ include/hw/xen/xen-bus.h| 6 ++ include/io/channel.h| 6 ++ include/io/dns-resolver.h | 6 ++ include/io/net-listener.h | 6 ++ include/scsi/pr-manager.h | 6 ++ include/sysemu/cryptodev.h | 6 ++ include/sysemu/hostmem.h| 6 ++ include/sysemu/rng.h| 6 ++ include/sysemu/tpm_backend.h| 6 ++ include/sysemu/vhost-user-backend.h | 6 ++ target/alpha/cpu-qom.h | 6 ++ target/arm/cpu-qom.h| 6 ++ target/avr/cpu-qom.h| 6 ++ target/cris/cpu-qom.h | 6 ++ target/hppa/cpu-qom.h | 6 ++ target/i386/cpu-qom.h | 6 ++ target/lm32/cpu-qom.h | 6 ++ target/m68k/cpu-qom.h | 6 ++ target/microblaze/cpu-qom.h | 6 ++ target/mips/cpu-qom.h | 6 ++ target/moxie/cpu.h | 6 ++ target/nios2/cpu.h | 6 ++ target/openrisc/cpu.h | 6 ++ target/ppc/cpu-qom.h| 6 ++ target/riscv/cpu.h | 6 ++ target/s390x/cpu-qom.h | 6 ++ target/sh4/cpu-qom.h| 6 ++ target/sparc/cpu-qom.h | 6 ++ target/tilegx/cpu.h | 6 ++ target/tricore/cpu-qom.h| 6 ++ target/unicore32/cpu-qom.h | 6 ++ target/xtensa/cpu-qom.h | 6 ++ backends/dbus-vmstate.c | 6 ++ ui/input-barrier.c | 6 ++ ui/input-linux.c| 6 ++ 74 files changed, 148 insertions(+), 296 deletions(-) diff --git a/hw/audio/intel-hda.h b/hw/audio/intel-hda.h index 813a7a357d..f5cce18fa3 100644 --- a/hw/audio/intel-hda.h +++ b/hw/audio/intel-hda.h @@ -8,10 +8,8 @@ /* hda bus */ #define TYPE_HDA_CODEC_DEVICE "hda-codec" -typedef struct HDACodecDevice HDACodecDevice; -typedef struct HDACodecDeviceClass HDACodecDeviceClass; -DECLARE_OBJ_CHECKERS(HDACodecDevice, HDACodecDeviceClass, - HDA_CODEC_DEVICE, TYPE_HDA_CODEC_DEVICE) +OBJECT_DECLARE_TYPE(HDACodecDevice, HDACodecDeviceClass, +hda_codec_device, HDA_CODEC_DEVICE) #define TYPE_HDA_BUS "HDA" typedef struct HDACodecBus HDACodecBus; diff --git a/hw/display/virtio-vga.h b/hw/display/virtio-vga.h index 19f8af7356..5c5671c9c1 100644 --- a/hw/display/virtio-vga.h +++ b/hw/display/virtio-vga.h @@ -9,10 +9,8 @@ * virtio-vga-base: This extends VirtioPCIProxy. */ #define TYPE_VIRTIO_VGA_BASE "virtio-vga-base" -typedef
[PATCH v7 1/1] audio/jack: fix use after free segfault
This change registers a bottom handler to close the JACK client
connection when a server shutdown signal is recieved. Without this
libjack2 attempts to "clean up" old clients and causes a use after free
segfault.
Signed-off-by: Geoffrey McRae
---
audio/jackaudio.c | 51 +--
ui/spice-input.c | 2 ++
2 files changed, 38 insertions(+), 15 deletions(-)
diff --git a/audio/jackaudio.c b/audio/jackaudio.c
index 72ed7c4929..3492c6b63b 100644
--- a/audio/jackaudio.c
+++ b/audio/jackaudio.c
@@ -25,6 +25,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
#include "qemu/atomic.h"
+#include "qemu/main-loop.h"
#include "qemu-common.h"
#include "audio.h"
@@ -63,6 +64,7 @@ typedef struct QJackClient {
QJackState state;
jack_client_t *client;
jack_nframes_t freq;
+QEMUBH *shutdown_bh;
struct QJack *j;
int nchannels;
@@ -306,21 +308,27 @@ static int qjack_xrun(void *arg)
return 0;
}
+static void qjack_shutdown_bh(void *opaque)
+{
+QJackClient *c = (QJackClient *)opaque;
+qjack_client_fini(c);
+}
+
static void qjack_shutdown(void *arg)
{
QJackClient *c = (QJackClient *)arg;
c->state = QJACK_STATE_SHUTDOWN;
+qemu_bh_schedule(c->shutdown_bh);
}
static void qjack_client_recover(QJackClient *c)
{
-if (c->state == QJACK_STATE_SHUTDOWN) {
-qjack_client_fini(c);
+if (c->state != QJACK_STATE_DISCONNECTED) {
+return;
}
/* packets is used simply to throttle this */
-if (c->state == QJACK_STATE_DISCONNECTED &&
-c->packets % 100 == 0) {
+if (c->packets % 100 == 0) {
/* if enabled then attempt to recover */
if (c->enabled) {
@@ -417,6 +425,7 @@ static int qjack_client_init(QJackClient *c)
options |= JackServerName;
}
+c->shutdown_bh = qemu_bh_new(qjack_shutdown_bh, c);
c->client = jack_client_open(client_name, options, ,
c->opt->server_name);
@@ -489,8 +498,6 @@ static int qjack_init_out(HWVoiceOut *hw, struct
audsettings *as,
QJackOut *jo = (QJackOut *)hw;
Audiodev *dev = (Audiodev *)drv_opaque;
-qjack_client_fini(>c);
-
jo->c.out = true;
jo->c.enabled = false;
jo->c.nchannels = as->nchannels;
@@ -525,8 +532,6 @@ static int qjack_init_in(HWVoiceIn *hw, struct audsettings
*as,
QJackIn *ji = (QJackIn *)hw;
Audiodev *dev = (Audiodev *)drv_opaque;
-qjack_client_fini(>c);
-
ji->c.out = false;
ji->c.enabled = false;
ji->c.nchannels = as->nchannels;
@@ -563,29 +568,45 @@ static void qjack_client_fini(QJackClient *c)
/* fallthrough */
case QJACK_STATE_SHUTDOWN:
+qemu_bh_delete(c->shutdown_bh);
+c->shutdown_bh = NULL;
+
jack_client_close(c->client);
+c->client = NULL;
+
+qjack_buffer_free(>fifo);
+g_free(c->port);
+
+c->state = QJACK_STATE_DISCONNECTED;
/* fallthrough */
case QJACK_STATE_DISCONNECTED:
break;
}
-
-qjack_buffer_free(>fifo);
-g_free(c->port);
-
-c->state = QJACK_STATE_DISCONNECTED;
}
static void qjack_fini_out(HWVoiceOut *hw)
{
QJackOut *jo = (QJackOut *)hw;
-qjack_client_fini(>c);
+
+qemu_mutex_lock_iothread();
+if (jo->c.state != QJACK_STATE_DISCONNECTED) {
+qemu_bh_cancel(jo->c.shutdown_bh);
+qjack_client_fini(>c);
+}
+qemu_mutex_unlock_iothread();
}
static void qjack_fini_in(HWVoiceIn *hw)
{
QJackIn *ji = (QJackIn *)hw;
-qjack_client_fini(>c);
+
+qemu_mutex_lock_iothread();
+if (ji->c.state != QJACK_STATE_DISCONNECTED) {
+qemu_bh_cancel(ji->c.shutdown_bh);
+qjack_client_fini(>c);
+}
+qemu_mutex_unlock_iothread();
}
static void qjack_enable_out(HWVoiceOut *hw, bool enable)
--
2.20.1
[PATCH v2 47/58] qom: Make type checker functions accept const pointers
The existing type check macros all unconditionally drop const
qualifiers from their arguments. Keep this behavior in the
macros generated by DECLARE_*CHECKER* by now.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Removed note about _Generic from commit message, because it
won't be possible to do what I was planning without manual
#defines
---
include/qom/object.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/include/qom/object.h b/include/qom/object.h
index 4cd84998c2..1d6a520d35 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -567,7 +567,7 @@ struct Object
*/
#define DECLARE_INSTANCE_CHECKER(InstanceType, OBJ_NAME, TYPENAME) \
static inline G_GNUC_UNUSED InstanceType * \
-OBJ_NAME(void *obj) \
+OBJ_NAME(const void *obj) \
{ return OBJECT_CHECK(InstanceType, obj, TYPENAME); }
/**
@@ -581,14 +581,16 @@ struct Object
*
* This macro will provide the three standard type cast functions for a
* QOM type.
+ *
+ *FIXME: Use _Generic to make this const-safe
*/
#define DECLARE_CLASS_CHECKERS(ClassType, OBJ_NAME, TYPENAME) \
static inline G_GNUC_UNUSED ClassType * \
-OBJ_NAME##_GET_CLASS(void *obj) \
+OBJ_NAME##_GET_CLASS(const void *obj) \
{ return OBJECT_GET_CLASS(ClassType, obj, TYPENAME); } \
\
static inline G_GNUC_UNUSED ClassType * \
-OBJ_NAME##_CLASS(void *klass) \
+OBJ_NAME##_CLASS(const void *klass) \
{ return OBJECT_CLASS_CHECK(ClassType, klass, TYPENAME); }
/**
--
2.26.2
[PATCH v2 49/58] codeconverter: script for automating QOM code cleanups
This started as a simple script that scanned for regular
expressions, but became more and more complex when exceptions to
the rules were found.
I don't know if this should be maintained in the QEMU source tree
long term (maybe it can be reused for other code transformations
that Coccinelle can't handle). In either case, this is included
as part of the patch series to document how exactly the automated
code transformations in the next patches were done.
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Don't warn/skip TypeCheckMacro conversion if typedefs
are found in typedefs.h
* Convert type check macros that use "struct [...]"
without --force
---
.../codeconverter/codeconverter/__init__.py | 0
.../codeconverter/codeconverter/patching.py | 381 +++
.../codeconverter/codeconverter/qom_macros.py | 628 ++
.../codeconverter/qom_type_info.py| 314 +
.../codeconverter/codeconverter/regexps.py| 89 +++
.../codeconverter/test_patching.py| 98 +++
.../codeconverter/test_regexps.py | 272
scripts/codeconverter/codeconverter/utils.py | 65 ++
scripts/codeconverter/converter.py| 113
9 files changed, 1960 insertions(+)
create mode 100644 scripts/codeconverter/codeconverter/__init__.py
create mode 100644 scripts/codeconverter/codeconverter/patching.py
create mode 100644 scripts/codeconverter/codeconverter/qom_macros.py
create mode 100644 scripts/codeconverter/codeconverter/qom_type_info.py
create mode 100644 scripts/codeconverter/codeconverter/regexps.py
create mode 100644 scripts/codeconverter/codeconverter/test_patching.py
create mode 100644 scripts/codeconverter/codeconverter/test_regexps.py
create mode 100644 scripts/codeconverter/codeconverter/utils.py
create mode 100755 scripts/codeconverter/converter.py
diff --git a/scripts/codeconverter/codeconverter/__init__.py
b/scripts/codeconverter/codeconverter/__init__.py
new file mode 100644
index 00..e69de29bb2
diff --git a/scripts/codeconverter/codeconverter/patching.py
b/scripts/codeconverter/codeconverter/patching.py
new file mode 100644
index 00..d6725318b9
--- /dev/null
+++ b/scripts/codeconverter/codeconverter/patching.py
@@ -0,0 +1,381 @@
+from typing import IO, Match, NamedTuple, Optional, Literal, Iterable, Type,
Dict, List, Any, TypeVar, NewType, Tuple
+from pathlib import Path
+from itertools import chain
+from tempfile import NamedTemporaryFile
+import os
+import re
+import subprocess
+from io import StringIO
+
+import logging
+logger = logging.getLogger(__name__)
+DBG = logger.debug
+INFO = logger.info
+WARN = logger.warning
+ERROR = logger.error
+
+from .utils import *
+
+T = TypeVar('T')
+
+class Patch(NamedTuple):
+# start inside file.original_content
+start: int
+# end position inside file.original_content
+end: int
+# replacement string for file.original_content[start:end]
+replacement: str
+
+IdentifierType = Literal['type', 'symbol', 'include', 'constant']
+class RequiredIdentifier(NamedTuple):
+type: IdentifierType
+name: str
+
+class FileMatch:
+"""Base class for regex matches
+
+Subclasses just need to set the `regexp` class attribute
+"""
+regexp: Optional[str] = None
+
+def __init__(self, f: 'FileInfo', m: Match) -> None:
+self.file: 'FileInfo' = f
+self.match: Match = m
+
+@property
+def name(self) -> str:
+if 'name' not in self.match.groupdict():
+return '[no name]'
+return self.group('name')
+
+@classmethod
+def compiled_re(klass):
+return re.compile(klass.regexp, re.MULTILINE)
+
+def start(self) -> int:
+return self.match.start()
+
+def end(self) -> int:
+return self.match.end()
+
+def line_col(self) -> LineAndColumn:
+return self.file.line_col(self.start())
+
+def group(self, *args):
+return self.match.group(*args)
+
+def log(self, level, fmt, *args) -> None:
+pos = self.line_col()
+logger.log(level, '%s:%d:%d: '+fmt, self.file.filename, pos.line,
pos.col, *args)
+
+def info(self, fmt, *args) -> None:
+self.log(logging.INFO, fmt, *args)
+
+def warn(self, fmt, *args) -> None:
+self.log(logging.WARNING, fmt, *args)
+
+def error(self, fmt, *args) -> None:
+self.log(logging.ERROR, fmt, *args)
+
+def sub(self, original: str, replacement: str) -> str:
+"""Replace content
+
+XXX: this won't use the match position, but will just
+replace all strings that look like the original match.
+This should be enough for all the patterns used in this
+script.
+"""
+return original.replace(self.group(0), replacement)
+
+def sanity_check(self) -> None:
+"""Sanity check match, and print warnings if necessary"""
+pass
+
+def replacement(self) -> Optional[str]:
+"""Return replacement text for pattern,
[PATCH v7 0/1] audio/jack: fix use after free segfault
v7: * removed accidental inclusion of spice-input changes Geoffrey McRae (1): audio/jack: fix use after free segfault audio/jackaudio.c | 51 +-- ui/spice-input.c | 2 ++ 2 files changed, 38 insertions(+), 15 deletions(-) -- 2.20.1
[PATCH v2 56/58] [automated] Use OBJECT_DECLARE_SIMPLE_TYPE when possible
Generated using:
$ ./scripts/codeconverter/converter.py -i \
--pattern=ObjectDeclareType $(git grep -l '' -- '*.[ch]')
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
include/authz/list.h| 7 ++-
include/authz/listfile.h| 7 ++-
include/authz/pamacct.h | 7 ++-
include/authz/simple.h | 7 ++-
include/crypto/secret_keyring.h | 7 ++-
include/io/dns-resolver.h | 7 ++-
include/io/net-listener.h | 7 ++-
include/sysemu/vhost-user-backend.h | 7 ++-
backends/dbus-vmstate.c | 7 ++-
ui/input-barrier.c | 7 ++-
ui/input-linux.c| 7 ++-
11 files changed, 22 insertions(+), 55 deletions(-)
diff --git a/include/authz/list.h b/include/authz/list.h
index e4e1040472..5676bb375c 100644
--- a/include/authz/list.h
+++ b/include/authz/list.h
@@ -27,8 +27,8 @@
#define TYPE_QAUTHZ_LIST "authz-list"
-OBJECT_DECLARE_TYPE(QAuthZList, QAuthZListClass,
-qauthz_list, QAUTHZ_LIST)
+OBJECT_DECLARE_SIMPLE_TYPE(QAuthZList, qauthz_list,
+ QAUTHZ_LIST, QAuthZClass)
@@ -68,9 +68,6 @@ struct QAuthZList {
};
-struct QAuthZListClass {
-QAuthZClass parent_class;
-};
QAuthZList *qauthz_list_new(const char *id,
diff --git a/include/authz/listfile.h b/include/authz/listfile.h
index 89c5eafbfa..b491227bbe 100644
--- a/include/authz/listfile.h
+++ b/include/authz/listfile.h
@@ -27,8 +27,8 @@
#define TYPE_QAUTHZ_LIST_FILE "authz-list-file"
-OBJECT_DECLARE_TYPE(QAuthZListFile, QAuthZListFileClass,
-qauthz_list_file, QAUTHZ_LIST_FILE)
+OBJECT_DECLARE_SIMPLE_TYPE(QAuthZListFile, qauthz_list_file,
+ QAUTHZ_LIST_FILE, QAuthZClass)
@@ -87,9 +87,6 @@ struct QAuthZListFile {
};
-struct QAuthZListFileClass {
-QAuthZClass parent_class;
-};
QAuthZListFile *qauthz_list_file_new(const char *id,
diff --git a/include/authz/pamacct.h b/include/authz/pamacct.h
index 44bb5ff28d..7804853ddf 100644
--- a/include/authz/pamacct.h
+++ b/include/authz/pamacct.h
@@ -27,8 +27,8 @@
#define TYPE_QAUTHZ_PAM "authz-pam"
-OBJECT_DECLARE_TYPE(QAuthZPAM, QAuthZPAMClass,
-qauthz_pam, QAUTHZ_PAM)
+OBJECT_DECLARE_SIMPLE_TYPE(QAuthZPAM, qauthz_pam,
+ QAUTHZ_PAM, QAuthZClass)
@@ -79,9 +79,6 @@ struct QAuthZPAM {
};
-struct QAuthZPAMClass {
-QAuthZClass parent_class;
-};
QAuthZPAM *qauthz_pam_new(const char *id,
diff --git a/include/authz/simple.h b/include/authz/simple.h
index ba4a5ec5ea..346fcb0c6c 100644
--- a/include/authz/simple.h
+++ b/include/authz/simple.h
@@ -26,8 +26,8 @@
#define TYPE_QAUTHZ_SIMPLE "authz-simple"
-OBJECT_DECLARE_TYPE(QAuthZSimple, QAuthZSimpleClass,
-qauthz_simple, QAUTHZ_SIMPLE)
+OBJECT_DECLARE_SIMPLE_TYPE(QAuthZSimple, qauthz_simple,
+ QAUTHZ_SIMPLE, QAuthZClass)
@@ -62,9 +62,6 @@ struct QAuthZSimple {
};
-struct QAuthZSimpleClass {
-QAuthZClass parent_class;
-};
QAuthZSimple *qauthz_simple_new(const char *id,
diff --git a/include/crypto/secret_keyring.h b/include/crypto/secret_keyring.h
index cc2c7397db..73d2a8f501 100644
--- a/include/crypto/secret_keyring.h
+++ b/include/crypto/secret_keyring.h
@@ -26,8 +26,8 @@
#include "crypto/secret_common.h"
#define TYPE_QCRYPTO_SECRET_KEYRING "secret_keyring"
-OBJECT_DECLARE_TYPE(QCryptoSecretKeyring, QCryptoSecretKeyringClass,
-qcrypto_secret_keyring, QCRYPTO_SECRET_KEYRING)
+OBJECT_DECLARE_SIMPLE_TYPE(QCryptoSecretKeyring, qcrypto_secret_keyring,
+ QCRYPTO_SECRET_KEYRING, QCryptoSecretCommonClass)
struct QCryptoSecretKeyring {
@@ -36,8 +36,5 @@ struct QCryptoSecretKeyring {
};
-struct QCryptoSecretKeyringClass {
-QCryptoSecretCommonClass parent;
-};
#endif /* QCRYPTO_SECRET_KEYRING_H */
diff --git a/include/io/dns-resolver.h b/include/io/dns-resolver.h
index 8ae4857e05..e248fba5bd 100644
--- a/include/io/dns-resolver.h
+++ b/include/io/dns-resolver.h
@@ -26,8 +26,8 @@
#include "io/task.h"
#define TYPE_QIO_DNS_RESOLVER "qio-dns-resolver"
-OBJECT_DECLARE_TYPE(QIODNSResolver, QIODNSResolverClass,
-qio_dns_resolver, QIO_DNS_RESOLVER)
+OBJECT_DECLARE_SIMPLE_TYPE(QIODNSResolver, qio_dns_resolver,
+ QIO_DNS_RESOLVER, ObjectClass)
/**
@@ -133,9 +133,6 @@ struct QIODNSResolver {
Object parent;
};
-struct QIODNSResolverClass {
-ObjectClass parent;
-};
/**
diff --git a/include/io/net-listener.h b/include/io/net-listener.h
index 4f0847ff19..60fad29ff4 100644
--- a/include/io/net-listener.h
+++ b/include/io/net-listener.h
@@ -25,8 +25,8 @@
#include "qom/object.h"
#define TYPE_QIO_NET_LISTENER "qio-net-listener"
-OBJECT_DECLARE_TYPE(QIONetListener, QIONetListenerClass,
-qio_net_listener,
[PATCH v2 39/58] pxa2xx: Move QOM macros to header
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Andrzej Zaborowski
Cc: Peter Maydell
Cc: qemu-...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/arm/pxa.h | 13 +
hw/arm/pxa2xx.c | 7 ---
hw/pcmcia/pxa2xx.c | 4
hw/sd/pxa2xx_mmci.c | 3 ---
4 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h
index 8843e5f910..f6359fe7c9 100644
--- a/include/hw/arm/pxa.h
+++ b/include/hw/arm/pxa.h
@@ -86,7 +86,10 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem,
void pxa2xx_lcd_vsync_notifier(PXA2xxLCDState *s, qemu_irq handler);
/* pxa2xx_mmci.c */
+#define TYPE_PXA2XX_MMCI "pxa2xx-mmci"
typedef struct PXA2xxMMCIState PXA2xxMMCIState;
+#define PXA2XX_MMCI(obj) OBJECT_CHECK(PXA2xxMMCIState, (obj), TYPE_PXA2XX_MMCI)
+
PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
hwaddr base,
BlockBackend *blk, qemu_irq irq,
@@ -95,7 +98,11 @@ void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq
readonly,
qemu_irq coverswitch);
/* pxa2xx_pcmcia.c */
+#define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia"
typedef struct PXA2xxPCMCIAState PXA2xxPCMCIAState;
+#define PXA2XX_PCMCIA(obj) \
+OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA)
+
PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem,
hwaddr base);
int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card);
@@ -120,8 +127,14 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
qemu_irq irq, uint32_t page_size);
I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
+#define TYPE_PXA2XX_I2C "pxa2xx_i2c"
typedef struct PXA2xxI2SState PXA2xxI2SState;
+#define PXA2XX_I2C(obj) \
+OBJECT_CHECK(PXA2xxI2CState, (obj), TYPE_PXA2XX_I2C)
+
+#define TYPE_PXA2XX_FIR "pxa2xx-fir"
typedef struct PXA2xxFIrState PXA2xxFIrState;
+#define PXA2XX_FIR(obj) OBJECT_CHECK(PXA2xxFIrState, (obj), TYPE_PXA2XX_FIR)
typedef struct {
ARMCPU *cpu;
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 6203c4cfe0..037d415498 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -1250,10 +1250,6 @@ typedef struct PXA2xxI2CSlaveState {
PXA2xxI2CState *host;
} PXA2xxI2CSlaveState;
-#define TYPE_PXA2XX_I2C "pxa2xx_i2c"
-#define PXA2XX_I2C(obj) \
-OBJECT_CHECK(PXA2xxI2CState, (obj), TYPE_PXA2XX_I2C)
-
struct PXA2xxI2CState {
/*< private >*/
SysBusDevice parent_obj;
@@ -1786,9 +1782,6 @@ static PXA2xxI2SState *pxa2xx_i2s_init(MemoryRegion
*sysmem,
}
/* PXA Fast Infra-red Communications Port */
-#define TYPE_PXA2XX_FIR "pxa2xx-fir"
-#define PXA2XX_FIR(obj) OBJECT_CHECK(PXA2xxFIrState, (obj), TYPE_PXA2XX_FIR)
-
struct PXA2xxFIrState {
/*< private >*/
SysBusDevice parent_obj;
diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c
index 5f4bf22a90..fcca7e571b 100644
--- a/hw/pcmcia/pxa2xx.c
+++ b/hw/pcmcia/pxa2xx.c
@@ -18,10 +18,6 @@
#include "hw/pcmcia.h"
#include "hw/arm/pxa.h"
-#define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia"
-#define PXA2XX_PCMCIA(obj) \
-OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA)
-
struct PXA2xxPCMCIAState {
SysBusDevice parent_obj;
diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c
index 68bed24480..c400197815 100644
--- a/hw/sd/pxa2xx_mmci.c
+++ b/hw/sd/pxa2xx_mmci.c
@@ -22,9 +22,6 @@
#include "qemu/module.h"
#include "trace.h"
-#define TYPE_PXA2XX_MMCI "pxa2xx-mmci"
-#define PXA2XX_MMCI(obj) OBJECT_CHECK(PXA2xxMMCIState, (obj), TYPE_PXA2XX_MMCI)
-
#define TYPE_PXA2XX_MMCI_BUS "pxa2xx-mmci-bus"
#define PXA2XX_MMCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_PXA2XX_MMCI_BUS)
--
2.26.2
[PATCH v2 45/58] qom: Allow class type name to be specified in OBJECT_DECLARE*
Many QOM types don't follow the Type/TypeClass pattern
on the instance/struct names. Let the class struct name
be specified in the OBJECT_DECLARE* macros.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
include/qom/object.h | 35 ++-
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/include/qom/object.h b/include/qom/object.h
index f515230f61..500e7dfa99 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -555,7 +555,8 @@ struct Object
/**
* OBJECT_DECLARE_TYPE:
- * @ModuleObjName: the object name with initial capitalization
+ * @InstanceType: instance struct name
+ * @ClassType: class struct name
* @module_obj_name: the object name in lowercase with underscore separators
* @MODULE_OBJ_NAME: the object name in uppercase with underscore separators
*
@@ -567,33 +568,33 @@ struct Object
*
* The object struct and class struct need to be declared manually.
*/
-#define OBJECT_DECLARE_TYPE(ModuleObjName, module_obj_name, MODULE_OBJ_NAME) \
-typedef struct ModuleObjName ModuleObjName; \
-typedef struct ModuleObjName##Class ModuleObjName##Class; \
+#define OBJECT_DECLARE_TYPE(InstanceType, ClassType, module_obj_name,
MODULE_OBJ_NAME) \
+typedef struct InstanceType InstanceType; \
+typedef struct ClassType ClassType; \
\
-G_DEFINE_AUTOPTR_CLEANUP_FUNC(ModuleObjName, object_unref) \
+G_DEFINE_AUTOPTR_CLEANUP_FUNC(InstanceType, object_unref) \
\
-static inline G_GNUC_UNUSED ModuleObjName##Class * \
+static inline G_GNUC_UNUSED ClassType * \
MODULE_OBJ_NAME##_GET_CLASS(void *obj) \
-{ return OBJECT_GET_CLASS(ModuleObjName##Class, obj, \
+{ return OBJECT_GET_CLASS(ClassType, obj, \
TYPE_##MODULE_OBJ_NAME); } \
\
-static inline G_GNUC_UNUSED ModuleObjName##Class * \
+static inline G_GNUC_UNUSED ClassType * \
MODULE_OBJ_NAME##_CLASS(void *klass) \
-{ return OBJECT_CLASS_CHECK(ModuleObjName##Class, klass, \
+{ return OBJECT_CLASS_CHECK(ClassType, klass, \
TYPE_##MODULE_OBJ_NAME); } \
\
-static inline G_GNUC_UNUSED ModuleObjName * \
+static inline G_GNUC_UNUSED InstanceType * \
MODULE_OBJ_NAME(void *obj) \
-{ return OBJECT_CHECK(ModuleObjName, obj, \
+{ return OBJECT_CHECK(InstanceType, obj, \
TYPE_##MODULE_OBJ_NAME); }
/**
* OBJECT_DECLARE_SIMPLE_TYPE:
- * @ModuleObjName: the object name with initial caps
+ * @InstanceType: instance struct name
* @module_obj_name: the object name in lowercase with underscore separators
* @MODULE_OBJ_NAME: the object name in uppercase with underscore separators
- * @ParentModuleObjName: the parent object name with initial caps
+ * @ParentClassType: class struct name of parent type
*
* This does the same as OBJECT_DECLARE_TYPE(), but also declares
* the class struct, thus only the object struct needs to be declare
@@ -602,10 +603,10 @@ struct Object
* This macro should be used unless the class struct needs to have
* virtual methods declared.
*/
-#define OBJECT_DECLARE_SIMPLE_TYPE(ModuleObjName, module_obj_name, \
- MODULE_OBJ_NAME, ParentModuleObjName) \
-OBJECT_DECLARE_TYPE(ModuleObjName, module_obj_name, MODULE_OBJ_NAME) \
-struct ModuleObjName##Class { ParentModuleObjName##Class parent_class; };
+#define OBJECT_DECLARE_SIMPLE_TYPE(InstanceType, module_obj_name, \
+ MODULE_OBJ_NAME, ParentClassType) \
+OBJECT_DECLARE_TYPE(InstanceType, InstanceType##Class, module_obj_name,
MODULE_OBJ_NAME) \
+struct InstanceType##Class { ParentClassType parent_class; };
/**
--
2.26.2
[PATCH v2 34/58] vmbus: Move QOM macros to vmbus.h
Move all declarations related to TYPE_VMBUS to the same place in
vmbus.h.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: qemu-devel@nongnu.org
---
include/hw/hyperv/vmbus-bridge.h | 3 +--
include/hw/hyperv/vmbus.h| 4
hw/hyperv/vmbus.c| 3 ---
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/hw/hyperv/vmbus-bridge.h b/include/hw/hyperv/vmbus-bridge.h
index 33f93de64d..fe90bda01b 100644
--- a/include/hw/hyperv/vmbus-bridge.h
+++ b/include/hw/hyperv/vmbus-bridge.h
@@ -11,11 +11,10 @@
#define HW_HYPERV_VMBUS_BRIDGE_H
#include "hw/sysbus.h"
+#include "hw/hyperv/vmbus.h"
#define TYPE_VMBUS_BRIDGE "vmbus-bridge"
-typedef struct VMBus VMBus;
-
typedef struct VMBusBridge {
SysBusDevice parent_obj;
diff --git a/include/hw/hyperv/vmbus.h b/include/hw/hyperv/vmbus.h
index 40e8417eec..cd98ec24e7 100644
--- a/include/hw/hyperv/vmbus.h
+++ b/include/hw/hyperv/vmbus.h
@@ -26,6 +26,10 @@
#define VMBUS_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(VMBusDeviceClass, (obj), TYPE_VMBUS_DEVICE)
+#define TYPE_VMBUS "vmbus"
+typedef struct VMBus VMBus;
+#define VMBUS(obj) OBJECT_CHECK(VMBus, (obj), TYPE_VMBUS)
+
/*
* Object wrapping a GPADL -- GPA Descriptor List -- an array of guest physical
* pages, to be used for various buffers shared between the host and the guest.
diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c
index 34392e892a..75af6b83dd 100644
--- a/hw/hyperv/vmbus.c
+++ b/hw/hyperv/vmbus.c
@@ -20,9 +20,6 @@
#include "cpu.h"
#include "trace.h"
-#define TYPE_VMBUS "vmbus"
-#define VMBUS(obj) OBJECT_CHECK(VMBus, (obj), TYPE_VMBUS)
-
enum {
VMGPADL_INIT,
VMGPADL_ALIVE,
--
2.26.2
[PATCH v2 33/58] pckbd: Move QOM macro to header
Move the I8042 macro close to the TYPE_I8042 define.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: qemu-devel@nongnu.org
---
include/hw/input/i8042.h | 1 +
hw/input/pckbd.c | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h
index 8eaebf50ce..4569dfddd9 100644
--- a/include/hw/input/i8042.h
+++ b/include/hw/input/i8042.h
@@ -11,6 +11,7 @@
#include "hw/isa/isa.h"
#define TYPE_I8042 "i8042"
+#define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042)
#define I8042_A20_LINE "a20"
diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index 29d633ca94..dde85ba6c6 100644
--- a/hw/input/pckbd.c
+++ b/hw/input/pckbd.c
@@ -481,8 +481,6 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
qemu_register_reset(kbd_reset, s);
}
-#define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042)
-
struct ISAKBDState {
ISADevice parent_obj;
--
2.26.2
[PATCH v2 38/58] rocker: Move QOM macros to header
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Jiri Pirko
Cc: Jason Wang
Cc: qemu-devel@nongnu.org
---
hw/net/rocker/rocker.h | 6 +-
hw/net/rocker/rocker.c | 5 -
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/hw/net/rocker/rocker.h b/hw/net/rocker/rocker.h
index 7ae0495d9e..e4c22db4ff 100644
--- a/hw/net/rocker/rocker.h
+++ b/hw/net/rocker/rocker.h
@@ -66,11 +66,15 @@ static inline bool ipv6_addr_is_multicast(const Ipv6Addr
*addr)
return (addr->addr32[0] & htonl(0xFF00)) == htonl(0xFF00);
}
-typedef struct rocker Rocker;
typedef struct world World;
typedef struct desc_info DescInfo;
typedef struct desc_ring DescRing;
+#define TYPE_ROCKER "rocker"
+typedef struct rocker Rocker;
+#define ROCKER(obj) \
+OBJECT_CHECK(Rocker, (obj), TYPE_ROCKER)
+
Rocker *rocker_find(const char *name);
uint32_t rocker_fp_ports(Rocker *r);
int rocker_event_link_changed(Rocker *r, uint32_t pport, bool link_up);
diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c
index 15d66f6cbc..1af1e6fa2f 100644
--- a/hw/net/rocker/rocker.c
+++ b/hw/net/rocker/rocker.c
@@ -73,11 +73,6 @@ struct rocker {
QLIST_ENTRY(rocker) next;
};
-#define TYPE_ROCKER "rocker"
-
-#define ROCKER(obj) \
-OBJECT_CHECK(Rocker, (obj), TYPE_ROCKER)
-
static QLIST_HEAD(, rocker) rockers;
Rocker *rocker_find(const char *name)
--
2.26.2
[PATCH v2 30/58] ahci: Move QOM macros to header
The TYPE_* constants and the typedefs are defined in ahci.h, so
we can move the type checking macros there too.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: John Snow
Cc: qemu-bl...@nongnu.org
Cc: qemu-devel@nongnu.org
---
hw/ide/ahci_internal.h | 5 -
include/hw/ide/ahci.h | 3 +++
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/hw/ide/ahci_internal.h b/hw/ide/ahci_internal.h
index bab0459774..ac9bdead7b 100644
--- a/hw/ide/ahci_internal.h
+++ b/hw/ide/ahci_internal.h
@@ -332,9 +332,6 @@ struct AHCIPCIState {
AHCIState ahci;
};
-#define ICH_AHCI(obj) \
-OBJECT_CHECK(AHCIPCIState, (obj), TYPE_ICH9_AHCI)
-
extern const VMStateDescription vmstate_ahci;
#define VMSTATE_AHCI(_field, _state) { \
@@ -394,6 +391,4 @@ void ahci_uninit(AHCIState *s);
void ahci_reset(AHCIState *s);
-#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI)
-
#endif /* HW_IDE_AHCI_INTERNAL_H */
diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h
index b44e3000cf..ce2bf8a5f8 100644
--- a/include/hw/ide/ahci.h
+++ b/include/hw/ide/ahci.h
@@ -53,11 +53,14 @@ typedef struct AHCIState {
typedef struct AHCIPCIState AHCIPCIState;
#define TYPE_ICH9_AHCI "ich9-ahci"
+#define ICH_AHCI(obj) \
+OBJECT_CHECK(AHCIPCIState, (obj), TYPE_ICH9_AHCI)
int32_t ahci_get_num_ports(PCIDevice *dev);
void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd);
#define TYPE_SYSBUS_AHCI "sysbus-ahci"
+#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI)
typedef struct SysbusAHCIState {
/*< private >*/
--
2.26.2
[PATCH v2 57/58] crypto: use QOM macros for declaration/definition of secret types
From: Daniel P. Berrangé
This introduces the use of the OBJECT_DEFINE and OBJECT_DECLARE macro
families in the secret types, in order to eliminate boilerplate code.
Signed-off-by: Daniel P. Berrangé
Message-Id: <20200723181410.3145233-4-berra...@redhat.com>
[ehabkost: rebase, update to pass additional arguments to macro]
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
include/crypto/secret.h | 11 ++-
crypto/secret.c | 25 +++--
crypto/secret_common.c | 27 +--
crypto/secret_keyring.c | 29 -
4 files changed, 30 insertions(+), 62 deletions(-)
diff --git a/include/crypto/secret.h b/include/crypto/secret.h
index 5d20ae6d2f..4eb4e5ffef 100644
--- a/include/crypto/secret.h
+++ b/include/crypto/secret.h
@@ -26,11 +26,9 @@
#include "crypto/secret_common.h"
#define TYPE_QCRYPTO_SECRET "secret"
-typedef struct QCryptoSecret QCryptoSecret;
-DECLARE_INSTANCE_CHECKER(QCryptoSecret, QCRYPTO_SECRET,
- TYPE_QCRYPTO_SECRET)
-typedef struct QCryptoSecretClass QCryptoSecretClass;
+OBJECT_DECLARE_SIMPLE_TYPE(QCryptoSecret, qcrypto_secret,
+ QCRYPTO_SECRET, QCryptoSecretCommon)
/**
* QCryptoSecret:
@@ -125,9 +123,4 @@ struct QCryptoSecret {
char *file;
};
-
-struct QCryptoSecretClass {
-QCryptoSecretCommonClass parent_class;
-};
-
#endif /* QCRYPTO_SECRET_H */
diff --git a/crypto/secret.c b/crypto/secret.c
index c07011d388..55b406f79e 100644
--- a/crypto/secret.c
+++ b/crypto/secret.c
@@ -25,6 +25,9 @@
#include "qemu/module.h"
#include "trace.h"
+OBJECT_DEFINE_TYPE_WITH_INTERFACES(QCryptoSecret, qcrypto_secret,
+ QCRYPTO_SECRET, QCRYPTO_SECRET_COMMON,
+ { TYPE_USER_CREATABLE }, { NULL })
static void
qcrypto_secret_load_data(QCryptoSecretCommon *sec_common,
@@ -140,21 +143,7 @@ qcrypto_secret_class_init(ObjectClass *oc, void *data)
qcrypto_secret_prop_set_file);
}
-
-static const TypeInfo qcrypto_secret_info = {
-.parent = TYPE_QCRYPTO_SECRET_COMMON,
-.name = TYPE_QCRYPTO_SECRET,
-.instance_size = sizeof(QCryptoSecret),
-.instance_finalize = qcrypto_secret_finalize,
-.class_size = sizeof(QCryptoSecretClass),
-.class_init = qcrypto_secret_class_init,
-.interfaces = (InterfaceInfo[]) {
-{ TYPE_USER_CREATABLE },
-{ }
-}
-};
-TYPE_INFO(qcrypto_secret_info)
-
-
-
-
+static void
+qcrypto_secret_init(Object *obj)
+{
+}
diff --git a/crypto/secret_common.c b/crypto/secret_common.c
index 80d7d75b4d..9a054b90b5 100644
--- a/crypto/secret_common.c
+++ b/crypto/secret_common.c
@@ -28,6 +28,9 @@
#include "trace.h"
+OBJECT_DEFINE_ABSTRACT_TYPE(QCryptoSecretCommon, qcrypto_secret_common,
+QCRYPTO_SECRET_COMMON, OBJECT)
+
static void qcrypto_secret_decrypt(QCryptoSecretCommon *secret,
const uint8_t *input,
size_t inputlen,
@@ -269,7 +272,7 @@ qcrypto_secret_prop_get_keyid(Object *obj,
static void
-qcrypto_secret_finalize(Object *obj)
+qcrypto_secret_common_finalize(Object *obj)
{
QCryptoSecretCommon *secret = QCRYPTO_SECRET_COMMON(obj);
@@ -279,7 +282,7 @@ qcrypto_secret_finalize(Object *obj)
}
static void
-qcrypto_secret_class_init(ObjectClass *oc, void *data)
+qcrypto_secret_common_class_init(ObjectClass *oc, void *data)
{
object_class_property_add_bool(oc, "loaded",
qcrypto_secret_prop_get_loaded,
@@ -297,6 +300,10 @@ qcrypto_secret_class_init(ObjectClass *oc, void *data)
qcrypto_secret_prop_set_iv);
}
+static void
+qcrypto_secret_common_init(Object *obj)
+{
+}
int qcrypto_secret_lookup(const char *secretid,
uint8_t **data,
@@ -380,19 +387,3 @@ char *qcrypto_secret_lookup_as_base64(const char *secretid,
g_free(data);
return ret;
}
-
-
-static const TypeInfo qcrypto_secret_info = {
-.parent = TYPE_OBJECT,
-.name = TYPE_QCRYPTO_SECRET_COMMON,
-.instance_size = sizeof(QCryptoSecretCommon),
-.instance_finalize = qcrypto_secret_finalize,
-.class_size = sizeof(QCryptoSecretCommonClass),
-.class_init = qcrypto_secret_class_init,
-.abstract = true,
-};
-TYPE_INFO(qcrypto_secret_info)
-
-
-
-
diff --git a/crypto/secret_keyring.c b/crypto/secret_keyring.c
index 821d2e421b..463aefe5dc 100644
--- a/crypto/secret_keyring.c
+++ b/crypto/secret_keyring.c
@@ -26,6 +26,9 @@
#include "trace.h"
#include "crypto/secret_keyring.h"
+OBJECT_DEFINE_TYPE_WITH_INTERFACES(QCryptoSecretKeyring,
qcrypto_secret_keyring,
+ QCRYPTO_SECRET_KEYRING,
QCRYPTO_SECRET_COMMON,
+ { TYPE_USER_CREATABLE }, { NULL })
static inline
long keyctl_read(int32_t key, uint8_t *buffer, size_t buflen)
@@
[PATCH v2 35/58] virtio-serial-bus: Move QOM macros to header
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Laurent Vivier
Cc: Amit Shah
Cc: "Michael S. Tsirkin"
Cc: "Marc-André Lureau"
Cc: Paolo Bonzini
Cc: qemu-devel@nongnu.org
---
include/hw/virtio/virtio-serial.h | 5 +
hw/char/virtio-serial-bus.c | 4
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/include/hw/virtio/virtio-serial.h
b/include/hw/virtio/virtio-serial.h
index ed3e916b68..448615a6b3 100644
--- a/include/hw/virtio/virtio-serial.h
+++ b/include/hw/virtio/virtio-serial.h
@@ -33,7 +33,12 @@ struct virtio_serial_conf {
OBJECT_GET_CLASS(VirtIOSerialPortClass, (obj), TYPE_VIRTIO_SERIAL_PORT)
typedef struct VirtIOSerial VirtIOSerial;
+
+#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus"
typedef struct VirtIOSerialBus VirtIOSerialBus;
+#define VIRTIO_SERIAL_BUS(obj) \
+ OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS)
+
typedef struct VirtIOSerialPort VirtIOSerialPort;
typedef struct VirtIOSerialPortClass {
diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c
index f9a4428bd6..cf08ef9728 100644
--- a/hw/char/virtio-serial-bus.c
+++ b/hw/char/virtio-serial-bus.c
@@ -843,10 +843,6 @@ static Property virtser_props[] = {
DEFINE_PROP_END_OF_LIST()
};
-#define TYPE_VIRTIO_SERIAL_BUS "virtio-serial-bus"
-#define VIRTIO_SERIAL_BUS(obj) \
- OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS)
-
static void virtser_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
--
2.26.2
[PATCH v2 50/58] [automated] Delete duplicate QOM typedefs
Generated using:
$ ./scripts/codeconverter/converter.py -i \
--pattern=QOMDuplicatedTypedefs $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
include/crypto/secret_keyring.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/crypto/secret_keyring.h b/include/crypto/secret_keyring.h
index 9f371ad251..4345eb048e 100644
--- a/include/crypto/secret_keyring.h
+++ b/include/crypto/secret_keyring.h
@@ -39,14 +39,14 @@
typedef struct QCryptoSecretKeyring QCryptoSecretKeyring;
typedef struct QCryptoSecretKeyringClass QCryptoSecretKeyringClass;
-typedef struct QCryptoSecretKeyring {
+struct QCryptoSecretKeyring {
QCryptoSecretCommon parent;
int32_t serial;
-} QCryptoSecretKeyring;
+};
-typedef struct QCryptoSecretKeyringClass {
+struct QCryptoSecretKeyringClass {
QCryptoSecretCommonClass parent;
-} QCryptoSecretKeyringClass;
+};
#endif /* QCRYPTO_SECRET_KEYRING_H */
--
2.26.2
[PATCH v2 54/58] [semi-automated] Use DECLARE_*CHECKER* when possible (--force mode)
Separate run of the TypeCheckMacro converter using the --force
flag, for the cases where typedefs weren't found in the same
header nor in typedefs.h.
Generated initially using:
$ ./scripts/codeconverter/converter.py --force -i \
--pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Then each case was manually reviewed, and a comment was added
indicating what's unusual about those type checking
macros/functions. Despite not following the usual pattern, the
changes in this patch were found to be safe.
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Most of the old changes in this patch are now being handled by
the regular TypeCheckMacro patch (without --force mode)
* Added comments added explaining why these unusual changes
remain
---
include/hw/intc/arm_gic.h | 9 +++--
include/hw/intc/arm_gicv3.h | 8 +++-
include/hw/ppc/xics_spapr.h | 4 +++-
include/hw/virtio/virtio-mmio.h | 9 +++--
hw/intc/apic.c | 5 +++--
hw/intc/arm_gic_kvm.c | 9 +++--
hw/intc/arm_gicv3_its_kvm.c | 8 +++-
hw/intc/arm_gicv3_kvm.c | 9 +++--
hw/sd/allwinner-sdhost.c| 5 +++--
hw/sd/bcm2835_sdhost.c | 5 +++--
hw/sd/pxa2xx_mmci.c | 4 +++-
hw/sd/sdhci.c | 4 +++-
12 files changed, 36 insertions(+), 43 deletions(-)
diff --git a/include/hw/intc/arm_gic.h b/include/hw/intc/arm_gic.h
index 704ef2b751..116ccbb5a9 100644
--- a/include/hw/intc/arm_gic.h
+++ b/include/hw/intc/arm_gic.h
@@ -74,12 +74,9 @@
#define TYPE_ARM_GIC "arm_gic"
typedef struct ARMGICClass ARMGICClass;
-#define ARM_GIC(obj) \
- OBJECT_CHECK(GICState, (obj), TYPE_ARM_GIC)
-#define ARM_GIC_CLASS(klass) \
- OBJECT_CLASS_CHECK(ARMGICClass, (klass), TYPE_ARM_GIC)
-#define ARM_GIC_GET_CLASS(obj) \
- OBJECT_GET_CLASS(ARMGICClass, (obj), TYPE_ARM_GIC)
+/* This is reusing the GICState typedef from TYPE_ARM_GIC_COMMON */
+DECLARE_OBJ_CHECKERS(GICState, ARMGICClass,
+ ARM_GIC, TYPE_ARM_GIC)
struct ARMGICClass {
/*< private >*/
diff --git a/include/hw/intc/arm_gicv3.h b/include/hw/intc/arm_gicv3.h
index 58e9131a33..a81a6ae7ec 100644
--- a/include/hw/intc/arm_gicv3.h
+++ b/include/hw/intc/arm_gicv3.h
@@ -17,11 +17,9 @@
#define TYPE_ARM_GICV3 "arm-gicv3"
typedef struct ARMGICv3Class ARMGICv3Class;
-#define ARM_GICV3(obj) OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3)
-#define ARM_GICV3_CLASS(klass) \
- OBJECT_CLASS_CHECK(ARMGICv3Class, (klass), TYPE_ARM_GICV3)
-#define ARM_GICV3_GET_CLASS(obj) \
- OBJECT_GET_CLASS(ARMGICv3Class, (obj), TYPE_ARM_GICV3)
+/* This is reusing the GICState typedef from TYPE_ARM_GICV3_COMMON */
+DECLARE_OBJ_CHECKERS(GICv3State, ARMGICv3Class,
+ ARM_GICV3, TYPE_ARM_GICV3)
struct ARMGICv3Class {
/*< private >*/
diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h
index 09e428de4e..0b8182e40b 100644
--- a/include/hw/ppc/xics_spapr.h
+++ b/include/hw/ppc/xics_spapr.h
@@ -31,7 +31,9 @@
#include "qom/object.h"
#define TYPE_ICS_SPAPR "ics-spapr"
-#define ICS_SPAPR(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SPAPR)
+/* This is reusing the ICSState typedef from TYPE_ICS */
+DECLARE_INSTANCE_CHECKER(ICSState, ICS_SPAPR,
+ TYPE_ICS_SPAPR)
int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers,
Error **errp);
diff --git a/include/hw/virtio/virtio-mmio.h b/include/hw/virtio/virtio-mmio.h
index dca651fd14..6a1c2c20d4 100644
--- a/include/hw/virtio/virtio-mmio.h
+++ b/include/hw/virtio/virtio-mmio.h
@@ -28,12 +28,9 @@
/* QOM macros */
/* virtio-mmio-bus */
#define TYPE_VIRTIO_MMIO_BUS "virtio-mmio-bus"
-#define VIRTIO_MMIO_BUS(obj) \
-OBJECT_CHECK(VirtioBusState, (obj), TYPE_VIRTIO_MMIO_BUS)
-#define VIRTIO_MMIO_BUS_GET_CLASS(obj) \
-OBJECT_GET_CLASS(VirtioBusClass, (obj), TYPE_VIRTIO_MMIO_BUS)
-#define VIRTIO_MMIO_BUS_CLASS(klass) \
-OBJECT_CLASS_CHECK(VirtioBusClass, (klass), TYPE_VIRTIO_MMIO_BUS)
+/* This is reusing the VirtioBusState typedef from TYPE_VIRTIO_BUS */
+DECLARE_OBJ_CHECKERS(VirtioBusState, VirtioBusClass,
+ VIRTIO_MMIO_BUS, TYPE_VIRTIO_MMIO_BUS)
/* virtio-mmio */
#define TYPE_VIRTIO_MMIO "virtio-mmio"
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index afbb653497..dadbfd9a75 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -40,8 +40,9 @@
static APICCommonState *local_apics[MAX_APICS + 1];
#define TYPE_APIC "apic"
-#define APIC(obj) \
-OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC)
+/*This is reusing the APICCommonState typedef from APIC_COMMON */
+DECLARE_INSTANCE_CHECKER(APICCommonState, APIC,
+ TYPE_APIC)
static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode);
static void apic_update_irq(APICCommonState *s);
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index 8bc90aa65d..28a1fb9a0d 100644
---
[PATCH v2 31/58] i8257: Move QOM macro to header
Move the I8257 macro to i8257.h, close to the TYPE_I8257 define.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: qemu-devel@nongnu.org
---
include/hw/dma/i8257.h | 2 ++
hw/dma/i8257.c | 2 --
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h
index 03e2c166be..ee06371699 100644
--- a/include/hw/dma/i8257.h
+++ b/include/hw/dma/i8257.h
@@ -5,6 +5,8 @@
#include "exec/ioport.h"
#define TYPE_I8257 "i8257"
+#define I8257(obj) \
+OBJECT_CHECK(I8257State, (obj), TYPE_I8257)
typedef struct I8257Regs {
int now[2];
diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c
index db808029b0..de5f696919 100644
--- a/hw/dma/i8257.c
+++ b/hw/dma/i8257.c
@@ -33,8 +33,6 @@
#include "qemu/log.h"
#include "trace.h"
-#define I8257(obj) \
-OBJECT_CHECK(I8257State, (obj), TYPE_I8257)
/* #define DEBUG_DMA */
--
2.26.2
[PATCH v2 29/58] vhost-user-gpu: Move QOM macro to header
Move the VHOST_USER_GPU type checking macro to virtio-gpu.h,
close to the TYPE_VHOST_USER_GPU #define.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: "Michael S. Tsirkin"
Cc: "Marc-André Lureau"
Cc: Gerd Hoffmann
Cc: qemu-devel@nongnu.org
---
include/hw/virtio/virtio-gpu.h | 2 ++
hw/display/vhost-user-gpu.c| 3 ---
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
index 6dd57f2025..7517438e10 100644
--- a/include/hw/virtio/virtio-gpu.h
+++ b/include/hw/virtio/virtio-gpu.h
@@ -36,6 +36,8 @@
OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)
#define TYPE_VHOST_USER_GPU "vhost-user-gpu"
+#define VHOST_USER_GPU(obj)\
+OBJECT_CHECK(VhostUserGPU, (obj), TYPE_VHOST_USER_GPU)
#define VIRTIO_ID_GPU 16
diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c
index 4cdaee1bde..51f1747c4a 100644
--- a/hw/display/vhost-user-gpu.c
+++ b/hw/display/vhost-user-gpu.c
@@ -17,9 +17,6 @@
#include "qapi/error.h"
#include "migration/blocker.h"
-#define VHOST_USER_GPU(obj)\
-OBJECT_CHECK(VhostUserGPU, (obj), TYPE_VHOST_USER_GPU)
-
typedef enum VhostUserGpuRequest {
VHOST_USER_GPU_NONE = 0,
VHOST_USER_GPU_GET_PROTOCOL_FEATURES,
--
2.26.2
[PATCH v2 40/58] mptsas: Move QOM macros to header
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Paolo Bonzini
Cc: Fam Zheng
Cc: qemu-devel@nongnu.org
---
hw/scsi/mptsas.h | 6 +-
hw/scsi/mptsas.c | 5 -
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/hw/scsi/mptsas.h b/hw/scsi/mptsas.h
index 0436a33911..9ac98fc20e 100644
--- a/hw/scsi/mptsas.h
+++ b/hw/scsi/mptsas.h
@@ -11,9 +11,13 @@
#define MPTSAS_MAXIMUM_CHAIN_DEPTH 0x22
-typedef struct MPTSASState MPTSASState;
typedef struct MPTSASRequest MPTSASRequest;
+#define TYPE_MPTSAS1068 "mptsas1068"
+typedef struct MPTSASState MPTSASState;
+#define MPT_SAS(obj) \
+OBJECT_CHECK(MPTSASState, (obj), TYPE_MPTSAS1068)
+
enum {
DOORBELL_NONE,
DOORBELL_WRITE,
diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c
index 14cbed84d0..135e7d96e4 100644
--- a/hw/scsi/mptsas.c
+++ b/hw/scsi/mptsas.c
@@ -42,11 +42,6 @@
#define NAA_LOCALLY_ASSIGNED_ID 0x3ULL
#define IEEE_COMPANY_LOCALLY_ASSIGNED 0x525400
-#define TYPE_MPTSAS1068 "mptsas1068"
-
-#define MPT_SAS(obj) \
-OBJECT_CHECK(MPTSASState, (obj), TYPE_MPTSAS1068)
-
#define MPTSAS1068_PRODUCT_ID \
(MPI_FW_HEADER_PID_FAMILY_1068_SAS | \
MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI | \
--
2.26.2
[PATCH v2 46/58] qom: DECLARE_*_CHECKERS macros
Sometimes the typedefs are buried inside another header, but
we want to benefit from the automatic definition of type cast
functions. Introduce macros that will let type checkers be
defined when typedefs are already available.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
include/qom/object.h | 72 +++-
1 file changed, 58 insertions(+), 14 deletions(-)
diff --git a/include/qom/object.h b/include/qom/object.h
index 500e7dfa99..4cd84998c2 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -553,6 +553,62 @@ struct Object
Object *parent;
};
+/**
+ * DECLARE_INSTANCE_CHECKER:
+ * @InstanceType: instance struct name
+ * @OBJ_NAME: the object name in uppercase with underscore separators
+ * @TYPENAME: type name
+ *
+ * Direct usage of this macro should be avoided, and the complete
+ * OBJECT_DECLARE_TYPE macro is recommended instead.
+ *
+ * This macro will provide the three standard type cast functions for a
+ * QOM type.
+ */
+#define DECLARE_INSTANCE_CHECKER(InstanceType, OBJ_NAME, TYPENAME) \
+static inline G_GNUC_UNUSED InstanceType * \
+OBJ_NAME(void *obj) \
+{ return OBJECT_CHECK(InstanceType, obj, TYPENAME); }
+
+/**
+ * DECLARE_CLASS_CHECKERS:
+ * @ClassType: class struct name
+ * @OBJ_NAME: the object name in uppercase with underscore separators
+ * @TYPENAME: type name
+ *
+ * Direct usage of this macro should be avoided, and the complete
+ * OBJECT_DECLARE_TYPE macro is recommended instead.
+ *
+ * This macro will provide the three standard type cast functions for a
+ * QOM type.
+ */
+#define DECLARE_CLASS_CHECKERS(ClassType, OBJ_NAME, TYPENAME) \
+static inline G_GNUC_UNUSED ClassType * \
+OBJ_NAME##_GET_CLASS(void *obj) \
+{ return OBJECT_GET_CLASS(ClassType, obj, TYPENAME); } \
+\
+static inline G_GNUC_UNUSED ClassType * \
+OBJ_NAME##_CLASS(void *klass) \
+{ return OBJECT_CLASS_CHECK(ClassType, klass, TYPENAME); }
+
+/**
+ * DECLARE_OBJ_CHECKERS:
+ * @InstanceType: instance struct name
+ * @ClassType: class struct name
+ * @OBJ_NAME: the object name in uppercase with underscore separators
+ * @TYPENAME: type name
+ *
+ * Direct usage of this macro should be avoided, and the complete
+ * OBJECT_DECLARE_TYPE macro is recommended instead.
+ *
+ * This macro will provide the three standard type cast functions for a
+ * QOM type.
+ */
+#define DECLARE_OBJ_CHECKERS(InstanceType, ClassType, OBJ_NAME, TYPENAME) \
+DECLARE_INSTANCE_CHECKER(InstanceType, OBJ_NAME, TYPENAME) \
+\
+DECLARE_CLASS_CHECKERS(ClassType, OBJ_NAME, TYPENAME)
+
/**
* OBJECT_DECLARE_TYPE:
* @InstanceType: instance struct name
@@ -574,20 +630,8 @@ struct Object
\
G_DEFINE_AUTOPTR_CLEANUP_FUNC(InstanceType, object_unref) \
\
-static inline G_GNUC_UNUSED ClassType * \
-MODULE_OBJ_NAME##_GET_CLASS(void *obj) \
-{ return OBJECT_GET_CLASS(ClassType, obj, \
- TYPE_##MODULE_OBJ_NAME); } \
-\
-static inline G_GNUC_UNUSED ClassType * \
-MODULE_OBJ_NAME##_CLASS(void *klass) \
-{ return OBJECT_CLASS_CHECK(ClassType, klass, \
-TYPE_##MODULE_OBJ_NAME); } \
-\
-static inline G_GNUC_UNUSED InstanceType * \
-MODULE_OBJ_NAME(void *obj) \
-{ return OBJECT_CHECK(InstanceType, obj, \
- TYPE_##MODULE_OBJ_NAME); }
+DECLARE_OBJ_CHECKERS(InstanceType, ClassType, \
+ MODULE_OBJ_NAME, TYPE_##MODULE_OBJ_NAME)
/**
* OBJECT_DECLARE_SIMPLE_TYPE:
--
2.26.2
[PATCH v2 26/58] xen-legacy-backend: Add missing typedef XenLegacyDevice
The typedef was used in the XENBACKEND_DEVICE macro, but it was never defined. Define the typedef close to the type checking macro. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2: new patch in series v2 --- Cc: Stefano Stabellini Cc: Anthony Perard Cc: Paul Durrant Cc: xen-de...@lists.xenproject.org Cc: qemu-devel@nongnu.org --- include/hw/xen/xen-legacy-backend.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/hw/xen/xen-legacy-backend.h b/include/hw/xen/xen-legacy-backend.h index 5e6c56c4d6..704bc7852b 100644 --- a/include/hw/xen/xen-legacy-backend.h +++ b/include/hw/xen/xen-legacy-backend.h @@ -9,6 +9,7 @@ #define TYPE_XENSYSBUS "xen-sysbus" #define TYPE_XENBACKEND "xen-backend" +typedef struct XenLegacyDevice XenLegacyDevice; #define XENBACKEND_DEVICE(obj) \ OBJECT_CHECK(XenLegacyDevice, (obj), TYPE_XENBACKEND) -- 2.26.2
[PATCH v2 43/58] qom: make object_ref/unref use a void * instead of Object *.
From: Daniel P. Berrangé
The object_ref/unref methods are intended for use with any subclass of
the base Object. Using "Object *" in the signature is not adding any
meaningful level of type safety, since callers simply use "OBJECT(ptr)"
and this expands to an unchecked cast "(Object *)".
By using "void *" we enable the object_unref() method to be used to
provide support for g_autoptr() with any subclass.
Signed-off-by: Daniel P. Berrangé
Message-Id: <20200723181410.3145233-2-berra...@redhat.com>
---
Changes v1 -> v2: none
---
include/qom/object.h | 4 ++--
qom/object.c | 6 --
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/qom/object.h b/include/qom/object.h
index 0f3a60617c..1f8aa2d48e 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -1035,7 +1035,7 @@ GSList *object_class_get_list_sorted(const char
*implements_type,
* as its reference count is greater than zero.
* Returns: @obj
*/
-Object *object_ref(Object *obj);
+Object *object_ref(void *obj);
/**
* object_unref:
@@ -1044,7 +1044,7 @@ Object *object_ref(Object *obj);
* Decrease the reference count of a object. A object cannot be freed as long
* as its reference count is greater than zero.
*/
-void object_unref(Object *obj);
+void object_unref(void *obj);
/**
* object_property_try_add:
diff --git a/qom/object.c b/qom/object.c
index 00fdf89b3b..b1822a2ef4 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -1124,8 +1124,9 @@ GSList *object_class_get_list_sorted(const char
*implements_type,
object_class_cmp);
}
-Object *object_ref(Object *obj)
+Object *object_ref(void *objptr)
{
+Object *obj = OBJECT(objptr);
if (!obj) {
return NULL;
}
@@ -1133,8 +1134,9 @@ Object *object_ref(Object *obj)
return obj;
}
-void object_unref(Object *obj)
+void object_unref(void *objptr)
{
+Object *obj = OBJECT(objptr);
if (!obj) {
return;
}
--
2.26.2
[PATCH v2 28/58] s390x: Move typedef SCLPEventFacility to event-facility.h
This will make future conversion to OBJECT_DECLARE* easier.
In sclp.h, use "struct SCLPEventFacility" to avoid introducing
unnecessary header dependencies.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Cornelia Huck
Cc: Halil Pasic
Cc: Christian Borntraeger
Cc: Thomas Huth
Cc: qemu-s3...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/s390x/event-facility.h | 1 +
include/hw/s390x/sclp.h | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/hw/s390x/event-facility.h
b/include/hw/s390x/event-facility.h
index 700a610f33..e61c4651d7 100644
--- a/include/hw/s390x/event-facility.h
+++ b/include/hw/s390x/event-facility.h
@@ -195,6 +195,7 @@ typedef struct SCLPEventClass {
} SCLPEventClass;
#define TYPE_SCLP_EVENT_FACILITY "s390-sclp-event-facility"
+typedef struct SCLPEventFacility SCLPEventFacility;
#define EVENT_FACILITY(obj) \
OBJECT_CHECK(SCLPEventFacility, (obj), TYPE_SCLP_EVENT_FACILITY)
#define EVENT_FACILITY_CLASS(klass) \
diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h
index 822eff4396..a87ed2a0ab 100644
--- a/include/hw/s390x/sclp.h
+++ b/include/hw/s390x/sclp.h
@@ -185,12 +185,12 @@ typedef struct SCCB {
#define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP)
#define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP)
-typedef struct SCLPEventFacility SCLPEventFacility;
+struct SCLPEventFacility;
typedef struct SCLPDevice {
/* private */
DeviceState parent_obj;
-SCLPEventFacility *event_facility;
+struct SCLPEventFacility *event_facility;
int increment_size;
/* public */
--
2.26.2
[PATCH v2 37/58] auxbus: Move QOM macros to header
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: qemu-devel@nongnu.org
---
include/hw/misc/auxbus.h | 3 +++
hw/misc/auxbus.c | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h
index 15a8973517..041edfc9e9 100644
--- a/include/hw/misc/auxbus.h
+++ b/include/hw/misc/auxbus.h
@@ -32,7 +32,10 @@ typedef struct AUXBus AUXBus;
typedef struct AUXSlave AUXSlave;
typedef enum AUXCommand AUXCommand;
typedef enum AUXReply AUXReply;
+
+#define TYPE_AUXTOI2C "aux-to-i2c-bridge"
typedef struct AUXTOI2CState AUXTOI2CState;
+#define AUXTOI2C(obj) OBJECT_CHECK(AUXTOI2CState, (obj), TYPE_AUXTOI2C)
enum AUXCommand {
WRITE_I2C = 0,
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c
index da361baa32..6c099ae2a2 100644
--- a/hw/misc/auxbus.c
+++ b/hw/misc/auxbus.c
@@ -45,8 +45,6 @@
}
\
} while (0)
-#define TYPE_AUXTOI2C "aux-to-i2c-bridge"
-#define AUXTOI2C(obj) OBJECT_CHECK(AUXTOI2CState, (obj), TYPE_AUXTOI2C)
static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent);
static inline I2CBus *aux_bridge_get_i2c_bus(AUXTOI2CState *bridge);
--
2.26.2
[PATCH v2 42/58] vfio/pci: Move QOM macros to header
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Alex Williamson
Cc: qemu-devel@nongnu.org
---
hw/vfio/pci.h | 3 +++
hw/vfio/pci.c | 3 ---
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h
index 0da7a20a7e..3c0dca024b 100644
--- a/hw/vfio/pci.h
+++ b/hw/vfio/pci.h
@@ -113,6 +113,9 @@ typedef struct VFIOMSIXInfo {
unsigned long *pending;
} VFIOMSIXInfo;
+#define TYPE_VFIO_PCI "vfio-pci"
+#define PCI_VFIO(obj)OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI)
+
typedef struct VFIOPCIDevice {
PCIDevice pdev;
VFIODevice vbasedev;
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 2e561c06d6..3611dcd38b 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -42,9 +42,6 @@
#include "qapi/error.h"
#include "migration/blocker.h"
-#define TYPE_VFIO_PCI "vfio-pci"
-#define PCI_VFIO(obj)OBJECT_CHECK(VFIOPCIDevice, obj, TYPE_VFIO_PCI)
-
#define TYPE_VFIO_PCI_NOHOTPLUG "vfio-pci-nohotplug"
static void vfio_disable_interrupts(VFIOPCIDevice *vdev);
--
2.26.2
[PATCH v2 22/58] can_emu: Delete macros for non-existing typedef
CanBusClass doesn't exist. This will break when we automatically
convert the code to use OBJECT_DEFINE_TYPE(). Delete the macros
that reference the non-existing typedef.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Jason Wang
Cc: qemu-devel@nongnu.org
---
include/net/can_emu.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/net/can_emu.h b/include/net/can_emu.h
index fce9770928..7e90fd8a45 100644
--- a/include/net/can_emu.h
+++ b/include/net/can_emu.h
@@ -100,10 +100,6 @@ struct CanBusClientState {
};
#define TYPE_CAN_BUS "can-bus"
-#define CAN_BUS_CLASS(klass) \
- OBJECT_CLASS_CHECK(CanBusClass, (klass), TYPE_CAN_BUS)
-#define CAN_BUS_GET_CLASS(obj) \
- OBJECT_GET_CLASS(CanBusClass, (obj), TYPE_CAN_BUS)
#define CAN_BUS(obj) \
OBJECT_CHECK(CanBusState, (obj), TYPE_CAN_BUS)
--
2.26.2
[PATCH v2 21/58] s390_flic: Move KVMS390FLICState typedef to header
Move typedef closer to the type check macros, to make it easier
to convert the code to OBJECT_DEFINE_TYPE() in the future.
Acked-by: Cornelia Huck
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Cornelia Huck
Cc: Thomas Huth
Cc: Halil Pasic
Cc: Christian Borntraeger
Cc: qemu-s3...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/s390x/s390_flic.h | 1 +
hw/intc/s390_flic_kvm.c | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/hw/s390x/s390_flic.h b/include/hw/s390x/s390_flic.h
index 4687ecfe83..df11de9b20 100644
--- a/include/hw/s390x/s390_flic.h
+++ b/include/hw/s390x/s390_flic.h
@@ -75,6 +75,7 @@ typedef struct S390FLICStateClass {
} S390FLICStateClass;
#define TYPE_KVM_S390_FLIC "s390-flic-kvm"
+typedef struct KVMS390FLICState KVMS390FLICState;
#define KVM_S390_FLIC(obj) \
OBJECT_CHECK(KVMS390FLICState, (obj), TYPE_KVM_S390_FLIC)
diff --git a/hw/intc/s390_flic_kvm.c b/hw/intc/s390_flic_kvm.c
index a306b26faa..dbd4e682ce 100644
--- a/hw/intc/s390_flic_kvm.c
+++ b/hw/intc/s390_flic_kvm.c
@@ -29,12 +29,12 @@
#define FLIC_FAILED (-1UL)
#define FLIC_SAVEVM_VERSION 1
-typedef struct KVMS390FLICState {
+struct KVMS390FLICState{
S390FLICState parent_obj;
uint32_t fd;
bool clear_io_supported;
-} KVMS390FLICState;
+};
static KVMS390FLICState *s390_get_kvm_flic(S390FLICState *fs)
{
--
2.26.2
[PATCH v2 41/58] kvm: Move QOM macros to kvm.h
Move QOM macros close to the KVMState typedef.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Paolo Bonzini
Cc: k...@vger.kernel.org
Cc: qemu-devel@nongnu.org
---
include/sysemu/kvm.h | 6 ++
include/sysemu/kvm_int.h | 5 -
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index b4174d941c..8445a88db1 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -17,6 +17,7 @@
#include "qemu/queue.h"
#include "hw/core/cpu.h"
#include "exec/memattrs.h"
+#include "sysemu/accel.h"
#ifdef NEED_CPU_H
# ifdef CONFIG_KVM
@@ -199,7 +200,12 @@ typedef struct KVMCapabilityInfo {
#define KVM_CAP_LAST_INFO { NULL, 0 }
struct KVMState;
+
+#define TYPE_KVM_ACCEL ACCEL_CLASS_NAME("kvm")
typedef struct KVMState KVMState;
+#define KVM_STATE(obj) \
+OBJECT_CHECK(KVMState, (obj), TYPE_KVM_ACCEL)
+
extern KVMState *kvm_state;
typedef struct Notifier Notifier;
diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h
index c660a70c51..65740806da 100644
--- a/include/sysemu/kvm_int.h
+++ b/include/sysemu/kvm_int.h
@@ -33,11 +33,6 @@ typedef struct KVMMemoryListener {
int as_id;
} KVMMemoryListener;
-#define TYPE_KVM_ACCEL ACCEL_CLASS_NAME("kvm")
-
-#define KVM_STATE(obj) \
-OBJECT_CHECK(KVMState, (obj), TYPE_KVM_ACCEL)
-
void kvm_memory_listener_register(KVMState *s, KVMMemoryListener *kml,
AddressSpace *as, int as_id);
--
2.26.2
[PATCH v2 19/58] hvf: Move HVFState typedef to hvf.h
Move typedef closer to the type check macros, to make it easier
to convert the code to OBJECT_DEFINE_TYPE() in the future.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Cameron Esfahani
Cc: Roman Bolshakov
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Cc: qemu-devel@nongnu.org
---
include/sysemu/hvf.h | 1 +
target/i386/hvf/hvf-i386.h | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/sysemu/hvf.h b/include/sysemu/hvf.h
index d3bed80ea8..760d6c79a2 100644
--- a/include/sysemu/hvf.h
+++ b/include/sysemu/hvf.h
@@ -35,6 +35,7 @@ void hvf_vcpu_destroy(CPUState *);
#define TYPE_HVF_ACCEL ACCEL_CLASS_NAME("hvf")
+typedef struct HVFState HVFState;
#define HVF_STATE(obj) \
OBJECT_CHECK(HVFState, (obj), TYPE_HVF_ACCEL)
diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h
index ef20c73eca..e0edffd077 100644
--- a/target/i386/hvf/hvf-i386.h
+++ b/target/i386/hvf/hvf-i386.h
@@ -57,13 +57,13 @@ typedef struct hvf_vcpu_caps {
uint64_t vmx_cap_preemption_timer;
} hvf_vcpu_caps;
-typedef struct HVFState {
+struct HVFState {
AccelState parent;
hvf_slot slots[32];
int num_slots;
hvf_vcpu_caps *hvf_caps;
-} HVFState;
+};
extern HVFState *hvf_state;
void hvf_set_phys_mem(MemoryRegionSection *, bool);
--
2.26.2
[PATCH v2 32/58] ahci: Move QOM macro to header
Move the ALLWINNER_AHCI macro close to the TYPE_ALLWINNER_AHCI
define.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: John Snow
Cc: qemu-bl...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/ide/ahci.h | 2 ++
hw/ide/ahci-allwinner.c | 3 ---
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h
index ce2bf8a5f8..41bb517047 100644
--- a/include/hw/ide/ahci.h
+++ b/include/hw/ide/ahci.h
@@ -72,6 +72,8 @@ typedef struct SysbusAHCIState {
} SysbusAHCIState;
#define TYPE_ALLWINNER_AHCI "allwinner-ahci"
+#define ALLWINNER_AHCI(obj) \
+OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI)
#define ALLWINNER_AHCI_MMIO_OFF 0x80
#define ALLWINNER_AHCI_MMIO_SIZE 0x80
diff --git a/hw/ide/ahci-allwinner.c b/hw/ide/ahci-allwinner.c
index 8536b9eb5a..227e747ba7 100644
--- a/hw/ide/ahci-allwinner.c
+++ b/hw/ide/ahci-allwinner.c
@@ -25,9 +25,6 @@
#include "trace.h"
-#define ALLWINNER_AHCI(obj) \
-OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI)
-
#define ALLWINNER_AHCI_BISTAFR((0xa0 - ALLWINNER_AHCI_MMIO_OFF) / 4)
#define ALLWINNER_AHCI_BISTCR ((0xa4 - ALLWINNER_AHCI_MMIO_OFF) / 4)
#define ALLWINNER_AHCI_BISTFCTR ((0xa8 - ALLWINNER_AHCI_MMIO_OFF) / 4)
--
2.26.2
[PATCH v2 16/58] throttle-groups: Move ThrottleGroup typedef to header
Move typedef closer to the type check macros, to make it easier
to convert the code to OBJECT_DEFINE_TYPE() in the future.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Alberto Garcia
Cc: Kevin Wolf
Cc: Max Reitz
Cc: qemu-bl...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/block/throttle-groups.h | 1 +
block/throttle-groups.c | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/block/throttle-groups.h b/include/block/throttle-groups.h
index 712a8e64b4..5e77db700f 100644
--- a/include/block/throttle-groups.h
+++ b/include/block/throttle-groups.h
@@ -59,6 +59,7 @@ typedef struct ThrottleGroupMember {
} ThrottleGroupMember;
#define TYPE_THROTTLE_GROUP "throttle-group"
+typedef struct ThrottleGroup ThrottleGroup;
#define THROTTLE_GROUP(obj) OBJECT_CHECK(ThrottleGroup, (obj),
TYPE_THROTTLE_GROUP)
const char *throttle_group_get_name(ThrottleGroupMember *tgm);
diff --git a/block/throttle-groups.c b/block/throttle-groups.c
index 98fea7fd47..4e28365d8d 100644
--- a/block/throttle-groups.c
+++ b/block/throttle-groups.c
@@ -63,7 +63,7 @@ static void timer_cb(ThrottleGroupMember *tgm, bool is_write);
* access some other ThrottleGroupMember's timers only after verifying that
* that ThrottleGroupMember has throttled requests in the queue.
*/
-typedef struct ThrottleGroup {
+struct ThrottleGroup {
Object parent_obj;
/* refuse individual property change if initialization is complete */
@@ -79,7 +79,7 @@ typedef struct ThrottleGroup {
/* This field is protected by the global QEMU mutex */
QTAILQ_ENTRY(ThrottleGroup) list;
-} ThrottleGroup;
+};
/* This is protected by the global QEMU mutex */
static QTAILQ_HEAD(, ThrottleGroup) throttle_groups =
--
2.26.2
[PATCH v2 36/58] piix: Move QOM macros to header
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: "Michael S. Tsirkin"
Cc: Marcel Apfelbaum
Cc: "Hervé Poussineau"
Cc: "Philippe Mathieu-Daudé"
Cc: Aleksandar Markovic
Cc: Aurelien Jarno
Cc: qemu-devel@nongnu.org
---
include/hw/southbridge/piix.h | 4
hw/isa/piix3.c| 4
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 02bd741209..ac1d04ddc2 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -64,6 +64,10 @@ typedef struct PIIXState {
MemoryRegion rcr_mem;
} PIIX3State;
+#define TYPE_PIIX3_PCI_DEVICE "pci-piix3"
+#define PIIX3_PCI_DEVICE(obj) \
+OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE)
+
extern PCIDevice *piix4_dev;
PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus);
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 1a5267e19f..587850b888 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -36,10 +36,6 @@
#define XEN_PIIX_NUM_PIRQS 128ULL
-#define TYPE_PIIX3_PCI_DEVICE "pci-piix3"
-#define PIIX3_PCI_DEVICE(obj) \
-OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE)
-
#define TYPE_PIIX3_DEVICE "PIIX3"
#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen"
--
2.26.2
[PATCH v2 25/58] armsse: Rename QOM macros to avoid conflicts
Rename TYPE_ARMSSE to TYPE_ARM_SSE, and ARMSSE*() type checking
macros to ARM_SSE*().
This will avoid a future conflict between an ARM_SSE() type
checking macro and the ARMSSE typedef name.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: Peter Maydell
Cc: qemu-...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/arm/armsse.h | 12 ++--
hw/arm/armsse.c | 24
2 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index 84080c2299..529816286d 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -106,8 +106,8 @@
#include "hw/core/split-irq.h"
#include "hw/cpu/cluster.h"
-#define TYPE_ARMSSE "arm-sse"
-#define ARMSSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARMSSE)
+#define TYPE_ARM_SSE "arm-sse"
+#define ARM_SSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARM_SSE)
/*
* These type names are for specific IoTKit subsystems; other than
@@ -224,9 +224,9 @@ typedef struct ARMSSEClass {
const ARMSSEInfo *info;
} ARMSSEClass;
-#define ARMSSE_CLASS(klass) \
-OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARMSSE)
-#define ARMSSE_GET_CLASS(obj) \
-OBJECT_GET_CLASS(ARMSSEClass, (obj), TYPE_ARMSSE)
+#define ARM_SSE_CLASS(klass) \
+OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARM_SSE)
+#define ARM_SSE_GET_CLASS(obj) \
+OBJECT_GET_CLASS(ARMSSEClass, (obj), TYPE_ARM_SSE)
#endif
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index dcbff9bd8f..6264eab16b 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -167,7 +167,7 @@ static void irq_status_forwarder(void *opaque, int n, int
level)
static void nsccfg_handler(void *opaque, int n, int level)
{
-ARMSSE *s = ARMSSE(opaque);
+ARMSSE *s = ARM_SSE(opaque);
s->nsccfg = level;
}
@@ -233,8 +233,8 @@ static void armsse_forward_sec_resp_cfg(ARMSSE *s)
static void armsse_init(Object *obj)
{
-ARMSSE *s = ARMSSE(obj);
-ARMSSEClass *asc = ARMSSE_GET_CLASS(obj);
+ARMSSE *s = ARM_SSE(obj);
+ARMSSEClass *asc = ARM_SSE_GET_CLASS(obj);
const ARMSSEInfo *info = asc->info;
int i;
@@ -391,7 +391,7 @@ static void armsse_exp_irq(void *opaque, int n, int level)
static void armsse_mpcexp_status(void *opaque, int n, int level)
{
-ARMSSE *s = ARMSSE(opaque);
+ARMSSE *s = ARM_SSE(opaque);
qemu_set_irq(s->mpcexp_status_in[n], level);
}
@@ -401,7 +401,7 @@ static qemu_irq armsse_get_common_irq_in(ARMSSE *s, int
irqno)
* Return a qemu_irq which can be used to signal IRQ n to
* all CPUs in the SSE.
*/
-ARMSSEClass *asc = ARMSSE_GET_CLASS(s);
+ARMSSEClass *asc = ARM_SSE_GET_CLASS(s);
const ARMSSEInfo *info = asc->info;
assert(irq_is_common[irqno]);
@@ -428,8 +428,8 @@ static void map_ppu(ARMSSE *s, int ppuidx, const char
*name, hwaddr addr)
static void armsse_realize(DeviceState *dev, Error **errp)
{
-ARMSSE *s = ARMSSE(dev);
-ARMSSEClass *asc = ARMSSE_GET_CLASS(dev);
+ARMSSE *s = ARM_SSE(dev);
+ARMSSEClass *asc = ARM_SSE_GET_CLASS(dev);
const ARMSSEInfo *info = asc->info;
int i;
MemoryRegion *mr;
@@ -1114,7 +1114,7 @@ static void armsse_idau_check(IDAUInterface *ii, uint32_t
address,
* of the address bits. The NSC attribute is guest-adjustable via the
* NSCCFG register in the security controller.
*/
-ARMSSE *s = ARMSSE(ii);
+ARMSSE *s = ARM_SSE(ii);
int region = extract32(address, 28, 4);
*ns = !(region & 1);
@@ -1136,7 +1136,7 @@ static const VMStateDescription armsse_vmstate = {
static void armsse_reset(DeviceState *dev)
{
-ARMSSE *s = ARMSSE(dev);
+ARMSSE *s = ARM_SSE(dev);
s->nsccfg = 0;
}
@@ -1145,7 +1145,7 @@ static void armsse_class_init(ObjectClass *klass, void
*data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
IDAUInterfaceClass *iic = IDAU_INTERFACE_CLASS(klass);
-ARMSSEClass *asc = ARMSSE_CLASS(klass);
+ARMSSEClass *asc = ARM_SSE_CLASS(klass);
const ARMSSEInfo *info = data;
dc->realize = armsse_realize;
@@ -1157,7 +1157,7 @@ static void armsse_class_init(ObjectClass *klass, void
*data)
}
static const TypeInfo armsse_info = {
-.name = TYPE_ARMSSE,
+.name = TYPE_ARM_SSE,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(ARMSSE),
.instance_init = armsse_init,
@@ -1177,7 +1177,7 @@ static void armsse_register_types(void)
for (i = 0; i < ARRAY_SIZE(armsse_variants); i++) {
TypeInfo ti = {
.name = armsse_variants[i].name,
-.parent = TYPE_ARMSSE,
+.parent = TYPE_ARM_SSE,
.class_init = armsse_class_init,
.class_data = (void *)_variants[i],
};
--
2.26.2
[PATCH v2 15/58] tulip: Move TulipState typedef to header
Move typedef closer to the type check macros, to make it easier
to convert the code to OBJECT_DEFINE_TYPE() in the future.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Sven Schnelle
Cc: Jason Wang
Cc: qemu-devel@nongnu.org
---
hw/net/tulip.h | 1 +
hw/net/tulip.c | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/net/tulip.h b/hw/net/tulip.h
index 5271aad8d5..c3fcd4d4e1 100644
--- a/hw/net/tulip.h
+++ b/hw/net/tulip.h
@@ -5,6 +5,7 @@
#include "net/net.h"
#define TYPE_TULIP "tulip"
+typedef struct TULIPState TULIPState;
#define TULIP(obj) OBJECT_CHECK(TULIPState, (obj), TYPE_TULIP)
#define CSR(_x) ((_x) << 3)
diff --git a/hw/net/tulip.c b/hw/net/tulip.c
index 4487fd61cf..ca69f7ea5e 100644
--- a/hw/net/tulip.c
+++ b/hw/net/tulip.c
@@ -18,7 +18,7 @@
#include "trace.h"
#include "net/eth.h"
-typedef struct TULIPState {
+struct TULIPState {
PCIDevice dev;
MemoryRegion io;
MemoryRegion memory;
@@ -44,7 +44,7 @@ typedef struct TULIPState {
uint32_t rx_status;
uint8_t filter[16][6];
-} TULIPState;
+};
static const VMStateDescription vmstate_pci_tulip = {
.name = "tulip",
--
2.26.2
[PATCH v2 14/58] hcd-dwc2: Rename USB_*CLASS macros for consistency
Rename the DWC2_CLASS to DWC2_USB_CLASS and DWC2_GET_CLASS to
DWC2_USB_GET_CLASS, for consistency with the DWC2_USB macro.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Gerd Hoffmann
Cc: qemu-devel@nongnu.org
---
hw/usb/hcd-dwc2.h | 4 ++--
hw/usb/hcd-dwc2.c | 8
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/usb/hcd-dwc2.h b/hw/usb/hcd-dwc2.h
index 4ba809a07b..54111d835e 100644
--- a/hw/usb/hcd-dwc2.h
+++ b/hw/usb/hcd-dwc2.h
@@ -182,9 +182,9 @@ struct DWC2Class {
#define TYPE_DWC2_USB "dwc2-usb"
#define DWC2_USB(obj) \
OBJECT_CHECK(DWC2State, (obj), TYPE_DWC2_USB)
-#define DWC2_CLASS(klass) \
+#define DWC2_USB_CLASS(klass) \
OBJECT_CLASS_CHECK(DWC2Class, (klass), TYPE_DWC2_USB)
-#define DWC2_GET_CLASS(obj) \
+#define DWC2_USB_GET_CLASS(obj) \
OBJECT_GET_CLASS(DWC2Class, (obj), TYPE_DWC2_USB)
#endif
diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c
index 56f91f6bee..97688d21bf 100644
--- a/hw/usb/hcd-dwc2.c
+++ b/hw/usb/hcd-dwc2.c
@@ -1155,7 +1155,7 @@ static void dwc2_work_timer(void *opaque)
static void dwc2_reset_enter(Object *obj, ResetType type)
{
-DWC2Class *c = DWC2_GET_CLASS(obj);
+DWC2Class *c = DWC2_USB_GET_CLASS(obj);
DWC2State *s = DWC2_USB(obj);
int i;
@@ -1239,7 +1239,7 @@ static void dwc2_reset_enter(Object *obj, ResetType type)
static void dwc2_reset_hold(Object *obj)
{
-DWC2Class *c = DWC2_GET_CLASS(obj);
+DWC2Class *c = DWC2_USB_GET_CLASS(obj);
DWC2State *s = DWC2_USB(obj);
trace_usb_dwc2_reset_hold();
@@ -1253,7 +1253,7 @@ static void dwc2_reset_hold(Object *obj)
static void dwc2_reset_exit(Object *obj)
{
-DWC2Class *c = DWC2_GET_CLASS(obj);
+DWC2Class *c = DWC2_USB_GET_CLASS(obj);
DWC2State *s = DWC2_USB(obj);
trace_usb_dwc2_reset_exit();
@@ -1382,7 +1382,7 @@ static Property dwc2_usb_properties[] = {
static void dwc2_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
-DWC2Class *c = DWC2_CLASS(klass);
+DWC2Class *c = DWC2_USB_CLASS(klass);
ResettableClass *rc = RESETTABLE_CLASS(klass);
dc->realize = dwc2_realize;
--
2.26.2
[PATCH v2 12/58] virtio-ccw: Fix definition of VIRTIO_CCW_BUS_GET_CLASS
The macro was incorrectly defined using OBJECT_CHECK. Acked-by: Cornelia Huck Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: "Michael S. Tsirkin" Cc: Cornelia Huck Cc: Halil Pasic Cc: Christian Borntraeger Cc: Richard Henderson Cc: David Hildenbrand Cc: Thomas Huth Cc: qemu-s3...@nongnu.org Cc: qemu-devel@nongnu.org --- hw/s390x/virtio-ccw.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/s390x/virtio-ccw.h b/hw/s390x/virtio-ccw.h index c0e3355248..b281896f7d 100644 --- a/hw/s390x/virtio-ccw.h +++ b/hw/s390x/virtio-ccw.h @@ -65,9 +65,9 @@ typedef struct VirtioBusClass VirtioCcwBusClass; #define TYPE_VIRTIO_CCW_BUS "virtio-ccw-bus" #define VIRTIO_CCW_BUS(obj) \ - OBJECT_CHECK(VirtioCcwBus, (obj), TYPE_VIRTIO_CCW_BUS) + OBJECT_CHECK(VirtioCcwBusState, (obj), TYPE_VIRTIO_CCW_BUS) #define VIRTIO_CCW_BUS_GET_CLASS(obj) \ -OBJECT_CHECK(VirtioCcwBusState, (obj), TYPE_VIRTIO_CCW_BUS) +OBJECT_GET_CLASS(VirtioCcwBusClass, (obj), TYPE_VIRTIO_CCW_BUS) #define VIRTIO_CCW_BUS_CLASS(klass) \ OBJECT_CLASS_CHECK(VirtioCcwBusClass, klass, TYPE_VIRTIO_CCW_BUS) -- 2.26.2
[PATCH v2 23/58] nubus: Delete unused NUBUS_BRIDGE macro
The macro never worked because the NubusBridge typedef doesn't
exist. Delete it.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Laurent Vivier
Cc: qemu-devel@nongnu.org
---
include/hw/nubus/nubus.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/nubus/nubus.h b/include/hw/nubus/nubus.h
index a8634e54c5..c350948262 100644
--- a/include/hw/nubus/nubus.h
+++ b/include/hw/nubus/nubus.h
@@ -29,7 +29,6 @@
#define NUBUS_BUS(obj) OBJECT_CHECK(NubusBus, (obj), TYPE_NUBUS_BUS)
#define TYPE_NUBUS_BRIDGE "nubus-bridge"
-#define NUBUS_BRIDGE(obj) OBJECT_CHECK(NubusBridge, (obj), TYPE_NUBUS_BRIDGE)
typedef struct NubusBus {
BusState qbus;
--
2.26.2
[PATCH v2 11/58] versatile: Fix typo in PCI_VPB_HOST definition
Fixes: cd93dbf375bd ("versatile_pci: Update to realize and instance init
functions")
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Peter Maydell
Cc: qemu-...@nongnu.org
Cc: qemu-devel@nongnu.org
---
hw/pci-host/versatile.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 616882a80d..7e4aa467a2 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -161,7 +161,7 @@ static const VMStateDescription pci_vpb_vmstate = {
#define TYPE_VERSATILE_PCI_HOST "versatile_pci_host"
#define PCI_VPB_HOST(obj) \
-OBJECT_CHECK(PCIDevice, (obj), TYPE_VERSATILE_PCIHOST)
+OBJECT_CHECK(PCIDevice, (obj), TYPE_VERSATILE_PCI_HOST)
typedef enum {
PCI_IMAP0 = 0x0,
--
2.26.2
[PATCH v2 27/58] spapr: Move typedef SpaprMachineState to spapr.h
Move the typedef from spapr_irq.h to spapr.h, and use "struct
SpaprMachineState" in the spapr_*.h headers (to avoid circular
header dependencies).
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost
---
Changes series v1 -> v2: new patch in series v2
Cc: David Gibson
Cc: "Cédric Le Goater"
Cc: qemu-...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/ppc/spapr.h | 1 +
include/hw/ppc/spapr_irq.h | 36 ++--
include/hw/ppc/spapr_xive.h | 3 ++-
3 files changed, 21 insertions(+), 19 deletions(-)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 3134d339e8..a1e230ad39 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -41,6 +41,7 @@ typedef struct SpaprDimmState SpaprDimmState;
typedef struct SpaprMachineClass SpaprMachineClass;
#define TYPE_SPAPR_MACHINE "spapr-machine"
+typedef struct SpaprMachineState SpaprMachineState;
#define SPAPR_MACHINE(obj) \
OBJECT_CHECK(SpaprMachineState, (obj), TYPE_SPAPR_MACHINE)
#define SPAPR_MACHINE_GET_CLASS(obj) \
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index ca8cb44213..b161ccebc2 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -28,7 +28,7 @@
#define SPAPR_NR_XIRQS 0x1000
-typedef struct SpaprMachineState SpaprMachineState;
+struct SpaprMachineState;
typedef struct SpaprInterruptController SpaprInterruptController;
@@ -67,20 +67,20 @@ typedef struct SpaprInterruptControllerClass {
int (*post_load)(SpaprInterruptController *intc, int version_id);
} SpaprInterruptControllerClass;
-void spapr_irq_update_active_intc(SpaprMachineState *spapr);
+void spapr_irq_update_active_intc(struct SpaprMachineState *spapr);
-int spapr_irq_cpu_intc_create(SpaprMachineState *spapr,
+int spapr_irq_cpu_intc_create(struct SpaprMachineState *spapr,
PowerPCCPU *cpu, Error **errp);
-void spapr_irq_cpu_intc_reset(SpaprMachineState *spapr, PowerPCCPU *cpu);
-void spapr_irq_cpu_intc_destroy(SpaprMachineState *spapr, PowerPCCPU *cpu);
-void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon);
-void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers,
+void spapr_irq_cpu_intc_reset(struct SpaprMachineState *spapr, PowerPCCPU
*cpu);
+void spapr_irq_cpu_intc_destroy(struct SpaprMachineState *spapr, PowerPCCPU
*cpu);
+void spapr_irq_print_info(struct SpaprMachineState *spapr, Monitor *mon);
+void spapr_irq_dt(struct SpaprMachineState *spapr, uint32_t nr_servers,
void *fdt, uint32_t phandle);
-uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr);
-int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t num, bool align,
+uint32_t spapr_irq_nr_msis(struct SpaprMachineState *spapr);
+int spapr_irq_msi_alloc(struct SpaprMachineState *spapr, uint32_t num, bool
align,
Error **errp);
-void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num);
+void spapr_irq_msi_free(struct SpaprMachineState *spapr, int irq, uint32_t
num);
typedef struct SpaprIrq {
boolxics;
@@ -92,13 +92,13 @@ extern SpaprIrq spapr_irq_xics_legacy;
extern SpaprIrq spapr_irq_xive;
extern SpaprIrq spapr_irq_dual;
-void spapr_irq_init(SpaprMachineState *spapr, Error **errp);
-int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp);
-void spapr_irq_free(SpaprMachineState *spapr, int irq, int num);
-qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq);
-int spapr_irq_post_load(SpaprMachineState *spapr, int version_id);
-void spapr_irq_reset(SpaprMachineState *spapr, Error **errp);
-int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp);
+void spapr_irq_init(struct SpaprMachineState *spapr, Error **errp);
+int spapr_irq_claim(struct SpaprMachineState *spapr, int irq, bool lsi, Error
**errp);
+void spapr_irq_free(struct SpaprMachineState *spapr, int irq, int num);
+qemu_irq spapr_qirq(struct SpaprMachineState *spapr, int irq);
+int spapr_irq_post_load(struct SpaprMachineState *spapr, int version_id);
+void spapr_irq_reset(struct SpaprMachineState *spapr, Error **errp);
+int spapr_irq_get_phandle(struct SpaprMachineState *spapr, void *fdt, Error
**errp);
typedef int (*SpaprInterruptControllerInitKvm)(SpaprInterruptController *,
uint32_t, Error **);
@@ -111,7 +111,7 @@ int spapr_irq_init_kvm(SpaprInterruptControllerInitKvm fn,
/*
* XICS legacy routines
*/
-int spapr_irq_find(SpaprMachineState *spapr, int num, bool align, Error
**errp);
+int spapr_irq_find(struct SpaprMachineState *spapr, int num, bool align, Error
**errp);
#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
#endif
diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
index 93d09d68de..85f124506d 100644
--- a/include/hw/ppc/spapr_xive.h
+++ b/include/hw/ppc/spapr_xive.h
@@ -66,7 +66,8 @@
[PATCH v2 17/58] pci: Move PCIBusClass typedef to pci.h
Move typedef closer to the type check macros, to make it easier
to convert the code to OBJECT_DEFINE_TYPE() in the future.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: "Michael S. Tsirkin"
Cc: Marcel Apfelbaum
Cc: qemu-devel@nongnu.org
---
include/hw/pci/pci.h | 1 +
include/hw/pci/pci_bus.h | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index c1bf7d5356..4ca7258b5b 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -396,6 +396,7 @@ typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int
irq_num);
typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin);
#define TYPE_PCI_BUS "PCI"
+typedef struct PCIBusClass PCIBusClass;
#define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS)
#define PCI_BUS_CLASS(klass) OBJECT_CLASS_CHECK(PCIBusClass, (klass),
TYPE_PCI_BUS)
#define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj),
TYPE_PCI_BUS)
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 0714f578af..347440d42c 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -10,14 +10,14 @@
* use accessor functions in pci.h
*/
-typedef struct PCIBusClass {
+struct PCIBusClass {
/*< private >*/
BusClass parent_class;
/*< public >*/
int (*bus_num)(PCIBus *bus);
uint16_t (*numa_node)(PCIBus *bus);
-} PCIBusClass;
+};
enum PCIBusFlags {
/* This bus is the root of a PCI domain */
--
2.26.2
[PATCH v2 00/58] qom: Automated conversion of type checking boilerplate
This is an extension of the series previously submitted by Daniel[1], including a script that will convert existing type checker macros automatically. Changes from series v1 to v2: * Don't skip TypeCheckMacro conversion if typedefs are found in typedefs.h * Don't look for typedefs if type check macro uses "struct [...]" * "qom: Fix G_DEFINE_AUTOPTR_CLEANUP_FUNC" was squashed in the original buggy patch * 18 new patches that fix inconsistencies in the code, and make automated changes without --force possible * pl110: * Fix typo on commit message * Rename enum values to VERSION_* * "[automated]" patches (without --force): * Re-ran script after after the changes mentioned above. Now the patches change many more QOM type checker macros * "[semi-automated] Use DECLARE_*CHECKER* when possible (--force mode)": * Now the patch touches very few macros, and all of them have comments explaining why they are unusual * Maintainers are now CCed in the cleanup patches (except for the automated ones, because they are too large) * TYPE_INFO macro: added commit message note suggested by Daniel * Added more details to commit message of "Rename enum constants" patches * Removed confusing paragraph mentioning _Generic from "Make type checker functions accept const pointers" commit message Link to series v1: https://lore.kernel.org/qemu-devel/20200813222625.243136-1-ehabk...@redhat.co= m/ The series is divided in the sections below: Constant renaming - Patches 1-10 will just rename existing constants that will conflict with the type checker function names. Fix and cleanups of existing code - Patches 11-41 are changes to existing code that will either fix existing issues, delete unused and broken macros, or move typedefs around to make code conversion easier. Original patches from Daniel Patches 42-43 are the ones originally submitted by Daniel. They introduce the macros: * OBJECT_DECLARE_TYPE * OBJECT_DECLARE_SIMPLE_TYPE * OBJECT_DEFINE_TYPE * OBJECT_DEFINE_TYPE_WITH_INTERFACES * OBJECT_DEFINE_ABSTRACT_TYPE Changes to new macros - Patches 44-48 extend the macros introduced by Daniel. It includes small bug fixes, change the arguments to a few macros, and introduce a few new macros: * DECLARE_INSTANCE_CHECKER * DECLARE_CLASS_CHECKERS * DECLARE_OBJ_CHECKERS * TYPE_INFO Automated code conversion - Patch 49 is the code conversion script that will look for common patterns and change them to use the new macros. Patches 50-56 are all automatically generated by that script, to gradually transform existing code into DECLARE_*CHECKER or OBJECT_DECLARE*_TYPE macros. Original crypto QOM patches from Daniel --- Patches 57-58 are the patches originally sent by Daniel to convert the crypto QOM code to use the new macros, rebased and updated to pass additional arguments to OBJECT_DECLARE_*. [1] https://lore.kernel.org/qemu-devel/20200723181410.3145233-1-berrange@redh= at.com/ Daniel P. Berrang=C3=A9 (4): qom: make object_ref/unref use a void * instead of Object *. qom: provide convenient macros for declaring and defining types crypto: use QOM macros for declaration/definition of secret types crypto: use QOM macros for declaration/definition of TLS creds types Eduardo Habkost (54): e1000: Rename QOM class cast macros megasas: Rename QOM class cast macros vmw_pvscsi: Rename QOM class cast macros pl110: Rename pl110_version enum values allwinner-h3: Rename memmap enum constants aspeed_soc: Rename memmap/irqmap enum constants opentitan: Rename memmap enum constants sifive_e: Rename memmap enum constants sifive_u: Rename memmap enum constants aspeed_timer: Fix ASPEED_TIMER macro definition versatile: Fix typo in PCI_VPB_HOST definition virtio-ccw: Fix definition of VIRTIO_CCW_BUS_GET_CLASS hvf: Add missing include hcd-dwc2: Rename USB_*CLASS macros for consistency tulip: Move TulipState typedef to header throttle-groups: Move ThrottleGroup typedef to header pci: Move PCIBusClass typedef to pci.h i8254: Move PITCommonState/PITCommonClass typedefs to i8254.h hvf: Move HVFState typedef to hvf.h mcf_fec: Move mcf_fec_state typedef to header s390_flic: Move KVMS390FLICState typedef to header can_emu: Delete macros for non-existing typedef nubus: Delete unused NUBUS_BRIDGE macro platform-bus: Delete macros for non-existing typedef armsse: Rename QOM macros to avoid conflicts xen-legacy-backend: Add missing typedef XenLegacyDevice spapr: Move typedef SpaprMachineState to spapr.h s390x: Move typedef SCLPEventFacility to event-facility.h vhost-user-gpu: Move QOM macro to header ahci: Move QOM macros to header i8257: Move QOM macro to header ahci: Move QOM macro to header pckbd: Move QOM macro to header vmbus: Move QOM macros to vmbus.h virtio-serial-bus: Move QOM macros to header
[PATCH v2 24/58] platform-bus: Delete macros for non-existing typedef
PlatformBusDeviceClass doesn't exist. This will break when we
automatically convert the code to use OBJECT_DEFINE_TYPE().
Delete the macros that reference the non-existing typedef.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: qemu-devel@nongnu.org
---
include/hw/platform-bus.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/hw/platform-bus.h b/include/hw/platform-bus.h
index 19e20c57ce..33745a418e 100644
--- a/include/hw/platform-bus.h
+++ b/include/hw/platform-bus.h
@@ -29,10 +29,6 @@ typedef struct PlatformBusDevice PlatformBusDevice;
#define TYPE_PLATFORM_BUS_DEVICE "platform-bus-device"
#define PLATFORM_BUS_DEVICE(obj) \
OBJECT_CHECK(PlatformBusDevice, (obj), TYPE_PLATFORM_BUS_DEVICE)
-#define PLATFORM_BUS_DEVICE_CLASS(klass) \
- OBJECT_CLASS_CHECK(PlatformBusDeviceClass, (klass),
TYPE_PLATFORM_BUS_DEVICE)
-#define PLATFORM_BUS_DEVICE_GET_CLASS(obj) \
- OBJECT_GET_CLASS(PlatformBusDeviceClass, (obj), TYPE_PLATFORM_BUS_DEVICE)
struct PlatformBusDevice {
/*< private >*/
--
2.26.2
[PATCH v2 13/58] hvf: Add missing include
The sysemu/accel.h header is needed for the ACCEL_CLASS_NAME macro. This will be necessary to allow us to use OBJECT_DEFINE*() for TYPE_HVF_ACCEL. Reviewed-by: Daniel P. Berrangé Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Roman Bolshakov Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: Cameron Esfahani Cc: Roman Bolshakov Cc: qemu-devel@nongnu.org --- include/sysemu/hvf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/sysemu/hvf.h b/include/sysemu/hvf.h index 6d3ee4fdb7..d3bed80ea8 100644 --- a/include/sysemu/hvf.h +++ b/include/sysemu/hvf.h @@ -13,6 +13,8 @@ #ifndef HVF_H #define HVF_H +#include "sysemu/accel.h" + #ifdef CONFIG_HVF uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg); -- 2.26.2
[PATCH v2 07/58] opentitan: Rename memmap enum constants
Some of the enum constant names conflict with the QOM type check
macros (IBEX_PLIC, IBEX_UART). This needs to be addressed to
allow us to transform the QOM type check macros into functions
generated by OBJECT_DECLARE_TYPE().
Rename all the constants to IBEX_DEV_*, to avoid conflicts.
Reviewed-by: Alistair Francis
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Added more details to commit message
---
Cc: Alistair Francis
Cc: Palmer Dabbelt
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: qemu-ri...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/riscv/opentitan.h | 38
hw/riscv/opentitan.c | 84 ++--
2 files changed, 61 insertions(+), 61 deletions(-)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index 8f29b9cbbf..835a80f896 100644
--- a/include/hw/riscv/opentitan.h
+++ b/include/hw/riscv/opentitan.h
@@ -49,25 +49,25 @@ typedef struct OpenTitanState {
} OpenTitanState;
enum {
-IBEX_ROM,
-IBEX_RAM,
-IBEX_FLASH,
-IBEX_UART,
-IBEX_GPIO,
-IBEX_SPI,
-IBEX_FLASH_CTRL,
-IBEX_RV_TIMER,
-IBEX_AES,
-IBEX_HMAC,
-IBEX_PLIC,
-IBEX_PWRMGR,
-IBEX_RSTMGR,
-IBEX_CLKMGR,
-IBEX_PINMUX,
-IBEX_ALERT_HANDLER,
-IBEX_NMI_GEN,
-IBEX_USBDEV,
-IBEX_PADCTRL,
+IBEX_DEV_ROM,
+IBEX_DEV_RAM,
+IBEX_DEV_FLASH,
+IBEX_DEV_UART,
+IBEX_DEV_GPIO,
+IBEX_DEV_SPI,
+IBEX_DEV_FLASH_CTRL,
+IBEX_DEV_RV_TIMER,
+IBEX_DEV_AES,
+IBEX_DEV_HMAC,
+IBEX_DEV_PLIC,
+IBEX_DEV_PWRMGR,
+IBEX_DEV_RSTMGR,
+IBEX_DEV_CLKMGR,
+IBEX_DEV_PINMUX,
+IBEX_DEV_ALERT_HANDLER,
+IBEX_DEV_NMI_GEN,
+IBEX_DEV_USBDEV,
+IBEX_DEV_PADCTRL,
};
enum {
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index a8f0039e51..23ba3b4bfc 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -32,25 +32,25 @@ static const struct MemmapEntry {
hwaddr base;
hwaddr size;
} ibex_memmap[] = {
-[IBEX_ROM] ={ 0x8000, 16 * KiB },
-[IBEX_RAM] ={ 0x1000, 0x1 },
-[IBEX_FLASH] = { 0x2000, 0x8 },
-[IBEX_UART] = { 0x4000, 0x1 },
-[IBEX_GPIO] = { 0x4001, 0x1 },
-[IBEX_SPI] ={ 0x4002, 0x1 },
-[IBEX_FLASH_CTRL] = { 0x4003, 0x1 },
-[IBEX_PINMUX] = { 0x4007, 0x1 },
-[IBEX_RV_TIMER] = { 0x4008, 0x1 },
-[IBEX_PLIC] = { 0x4009, 0x1 },
-[IBEX_PWRMGR] = { 0x400A, 0x1 },
-[IBEX_RSTMGR] = { 0x400B, 0x1 },
-[IBEX_CLKMGR] = { 0x400C, 0x1 },
-[IBEX_AES] ={ 0x4011, 0x1 },
-[IBEX_HMAC] = { 0x4012, 0x1 },
-[IBEX_ALERT_HANDLER] = { 0x4013, 0x1 },
-[IBEX_NMI_GEN] ={ 0x4014, 0x1 },
-[IBEX_USBDEV] = { 0x4015, 0x1 },
-[IBEX_PADCTRL] ={ 0x4016, 0x1 }
+[IBEX_DEV_ROM] ={ 0x8000, 16 * KiB },
+[IBEX_DEV_RAM] ={ 0x1000, 0x1 },
+[IBEX_DEV_FLASH] = { 0x2000, 0x8 },
+[IBEX_DEV_UART] = { 0x4000, 0x1 },
+[IBEX_DEV_GPIO] = { 0x4001, 0x1 },
+[IBEX_DEV_SPI] ={ 0x4002, 0x1 },
+[IBEX_DEV_FLASH_CTRL] = { 0x4003, 0x1 },
+[IBEX_DEV_PINMUX] = { 0x4007, 0x1 },
+[IBEX_DEV_RV_TIMER] = { 0x4008, 0x1 },
+[IBEX_DEV_PLIC] = { 0x4009, 0x1 },
+[IBEX_DEV_PWRMGR] = { 0x400A, 0x1 },
+[IBEX_DEV_RSTMGR] = { 0x400B, 0x1 },
+[IBEX_DEV_CLKMGR] = { 0x400C, 0x1 },
+[IBEX_DEV_AES] ={ 0x4011, 0x1 },
+[IBEX_DEV_HMAC] = { 0x4012, 0x1 },
+[IBEX_DEV_ALERT_HANDLER] = { 0x4013, 0x1 },
+[IBEX_DEV_NMI_GEN] ={ 0x4014, 0x1 },
+[IBEX_DEV_USBDEV] = { 0x4015, 0x1 },
+[IBEX_DEV_PADCTRL] ={ 0x4016, 0x1 }
};
static void opentitan_board_init(MachineState *machine)
@@ -66,12 +66,12 @@ static void opentitan_board_init(MachineState *machine)
qdev_realize(DEVICE(>soc), NULL, _abort);
memory_region_init_ram(main_mem, NULL, "riscv.lowrisc.ibex.ram",
-memmap[IBEX_RAM].size, _fatal);
+memmap[IBEX_DEV_RAM].size, _fatal);
memory_region_add_subregion(sys_mem,
-memmap[IBEX_RAM].base, main_mem);
+memmap[IBEX_DEV_RAM].base, main_mem);
if (machine->firmware) {
-riscv_load_firmware(machine->firmware, memmap[IBEX_RAM].base, NULL);
+riscv_load_firmware(machine->firmware, memmap[IBEX_DEV_RAM].base,
NULL);
}
if (machine->kernel_filename) {
@@ -115,28 +115,28 @@ static void
[PATCH v2 10/58] aspeed_timer: Fix ASPEED_TIMER macro definition
The macro definition had an extra semicolon. This was never noticed because the macro was only being used where it didn't make a difference. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: none --- Cc: "Cédric Le Goater" Cc: Peter Maydell Cc: Andrew Jeffery Cc: Joel Stanley Cc: qemu-...@nongnu.org Cc: qemu-devel@nongnu.org --- include/hw/timer/aspeed_timer.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h index 948329893c..d7c7d8ad28 100644 --- a/include/hw/timer/aspeed_timer.h +++ b/include/hw/timer/aspeed_timer.h @@ -26,7 +26,7 @@ #include "hw/misc/aspeed_scu.h" #define ASPEED_TIMER(obj) \ -OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER); +OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER) #define TYPE_ASPEED_TIMER "aspeed.timer" #define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400" #define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500" -- 2.26.2
[PATCH v2 20/58] mcf_fec: Move mcf_fec_state typedef to header
Move typedef closer to the type check macros, to make it easier
to convert the code to OBJECT_DEFINE_TYPE() in the future.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Thomas Huth
Cc: Jason Wang
Cc: qemu-devel@nongnu.org
---
include/hw/m68k/mcf_fec.h | 1 +
hw/net/mcf_fec.c | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/hw/m68k/mcf_fec.h b/include/hw/m68k/mcf_fec.h
index eeb471f9c9..c09e33a57c 100644
--- a/include/hw/m68k/mcf_fec.h
+++ b/include/hw/m68k/mcf_fec.h
@@ -11,6 +11,7 @@
#define HW_M68K_MCF_FEC_H
#define TYPE_MCF_FEC_NET "mcf-fec"
+typedef struct mcf_fec_state mcf_fec_state;
#define MCF_FEC_NET(obj) OBJECT_CHECK(mcf_fec_state, (obj), TYPE_MCF_FEC_NET)
#define FEC_NUM_IRQ 13
diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c
index 281345862c..25e3e453ab 100644
--- a/hw/net/mcf_fec.c
+++ b/hw/net/mcf_fec.c
@@ -32,7 +32,7 @@ do { printf("mcf_fec: " fmt , ## __VA_ARGS__); } while (0)
#define FEC_MAX_FRAME_SIZE 2032
#define FEC_MIB_SIZE 64
-typedef struct {
+struct mcf_fec_state {
SysBusDevice parent_obj;
MemoryRegion iomem;
@@ -56,7 +56,7 @@ typedef struct {
uint32_t etdsr;
uint32_t emrbr;
uint32_t mib[FEC_MIB_SIZE];
-} mcf_fec_state;
+};
#define FEC_INT_HB 0x8000
#define FEC_INT_BABR 0x4000
--
2.26.2
[PATCH v2 03/58] vmw_pvscsi: Rename QOM class cast macros
Rename the PVSCSI_DEVICE_CLASS() and PVSCSI_DEVICE_GET_CLASS()
macros to be consistent with the PVSCSI() instance cast macro.
This will allow us to register the type cast macros using
OBJECT_DECLARE_TYPE later.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: Dmitry Fleytman
Cc: Paolo Bonzini
Cc: Fam Zheng
Cc: qemu-devel@nongnu.org
---
hw/scsi/vmw_pvscsi.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index df07ab6bfb..c071e0c7aa 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -64,9 +64,9 @@ typedef struct PVSCSIClass {
#define TYPE_PVSCSI "pvscsi"
#define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI)
-#define PVSCSI_DEVICE_CLASS(klass) \
+#define PVSCSI_CLASS(klass) \
OBJECT_CLASS_CHECK(PVSCSIClass, (klass), TYPE_PVSCSI)
-#define PVSCSI_DEVICE_GET_CLASS(obj) \
+#define PVSCSI_GET_CLASS(obj) \
OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI)
/* Compatibility flags for migration */
@@ -1265,7 +1265,7 @@ static Property pvscsi_properties[] = {
static void pvscsi_realize(DeviceState *qdev, Error **errp)
{
-PVSCSIClass *pvs_c = PVSCSI_DEVICE_GET_CLASS(qdev);
+PVSCSIClass *pvs_c = PVSCSI_GET_CLASS(qdev);
PCIDevice *pci_dev = PCI_DEVICE(qdev);
PVSCSIState *s = PVSCSI(qdev);
@@ -1280,7 +1280,7 @@ static void pvscsi_class_init(ObjectClass *klass, void
*data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
-PVSCSIClass *pvs_k = PVSCSI_DEVICE_CLASS(klass);
+PVSCSIClass *pvs_k = PVSCSI_CLASS(klass);
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
k->realize = pvscsi_realizefn;
--
2.26.2
[PATCH v2 08/58] sifive_e: Rename memmap enum constants
Some of the enum constant names conflict with a QOM type check
macro (SIFIVE_E_PRCI). This needs to be addressed to allow us to
transform the QOM type check macros into functions generated by
OBJECT_DECLARE_TYPE().
Rename all the constants to SIFIVE_E_DEV_*, to avoid conflicts.
Reviewed-by: Alistair Francis
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Added more details to commit message
---
Cc: Palmer Dabbelt
Cc: Alistair Francis
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: qemu-ri...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/riscv/sifive_e.h | 38 -
hw/riscv/sifive_e.c | 82 ++---
2 files changed, 60 insertions(+), 60 deletions(-)
diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 637414130b..7c2eb70189 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -53,25 +53,25 @@ typedef struct SiFiveEState {
OBJECT_CHECK(SiFiveEState, (obj), TYPE_RISCV_E_MACHINE)
enum {
-SIFIVE_E_DEBUG,
-SIFIVE_E_MROM,
-SIFIVE_E_OTP,
-SIFIVE_E_CLINT,
-SIFIVE_E_PLIC,
-SIFIVE_E_AON,
-SIFIVE_E_PRCI,
-SIFIVE_E_OTP_CTRL,
-SIFIVE_E_GPIO0,
-SIFIVE_E_UART0,
-SIFIVE_E_QSPI0,
-SIFIVE_E_PWM0,
-SIFIVE_E_UART1,
-SIFIVE_E_QSPI1,
-SIFIVE_E_PWM1,
-SIFIVE_E_QSPI2,
-SIFIVE_E_PWM2,
-SIFIVE_E_XIP,
-SIFIVE_E_DTIM
+SIFIVE_E_DEV_DEBUG,
+SIFIVE_E_DEV_MROM,
+SIFIVE_E_DEV_OTP,
+SIFIVE_E_DEV_CLINT,
+SIFIVE_E_DEV_PLIC,
+SIFIVE_E_DEV_AON,
+SIFIVE_E_DEV_PRCI,
+SIFIVE_E_DEV_OTP_CTRL,
+SIFIVE_E_DEV_GPIO0,
+SIFIVE_E_DEV_UART0,
+SIFIVE_E_DEV_QSPI0,
+SIFIVE_E_DEV_PWM0,
+SIFIVE_E_DEV_UART1,
+SIFIVE_E_DEV_QSPI1,
+SIFIVE_E_DEV_PWM1,
+SIFIVE_E_DEV_QSPI2,
+SIFIVE_E_DEV_PWM2,
+SIFIVE_E_DEV_XIP,
+SIFIVE_E_DEV_DTIM
};
enum {
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index c8b060486a..88b4524117 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -54,25 +54,25 @@ static const struct MemmapEntry {
hwaddr base;
hwaddr size;
} sifive_e_memmap[] = {
-[SIFIVE_E_DEBUG] ={0x0, 0x1000 },
-[SIFIVE_E_MROM] = { 0x1000, 0x2000 },
-[SIFIVE_E_OTP] = {0x2, 0x2000 },
-[SIFIVE_E_CLINT] ={ 0x200,0x1 },
-[SIFIVE_E_PLIC] = { 0xc00, 0x400 },
-[SIFIVE_E_AON] = { 0x1000, 0x8000 },
-[SIFIVE_E_PRCI] = { 0x10008000, 0x8000 },
-[SIFIVE_E_OTP_CTRL] = { 0x1001, 0x1000 },
-[SIFIVE_E_GPIO0] ={ 0x10012000, 0x1000 },
-[SIFIVE_E_UART0] ={ 0x10013000, 0x1000 },
-[SIFIVE_E_QSPI0] ={ 0x10014000, 0x1000 },
-[SIFIVE_E_PWM0] = { 0x10015000, 0x1000 },
-[SIFIVE_E_UART1] ={ 0x10023000, 0x1000 },
-[SIFIVE_E_QSPI1] ={ 0x10024000, 0x1000 },
-[SIFIVE_E_PWM1] = { 0x10025000, 0x1000 },
-[SIFIVE_E_QSPI2] ={ 0x10034000, 0x1000 },
-[SIFIVE_E_PWM2] = { 0x10035000, 0x1000 },
-[SIFIVE_E_XIP] = { 0x2000, 0x2000 },
-[SIFIVE_E_DTIM] = { 0x8000, 0x4000 }
+[SIFIVE_E_DEV_DEBUG] ={0x0, 0x1000 },
+[SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
+[SIFIVE_E_DEV_OTP] = {0x2, 0x2000 },
+[SIFIVE_E_DEV_CLINT] ={ 0x200,0x1 },
+[SIFIVE_E_DEV_PLIC] = { 0xc00, 0x400 },
+[SIFIVE_E_DEV_AON] = { 0x1000, 0x8000 },
+[SIFIVE_E_DEV_PRCI] = { 0x10008000, 0x8000 },
+[SIFIVE_E_DEV_OTP_CTRL] = { 0x1001, 0x1000 },
+[SIFIVE_E_DEV_GPIO0] ={ 0x10012000, 0x1000 },
+[SIFIVE_E_DEV_UART0] ={ 0x10013000, 0x1000 },
+[SIFIVE_E_DEV_QSPI0] ={ 0x10014000, 0x1000 },
+[SIFIVE_E_DEV_PWM0] = { 0x10015000, 0x1000 },
+[SIFIVE_E_DEV_UART1] ={ 0x10023000, 0x1000 },
+[SIFIVE_E_DEV_QSPI1] ={ 0x10024000, 0x1000 },
+[SIFIVE_E_DEV_PWM1] = { 0x10025000, 0x1000 },
+[SIFIVE_E_DEV_QSPI2] ={ 0x10034000, 0x1000 },
+[SIFIVE_E_DEV_PWM2] = { 0x10035000, 0x1000 },
+[SIFIVE_E_DEV_XIP] = { 0x2000, 0x2000 },
+[SIFIVE_E_DEV_DTIM] = { 0x8000, 0x4000 }
};
static void sifive_e_machine_init(MachineState *machine)
@@ -90,9 +90,9 @@ static void sifive_e_machine_init(MachineState *machine)
/* Data Tightly Integrated Memory */
memory_region_init_ram(main_mem, NULL, "riscv.sifive.e.ram",
-memmap[SIFIVE_E_DTIM].size, _fatal);
+memmap[SIFIVE_E_DEV_DTIM].size, _fatal);
memory_region_add_subregion(sys_mem,
-memmap[SIFIVE_E_DTIM].base, main_mem);
+memmap[SIFIVE_E_DEV_DTIM].base, main_mem);
/* Mask ROM reset vector */
uint32_t reset_vec[4];
@@ -111,7 +111,7 @@ static void sifive_e_machine_init(MachineState *machine)
reset_vec[i] = cpu_to_le32(reset_vec[i]);
[PATCH v2 06/58] aspeed_soc: Rename memmap/irqmap enum constants
Some of the enum constant names conflict with the QOM type check
macros:
ASPEED_GPIO
ASPEED_I2C
ASPEED_RTC
ASPEED_SCU
ASPEED_SDHCI
ASPEED_SDMC
ASPEED_VIC
ASPEED_WDT
ASPEED_XDMA
This needs to be addressed to allow us to transform the QOM type
check macros into functions generated by OBJECT_DECLARE_TYPE().
Rename all the constants to ASPEED_DEV_*, to avoid conflicts.
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Added more details to commit message
---
Cc: "Cédric Le Goater"
Cc: Peter Maydell
Cc: Andrew Jeffery
Cc: Joel Stanley
Cc: qemu-...@nongnu.org
Cc: qemu-devel@nongnu.org
---
include/hw/arm/aspeed_soc.h | 92 +++
hw/arm/aspeed.c | 4 +-
hw/arm/aspeed_ast2600.c | 208
hw/arm/aspeed_soc.c | 228 ++--
4 files changed, 266 insertions(+), 266 deletions(-)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 914115f3ef..d46f197cbe 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -87,52 +87,52 @@ typedef struct AspeedSoCClass {
OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC)
enum {
-ASPEED_IOMEM,
-ASPEED_UART1,
-ASPEED_UART2,
-ASPEED_UART3,
-ASPEED_UART4,
-ASPEED_UART5,
-ASPEED_VUART,
-ASPEED_FMC,
-ASPEED_SPI1,
-ASPEED_SPI2,
-ASPEED_EHCI1,
-ASPEED_EHCI2,
-ASPEED_VIC,
-ASPEED_SDMC,
-ASPEED_SCU,
-ASPEED_ADC,
-ASPEED_VIDEO,
-ASPEED_SRAM,
-ASPEED_SDHCI,
-ASPEED_GPIO,
-ASPEED_GPIO_1_8V,
-ASPEED_RTC,
-ASPEED_TIMER1,
-ASPEED_TIMER2,
-ASPEED_TIMER3,
-ASPEED_TIMER4,
-ASPEED_TIMER5,
-ASPEED_TIMER6,
-ASPEED_TIMER7,
-ASPEED_TIMER8,
-ASPEED_WDT,
-ASPEED_PWM,
-ASPEED_LPC,
-ASPEED_IBT,
-ASPEED_I2C,
-ASPEED_ETH1,
-ASPEED_ETH2,
-ASPEED_ETH3,
-ASPEED_ETH4,
-ASPEED_MII1,
-ASPEED_MII2,
-ASPEED_MII3,
-ASPEED_MII4,
-ASPEED_SDRAM,
-ASPEED_XDMA,
-ASPEED_EMMC,
+ASPEED_DEV_IOMEM,
+ASPEED_DEV_UART1,
+ASPEED_DEV_UART2,
+ASPEED_DEV_UART3,
+ASPEED_DEV_UART4,
+ASPEED_DEV_UART5,
+ASPEED_DEV_VUART,
+ASPEED_DEV_FMC,
+ASPEED_DEV_SPI1,
+ASPEED_DEV_SPI2,
+ASPEED_DEV_EHCI1,
+ASPEED_DEV_EHCI2,
+ASPEED_DEV_VIC,
+ASPEED_DEV_SDMC,
+ASPEED_DEV_SCU,
+ASPEED_DEV_ADC,
+ASPEED_DEV_VIDEO,
+ASPEED_DEV_SRAM,
+ASPEED_DEV_SDHCI,
+ASPEED_DEV_GPIO,
+ASPEED_DEV_GPIO_1_8V,
+ASPEED_DEV_RTC,
+ASPEED_DEV_TIMER1,
+ASPEED_DEV_TIMER2,
+ASPEED_DEV_TIMER3,
+ASPEED_DEV_TIMER4,
+ASPEED_DEV_TIMER5,
+ASPEED_DEV_TIMER6,
+ASPEED_DEV_TIMER7,
+ASPEED_DEV_TIMER8,
+ASPEED_DEV_WDT,
+ASPEED_DEV_PWM,
+ASPEED_DEV_LPC,
+ASPEED_DEV_IBT,
+ASPEED_DEV_I2C,
+ASPEED_DEV_ETH1,
+ASPEED_DEV_ETH2,
+ASPEED_DEV_ETH3,
+ASPEED_DEV_ETH4,
+ASPEED_DEV_MII1,
+ASPEED_DEV_MII2,
+ASPEED_DEV_MII3,
+ASPEED_DEV_MII4,
+ASPEED_DEV_SDRAM,
+ASPEED_DEV_XDMA,
+ASPEED_DEV_EMMC,
};
#endif /* ASPEED_SOC_H */
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index fcb1a7cd87..8109cc6d2d 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -309,7 +309,7 @@ static void aspeed_machine_init(MachineState *machine)
qdev_realize(DEVICE(>soc), NULL, _abort);
memory_region_add_subregion(get_system_memory(),
-sc->memmap[ASPEED_SDRAM],
+sc->memmap[ASPEED_DEV_SDRAM],
>ram_container);
max_ram_size = object_property_get_uint(OBJECT(>soc), "max-ram-size",
@@ -360,7 +360,7 @@ static void aspeed_machine_init(MachineState *machine)
}
aspeed_board_binfo.ram_size = ram_size;
-aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM];
+aspeed_board_binfo.loader_start = sc->memmap[ASPEED_DEV_SDRAM];
aspeed_board_binfo.nb_cpus = sc->num_cpus;
if (amc->i2c_init) {
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 3767f7d8d0..9d95e42143 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -24,43 +24,43 @@
#define ASPEED_SOC_IOMEM_SIZE 0x0020
static const hwaddr aspeed_soc_ast2600_memmap[] = {
-[ASPEED_SRAM] = 0x1000,
+[ASPEED_DEV_SRAM] = 0x1000,
/* 0x1600 0x17FF : AHB BUS do LPC Bus bridge */
-[ASPEED_IOMEM] = 0x1E60,
-[ASPEED_PWM] = 0x1E61,
-[ASPEED_FMC] = 0x1E62,
-[ASPEED_SPI1] = 0x1E63,
-[ASPEED_SPI2] = 0x1E641000,
-[ASPEED_EHCI1] = 0x1E6A1000,
-[ASPEED_EHCI2] = 0x1E6A3000,
-[ASPEED_MII1] = 0x1E65,
-[ASPEED_MII2] = 0x1E650008,
-[ASPEED_MII3] = 0x1E650010,
-[ASPEED_MII4] = 0x1E650018,
-[ASPEED_ETH1] = 0x1E66,
-[ASPEED_ETH3] = 0x1E67,
-[ASPEED_ETH2] = 0x1E68,
-[ASPEED_ETH4] = 0x1E69,
-
[PATCH v2 04/58] pl110: Rename pl110_version enum values
The PL110 enum value name will conflict with the PL110 type cast
checker, when we replace the existing macro with an inline
function. Add a VERSION_ prefix to all pl110_version enum
values, to avoid conflicts.
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2:
* Fixed typo on commit message
* Rename all enum values to VERSION_* (Philippe Mathieu-Daudé)
---
Cc: Peter Maydell
Cc: qemu-...@nongnu.org
Cc: qemu-devel@nongnu.org
---
hw/display/pl110.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/display/pl110.c b/hw/display/pl110.c
index c2991a28d2..61fefbffb3 100644
--- a/hw/display/pl110.c
+++ b/hw/display/pl110.c
@@ -42,9 +42,9 @@ enum pl110_bppmode
/* The Versatile/PB uses a slightly modified PL110 controller. */
enum pl110_version
{
-PL110,
-PL110_VERSATILE,
-PL111
+VERSION_PL110,
+VERSION_PL110_VERSATILE,
+VERSION_PL111
};
#define TYPE_PL110 "pl110"
@@ -189,7 +189,7 @@ static void pl110_update_display(void *opaque)
else
bpp_offset = 24;
-if ((s->version != PL111) && (s->bpp == BPP_16)) {
+if ((s->version != VERSION_PL111) && (s->bpp == BPP_16)) {
/* The PL110's native 16 bit mode is 5551; however
* most boards with a PL110 implement an external
* mux which allows bits to be reshuffled to give
@@ -372,12 +372,12 @@ static uint64_t pl110_read(void *opaque, hwaddr offset,
case 5: /* LCDLPBASE */
return s->lpbase;
case 6: /* LCDIMSC */
-if (s->version != PL110) {
+if (s->version != VERSION_PL110) {
return s->cr;
}
return s->int_mask;
case 7: /* LCDControl */
-if (s->version != PL110) {
+if (s->version != VERSION_PL110) {
return s->int_mask;
}
return s->cr;
@@ -437,7 +437,7 @@ static void pl110_write(void *opaque, hwaddr offset,
s->lpbase = val;
break;
case 6: /* LCDIMSC */
-if (s->version != PL110) {
+if (s->version != VERSION_PL110) {
goto control;
}
imsc:
@@ -445,7 +445,7 @@ static void pl110_write(void *opaque, hwaddr offset,
pl110_update(s);
break;
case 7: /* LCDControl */
-if (s->version != PL110) {
+if (s->version != VERSION_PL110) {
goto imsc;
}
control:
@@ -513,21 +513,21 @@ static void pl110_init(Object *obj)
{
PL110State *s = PL110(obj);
-s->version = PL110;
+s->version = VERSION_PL110;
}
static void pl110_versatile_init(Object *obj)
{
PL110State *s = PL110(obj);
-s->version = PL110_VERSATILE;
+s->version = VERSION_PL110_VERSATILE;
}
static void pl111_init(Object *obj)
{
PL110State *s = PL110(obj);
-s->version = PL111;
+s->version = VERSION_PL111;
}
static void pl110_class_init(ObjectClass *klass, void *data)
--
2.26.2
[PATCH v2 18/58] i8254: Move PITCommonState/PITCommonClass typedefs to i8254.h
Move typedef closer to the type check macros, to make it easier
to convert the code to OBJECT_DEFINE_TYPE() in the future.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Eduardo Habkost
---
Changes v1 -> v2: none
---
Cc: "Michael S. Tsirkin"
Cc: Paolo Bonzini
Cc: qemu-devel@nongnu.org
---
include/hw/timer/i8254.h | 2 ++
include/hw/timer/i8254_internal.h | 8
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h
index e75b4a5a08..206b8f8464 100644
--- a/include/hw/timer/i8254.h
+++ b/include/hw/timer/i8254.h
@@ -39,6 +39,8 @@ typedef struct PITChannelInfo {
} PITChannelInfo;
#define TYPE_PIT_COMMON "pit-common"
+typedef struct PITCommonState PITCommonState;
+typedef struct PITCommonClass PITCommonClass;
#define PIT_COMMON(obj) \
OBJECT_CHECK(PITCommonState, (obj), TYPE_PIT_COMMON)
#define PIT_COMMON_CLASS(klass) \
diff --git a/include/hw/timer/i8254_internal.h
b/include/hw/timer/i8254_internal.h
index 3db462aecd..a9a600d941 100644
--- a/include/hw/timer/i8254_internal.h
+++ b/include/hw/timer/i8254_internal.h
@@ -50,14 +50,14 @@ typedef struct PITChannelState {
uint32_t irq_disabled;
} PITChannelState;
-typedef struct PITCommonState {
+struct PITCommonState {
ISADevice dev;
MemoryRegion ioports;
uint32_t iobase;
PITChannelState channels[3];
-} PITCommonState;
+};
-typedef struct PITCommonClass {
+struct PITCommonClass {
ISADeviceClass parent_class;
void (*set_channel_gate)(PITCommonState *s, PITChannelState *sc, int val);
@@ -65,7 +65,7 @@ typedef struct PITCommonClass {
PITChannelInfo *info);
void (*pre_save)(PITCommonState *s);
void (*post_load)(PITCommonState *s);
-} PITCommonClass;
+};
int pit_get_out(PITChannelState *s, int64_t current_time);
int64_t pit_get_next_transition_time(PITChannelState *s, int64_t current_time);
--
2.26.2
