[Qemu-devel] [PATCH 0/2] Exynos4210 RTC
Patches fixed calculationg for value of year and remove unnecessary code. Oleg Ogurtsov (2): hw/exynos4210_rtc.c: Fix calculating for value of year hw/exynos4210_rtc.c: remove unnecessary code hw/exynos4210_rtc.c |7 ++- 1 files changed, 2 insertions(+), 5 deletions(-) -- 1.7.5.4
[Qemu-devel] [PATCH 1/2] hw/exynos4210_rtc.c: Fix calculating for value of year
Signed-off-by: Oleg Ogurtsov o.ogurt...@samsung.com --- hw/exynos4210_rtc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/exynos4210_rtc.c b/hw/exynos4210_rtc.c index f781020..b42586e 100644 --- a/hw/exynos4210_rtc.c +++ b/hw/exynos4210_rtc.c @@ -142,7 +142,7 @@ static const VMStateDescription vmstate_exynos4210_rtc_state = { }; #define BCD3DIGITS(x) \ -((uint32_t)to_bcd((uint8_t)x) + \ +((uint32_t)to_bcd((uint8_t)(x % 100)) + \ ((uint32_t)to_bcd((uint8_t)((x % 1000) / 100)) 8)) static void check_alarm_raise(Exynos4210RTCState *s) -- 1.7.5.4
[Qemu-devel] [PATCH 2/2] hw/exynos4210_rtc.c: remove unnecessary code
Signed-off-by: Oleg Ogurtsov o.ogurt...@samsung.com --- hw/exynos4210_rtc.c |5 + 1 files changed, 1 insertions(+), 4 deletions(-) diff --git a/hw/exynos4210_rtc.c b/hw/exynos4210_rtc.c index b42586e..42a4ddc 100644 --- a/hw/exynos4210_rtc.c +++ b/hw/exynos4210_rtc.c @@ -510,10 +510,7 @@ static void exynos4210_rtc_reset(DeviceState *d) { Exynos4210RTCState *s = (Exynos4210RTCState *)d; -struct tm tm; - -qemu_get_timedate(tm, 0); -s-current_tm = tm; +qemu_get_timedate(s-current_tm, 0); DPRINTF(Get time from host: %d-%d-%d %2d:%02d:%02d\n, s-current_tm.tm_year, s-current_tm.tm_mon, s-current_tm.tm_mday, -- 1.7.5.4
[Qemu-devel] [PATCH V2] Exynos4: add RTC device
Signed-off-by: Oleg Ogurtsov o.ogurt...@samsung.com --- hw/arm/Makefile.objs |1 + hw/exynos4210.c |8 + hw/exynos4210_rtc.c | 595 ++ 3 files changed, 604 insertions(+), 0 deletions(-) create mode 100644 hw/exynos4210_rtc.c diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index 88ff47d..0fdb832 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -11,6 +11,7 @@ obj-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o a9mpcore.o obj-y += exynos4210_gic.o exynos4210_combiner.o exynos4210.o obj-y += exynos4_boards.o exynos4210_uart.o exynos4210_pwm.o obj-y += exynos4210_pmu.o exynos4210_mct.o exynos4210_fimd.o +obj-y += exynos4210_rtc.o obj-y += arm_l2x0.o obj-y += arm_mptimer.o a15mpcore.o obj-y += armv7m.o armv7m_nvic.o stellaris.o pl022.o stellaris_enet.o diff --git a/hw/exynos4210.c b/hw/exynos4210.c index 9c20b3f..6e105e0 100644 --- a/hw/exynos4210.c +++ b/hw/exynos4210.c @@ -33,6 +33,9 @@ /* PWM */ #define EXYNOS4210_PWM_BASE_ADDR 0x139D +/* RTC */ +#define EXYNOS4210_RTC_BASE_ADDR 0x1007 + /* MCT */ #define EXYNOS4210_MCT_BASE_ADDR 0x1005 @@ -258,6 +261,11 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, s-irq_table[exynos4210_get_irq(22, 3)], s-irq_table[exynos4210_get_irq(22, 4)], NULL); +/* RTC */ +sysbus_create_varargs(exynos4210.rtc, EXYNOS4210_RTC_BASE_ADDR, + s-irq_table[exynos4210_get_irq(23, 0)], + s-irq_table[exynos4210_get_irq(23, 1)], + NULL); /* Multi Core Timer */ dev = qdev_create(NULL, exynos4210.mct); diff --git a/hw/exynos4210_rtc.c b/hw/exynos4210_rtc.c new file mode 100644 index 000..f781020 --- /dev/null +++ b/hw/exynos4210_rtc.c @@ -0,0 +1,595 @@ +/* + * Samsung exynos4210 Real Time Clock + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * Ogurtsov Oleg o.ogurt...@samsung.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see http://www.gnu.org/licenses/. + * + */ + +/* Description: + * Register RTCCON: + * CLKSEL Bit[1] not used + * CLKOUTEN Bit[9] not used + */ + +#include sysbus.h +#include qemu-timer.h +#include qemu-common.h +#include ptimer.h + +#include hw.h +#include qemu-timer.h +#include sysemu.h + +#include exynos4210.h + +#define DEBUG_RTC 0 + +#if DEBUG_RTC +#define DPRINTF(fmt, ...) \ +do { fprintf(stdout, RTC: [%24s:%5d] fmt, __func__, __LINE__, \ +## __VA_ARGS__); } while (0) +#else +#define DPRINTF(fmt, ...) do {} while (0) +#endif + +#define EXYNOS4210_RTC_REG_MEM_SIZE 0x0100 + +#define INTP0x0030 +#define RTCCON 0x0040 +#define TICCNT 0x0044 +#define RTCALM 0x0050 +#define ALMSEC 0x0054 +#define ALMMIN 0x0058 +#define ALMHOUR 0x005C +#define ALMDAY 0x0060 +#define ALMMON 0x0064 +#define ALMYEAR 0x0068 +#define BCDSEC 0x0070 +#define BCDMIN 0x0074 +#define BCDHOUR 0x0078 +#define BCDDAY 0x007C +#define BCDDAYWEEK 0x0080 +#define BCDMON 0x0084 +#define BCDYEAR 0x0088 +#define CURTICNT0x0090 + +#define TICK_TIMER_ENABLE 0x0100 +#define TICNT_THRESHHOLD2 + + +#define RTC_ENABLE 0x0001 + +#define INTP_TICK_ENABLE0x0001 +#define INTP_ALM_ENABLE 0x0002 + +#define ALARM_INT_ENABLE0x0040 + +#define RTC_BASE_FREQ 32768 + +typedef struct Exynos4210RTCState { +SysBusDevice busdev; +MemoryRegion iomem; + +/* registers */ +uint32_treg_intp; +uint32_treg_rtccon; +uint32_treg_ticcnt; +uint32_treg_rtcalm; +uint32_treg_almsec; +uint32_treg_almmin; +uint32_treg_almhour; +uint32_treg_almday; +uint32_treg_almmon; +uint32_treg_almyear; +uint32_treg_curticcnt; + +ptimer_state*ptimer;/* tick timer */ +ptimer_state*ptimer_1Hz;/* clock timer */ +uint32_tfreq; + +qemu_irqtick_irq; /* Time Tick Generator irq */ +qemu_irqalm_irq;/* alarm irq */ + +struct tm current_tm; /* current time
[Qemu-devel] [PATCH V2] Exynos4: add RTC device
Oleg Ogurtsov (1): Exynos4: add RTC device hw/arm/Makefile.objs |1 + hw/exynos4210.c |8 + hw/exynos4210_rtc.c | 595 ++ 3 files changed, 604 insertions(+), 0 deletions(-) create mode 100644 hw/exynos4210_rtc.c -- 1.7.5.4
Re: [Qemu-devel] [PATCH V2] Exynos4: add RTC device
On 27.06.2012 10:06, Oleg Ogurtsov wrote: Oleg Ogurtsov (1): Exynos4: add RTC device hw/arm/Makefile.objs |1 + hw/exynos4210.c |8 + hw/exynos4210_rtc.c | 595 ++ 3 files changed, 604 insertions(+), 0 deletions(-) create mode 100644 hw/exynos4210_rtc.c Sorry for header...
[Qemu-devel] [PATCH] Exynos4: added RTC device
This patch add RTC device Oleg Ogurtsov (1): Exynos4: added RTC device hw/arm/Makefile.objs |1 + hw/exynos4210.c |8 + hw/exynos4210_rtc.c | 607 ++ 3 files changed, 616 insertions(+), 0 deletions(-) create mode 100644 hw/exynos4210_rtc.c -- 1.7.5.4
[Qemu-devel] [PATCH] Exynos4: added RTC device
Signed-off-by: Oleg Ogurtsov o.ogurt...@samsung.com --- hw/arm/Makefile.objs |1 + hw/exynos4210.c |8 + hw/exynos4210_rtc.c | 607 ++ 3 files changed, 616 insertions(+), 0 deletions(-) create mode 100644 hw/exynos4210_rtc.c diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index 88ff47d..0fdb832 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -11,6 +11,7 @@ obj-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o a9mpcore.o obj-y += exynos4210_gic.o exynos4210_combiner.o exynos4210.o obj-y += exynos4_boards.o exynos4210_uart.o exynos4210_pwm.o obj-y += exynos4210_pmu.o exynos4210_mct.o exynos4210_fimd.o +obj-y += exynos4210_rtc.o obj-y += arm_l2x0.o obj-y += arm_mptimer.o a15mpcore.o obj-y += armv7m.o armv7m_nvic.o stellaris.o pl022.o stellaris_enet.o diff --git a/hw/exynos4210.c b/hw/exynos4210.c index 9c20b3f..6e105e0 100644 --- a/hw/exynos4210.c +++ b/hw/exynos4210.c @@ -33,6 +33,9 @@ /* PWM */ #define EXYNOS4210_PWM_BASE_ADDR 0x139D +/* RTC */ +#define EXYNOS4210_RTC_BASE_ADDR 0x1007 + /* MCT */ #define EXYNOS4210_MCT_BASE_ADDR 0x1005 @@ -258,6 +261,11 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, s-irq_table[exynos4210_get_irq(22, 3)], s-irq_table[exynos4210_get_irq(22, 4)], NULL); +/* RTC */ +sysbus_create_varargs(exynos4210.rtc, EXYNOS4210_RTC_BASE_ADDR, + s-irq_table[exynos4210_get_irq(23, 0)], + s-irq_table[exynos4210_get_irq(23, 1)], + NULL); /* Multi Core Timer */ dev = qdev_create(NULL, exynos4210.mct); diff --git a/hw/exynos4210_rtc.c b/hw/exynos4210_rtc.c new file mode 100644 index 000..2ac6301 --- /dev/null +++ b/hw/exynos4210_rtc.c @@ -0,0 +1,607 @@ +/* + * Samsung exynos4210 Real Time Clock + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * Ogurtsov Oleg o.ogurt...@samsung.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see http://www.gnu.org/licenses/. + * + */ + +/* Description: + * Register RTCCON: + * CLKSEL Bit[1] not used + * CLKOUTEN Bit[9] not used + */ + +#include sysbus.h +#include qemu-timer.h +#include qemu-common.h +#include ptimer.h + +#include hw.h +#include qemu-timer.h +#include sysemu.h + +#include exynos4210.h + +#define DEBUG_RTC 0 + +#if DEBUG_RTC +#define DPRINTF(fmt, ...) \ +do { fprintf(stdout, RTC: [%24s:%5d] fmt, __func__, __LINE__, \ +## __VA_ARGS__); } while (0) +#else +#define DPRINTF(fmt, ...) do {} while (0) +#endif + +#define EXYNOS4210_RTC_REG_MEM_SIZE 0x0100 + +#define INTP0x0030 +#define RTCCON 0x0040 +#define TICCNT 0x0044 +#define RTCALM 0x0050 +#define ALMSEC 0x0054 +#define ALMMIN 0x0058 +#define ALMHOUR 0x005C +#define ALMDAY 0x0060 +#define ALMMON 0x0064 +#define ALMYEAR 0x0068 +#define BCDSEC 0x0070 +#define BDCMIN 0x0074 +#define BCDHOUR 0x0078 +#define BCDDAY 0x007C +#define BCDDAYWEEK 0x0080 +#define BCDMON 0x0084 +#define BCDYEAR 0x0088 +#define CURTICNT0x0090 + +#define TICK_TIMER_ENABLE 0x0100 +#define TICNT_THRESHHOLD2 + + +#define RTC_ENABLE 0x0001 + +#define INTP_TICK_ENABLE0x0001 +#define INTP_ALM_ENABLE 0x0002 + +#define ALARM_INT_ENABLE0x0040 + +#define RTC_BASE_FREQ 32768 + +typedef struct Exynos4210RTCState { +SysBusDevice busdev; +MemoryRegion iomem; + +/* registers */ +uint32_treg_intp; +uint32_treg_rtccon; +uint32_treg_ticcnt; +uint32_treg_rtcalm; +uint32_treg_almsec; +uint32_treg_almmin; +uint32_treg_almhour; +uint32_treg_almday; +uint32_treg_almmon; +uint32_treg_almyear; +uint32_treg_curticcnt; + +ptimer_state*ptimer;/* tick timer */ +ptimer_state*ptimer_1Hz;/* clock timer */ +uint32_tfreq; + +qemu_irqtick_irq; /* Time Tick Generator irq */ +qemu_irqalm_irq;/* alarm irq */ + +struct tm current_tm; /* current time