Re: [PATCH] hw/misc: Add basic Aspeed GFX model
On Thu, 19 Jan 2023, at 23:14, Joel Stanley wrote:
> Enough model to capture the pinmux writes to enable correct operation of
> the parts of pinmux that depend on GFX registers.
>
> Signed-off-by: Joel Stanley
> ---
> include/hw/arm/aspeed_soc.h | 3 +
> include/hw/misc/aspeed_gfx.h | 31 +
> hw/arm/aspeed_ast2600.c | 11
> hw/arm/aspeed_soc.c | 12
> hw/misc/aspeed_gfx.c | 121 +++
> hw/misc/meson.build | 1 +
> hw/misc/trace-events | 4 ++
> 7 files changed, 183 insertions(+)
> create mode 100644 include/hw/misc/aspeed_gfx.h
> create mode 100644 hw/misc/aspeed_gfx.c
>
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index 8389200b2d01..7084e0efeb97 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -26,6 +26,7 @@
> #include "hw/ssi/aspeed_smc.h"
> #include "hw/misc/aspeed_hace.h"
> #include "hw/misc/aspeed_sbc.h"
> +#include "hw/misc/aspeed_gfx.h"
> #include "hw/watchdog/wdt_aspeed.h"
> #include "hw/net/ftgmac100.h"
> #include "target/arm/cpu.h"
> @@ -81,6 +82,7 @@ struct AspeedSoCState {
> AspeedSDHCIState emmc;
> AspeedLPCState lpc;
> AspeedPECIState peci;
> +AspeedGFXState gfx;
> SerialMM uart[ASPEED_UARTS_NUM];
> Clock *sysclk;
> UnimplementedDeviceState iomem;
> @@ -171,6 +173,7 @@ enum {
> ASPEED_DEV_EMMC,
> ASPEED_DEV_KCS,
> ASPEED_DEV_HACE,
> +ASPEED_DEV_GFX,
> ASPEED_DEV_DPMCU,
> ASPEED_DEV_DP,
> ASPEED_DEV_I3C,
> diff --git a/include/hw/misc/aspeed_gfx.h b/include/hw/misc/aspeed_gfx.h
> new file mode 100644
> index ..b0736a53f577
> --- /dev/null
> +++ b/include/hw/misc/aspeed_gfx.h
> @@ -0,0 +1,31 @@
> +/*
> + * ASPEED GFX Controller
> + *
> + * Copyright (C) 2023 IBM Corp.
> + *
> + * This code is licensed under the GPL version 2 or later. See
> + * the COPYING file in the top-level directory.
> + */
Use SPDX here?
> +
> +#ifndef ASPEED_GFX_H
> +#define ASPEED_GFX_H
> +
> +#include "hw/sysbus.h"
> +
> +#define TYPE_ASPEED_GFX "aspeed.gfx"
> +#define ASPEED_GFX(obj) OBJECT_CHECK(AspeedGFXState, (obj), TYPE_ASPEED_GFX)
> +
> +#define ASPEED_GFX_NR_REGS (0xFC >> 2)
> +
> +typedef struct AspeedGFXState {
> +/* */
> +SysBusDevice parent;
> +
> +/*< public >*/
> +MemoryRegion iomem;
> +qemu_irq irq;
> +
> +uint32_t regs[ASPEED_GFX_NR_REGS];
> +} AspeedGFXState;
> +
> +#endif /* _ASPEED_GFX_H_ */
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index cd75465c2bdd..10e4a13655cc 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -43,6 +43,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
> [ASPEED_DEV_HACE] = 0x1E6D,
> [ASPEED_DEV_SDMC] = 0x1E6E,
> [ASPEED_DEV_SCU] = 0x1E6E2000,
> +[ASPEED_DEV_GFX] = 0x1E6E6000,
> [ASPEED_DEV_XDMA] = 0x1E6E7000,
> [ASPEED_DEV_ADC] = 0x1E6E9000,
> [ASPEED_DEV_DP]= 0x1E6EB000,
> @@ -255,6 +256,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
>
> object_initialize_child(obj, "sbc", &s->sbc, TYPE_ASPEED_SBC);
>
> +object_initialize_child(obj, "gfx", &s->gfx, TYPE_ASPEED_GFX);
> +
> object_initialize_child(obj, "iomem", &s->iomem,
> TYPE_UNIMPLEMENTED_DEVICE);
> object_initialize_child(obj, "video", &s->video,
> TYPE_UNIMPLEMENTED_DEVICE);
> object_initialize_child(obj, "dpmcu", &s->dpmcu,
> TYPE_UNIMPLEMENTED_DEVICE);
> @@ -607,6 +610,14 @@ static void aspeed_soc_ast2600_realize(DeviceState
> *dev, Error **errp)
> return;
> }
> aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sbc), 0,
> sc->memmap[ASPEED_DEV_SBC]);
> +
> +/* GFX */
> +if (!sysbus_realize(SYS_BUS_DEVICE(&s->gfx), errp)) {
> +return;
> +}
> +aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gfx), 0,
> sc->memmap[ASPEED_DEV_GFX]);
> +sysbus_connect_irq(SYS_BUS_DEVICE(&s->gfx), 0,
> + aspeed_soc_get_irq(s, ASPEED_DEV_GFX));
I think we're missing an entry for ASPEED_DEV_GFX in the irqmap array?
> }
>
> static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index b05b9dd41602..053149f9ccdf 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -33,6 +33,7 @@ static const hwaddr aspeed_soc_ast2400_memmap[] = {
> [ASPEED_DEV_SDMC] = 0x1E6E,
> [ASPEED_DEV_SCU]= 0x1E6E2000,
> [ASPEED_DEV_HACE] = 0x1E6E3000,
> +[ASPEED_DEV_GFX]= 0x1E6E6000,
> [ASPEED_DEV_XDMA] = 0x1E6E7000,
> [ASPEED_DEV_VIDEO] = 0x1E70,
> [ASPEED_DEV_ADC]= 0x1E6E9000,
> @@ -69,6 +70,7 @@ static const hwaddr aspeed_soc_ast2500_memmap[] = {
> [ASPEED_DEV_SDMC] = 0x1E6E,
> [ASPEED_DEV_SCU]= 0x1E6E2000,
> [ASPEED_DEV_HACE] = 0x1E6E3000,
> +[ASPEED_DEV_GFX]= 0x1E6E6000,
> [ASPEE
[PATCH] hw/misc: Add basic Aspeed GFX model
Enough model to capture the pinmux writes to enable correct operation of
the parts of pinmux that depend on GFX registers.
Signed-off-by: Joel Stanley
---
include/hw/arm/aspeed_soc.h | 3 +
include/hw/misc/aspeed_gfx.h | 31 +
hw/arm/aspeed_ast2600.c | 11
hw/arm/aspeed_soc.c | 12
hw/misc/aspeed_gfx.c | 121 +++
hw/misc/meson.build | 1 +
hw/misc/trace-events | 4 ++
7 files changed, 183 insertions(+)
create mode 100644 include/hw/misc/aspeed_gfx.h
create mode 100644 hw/misc/aspeed_gfx.c
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 8389200b2d01..7084e0efeb97 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -26,6 +26,7 @@
#include "hw/ssi/aspeed_smc.h"
#include "hw/misc/aspeed_hace.h"
#include "hw/misc/aspeed_sbc.h"
+#include "hw/misc/aspeed_gfx.h"
#include "hw/watchdog/wdt_aspeed.h"
#include "hw/net/ftgmac100.h"
#include "target/arm/cpu.h"
@@ -81,6 +82,7 @@ struct AspeedSoCState {
AspeedSDHCIState emmc;
AspeedLPCState lpc;
AspeedPECIState peci;
+AspeedGFXState gfx;
SerialMM uart[ASPEED_UARTS_NUM];
Clock *sysclk;
UnimplementedDeviceState iomem;
@@ -171,6 +173,7 @@ enum {
ASPEED_DEV_EMMC,
ASPEED_DEV_KCS,
ASPEED_DEV_HACE,
+ASPEED_DEV_GFX,
ASPEED_DEV_DPMCU,
ASPEED_DEV_DP,
ASPEED_DEV_I3C,
diff --git a/include/hw/misc/aspeed_gfx.h b/include/hw/misc/aspeed_gfx.h
new file mode 100644
index ..b0736a53f577
--- /dev/null
+++ b/include/hw/misc/aspeed_gfx.h
@@ -0,0 +1,31 @@
+/*
+ * ASPEED GFX Controller
+ *
+ * Copyright (C) 2023 IBM Corp.
+ *
+ * This code is licensed under the GPL version 2 or later. See
+ * the COPYING file in the top-level directory.
+ */
+
+#ifndef ASPEED_GFX_H
+#define ASPEED_GFX_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_ASPEED_GFX "aspeed.gfx"
+#define ASPEED_GFX(obj) OBJECT_CHECK(AspeedGFXState, (obj), TYPE_ASPEED_GFX)
+
+#define ASPEED_GFX_NR_REGS (0xFC >> 2)
+
+typedef struct AspeedGFXState {
+/* */
+SysBusDevice parent;
+
+/*< public >*/
+MemoryRegion iomem;
+qemu_irq irq;
+
+uint32_t regs[ASPEED_GFX_NR_REGS];
+} AspeedGFXState;
+
+#endif /* _ASPEED_GFX_H_ */
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index cd75465c2bdd..10e4a13655cc 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -43,6 +43,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
[ASPEED_DEV_HACE] = 0x1E6D,
[ASPEED_DEV_SDMC] = 0x1E6E,
[ASPEED_DEV_SCU] = 0x1E6E2000,
+[ASPEED_DEV_GFX] = 0x1E6E6000,
[ASPEED_DEV_XDMA] = 0x1E6E7000,
[ASPEED_DEV_ADC] = 0x1E6E9000,
[ASPEED_DEV_DP]= 0x1E6EB000,
@@ -255,6 +256,8 @@ static void aspeed_soc_ast2600_init(Object *obj)
object_initialize_child(obj, "sbc", &s->sbc, TYPE_ASPEED_SBC);
+object_initialize_child(obj, "gfx", &s->gfx, TYPE_ASPEED_GFX);
+
object_initialize_child(obj, "iomem", &s->iomem,
TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "video", &s->video,
TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "dpmcu", &s->dpmcu,
TYPE_UNIMPLEMENTED_DEVICE);
@@ -607,6 +610,14 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev,
Error **errp)
return;
}
aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sbc), 0, sc->memmap[ASPEED_DEV_SBC]);
+
+/* GFX */
+if (!sysbus_realize(SYS_BUS_DEVICE(&s->gfx), errp)) {
+return;
+}
+aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gfx), 0, sc->memmap[ASPEED_DEV_GFX]);
+sysbus_connect_irq(SYS_BUS_DEVICE(&s->gfx), 0,
+ aspeed_soc_get_irq(s, ASPEED_DEV_GFX));
}
static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index b05b9dd41602..053149f9ccdf 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -33,6 +33,7 @@ static const hwaddr aspeed_soc_ast2400_memmap[] = {
[ASPEED_DEV_SDMC] = 0x1E6E,
[ASPEED_DEV_SCU]= 0x1E6E2000,
[ASPEED_DEV_HACE] = 0x1E6E3000,
+[ASPEED_DEV_GFX]= 0x1E6E6000,
[ASPEED_DEV_XDMA] = 0x1E6E7000,
[ASPEED_DEV_VIDEO] = 0x1E70,
[ASPEED_DEV_ADC]= 0x1E6E9000,
@@ -69,6 +70,7 @@ static const hwaddr aspeed_soc_ast2500_memmap[] = {
[ASPEED_DEV_SDMC] = 0x1E6E,
[ASPEED_DEV_SCU]= 0x1E6E2000,
[ASPEED_DEV_HACE] = 0x1E6E3000,
+[ASPEED_DEV_GFX]= 0x1E6E6000,
[ASPEED_DEV_XDMA] = 0x1E6E7000,
[ASPEED_DEV_ADC]= 0x1E6E9000,
[ASPEED_DEV_VIDEO] = 0x1E70,
@@ -233,6 +235,8 @@ static void aspeed_soc_init(Object *obj)
snprintf(typename, sizeof(typename), "aspeed.hace-%s", socname);
object_initialize_child(obj, "hace", &s->hace, typename);
+object_initialize_child(obj, "gfx", &s->gfx, TYPE_ASPEED_GFX);
+
object_initialize_child(obj, "iomem", &s->iome
