Re: [PATCH] linux-user: Add /proc/cpuinfo handler for RISC-V
On Wed, 03 May 2023 04:13:55 PDT (-0700), sch...@suse.de wrote: On Mai 02 2023, Andreas Schwab wrote: None of the currently defined cpus are non-GC cpus (except sifive_e, but that is not suitable for user-space anyway), and there doesn't appear to be any properties defined for changing the supported extensions. Actually, modifying the extensions is possible for the base cpus (rv32 and rv64). Ya, though I think you're right about the VA width in userspace.
Re: [PATCH] linux-user: Add /proc/cpuinfo handler for RISC-V
On Mai 02 2023, Andreas Schwab wrote: > None of the currently defined cpus are non-GC cpus (except sifive_e, but > that is not suitable for user-space anyway), and there doesn't appear to > be any properties defined for changing the supported extensions. Actually, modifying the extensions is possible for the base cpus (rv32 and rv64). -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."
Re: [PATCH] linux-user: Add /proc/cpuinfo handler for RISC-V
On Mai 02 2023, Palmer Dabbelt wrote: > On Tue, 02 May 2023 06:44:00 PDT (-0700), sch...@suse.de wrote: >> Signed-off-by: Andreas Schwab >> --- >> linux-user/syscall.c | 30 -- >> 1 file changed, 28 insertions(+), 2 deletions(-) >> >> diff --git a/linux-user/syscall.c b/linux-user/syscall.c >> index 69f740ff98..c72456a34b 100644 >> --- a/linux-user/syscall.c >> +++ b/linux-user/syscall.c >> @@ -8231,7 +8231,8 @@ void target_exception_dump(CPUArchState *env, const >> char *fmt, int code) >> } >> >> #if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN || \ >> -defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) >> +defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) >> || \ >> +defined(TARGET_RISCV) >> static int is_proc(const char *filename, const char *entry) >> { >> return strcmp(filename, entry) == 0; >> @@ -8309,6 +8310,31 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) >> } >> #endif >> >> +#if defined(TARGET_RISCV) >> +static int open_cpuinfo(CPUArchState *cpu_env, int fd) >> +{ >> +int i, num_cpus; >> + >> +num_cpus = sysconf(_SC_NPROCESSORS_ONLN); >> +for (i = 0; i < num_cpus; i++) { >> +dprintf(fd, "processor\t: %d\n", i); >> +dprintf(fd, "hart\t\t: %d\n", i); >> +#if defined(TARGET_RISCV32) >> +dprintf(fd, "isa\t\t: rv32imafdc\n"); >> +dprintf(fd, "mmu\t\t: sv32\n"); >> +#endif >> +#if defined(TARGET_RISCV64) >> +dprintf(fd, "isa\t\t: rv64imafdc\n"); >> +dprintf(fd, "mmu\t\t: sv57\n"); > > Unless I'm misunderstanding something, we've got support for both non-sv57 > system (via sv* CPU properties) The mmu type is not available in linux-user emulation. This just matches the default the system emulation would use. > and non-GC systems (also via CPU properties). None of the currently defined cpus are non-GC cpus (except sifive_e, but that is not suitable for user-space anyway), and there doesn't appear to be any properties defined for changing the supported extensions. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."
Re: [PATCH] linux-user: Add /proc/cpuinfo handler for RISC-V
On Tue, 02 May 2023 06:44:00 PDT (-0700), sch...@suse.de wrote: Signed-off-by: Andreas Schwab --- linux-user/syscall.c | 30 -- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 69f740ff98..c72456a34b 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -8231,7 +8231,8 @@ void target_exception_dump(CPUArchState *env, const char *fmt, int code) } #if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN || \ -defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) +defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) || \ +defined(TARGET_RISCV) static int is_proc(const char *filename, const char *entry) { return strcmp(filename, entry) == 0; @@ -8309,6 +8310,31 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) } #endif +#if defined(TARGET_RISCV) +static int open_cpuinfo(CPUArchState *cpu_env, int fd) +{ +int i, num_cpus; + +num_cpus = sysconf(_SC_NPROCESSORS_ONLN); +for (i = 0; i < num_cpus; i++) { +dprintf(fd, "processor\t: %d\n", i); +dprintf(fd, "hart\t\t: %d\n", i); +#if defined(TARGET_RISCV32) +dprintf(fd, "isa\t\t: rv32imafdc\n"); +dprintf(fd, "mmu\t\t: sv32\n"); +#endif +#if defined(TARGET_RISCV64) +dprintf(fd, "isa\t\t: rv64imafdc\n"); +dprintf(fd, "mmu\t\t: sv57\n"); Unless I'm misunderstanding something, we've got support for both non-sv57 system (via sv* CPU properties) and non-GC systems (also via CPU properties). Not sure how much userspace cares about that, but at least dropping FD when those instructions aren't emulated by QEMEU seems reasonable. +#endif +dprintf(fd, "mvendorid\t: 0x0\n"); +dprintf(fd, "marchid\t\t: 0x0\n"); +dprintf(fd, "mimpid\t\t: 0x0\n\n"); +} +return 0; +} +#endif + #if defined(TARGET_M68K) static int open_hardware(CPUArchState *cpu_env, int fd) { @@ -8333,7 +8359,7 @@ static int do_openat(CPUArchState *cpu_env, int dirfd, const char *pathname, int #if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN { "/proc/net/route", open_net_route, is_proc }, #endif -#if defined(TARGET_SPARC) || defined(TARGET_HPPA) +#if defined(TARGET_SPARC) || defined(TARGET_HPPA) || defined(TARGET_RISCV) { "/proc/cpuinfo", open_cpuinfo, is_proc }, #endif #if defined(TARGET_M68K) Aside from that this looks great. Thanks for fixing this, it's been a headache for folks for a while.
[PATCH] linux-user: Add /proc/cpuinfo handler for RISC-V
Signed-off-by: Andreas Schwab --- linux-user/syscall.c | 30 -- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 69f740ff98..c72456a34b 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -8231,7 +8231,8 @@ void target_exception_dump(CPUArchState *env, const char *fmt, int code) } #if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN || \ -defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) +defined(TARGET_SPARC) || defined(TARGET_M68K) || defined(TARGET_HPPA) || \ +defined(TARGET_RISCV) static int is_proc(const char *filename, const char *entry) { return strcmp(filename, entry) == 0; @@ -8309,6 +8310,31 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) } #endif +#if defined(TARGET_RISCV) +static int open_cpuinfo(CPUArchState *cpu_env, int fd) +{ +int i, num_cpus; + +num_cpus = sysconf(_SC_NPROCESSORS_ONLN); +for (i = 0; i < num_cpus; i++) { +dprintf(fd, "processor\t: %d\n", i); +dprintf(fd, "hart\t\t: %d\n", i); +#if defined(TARGET_RISCV32) +dprintf(fd, "isa\t\t: rv32imafdc\n"); +dprintf(fd, "mmu\t\t: sv32\n"); +#endif +#if defined(TARGET_RISCV64) +dprintf(fd, "isa\t\t: rv64imafdc\n"); +dprintf(fd, "mmu\t\t: sv57\n"); +#endif +dprintf(fd, "mvendorid\t: 0x0\n"); +dprintf(fd, "marchid\t\t: 0x0\n"); +dprintf(fd, "mimpid\t\t: 0x0\n\n"); +} +return 0; +} +#endif + #if defined(TARGET_M68K) static int open_hardware(CPUArchState *cpu_env, int fd) { @@ -8333,7 +8359,7 @@ static int do_openat(CPUArchState *cpu_env, int dirfd, const char *pathname, int #if HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN { "/proc/net/route", open_net_route, is_proc }, #endif -#if defined(TARGET_SPARC) || defined(TARGET_HPPA) +#if defined(TARGET_SPARC) || defined(TARGET_HPPA) || defined(TARGET_RISCV) { "/proc/cpuinfo", open_cpuinfo, is_proc }, #endif #if defined(TARGET_M68K) -- 2.40.1 -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."