[PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
On linux user mode, CPUX86State::idt::base and CPUX86State::gdt::base from Different CPUX86State Objects have same value, It is incorrect! Every CPUX86State::idt::base and Every CPUX86State::gdt::base Must points to independent memory space. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1405 Signed-off-by: fanwenjie --- linux-user/i386/cpu_loop.c | 10 ++ linux-user/main.c | 11 +++ 2 files changed, 21 insertions(+) diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index 865413c08f..1f23bc5e3a 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -314,8 +314,18 @@ void cpu_loop(CPUX86State *env) } } +static void target_cpu_free(void *obj) +{ +CPUArchState* env = ((CPUState*)obj)->env_ptr; +target_munmap(env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); +target_munmap(env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +g_free(obj); +} + void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { +CPUState* cpu = env_cpu(env); +OBJECT(cpu)->free = target_cpu_free; env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; env->hflags |= HF_PE_MASK | HF_CPL_MASK; if (env->features[FEAT_1_EDX] & CPUID_SSE) { diff --git a/linux-user/main.c b/linux-user/main.c index a17fed045b..2276040548 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -234,6 +234,17 @@ CPUArchState *cpu_copy(CPUArchState *env) new_cpu->tcg_cflags = cpu->tcg_cflags; memcpy(new_env, env, sizeof(CPUArchState)); +#if defined(TARGET_I386) || defined(TARGET_X86_64) +new_env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES, +PROT_READ|PROT_WRITE, +MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); +new_env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), +PROT_READ|PROT_WRITE, +MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); +memcpy((void*)new_env->gdt.base, (void*)env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +memcpy((void*)new_env->idt.base, (void*)env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); +OBJECT(new_cpu)->free = OBJECT(cpu)->free; +#endif /* Clone all break/watchpoints. Note: Once we support ptrace with hw-debug register access, make sure -- 2.34.1
[PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
--- linux-user/i386/cpu_loop.c | 10 ++ linux-user/main.c | 11 +++ 2 files changed, 21 insertions(+) diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index 865413c08f..1f23bc5e3a 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -314,8 +314,18 @@ void cpu_loop(CPUX86State *env) } } +static void target_cpu_free(void *obj) +{ +CPUArchState* env = ((CPUState*)obj)->env_ptr; +target_munmap(env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); +target_munmap(env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +g_free(obj); +} + void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { +CPUState* cpu = env_cpu(env); +OBJECT(cpu)->free = target_cpu_free; env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; env->hflags |= HF_PE_MASK | HF_CPL_MASK; if (env->features[FEAT_1_EDX] & CPUID_SSE) { diff --git a/linux-user/main.c b/linux-user/main.c index a17fed045b..2276040548 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -234,6 +234,17 @@ CPUArchState *cpu_copy(CPUArchState *env) new_cpu->tcg_cflags = cpu->tcg_cflags; memcpy(new_env, env, sizeof(CPUArchState)); +#if defined(TARGET_I386) || defined(TARGET_X86_64) +new_env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES, +PROT_READ|PROT_WRITE, +MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); +new_env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), +PROT_READ|PROT_WRITE, +MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); +memcpy((void*)new_env->gdt.base, (void*)env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +memcpy((void*)new_env->idt.base, (void*)env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); +OBJECT(new_cpu)->free = OBJECT(cpu)->free; +#endif /* Clone all break/watchpoints. Note: Once we support ptrace with hw-debug register access, make sure -- 2.34.1
[PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
On linux user mode, CPUX86State::idt::base and CPUX86State::gdt::base from Different CPUX86State Objects have same value, It is incorrect! Every CPUX86State::idt::base and Every CPUX86State::gdt::base Must points to independent memory space. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1405 Signed-off-by: fanwenjie --- linux-user/i386/cpu_loop.c | 10 ++ linux-user/main.c | 11 +++ 2 files changed, 21 insertions(+) diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index 865413c08f..1f23bc5e3a 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -314,8 +314,18 @@ void cpu_loop(CPUX86State *env) } } +static void target_cpu_free(void *obj) +{ + CPUArchState* env = ((CPUState*)obj)->env_ptr; + target_munmap(env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); + target_munmap(env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); + g_free(obj); +} + void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { + CPUState* cpu = env_cpu(env); + OBJECT(cpu)->free = target_cpu_free; env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; env->hflags |= HF_PE_MASK | HF_CPL_MASK; if (env->features[FEAT_1_EDX] & CPUID_SSE) { diff --git a/linux-user/main.c b/linux-user/main.c index a17fed045b..2276040548 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -234,6 +234,17 @@ CPUArchState *cpu_copy(CPUArchState *env) new_cpu->tcg_cflags = cpu->tcg_cflags; memcpy(new_env, env, sizeof(CPUArchState)); +#if defined(TARGET_I386) || defined(TARGET_X86_64) + new_env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES, + PROT_READ|PROT_WRITE, + MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); + new_env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), + PROT_READ|PROT_WRITE, + MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); + memcpy((void*)new_env->gdt.base, (void*)env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); + memcpy((void*)new_env->idt.base, (void*)env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); + OBJECT(new_cpu)->free = OBJECT(cpu)->free; +#endif /* Clone all break/watchpoints. Note: Once we support ptrace with hw-debug register access, make sure -- 2.34.1
[PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
From: fanwenjie On linux user mode, CPUX86State::idt::base and CPUX86State::gdt::base from Different CPUX86State Objects have same value, It is incorrect! Every CPUX86State::idt::base and Every CPUX86State::gdt::base Must points to independent memory space. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1405 Signed-off-by: fanwenjie --- linux-user/i386/cpu_loop.c | 10 ++ linux-user/main.c | 11 +++ 2 files changed, 21 insertions(+) diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c index 865413c08f..1f23bc5e3a 100644 --- a/linux-user/i386/cpu_loop.c +++ b/linux-user/i386/cpu_loop.c @@ -314,8 +314,18 @@ void cpu_loop(CPUX86State *env) } } +static void target_cpu_free(void *obj) +{ +CPUArchState* env = ((CPUState*)obj)->env_ptr; +target_munmap(env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); +target_munmap(env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +g_free(obj); +} + void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { +CPUState* cpu = env_cpu(env); +OBJECT(cpu)->free = target_cpu_free; env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; env->hflags |= HF_PE_MASK | HF_CPL_MASK; if (env->features[FEAT_1_EDX] & CPUID_SSE) { diff --git a/linux-user/main.c b/linux-user/main.c index a17fed045b..2276040548 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -234,6 +234,17 @@ CPUArchState *cpu_copy(CPUArchState *env) new_cpu->tcg_cflags = cpu->tcg_cflags; memcpy(new_env, env, sizeof(CPUArchState)); +#if defined(TARGET_I386) || defined(TARGET_X86_64) +new_env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES, +PROT_READ|PROT_WRITE, +MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); +new_env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), +PROT_READ|PROT_WRITE, +MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); +memcpy((void*)new_env->gdt.base, (void*)env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +memcpy((void*)new_env->idt.base, (void*)env->idt.base, sizeof(uint64_t) * (env->idt.limit + 1)); +OBJECT(new_cpu)->free = OBJECT(cpu)->free; +#endif /* Clone all break/watchpoints. Note: Once we support ptrace with hw-debug register access, make sure -- 2.34.1
Re: [PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
fa...@mail.ustc.edu.cn writes: > From 4601a624f40b2c89e7df2dec1adffb4f4308ba2d Mon Sep 17 00:00:00 2001 > From: fanwenjie > Date: Sun, 1 Jan 2023 23:13:34 +0800 > Subject: [PATCH] linux-user: fix bug about incorrect base addresss of idt and > gdt on i386 and x86_64 > > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1405 > Signed-off-by: fanwenjie > --- > linux-user/main.c | 13 + > 1 file changed, 13 insertions(+) > > diff --git a/linux-user/main.c b/linux-user/main.c > index a17fed045b..5d673c95b3 100644 > --- a/linux-user/main.c > +++ b/linux-user/main.c > @@ -171,6 +171,12 @@ void fork_end(int child) > > __thread CPUState *thread_cpu; > > +#if defined(TARGET_I386) || defined(TARGET_X86_64) > +#include > +__thread alignas(TARGET_PAGE_SIZE) static uint64_t > gdt_base[TARGET_GDT_ENTRIES]; > +__thread alignas(TARGET_PAGE_SIZE) static uint64_t idt_base[TARGET_PAGE_SIZE > / sizeof(uint64_t)]; > +#endif > + > bool qemu_cpu_is_self(CPUState *cpu) > { > return thread_cpu == cpu; > @@ -235,6 +241,13 @@ CPUArchState *cpu_copy(CPUArchState *env) > new_cpu->tcg_cflags = cpu->tcg_cflags; > memcpy(new_env, env, sizeof(CPUArchState)); > > +#if defined(TARGET_I386) || defined(TARGET_X86_64) > +memcpy(idt_base, (void*)new_env->idt.base, sizeof(uint64_t) * > (new_env->idt.limit + 1)); > +memcpy(gdt_base, (void*)new_env->gdt.base, sizeof(uint64_t) * > TARGET_GDT_ENTRIES); > +new_env->idt.base = (target_ulong)idt_base; > +new_env->gdt.base = (target_ulong)gdt_base; > +#endif > + This is the wrong place to copy target specific bits of code. I think this belongs with cpu_clone_regs_child and the gdt/idt structures in linux-user/i386/cpu_loop.c I think. > /* Clone all break/watchpoints. > Note: Once we support ptrace with hw-debug register access, make sure > BP_CPU break/watchpoints are handled correctly on clone. */ -- Alex Bennée Virtualisation Tech Lead @ Linaro
Recall: [PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
The Patch has some problem, Please RECALL it! -原始邮件- 发件人:fa...@mail.ustc.edu.cn 发送时间:2023-01-01 23:57:06 (星期日) 收件人: qemu-devel@nongnu.org 抄送: qemu-devel@nongnu.org 主题: [PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64 From 4601a624f40b2c89e7df2dec1adffb4f4308ba2d Mon Sep 17 00:00:00 2001 From: fanwenjie Date: Sun, 1 Jan 2023 23:13:34 +0800 Subject: [PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1405 Signed-off-by: fanwenjie --- linux-user/main.c | 13 + 1 file changed, 13 insertions(+) diff --git a/linux-user/main.c b/linux-user/main.c index a17fed045b..5d673c95b3 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -171,6 +171,12 @@ void fork_end(int child) __thread CPUState *thread_cpu; +#if defined(TARGET_I386) || defined(TARGET_X86_64) +#include +__thread alignas(TARGET_PAGE_SIZE) static uint64_t gdt_base[TARGET_GDT_ENTRIES]; +__thread alignas(TARGET_PAGE_SIZE) static uint64_t idt_base[TARGET_PAGE_SIZE / sizeof(uint64_t)]; +#endif + bool qemu_cpu_is_self(CPUState *cpu) { return thread_cpu == cpu; @@ -235,6 +241,13 @@ CPUArchState *cpu_copy(CPUArchState *env) new_cpu->tcg_cflags = cpu->tcg_cflags; memcpy(new_env, env, sizeof(CPUArchState)); +#if defined(TARGET_I386) || defined(TARGET_X86_64) +memcpy(idt_base, (void*)new_env->idt.base, sizeof(uint64_t) * (new_env->idt.limit + 1)); +memcpy(gdt_base, (void*)new_env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +new_env->idt.base = (target_ulong)idt_base; +new_env->gdt.base = (target_ulong)gdt_base; +#endif + /* Clone all break/watchpoints. Note: Once we support ptrace with hw-debug register access, make sure BP_CPU break/watchpoints are handled correctly on clone. */ -- 2.34.1
[PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
From 4601a624f40b2c89e7df2dec1adffb4f4308ba2d Mon Sep 17 00:00:00 2001 From: fanwenjie Date: Sun, 1 Jan 2023 23:13:34 +0800 Subject: [PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1405 Signed-off-by: fanwenjie --- linux-user/main.c | 13 + 1 file changed, 13 insertions(+) diff --git a/linux-user/main.c b/linux-user/main.c index a17fed045b..5d673c95b3 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -171,6 +171,12 @@ void fork_end(int child) __thread CPUState *thread_cpu; +#if defined(TARGET_I386) || defined(TARGET_X86_64) +#include +__thread alignas(TARGET_PAGE_SIZE) static uint64_t gdt_base[TARGET_GDT_ENTRIES]; +__thread alignas(TARGET_PAGE_SIZE) static uint64_t idt_base[TARGET_PAGE_SIZE / sizeof(uint64_t)]; +#endif + bool qemu_cpu_is_self(CPUState *cpu) { return thread_cpu == cpu; @@ -235,6 +241,13 @@ CPUArchState *cpu_copy(CPUArchState *env) new_cpu->tcg_cflags = cpu->tcg_cflags; memcpy(new_env, env, sizeof(CPUArchState)); +#if defined(TARGET_I386) || defined(TARGET_X86_64) +memcpy(idt_base, (void*)new_env->idt.base, sizeof(uint64_t) * (new_env->idt.limit + 1)); +memcpy(gdt_base, (void*)new_env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES); +new_env->idt.base = (target_ulong)idt_base; +new_env->gdt.base = (target_ulong)gdt_base; +#endif + /* Clone all break/watchpoints. Note: Once we support ptrace with hw-debug register access, make sure BP_CPU break/watchpoints are handled correctly on clone. */ -- 2.34.1