Re: [PATCH] target/riscv: replace TARGET_LONG_BITS in gdbstub

2022-04-13 Thread Frédéric Pétrot




Le 09/04/2022 à 17:39, Richard Henderson a écrit :

On 4/9/22 02:46, Frédéric Pétrot wrote:

Now that we have misa xlen, use that in riscv gdbstub.c instead of the
TARGET_LONG_BITS define, and use riscv_cpu_mxl_bits to provide the number of
bits in a consistent way.

Signed-off-by: Frédéric Pétrot 
---
  target/riscv/gdbstub.c | 7 ---
  1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c
index 9ed049c29e..1602f76d2b 100644
--- a/target/riscv/gdbstub.c
+++ b/target/riscv/gdbstub.c
@@ -305,7 +305,7 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int 
base_reg)

  CPURISCVState *env = >env;
  GString *s = g_string_new(NULL);
  riscv_csr_predicate_fn predicate;
-    int bitsize = 16 << env->misa_mxl_max;
+    int bitsize = riscv_cpu_mxl_bits(env);


This isn't correct, changing from using max to current mxl.

You might think this is ok, because this will run up in startup, but it really 
runs whenever gdb attaches to the stub.  Which could be anytime.


  I guess it should then be gdb responsibility to check mxl/sxl/uxl and act
  accordingly.
  I'll introduce a new macro then.
  Thanks,
  Frédéric




r~


--
+---+
| Frédéric Pétrot, Pr. Grenoble INP-Ensimag/TIMA,   Ensimag deputy director |
| Mob/Pho: +33 6 74 57 99 65/+33 4 76 57 48 70  Ad augusta  per angusta |
| http://tima.univ-grenoble-alpes.fr frederic.pet...@univ-grenoble-alpes.fr |
+---+



Re: [PATCH] target/riscv: replace TARGET_LONG_BITS in gdbstub

2022-04-09 Thread Richard Henderson

On 4/9/22 02:46, Frédéric Pétrot wrote:

Now that we have misa xlen, use that in riscv gdbstub.c instead of the
TARGET_LONG_BITS define, and use riscv_cpu_mxl_bits to provide the number of
bits in a consistent way.

Signed-off-by: Frédéric Pétrot 
---
  target/riscv/gdbstub.c | 7 ---
  1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c
index 9ed049c29e..1602f76d2b 100644
--- a/target/riscv/gdbstub.c
+++ b/target/riscv/gdbstub.c
@@ -305,7 +305,7 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int 
base_reg)
  CPURISCVState *env = >env;
  GString *s = g_string_new(NULL);
  riscv_csr_predicate_fn predicate;
-int bitsize = 16 << env->misa_mxl_max;
+int bitsize = riscv_cpu_mxl_bits(env);


This isn't correct, changing from using max to current mxl.

You might think this is ok, because this will run up in startup, but it really runs 
whenever gdb attaches to the stub.  Which could be anytime.



r~



[PATCH] target/riscv: replace TARGET_LONG_BITS in gdbstub

2022-04-09 Thread Frédéric Pétrot
Now that we have misa xlen, use that in riscv gdbstub.c instead of the
TARGET_LONG_BITS define, and use riscv_cpu_mxl_bits to provide the number of
bits in a consistent way.

Signed-off-by: Frédéric Pétrot 
---
 target/riscv/gdbstub.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c
index 9ed049c29e..1602f76d2b 100644
--- a/target/riscv/gdbstub.c
+++ b/target/riscv/gdbstub.c
@@ -305,7 +305,7 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int 
base_reg)
 CPURISCVState *env = >env;
 GString *s = g_string_new(NULL);
 riscv_csr_predicate_fn predicate;
-int bitsize = 16 << env->misa_mxl_max;
+int bitsize = riscv_cpu_mxl_bits(env);
 int i;
 
 /* Until gdb knows about 128-bit registers */
@@ -385,10 +385,11 @@ static int ricsv_gen_dynamic_vector_xml(CPUState *cs, int 
base_reg)
 
 for (i = 0; i < 7; i++) {
 g_string_append_printf(s,
-   "",
-   vector_csrs[i], TARGET_LONG_BITS, base_reg++);
+   vector_csrs[i], riscv_cpu_mxl_bits(>env),
+   base_reg++);
 num_regs++;
 }
 
-- 
2.35.1