Re: [PATCH-for-9.1 18/21] target/xtensa: Extract MMU API to new mmu.c/mmu.h files

2024-03-23 Thread Max Filippov 
On Thu, Mar 21, 2024 at 8:50 AM Philippe Mathieu-Daudé
 wrote:
>
> Extract the MMU API and expose it via "mmu.h" so we can
> reuse the methods in target/xtensa/ files.

The MMU/MPU are replaceable configuration blocks in the xtensa
architecture, their internals don't have architecture-wide significance
and I believe their exposure should be kept to a minimum.
I have a half-done xtensa MMU rework which I'd like to complete,
it only exposes the interface for address translation, opcode translation
and dumping.

> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  target/xtensa/cpu.h|  32 +-
>  target/xtensa/mmu.h|  95 
>  target/xtensa/mmu.c| 889 
>  target/xtensa/mmu_helper.c | 892 +
>  target/xtensa/meson.build  |   1 +
>  5 files changed, 991 insertions(+), 918 deletions(-)
>  create mode 100644 target/xtensa/mmu.h
>  create mode 100644 target/xtensa/mmu.c

-- 
Thanks.
-- Max

[PATCH-for-9.1 18/21] target/xtensa: Extract MMU API to new mmu.c/mmu.h files

2024-03-21 Thread Philippe Mathieu-Daudé 
Extract the MMU API and expose it via "mmu.h" so we can
reuse the methods in target/xtensa/ files.

Signed-off-by: Philippe Mathieu-Daudé 
---
 target/xtensa/cpu.h|  32 +-
 target/xtensa/mmu.h|  95 
 target/xtensa/mmu.c| 889 
 target/xtensa/mmu_helper.c | 892 +
 target/xtensa/meson.build  |   1 +
 5 files changed, 991 insertions(+), 918 deletions(-)
 create mode 100644 target/xtensa/mmu.h
 create mode 100644 target/xtensa/mmu.c

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index b2cfc78e9d..b67ee987f3 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -34,6 +34,10 @@
 #include "hw/clock.h"
 #include "xtensa-isa.h"
 
+typedef struct CPUArchState CPUXtensaState;
+
+#include "mmu.h"
+
 /* Xtensa processors have a weak memory model */
 #define TCG_GUEST_DEFAULT_MO  (0)
 
@@ -309,28 +313,6 @@ typedef enum {
 INTTYPE_MAX
 } interrupt_type;
 
-typedef struct CPUArchState CPUXtensaState;
-
-typedef struct xtensa_tlb_entry {
-uint32_t vaddr;
-uint32_t paddr;
-uint8_t asid;
-uint8_t attr;
-bool variable;
-} xtensa_tlb_entry;
-
-typedef struct xtensa_tlb {
-unsigned nways;
-const unsigned way_size[10];
-bool varway56;
-unsigned nrefillentries;
-} xtensa_tlb;
-
-typedef struct xtensa_mpu_entry {
-uint32_t vaddr;
-uint32_t attr;
-} xtensa_mpu_entry;
-
 typedef struct XtensaGdbReg {
 int targno;
 unsigned flags;
@@ -689,12 +671,6 @@ static inline int xtensa_get_cring(const CPUXtensaState 
*env)
 }
 
 #ifndef CONFIG_USER_ONLY
-int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
-uint32_t vaddr, int is_write, int mmu_idx,
-uint32_t *paddr, uint32_t *page_size, unsigned *access);
-void xtensa_reset_mmu(CPUXtensaState *env);
-void xtensa_dump_mmu(CPUXtensaState *env);
-
 static inline MemoryRegion *xtensa_get_er_region(CPUXtensaState *env)
 {
 return env->system_er;
diff --git a/target/xtensa/mmu.h b/target/xtensa/mmu.h
new file mode 100644
index 00..3e1d2c03ea
--- /dev/null
+++ b/target/xtensa/mmu.h
@@ -0,0 +1,95 @@
+/*
+ * Xtensa MMU/MPU helpers
+ *
+ * SPDX-FileCopyrightText: 2011 - 2019, Max Filippov, Open Source and Linux 
Lab.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef TARGET_XTENSA_MMU_H
+#define TARGET_XTENSA_MMU_H
+
+#include "cpu.h"
+
+typedef struct xtensa_tlb_entry {
+uint32_t vaddr;
+uint32_t paddr;
+uint8_t asid;
+uint8_t attr;
+bool variable;
+} xtensa_tlb_entry;
+
+typedef struct xtensa_tlb {
+unsigned nways;
+const unsigned way_size[10];
+bool varway56;
+unsigned nrefillentries;
+} xtensa_tlb;
+
+typedef struct xtensa_mpu_entry {
+uint32_t vaddr;
+uint32_t attr;
+} xtensa_mpu_entry;
+
+#define XTENSA_MPU_SEGMENT_MASK 0x001f
+#define XTENSA_MPU_ACC_RIGHTS_MASK 0x0f00
+#define XTENSA_MPU_ACC_RIGHTS_SHIFT 8
+#define XTENSA_MPU_MEM_TYPE_MASK 0x001ff000
+#define XTENSA_MPU_MEM_TYPE_SHIFT 12
+#define XTENSA_MPU_ATTR_MASK 0x001fff00
+
+#define XTENSA_MPU_PROBE_B 0x4000
+#define XTENSA_MPU_PROBE_V 0x8000
+
+#define XTENSA_MPU_SYSTEM_TYPE_DEVICE 0x0001
+#define XTENSA_MPU_SYSTEM_TYPE_NC 0x0002
+#define XTENSA_MPU_SYSTEM_TYPE_C  0x0003
+#define XTENSA_MPU_SYSTEM_TYPE_MASK   0x0003
+
+#define XTENSA_MPU_TYPE_SYS_C 0x0010
+#define XTENSA_MPU_TYPE_SYS_W 0x0020
+#define XTENSA_MPU_TYPE_SYS_R 0x0040
+#define XTENSA_MPU_TYPE_CPU_C 0x0100
+#define XTENSA_MPU_TYPE_CPU_W 0x0200
+#define XTENSA_MPU_TYPE_CPU_R 0x0400
+#define XTENSA_MPU_TYPE_CPU_CACHE 0x0800
+#define XTENSA_MPU_TYPE_B 0x1000
+#define XTENSA_MPU_TYPE_INT   0x2000
+
+unsigned mmu_attr_to_access(uint32_t attr);
+unsigned mpu_attr_to_access(uint32_t attr, unsigned ring);
+unsigned mpu_attr_to_cpu_cache(uint32_t attr);
+unsigned mpu_attr_to_type(uint32_t attr);
+
+unsigned region_attr_to_access(uint32_t attr);
+unsigned cacheattr_attr_to_access(uint32_t attr);
+
+xtensa_tlb_entry *xtensa_get_tlb_entry(CPUXtensaState *env,
+   uint32_t v, bool dtlb, uint32_t *pwi);
+xtensa_tlb_entry *xtensa_tlb_get_entry(CPUXtensaState *env, bool dtlb,
+   unsigned wi, unsigned ei);
+void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
+  unsigned wi, unsigned ei,
+  uint32_t vpn, uint32_t pte);
+
+uint32_t xtensa_tlb_get_addr_mask(const CPUXtensaState *env, bool dtlb,
+  uint32_t way);
+uint32_t xtensa_get_vpn_mask(const CPUXtensaState *env, bool dtlb,
+ uint32_t way);
+
+bool xtensa_split_tlb_entry_spec(CPUXtensaState *env, uint32_t v, bool dtlb,
+ uint32_t *vpn, uint32_t *wi, uint32_t *ei);
+
+int xtensa_tlb_lookup(const CPUXtensaState *env, uint32_t addr, bool dtlb,
+  uint32_t *pwi, uint32_t *pei, uint8_t