Re: [PATCH 01/24] hw/arm/mps2-tz: Make SYSCLK frequency board-specific

2021-02-05 Thread Philippe Mathieu-Daudé
On 2/5/21 5:59 PM, Peter Maydell wrote:
> The AN524 has a different SYSCLK frequency from the AN505 and AN521;
> make the SYSCLK frequency a field in the MPS2TZMachineClass rather
> than a compile-time constant so we can support the AN524.
> 
> Signed-off-by: Peter Maydell 
> ---
>  hw/arm/mps2-tz.c | 10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
> index 90caa914934..82ce6262817 100644
> --- a/hw/arm/mps2-tz.c
> +++ b/hw/arm/mps2-tz.c
> @@ -76,6 +76,7 @@ struct MPS2TZMachineClass {
>  MachineClass parent;
>  MPS2TZFPGAType fpga_type;
>  uint32_t scc_id;
> +uint32_t sysclk_frq; /* Main SYSCLK frequency in Hz */

This is what I meant in my Stellaris read-only dc[] registers
comment here:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg776770.html

Reviewed-by: Philippe Mathieu-Daudé 



[PATCH 01/24] hw/arm/mps2-tz: Make SYSCLK frequency board-specific

2021-02-05 Thread Peter Maydell
The AN524 has a different SYSCLK frequency from the AN505 and AN521;
make the SYSCLK frequency a field in the MPS2TZMachineClass rather
than a compile-time constant so we can support the AN524.

Signed-off-by: Peter Maydell 
---
 hw/arm/mps2-tz.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 90caa914934..82ce6262817 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -76,6 +76,7 @@ struct MPS2TZMachineClass {
 MachineClass parent;
 MPS2TZFPGAType fpga_type;
 uint32_t scc_id;
+uint32_t sysclk_frq; /* Main SYSCLK frequency in Hz */
 const char *armsse_type;
 };
 
@@ -111,8 +112,6 @@ struct MPS2TZMachineState {
 
 OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE)
 
-/* Main SYSCLK frequency in Hz */
-#define SYSCLK_FRQ 2000
 /* Slow 32Khz S32KCLK frequency in Hz */
 #define S32KCLK_FRQ (32 * 1000)
 
@@ -186,6 +185,7 @@ static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms,
 static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
const char *name, hwaddr size)
 {
+MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
 CMSDKAPBUART *uart = opaque;
 int i = uart - >uart[0];
 int rxirqno = i * 2;
@@ -196,7 +196,7 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, 
void *opaque,
 
 object_initialize_child(OBJECT(mms), name, uart, TYPE_CMSDK_APB_UART);
 qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i));
-qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", SYSCLK_FRQ);
+qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", mmc->sysclk_frq);
 sysbus_realize(SYS_BUS_DEVICE(uart), _fatal);
 s = SYS_BUS_DEVICE(uart);
 sysbus_connect_irq(s, 0, get_sse_irq_in(mms, txirqno));
@@ -403,7 +403,7 @@ static void mps2tz_common_init(MachineState *machine)
 
 /* These clocks don't need migration because they are fixed-frequency */
 mms->sysclk = clock_new(OBJECT(machine), "SYSCLK");
-clock_set_hz(mms->sysclk, SYSCLK_FRQ);
+clock_set_hz(mms->sysclk, mmc->sysclk_frq);
 mms->s32kclk = clock_new(OBJECT(machine), "S32KCLK");
 clock_set_hz(mms->s32kclk, S32KCLK_FRQ);
 
@@ -670,6 +670,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void 
*data)
 mmc->fpga_type = FPGA_AN505;
 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
 mmc->scc_id = 0x41045050;
+mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
 mmc->armsse_type = TYPE_IOTKIT;
 }
 
@@ -685,6 +686,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void 
*data)
 mmc->fpga_type = FPGA_AN521;
 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
 mmc->scc_id = 0x41045210;
+mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
 mmc->armsse_type = TYPE_SSE200;
 }
 
-- 
2.20.1