subject:"\[PATCH 09\/41\] sifive_e\: Rename memmap enum constants"

Re: [PATCH 09/41] sifive_e: Rename memmap enum constants

2020-08-14 Thread Alistair Francis

On Thu, Aug 13, 2020 at 3:28 PM Eduardo Habkost  wrote:
>
> Some of the enum constant names conflict with the QOM type check
> macros.  This needs to be addressed to allow us to transform the
> QOM type check macros into functions generated by
> OBJECT_DECLARE_TYPE().
>
> Rename all the constants to SIFIVE_E_DEV_*, to avoid conflicts.
>
> Signed-off-by: Eduardo Habkost 

Reviewed-by: Alistair Francis 

Alistair

> ---
>  include/hw/riscv/sifive_e.h | 38 -
>  hw/riscv/sifive_e.c | 82 ++---
>  2 files changed, 60 insertions(+), 60 deletions(-)
>
> diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> index 637414130b..7c2eb70189 100644
> --- a/include/hw/riscv/sifive_e.h
> +++ b/include/hw/riscv/sifive_e.h
> @@ -53,25 +53,25 @@ typedef struct SiFiveEState {
>  OBJECT_CHECK(SiFiveEState, (obj), TYPE_RISCV_E_MACHINE)
>
>  enum {
> -SIFIVE_E_DEBUG,
> -SIFIVE_E_MROM,
> -SIFIVE_E_OTP,
> -SIFIVE_E_CLINT,
> -SIFIVE_E_PLIC,
> -SIFIVE_E_AON,
> -SIFIVE_E_PRCI,
> -SIFIVE_E_OTP_CTRL,
> -SIFIVE_E_GPIO0,
> -SIFIVE_E_UART0,
> -SIFIVE_E_QSPI0,
> -SIFIVE_E_PWM0,
> -SIFIVE_E_UART1,
> -SIFIVE_E_QSPI1,
> -SIFIVE_E_PWM1,
> -SIFIVE_E_QSPI2,
> -SIFIVE_E_PWM2,
> -SIFIVE_E_XIP,
> -SIFIVE_E_DTIM
> +SIFIVE_E_DEV_DEBUG,
> +SIFIVE_E_DEV_MROM,
> +SIFIVE_E_DEV_OTP,
> +SIFIVE_E_DEV_CLINT,
> +SIFIVE_E_DEV_PLIC,
> +SIFIVE_E_DEV_AON,
> +SIFIVE_E_DEV_PRCI,
> +SIFIVE_E_DEV_OTP_CTRL,
> +SIFIVE_E_DEV_GPIO0,
> +SIFIVE_E_DEV_UART0,
> +SIFIVE_E_DEV_QSPI0,
> +SIFIVE_E_DEV_PWM0,
> +SIFIVE_E_DEV_UART1,
> +SIFIVE_E_DEV_QSPI1,
> +SIFIVE_E_DEV_PWM1,
> +SIFIVE_E_DEV_QSPI2,
> +SIFIVE_E_DEV_PWM2,
> +SIFIVE_E_DEV_XIP,
> +SIFIVE_E_DEV_DTIM
>  };
>
>  enum {
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index c8b060486a..88b4524117 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -54,25 +54,25 @@ static const struct MemmapEntry {
>  hwaddr base;
>  hwaddr size;
>  } sifive_e_memmap[] = {
> -[SIFIVE_E_DEBUG] ={0x0, 0x1000 },
> -[SIFIVE_E_MROM] = { 0x1000, 0x2000 },
> -[SIFIVE_E_OTP] =  {0x2, 0x2000 },
> -[SIFIVE_E_CLINT] ={  0x200,0x1 },
> -[SIFIVE_E_PLIC] = {  0xc00,  0x400 },
> -[SIFIVE_E_AON] =  { 0x1000, 0x8000 },
> -[SIFIVE_E_PRCI] = { 0x10008000, 0x8000 },
> -[SIFIVE_E_OTP_CTRL] = { 0x1001, 0x1000 },
> -[SIFIVE_E_GPIO0] ={ 0x10012000, 0x1000 },
> -[SIFIVE_E_UART0] ={ 0x10013000, 0x1000 },
> -[SIFIVE_E_QSPI0] ={ 0x10014000, 0x1000 },
> -[SIFIVE_E_PWM0] = { 0x10015000, 0x1000 },
> -[SIFIVE_E_UART1] ={ 0x10023000, 0x1000 },
> -[SIFIVE_E_QSPI1] ={ 0x10024000, 0x1000 },
> -[SIFIVE_E_PWM1] = { 0x10025000, 0x1000 },
> -[SIFIVE_E_QSPI2] ={ 0x10034000, 0x1000 },
> -[SIFIVE_E_PWM2] = { 0x10035000, 0x1000 },
> -[SIFIVE_E_XIP] =  { 0x2000, 0x2000 },
> -[SIFIVE_E_DTIM] = { 0x8000, 0x4000 }
> +[SIFIVE_E_DEV_DEBUG] ={0x0, 0x1000 },
> +[SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
> +[SIFIVE_E_DEV_OTP] =  {0x2, 0x2000 },
> +[SIFIVE_E_DEV_CLINT] ={  0x200,0x1 },
> +[SIFIVE_E_DEV_PLIC] = {  0xc00,  0x400 },
> +[SIFIVE_E_DEV_AON] =  { 0x1000, 0x8000 },
> +[SIFIVE_E_DEV_PRCI] = { 0x10008000, 0x8000 },
> +[SIFIVE_E_DEV_OTP_CTRL] = { 0x1001, 0x1000 },
> +[SIFIVE_E_DEV_GPIO0] ={ 0x10012000, 0x1000 },
> +[SIFIVE_E_DEV_UART0] ={ 0x10013000, 0x1000 },
> +[SIFIVE_E_DEV_QSPI0] ={ 0x10014000, 0x1000 },
> +[SIFIVE_E_DEV_PWM0] = { 0x10015000, 0x1000 },
> +[SIFIVE_E_DEV_UART1] ={ 0x10023000, 0x1000 },
> +[SIFIVE_E_DEV_QSPI1] ={ 0x10024000, 0x1000 },
> +[SIFIVE_E_DEV_PWM1] = { 0x10025000, 0x1000 },
> +[SIFIVE_E_DEV_QSPI2] ={ 0x10034000, 0x1000 },
> +[SIFIVE_E_DEV_PWM2] = { 0x10035000, 0x1000 },
> +[SIFIVE_E_DEV_XIP] =  { 0x2000, 0x2000 },
> +[SIFIVE_E_DEV_DTIM] = { 0x8000, 0x4000 }
>  };
>
>  static void sifive_e_machine_init(MachineState *machine)
> @@ -90,9 +90,9 @@ static void sifive_e_machine_init(MachineState *machine)
>
>  /* Data Tightly Integrated Memory */
>  memory_region_init_ram(main_mem, NULL, "riscv.sifive.e.ram",
> -memmap[SIFIVE_E_DTIM].size, _fatal);
> +memmap[SIFIVE_E_DEV_DTIM].size, _fatal);
>  memory_region_add_subregion(sys_mem,
> -memmap[SIFIVE_E_DTIM].base, main_mem);
> +memmap[SIFIVE_E_DEV_DTIM].base, main_mem);
>
>  /* Mask ROM reset vector */
>  uint32_t reset_vec[4];
> @@ -111,7 +111,7 @@ static void

[PATCH 09/41] sifive_e: Rename memmap enum constants

2020-08-13 Thread Eduardo Habkost

Some of the enum constant names conflict with the QOM type check
macros.  This needs to be addressed to allow us to transform the
QOM type check macros into functions generated by
OBJECT_DECLARE_TYPE().

Rename all the constants to SIFIVE_E_DEV_*, to avoid conflicts.

Signed-off-by: Eduardo Habkost 
---
 include/hw/riscv/sifive_e.h | 38 -
 hw/riscv/sifive_e.c | 82 ++---
 2 files changed, 60 insertions(+), 60 deletions(-)

diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 637414130b..7c2eb70189 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -53,25 +53,25 @@ typedef struct SiFiveEState {
 OBJECT_CHECK(SiFiveEState, (obj), TYPE_RISCV_E_MACHINE)
 
 enum {
-SIFIVE_E_DEBUG,
-SIFIVE_E_MROM,
-SIFIVE_E_OTP,
-SIFIVE_E_CLINT,
-SIFIVE_E_PLIC,
-SIFIVE_E_AON,
-SIFIVE_E_PRCI,
-SIFIVE_E_OTP_CTRL,
-SIFIVE_E_GPIO0,
-SIFIVE_E_UART0,
-SIFIVE_E_QSPI0,
-SIFIVE_E_PWM0,
-SIFIVE_E_UART1,
-SIFIVE_E_QSPI1,
-SIFIVE_E_PWM1,
-SIFIVE_E_QSPI2,
-SIFIVE_E_PWM2,
-SIFIVE_E_XIP,
-SIFIVE_E_DTIM
+SIFIVE_E_DEV_DEBUG,
+SIFIVE_E_DEV_MROM,
+SIFIVE_E_DEV_OTP,
+SIFIVE_E_DEV_CLINT,
+SIFIVE_E_DEV_PLIC,
+SIFIVE_E_DEV_AON,
+SIFIVE_E_DEV_PRCI,
+SIFIVE_E_DEV_OTP_CTRL,
+SIFIVE_E_DEV_GPIO0,
+SIFIVE_E_DEV_UART0,
+SIFIVE_E_DEV_QSPI0,
+SIFIVE_E_DEV_PWM0,
+SIFIVE_E_DEV_UART1,
+SIFIVE_E_DEV_QSPI1,
+SIFIVE_E_DEV_PWM1,
+SIFIVE_E_DEV_QSPI2,
+SIFIVE_E_DEV_PWM2,
+SIFIVE_E_DEV_XIP,
+SIFIVE_E_DEV_DTIM
 };
 
 enum {
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index c8b060486a..88b4524117 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -54,25 +54,25 @@ static const struct MemmapEntry {
 hwaddr base;
 hwaddr size;
 } sifive_e_memmap[] = {
-[SIFIVE_E_DEBUG] ={0x0, 0x1000 },
-[SIFIVE_E_MROM] = { 0x1000, 0x2000 },
-[SIFIVE_E_OTP] =  {0x2, 0x2000 },
-[SIFIVE_E_CLINT] ={  0x200,0x1 },
-[SIFIVE_E_PLIC] = {  0xc00,  0x400 },
-[SIFIVE_E_AON] =  { 0x1000, 0x8000 },
-[SIFIVE_E_PRCI] = { 0x10008000, 0x8000 },
-[SIFIVE_E_OTP_CTRL] = { 0x1001, 0x1000 },
-[SIFIVE_E_GPIO0] ={ 0x10012000, 0x1000 },
-[SIFIVE_E_UART0] ={ 0x10013000, 0x1000 },
-[SIFIVE_E_QSPI0] ={ 0x10014000, 0x1000 },
-[SIFIVE_E_PWM0] = { 0x10015000, 0x1000 },
-[SIFIVE_E_UART1] ={ 0x10023000, 0x1000 },
-[SIFIVE_E_QSPI1] ={ 0x10024000, 0x1000 },
-[SIFIVE_E_PWM1] = { 0x10025000, 0x1000 },
-[SIFIVE_E_QSPI2] ={ 0x10034000, 0x1000 },
-[SIFIVE_E_PWM2] = { 0x10035000, 0x1000 },
-[SIFIVE_E_XIP] =  { 0x2000, 0x2000 },
-[SIFIVE_E_DTIM] = { 0x8000, 0x4000 }
+[SIFIVE_E_DEV_DEBUG] ={0x0, 0x1000 },
+[SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
+[SIFIVE_E_DEV_OTP] =  {0x2, 0x2000 },
+[SIFIVE_E_DEV_CLINT] ={  0x200,0x1 },
+[SIFIVE_E_DEV_PLIC] = {  0xc00,  0x400 },
+[SIFIVE_E_DEV_AON] =  { 0x1000, 0x8000 },
+[SIFIVE_E_DEV_PRCI] = { 0x10008000, 0x8000 },
+[SIFIVE_E_DEV_OTP_CTRL] = { 0x1001, 0x1000 },
+[SIFIVE_E_DEV_GPIO0] ={ 0x10012000, 0x1000 },
+[SIFIVE_E_DEV_UART0] ={ 0x10013000, 0x1000 },
+[SIFIVE_E_DEV_QSPI0] ={ 0x10014000, 0x1000 },
+[SIFIVE_E_DEV_PWM0] = { 0x10015000, 0x1000 },
+[SIFIVE_E_DEV_UART1] ={ 0x10023000, 0x1000 },
+[SIFIVE_E_DEV_QSPI1] ={ 0x10024000, 0x1000 },
+[SIFIVE_E_DEV_PWM1] = { 0x10025000, 0x1000 },
+[SIFIVE_E_DEV_QSPI2] ={ 0x10034000, 0x1000 },
+[SIFIVE_E_DEV_PWM2] = { 0x10035000, 0x1000 },
+[SIFIVE_E_DEV_XIP] =  { 0x2000, 0x2000 },
+[SIFIVE_E_DEV_DTIM] = { 0x8000, 0x4000 }
 };
 
 static void sifive_e_machine_init(MachineState *machine)
@@ -90,9 +90,9 @@ static void sifive_e_machine_init(MachineState *machine)
 
 /* Data Tightly Integrated Memory */
 memory_region_init_ram(main_mem, NULL, "riscv.sifive.e.ram",
-memmap[SIFIVE_E_DTIM].size, _fatal);
+memmap[SIFIVE_E_DEV_DTIM].size, _fatal);
 memory_region_add_subregion(sys_mem,
-memmap[SIFIVE_E_DTIM].base, main_mem);
+memmap[SIFIVE_E_DEV_DTIM].base, main_mem);
 
 /* Mask ROM reset vector */
 uint32_t reset_vec[4];
@@ -111,7 +111,7 @@ static void sifive_e_machine_init(MachineState *machine)
 reset_vec[i] = cpu_to_le32(reset_vec[i]);
 }
 rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
-  memmap[SIFIVE_E_MROM].base, _space_memory);
+  memmap[SIFIVE_E_DEV_MROM].base, 
_space_memory);
 
 if

Re: [PATCH 09/41] sifive_e: Rename memmap enum constants

[PATCH 09/41] sifive_e: Rename memmap enum constants

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