Re: [PATCH 1/2] target/m68k: Clear mach in m68k_cpu_disas_set_info
Le 30/04/2022 à 19:02, Richard Henderson a écrit :
Zero selects all cpu features in disas/m68k.c,
which is really what we want -- not limited to 68040.
Signed-off-by: Richard Henderson
---
target/m68k/cpu.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index c7aeb7da9c..5671067923 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -75,12 +75,8 @@ static void m68k_cpu_reset(DeviceState *dev)
static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
-M68kCPU *cpu = M68K_CPU(s);
-CPUM68KState *env = >env;
info->print_insn = print_insn_m68k;
-if (m68k_feature(env, M68K_FEATURE_M68000)) {
-info->mach = bfd_mach_m68040;
-}
+info->mach = 0;
}
/* CPU models */
Reviewed-by: Laurent Vivier
Re: [PATCH 1/2] target/m68k: Clear mach in m68k_cpu_disas_set_info
On 5/17/22 07:06, Laurent Vivier wrote:
Le 30/04/2022 à 19:02, Richard Henderson a écrit :
Zero selects all cpu features in disas/m68k.c,
which is really what we want -- not limited to 68040.
But what happens when an instruction has to be decoded differently between 680x0 and
coldfire?
for instance in disas/m68k.c, we have:
{"addil", 6, one(0003200), one(0177700), "#l$s", m68000up },
{"addil", 6, one(0003200), one(0177700), "#lDs", mcfisa_a },
{"addl", 6, one(0003200), one(0177700), "#l$s", m68000up },
{"addl", 6, one(0003200), one(0177700), "#lDs", mcfisa_a },
{"andil", 6, one(0001200), one(0177700), "#l$s", m68000up },
{"andil", 6, one(0001200), one(0177700), "#lDs", mcfisa_a },
{"andl", 6, one(0001200), one(0177700), "#l$s", m68000up },
{"andl", 6, one(0001200), one(0177700), "#lDs", mcfisa_a },
{"bchg", 4, one(0004100), one(0177700), "#b$s", m68000up },
{"bchg", 4, one(0004100), one(0177700), "#bqs", mcfisa_a },
{"bclr", 4, one(0004200), one(0177700), "#b$s", m68000up },
{"bclr", 4, one(0004200), one(0177700), "#bqs", mcfisa_a },
{"bset", 2, one(700), one(0170700), "Dd$s", m68000up | mcfisa_a },
{"bset", 2, one(700), one(0170700), "Ddvs", mcfisa_a },
{"bset", 4, one(0004300), one(0177700), "#b$s", m68000up },
{"bset", 4, one(0004300), one(0177700), "#bqs", mcfisa_a },
{"btst", 4, one(0004000), one(0177700), "#b@s", m68000up },
{"btst", 4, one(0004000), one(0177700), "#bqs", mcfisa_a },
{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up },
{"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b },
{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up },
{"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b },
{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up },
{"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a },
They're all compatible encodings, it's just that the CF ones are more restricted. When
debugging a SIGILL on CF, it would be nicer to see
addla0@, d0
than
.byte xx, yy
in the -d in_asm dump.
r~
Re: [PATCH 1/2] target/m68k: Clear mach in m68k_cpu_disas_set_info
Le 30/04/2022 à 19:02, Richard Henderson a écrit :
Zero selects all cpu features in disas/m68k.c,
which is really what we want -- not limited to 68040.
But what happens when an instruction has to be decoded differently between
680x0 and coldfire?
for instance in disas/m68k.c, we have:
{"addil", 6,one(0003200), one(0177700), "#l$s", m68000up },
{"addil", 6,one(0003200), one(0177700), "#lDs", mcfisa_a },
{"addl", 6, one(0003200), one(0177700), "#l$s", m68000up },
{"addl", 6, one(0003200), one(0177700), "#lDs", mcfisa_a },
{"andil", 6,one(0001200), one(0177700), "#l$s", m68000up },
{"andil", 6,one(0001200), one(0177700), "#lDs", mcfisa_a },
{"andl", 6, one(0001200), one(0177700), "#l$s", m68000up },
{"andl", 6, one(0001200), one(0177700), "#lDs", mcfisa_a },
{"bchg", 4, one(0004100), one(0177700), "#b$s", m68000up },
{"bchg", 4, one(0004100), one(0177700), "#bqs", mcfisa_a },
{"bclr", 4, one(0004200), one(0177700), "#b$s", m68000up },
{"bclr", 4, one(0004200), one(0177700), "#bqs", mcfisa_a },
{"bset", 2, one(700), one(0170700), "Dd$s", m68000up | mcfisa_a },
{"bset", 2, one(700), one(0170700), "Ddvs", mcfisa_a },
{"bset", 4, one(0004300), one(0177700), "#b$s", m68000up },
{"bset", 4, one(0004300), one(0177700), "#bqs", mcfisa_a },
{"btst", 4, one(0004000), one(0177700), "#b@s", m68000up },
{"btst", 4, one(0004000), one(0177700), "#bqs", mcfisa_a },
{"cmpib", 4,one(0006000), one(0177700), "#b@s", m68000up },
{"cmpib", 4,one(0006000), one(0177700), "#bDs", mcfisa_b },
{"cmpiw", 4,one(0006100), one(0177700), "#w@s", m68000up },
{"cmpiw", 4,one(0006100), one(0177700), "#wDs", mcfisa_b },
{"cmpil", 6,one(0006200), one(0177700), "#l@s", m68000up },
{"cmpil", 6,one(0006200), one(0177700), "#lDs", mcfisa_a },
...
Thanks,
Laurent
Signed-off-by: Richard Henderson
---
target/m68k/cpu.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index c7aeb7da9c..5671067923 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -75,12 +75,8 @@ static void m68k_cpu_reset(DeviceState *dev)
static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
-M68kCPU *cpu = M68K_CPU(s);
-CPUM68KState *env = >env;
info->print_insn = print_insn_m68k;
-if (m68k_feature(env, M68K_FEATURE_M68000)) {
-info->mach = bfd_mach_m68040;
-}
+info->mach = 0;
}
/* CPU models */
[PATCH 1/2] target/m68k: Clear mach in m68k_cpu_disas_set_info
Zero selects all cpu features in disas/m68k.c,
which is really what we want -- not limited to 68040.
Signed-off-by: Richard Henderson
---
target/m68k/cpu.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index c7aeb7da9c..5671067923 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -75,12 +75,8 @@ static void m68k_cpu_reset(DeviceState *dev)
static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
-M68kCPU *cpu = M68K_CPU(s);
-CPUM68KState *env = >env;
info->print_insn = print_insn_m68k;
-if (m68k_feature(env, M68K_FEATURE_M68000)) {
-info->mach = bfd_mach_m68040;
-}
+info->mach = 0;
}
/* CPU models */
--
2.34.1
