Re: [PATCH 12/33] hw/cpu/arm: Create MPCore container in QOM parent

[Cédric Le Goater]

On 12/12/23 17:29, Philippe Mathieu-Daudé wrote:

Move the memory region container creation to the abstract QOM
parent. Children set the region size via the class 'container_size'
field.

Signed-off-by: Philippe Mathieu-Daudé 



Reviewed-by: Cédric Le Goater 

Thanks,

C.

[PATCH 12/33] hw/cpu/arm: Create MPCore container in QOM parent

[Philippe Mathieu-Daudé]

Move the memory region container creation to the abstract QOM
parent. Children set the region size via the class 'container_size'
field.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/cpu/cortex_mpcore.h | 10 --
 hw/cpu/a15mpcore.c | 17 -
 hw/cpu/a9mpcore.c  | 18 +-
 hw/cpu/cortex_mpcore.c | 14 ++
 4 files changed, 39 insertions(+), 20 deletions(-)

diff --git a/include/hw/cpu/cortex_mpcore.h b/include/hw/cpu/cortex_mpcore.h
index 4084c6003a..1d94c8769d 100644
--- a/include/hw/cpu/cortex_mpcore.h
+++ b/include/hw/cpu/cortex_mpcore.h
@@ -30,14 +30,22 @@
 #define TYPE_CORTEX_MPCORE_PRIV "cortex_mpcore_priv"
 OBJECT_DECLARE_TYPE(CortexMPPrivState, CortexMPPrivClass, CORTEX_MPCORE_PRIV)
 
+/**
+ * CortexMPPrivClass:
+ * @container_size - size of the device's MMIO region
+ */
 struct CortexMPPrivClass {
 SysBusDeviceClass parent_class;
 
 DeviceRealize parent_realize;
+
+uint64_t container_size;
 };
 
 struct CortexMPPrivState {
 SysBusDevice parent_obj;
+
+MemoryRegion container;
 };
 
 #define TYPE_A9MPCORE_PRIV "a9mpcore_priv"
@@ -47,7 +55,6 @@ struct A9MPPrivState {
 CortexMPPrivState parent_obj;
 
 uint32_t num_cpu;
-MemoryRegion container;
 uint32_t num_irq;
 
 A9SCUState scu;
@@ -65,7 +72,6 @@ struct A15MPPrivState {
 
 uint32_t num_cpu;
 uint32_t num_irq;
-MemoryRegion container;
 
 GICState gic;
 };
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index 5a57145179..128941eb50 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -36,12 +36,8 @@ static void a15mp_priv_set_irq(void *opaque, int irq, int 
level)
 
 static void a15mp_priv_initfn(Object *obj)
 {
-SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 A15MPPrivState *s = A15MPCORE_PRIV(obj);
 
-memory_region_init(>container, obj, "a15mp-priv-container", 0x8000);
-sysbus_init_mmio(sbd, >container);
-
 object_initialize_child(obj, "gic", >gic, gic_class_name());
 qdev_prop_set_uint32(DEVICE(>gic), "revision", 2);
 }
@@ -51,6 +47,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp)
 CortexMPPrivClass *cc = CORTEX_MPCORE_PRIV_GET_CLASS(dev);
 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 A15MPPrivState *s = A15MPCORE_PRIV(dev);
+CortexMPPrivState *c = CORTEX_MPCORE_PRIV(dev);
 DeviceState *gicdev;
 SysBusDevice *gicsbd;
 Error *local_err = NULL;
@@ -133,20 +130,20 @@ static void a15mp_priv_realize(DeviceState *dev, Error 
**errp)
  *  0x5600-0x57ff -- GIC virtual interface control for CPU 3
  *  0x6000-0x7fff -- GIC virtual CPU interface
  */
-memory_region_add_subregion(>container, 0x1000,
+memory_region_add_subregion(>container, 0x1000,
 sysbus_mmio_get_region(gicsbd, 0));
-memory_region_add_subregion(>container, 0x2000,
+memory_region_add_subregion(>container, 0x2000,
 sysbus_mmio_get_region(gicsbd, 1));
 if (has_el2) {
-memory_region_add_subregion(>container, 0x4000,
+memory_region_add_subregion(>container, 0x4000,
 sysbus_mmio_get_region(gicsbd, 2));
-memory_region_add_subregion(>container, 0x6000,
+memory_region_add_subregion(>container, 0x6000,
 sysbus_mmio_get_region(gicsbd, 3));
 for (i = 0; i < s->num_cpu; i++) {
 hwaddr base = 0x5000 + i * 0x200;
 MemoryRegion *mr = sysbus_mmio_get_region(gicsbd,
   4 + s->num_cpu + i);
-memory_region_add_subregion(>container, base, mr);
+memory_region_add_subregion(>container, base, mr);
 }
 }
 }
@@ -168,6 +165,8 @@ static void a15mp_priv_class_init(ObjectClass *klass, void 
*data)
 DeviceClass *dc = DEVICE_CLASS(klass);
 CortexMPPrivClass *cc = CORTEX_MPCORE_PRIV_CLASS(klass);
 
+cc->container_size = 0x8000;
+
 device_class_set_parent_realize(dc, a15mp_priv_realize,
 >parent_realize);
 device_class_set_props(dc, a15mp_priv_properties);
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index d59e49126b..08346b0049 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -30,9 +30,6 @@ static void a9mp_priv_initfn(Object *obj)
 {
 A9MPPrivState *s = A9MPCORE_PRIV(obj);
 
-memory_region_init(>container, obj, "a9mp-priv-container", 0x2000);
-sysbus_init_mmio(SYS_BUS_DEVICE(obj), >container);
-
 object_initialize_child(obj, "scu", >scu, TYPE_A9_SCU);
 
 object_initialize_child(obj, "gic", >gic, TYPE_ARM_GIC);
@@ -47,6 +44,7 @@ static void a9mp_priv_initfn(Object *obj)
 static void a9mp_priv_realize(DeviceState *dev, Error **errp)
 {
 CortexMPPrivClass *cc = CORTEX_MPCORE_PRIV_GET_CLASS(dev);
+CortexMPPrivState *c = CORTEX_MPCORE_PRIV(dev);
 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);