Re: [PATCH 29/36] target/arm: Convert Neon VPADD 3-reg-same insns to decodetree

2020-04-30 Thread Richard Henderson
On 4/30/20 11:09 AM, Peter Maydell wrote:
> Convert the Neon integer VPADD 3-reg-same insns to decodetree.  These
> are 'pairwise' operations.  (Note that VQRDMLAH, which shares the
> same primary opcode but has U=1, has already been converted.)
> 
> Signed-off-by: Peter Maydell 
> ---
>  target/arm/translate-neon.inc.c |  2 ++
>  target/arm/translate.c  | 19 +--
>  target/arm/neon-dp.decode   |  2 ++
>  3 files changed, 5 insertions(+), 18 deletions(-)

Reviewed-by: Richard Henderson 

r~



[PATCH 29/36] target/arm: Convert Neon VPADD 3-reg-same insns to decodetree

2020-04-30 Thread Peter Maydell
Convert the Neon integer VPADD 3-reg-same insns to decodetree.  These
are 'pairwise' operations.  (Note that VQRDMLAH, which shares the
same primary opcode but has U=1, has already been converted.)

Signed-off-by: Peter Maydell 
---
 target/arm/translate-neon.inc.c |  2 ++
 target/arm/translate.c  | 19 +--
 target/arm/neon-dp.decode   |  2 ++
 3 files changed, 5 insertions(+), 18 deletions(-)

diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.inc.c
index cd4c9dd6f28..31a8e4ef486 100644
--- a/target/arm/translate-neon.inc.c
+++ b/target/arm/translate-neon.inc.c
@@ -1270,8 +1270,10 @@ static bool do_3same_pair(DisasContext *s, arg_3same *a, 
NeonGenTwoOpFn *fn)
 #define gen_helper_neon_pmax_u32  tcg_gen_umax_i32
 #define gen_helper_neon_pmin_s32  tcg_gen_smin_i32
 #define gen_helper_neon_pmin_u32  tcg_gen_umin_i32
+#define gen_helper_neon_padd_u32  tcg_gen_add_i32
 
 DO_3SAME_PAIR(VPMAX_S, pmax_s)
 DO_3SAME_PAIR(VPMIN_S, pmin_s)
 DO_3SAME_PAIR(VPMAX_U, pmax_u)
 DO_3SAME_PAIR(VPMIN_U, pmin_u)
+DO_3SAME_PAIR(VPADD, padd_u)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4bbdddaa30c..f583cc900e1 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -4749,13 +4749,6 @@ static int disas_neon_data_insn(DisasContext *s, 
uint32_t insn)
 return 1;
 }
 switch (op) {
-case NEON_3R_VPADD_VQRDMLAH:
-if (!u) {
-break;  /* VPADD */
-}
-/* VQRDMLAH : handled by decodetree */
-return 1;
-
 case NEON_3R_VFM_VQRDMLSH:
 if (!u) {
 /* VFM, VFMS */
@@ -4790,6 +4783,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t 
insn)
 case NEON_3R_VABA:
 case NEON_3R_VPMAX:
 case NEON_3R_VPMIN:
+case NEON_3R_VPADD_VQRDMLAH:
 /* Already handled by decodetree */
 return 1;
 }
@@ -4800,9 +4794,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t 
insn)
 }
 pairwise = 0;
 switch (op) {
-case NEON_3R_VPADD_VQRDMLAH:
-pairwise = 1;
-break;
 case NEON_3R_FLOAT_ARITH:
 pairwise = (u && size < 2); /* if VPADD (float) */
 break;
@@ -4880,14 +4871,6 @@ static int disas_neon_data_insn(DisasContext *s, 
uint32_t insn)
 }
 }
 break;
-case NEON_3R_VPADD_VQRDMLAH:
-switch (size) {
-case 0: gen_helper_neon_padd_u8(tmp, tmp, tmp2); break;
-case 1: gen_helper_neon_padd_u16(tmp, tmp, tmp2); break;
-case 2: tcg_gen_add_i32(tmp, tmp, tmp2); break;
-default: abort();
-}
-break;
 case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */
 {
 TCGv_ptr fpstatus = get_fpstatus_ptr(1);
diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode
index e47998899ce..acaf278cc8d 100644
--- a/target/arm/neon-dp.decode
+++ b/target/arm/neon-dp.decode
@@ -137,6 +137,8 @@ VPMAX_U_3s    001 1 0 . ..   1010 . . . 0 
 @3same_q0
 VPMIN_S_3s    001 0 0 . ..   1010 . . . 1  @3same_q0
 VPMIN_U_3s    001 1 0 . ..   1010 . . . 1  @3same_q0
 
+VPADD_3s  001 0 0 . ..   1011 . . . 1  @3same_q0
+
 VQRDMLAH_3s   001 1 0 . ..   1011 ... 1  @3same
 
 SHA1_3s   001 0 0 . optype:2   1100 . 1 . 0  \
-- 
2.20.1