Re: [PATCH RESEND v2 3/6] target/arm/kvm: Add an option to turn on/off el2 support

2021-04-27 Thread Peter Maydell
On Thu, 1 Apr 2021 at 13:55, Haibo Xu  wrote:
>
> Adds an el2=[on/off] option to enable/disable el2(nested virtualization)
> support in KVM guest vCPU.
>
> Signed-off-by: Haibo Xu 
> ---
>  target/arm/cpu.c   | 11 ++
>  target/arm/cpu.h   |  4 
>  target/arm/cpu64.c | 52 ++
>  3 files changed, 67 insertions(+)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index ae04884408..30cc330f50 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1349,6 +1349,17 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error 
> **errp)
>  return;
>  }
>  }
> +
> +/*
> + * Currently, vCPU feature 'el2' only supported in KVM mode.
> + */
> +if (kvm_enabled()) {
> +arm_cpu_el2_finalize(cpu, _err);
> +if (local_err != NULL) {
> +error_propagate(errp, local_err);
> +return;
> +}
> +}

I don't understand this. EL2 is supported in TCG as well...

thanks
-- PMM



Re: [PATCH RESEND v2 3/6] target/arm/kvm: Add an option to turn on/off el2 support

2021-04-27 Thread Andrew Jones
On Thu, Apr 01, 2021 at 05:55:35AM -0700, Haibo Xu wrote:
> Adds an el2=[on/off] option to enable/disable el2(nested virtualization)
   ^ space, please

> support in KVM guest vCPU.
> 
> Signed-off-by: Haibo Xu 
> ---
>  target/arm/cpu.c   | 11 ++
>  target/arm/cpu.h   |  4 
>  target/arm/cpu64.c | 52 ++
>  3 files changed, 67 insertions(+)
> 
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index ae04884408..30cc330f50 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1349,6 +1349,17 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error 
> **errp)
>  return;
>  }
>  }
> +
> +/*
> + * Currently, vCPU feature 'el2' only supported in KVM mode.
> + */
> +if (kvm_enabled()) {
> +arm_cpu_el2_finalize(cpu, _err);
> +if (local_err != NULL) {
> +error_propagate(errp, local_err);
> +return;
> +}
> +}

nit: We could tie this 'if (kvm_enabled())' block to the
'if (!kvm_enabled())' block above it by turning one or the other
into an else clause.

>  }
>  
>  if (kvm_enabled()) {
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 193a49ec7f..19fa9cfbfd 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -203,10 +203,12 @@ typedef struct {
>  # define ARM_MAX_VQ16
>  void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
>  void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
> +void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp);
>  #else
>  # define ARM_MAX_VQ1
>  static inline void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { }
>  static inline void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) { }
> +static inline void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp) { }
>  #endif
>  
>  typedef struct ARMVectorReg {
> @@ -1058,6 +1060,7 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned 
> vq);
>  void aarch64_sve_change_el(CPUARMState *env, int old_el,
> int new_el, bool el0_a64);
>  void aarch64_add_sve_properties(Object *obj);
> +void aarch64_add_el2_properties(Object *obj);
>  
>  /*
>   * SVE registers are encoded in KVM's memory in an endianness-invariant 
> format.
> @@ -1089,6 +1092,7 @@ static inline void aarch64_sve_change_el(CPUARMState 
> *env, int o,
>   int n, bool a)
>  { }
>  static inline void aarch64_add_sve_properties(Object *obj) { }
> +static inline void aarch64_add_el2_properties(Object *obj) { }
>  #endif
>  
>  void aarch64_sync_32_to_64(CPUARMState *env);
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index f0a9e968c9..3f3f2c5495 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -603,6 +603,58 @@ static Property arm_cpu_pauth_property =
>  static Property arm_cpu_pauth_impdef_property =
>  DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
>  
> +void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp)
> +{
> +if (cpu->has_el2) {
> +if (!kvm_enabled() || !kvm_arm_el2_supported()) {
> +error_setg(errp, "'el2' cannot be enabled on this host");
> +return;
> +}
> +}
> +
> +if (cpu->has_el2) {
> +set_feature(>env, ARM_FEATURE_EL2);
> +} else {
> +unset_feature(>env, ARM_FEATURE_EL2);
> +}
> +}
> +
> +static bool arm_get_el2(Object *obj, Error **errp)
> +{
> +ARMCPU *cpu = ARM_CPU(obj);
> +
> +return cpu->has_el2;
> +}
> +
> +static void arm_set_el2(Object *obj, bool value, Error **errp)
> +{
> +ARMCPU *cpu = ARM_CPU(obj);
> +
> +if (value) {
> +if (!kvm_enabled() || !kvm_arm_el2_supported()) {
> +error_setg(errp, "'el2' cannot be enabled on this host");
> +return;
> +}
> +set_feature(>env, ARM_FEATURE_EL2);
> +} else {
> +unset_feature(>env, ARM_FEATURE_EL2);
> +}
> +
> +cpu->has_el2 = value;
> +}
> +
> +void aarch64_add_el2_properties(Object *obj)
> +{
> +/*
> + * vCPU feature 'el2' is only available in KVM mode, and is
> + * disabled by default to keep in line with that in TCG mode.
> + */
> +ARM_CPU(obj)->has_el2 = false;
> +object_property_add_bool(obj, "el2", arm_get_el2, arm_set_el2);
> +object_property_set_description(obj, "el2", "Set off to disable "
> +"nested virtulization.");

Since the default is 'off', it seems like the description should be
instructing one to set 'on to enable' instead. Or both, like the
description of the 'aarch64' property does.

> +}
> +
>  /* -cpu max: if KVM is enabled, like -cpu host (best possible with this 
> host);
>   * otherwise, a CPU with as many features enabled as our emulation supports.
>   * The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
> -- 
> 2.17.1
> 
>

Thanks,
drew 




[PATCH RESEND v2 3/6] target/arm/kvm: Add an option to turn on/off el2 support

2021-04-01 Thread Haibo Xu
Adds an el2=[on/off] option to enable/disable el2(nested virtualization)
support in KVM guest vCPU.

Signed-off-by: Haibo Xu 
---
 target/arm/cpu.c   | 11 ++
 target/arm/cpu.h   |  4 
 target/arm/cpu64.c | 52 ++
 3 files changed, 67 insertions(+)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index ae04884408..30cc330f50 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1349,6 +1349,17 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
 return;
 }
 }
+
+/*
+ * Currently, vCPU feature 'el2' only supported in KVM mode.
+ */
+if (kvm_enabled()) {
+arm_cpu_el2_finalize(cpu, _err);
+if (local_err != NULL) {
+error_propagate(errp, local_err);
+return;
+}
+}
 }
 
 if (kvm_enabled()) {
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 193a49ec7f..19fa9cfbfd 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -203,10 +203,12 @@ typedef struct {
 # define ARM_MAX_VQ16
 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
 void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
+void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp);
 #else
 # define ARM_MAX_VQ1
 static inline void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { }
 static inline void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) { }
+static inline void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp) { }
 #endif
 
 typedef struct ARMVectorReg {
@@ -1058,6 +1060,7 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
 void aarch64_sve_change_el(CPUARMState *env, int old_el,
int new_el, bool el0_a64);
 void aarch64_add_sve_properties(Object *obj);
+void aarch64_add_el2_properties(Object *obj);
 
 /*
  * SVE registers are encoded in KVM's memory in an endianness-invariant format.
@@ -1089,6 +1092,7 @@ static inline void aarch64_sve_change_el(CPUARMState 
*env, int o,
  int n, bool a)
 { }
 static inline void aarch64_add_sve_properties(Object *obj) { }
+static inline void aarch64_add_el2_properties(Object *obj) { }
 #endif
 
 void aarch64_sync_32_to_64(CPUARMState *env);
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index f0a9e968c9..3f3f2c5495 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -603,6 +603,58 @@ static Property arm_cpu_pauth_property =
 static Property arm_cpu_pauth_impdef_property =
 DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
 
+void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp)
+{
+if (cpu->has_el2) {
+if (!kvm_enabled() || !kvm_arm_el2_supported()) {
+error_setg(errp, "'el2' cannot be enabled on this host");
+return;
+}
+}
+
+if (cpu->has_el2) {
+set_feature(>env, ARM_FEATURE_EL2);
+} else {
+unset_feature(>env, ARM_FEATURE_EL2);
+}
+}
+
+static bool arm_get_el2(Object *obj, Error **errp)
+{
+ARMCPU *cpu = ARM_CPU(obj);
+
+return cpu->has_el2;
+}
+
+static void arm_set_el2(Object *obj, bool value, Error **errp)
+{
+ARMCPU *cpu = ARM_CPU(obj);
+
+if (value) {
+if (!kvm_enabled() || !kvm_arm_el2_supported()) {
+error_setg(errp, "'el2' cannot be enabled on this host");
+return;
+}
+set_feature(>env, ARM_FEATURE_EL2);
+} else {
+unset_feature(>env, ARM_FEATURE_EL2);
+}
+
+cpu->has_el2 = value;
+}
+
+void aarch64_add_el2_properties(Object *obj)
+{
+/*
+ * vCPU feature 'el2' is only available in KVM mode, and is
+ * disabled by default to keep in line with that in TCG mode.
+ */
+ARM_CPU(obj)->has_el2 = false;
+object_property_add_bool(obj, "el2", arm_get_el2, arm_set_el2);
+object_property_set_description(obj, "el2", "Set off to disable "
+"nested virtulization.");
+}
+
 /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
  * otherwise, a CPU with as many features enabled as our emulation supports.
  * The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
-- 
2.17.1