Re: [PATCH for-9.0 4/5] target/riscv/kvm: add RISCV_CONFIG_REG()

2023-12-15 Thread Andrew Jones
On Fri, Dec 08, 2023 at 03:38:34PM -0300, Daniel Henrique Barboza wrote:
> Create a RISCV_CONFIG_REG() macro, similar to what other regs use, to
> hide away some of the boilerplate.
> 
> Signed-off-by: Daniel Henrique Barboza 
> ---
>  target/riscv/kvm/kvm-cpu.c | 25 +++--
>  1 file changed, 11 insertions(+), 14 deletions(-)
> 
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index 476e5d4b3d..11797338ec 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -88,6 +88,10 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, 
> uint64_t idx)
>  #define RISCV_CSR_REG(env, name)  kvm_riscv_reg_id(env, KVM_REG_RISCV_CSR, \
>   KVM_REG_RISCV_CSR_REG(name))
>  
> +#define RISCV_CONFIG_REG(env, name) \
> +kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, \
> + KVM_REG_RISCV_CONFIG_REG(name))
> +
>  #define RISCV_TIMER_REG(name)  kvm_riscv_reg_id_u64(KVM_REG_RISCV_TIMER, \
>   KVM_REG_RISCV_TIMER_REG(name))
>  
> @@ -756,24 +760,21 @@ static void kvm_riscv_init_machine_ids(RISCVCPU *cpu, 
> KVMScratchCPU *kvmcpu)
>  struct kvm_one_reg reg;
>  int ret;
>  
> -reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> -  KVM_REG_RISCV_CONFIG_REG(mvendorid));
> +reg.id = RISCV_CONFIG_REG(env, mvendorid);
>  reg.addr = (uint64_t)&cpu->cfg.mvendorid;
>  ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
>  if (ret != 0) {
>  error_report("Unable to retrieve mvendorid from host, error %d", 
> ret);
>  }
>  
> -reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> -  KVM_REG_RISCV_CONFIG_REG(marchid));
> +reg.id = RISCV_CONFIG_REG(env, marchid);
>  reg.addr = (uint64_t)&cpu->cfg.marchid;
>  ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
>  if (ret != 0) {
>  error_report("Unable to retrieve marchid from host, error %d", ret);
>  }
>  
> -reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> -  KVM_REG_RISCV_CONFIG_REG(mimpid));
> +reg.id = RISCV_CONFIG_REG(env, mimpid);
>  reg.addr = (uint64_t)&cpu->cfg.mimpid;
>  ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
>  if (ret != 0) {
> @@ -788,8 +789,7 @@ static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu,
>  struct kvm_one_reg reg;
>  int ret;
>  
> -reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> -  KVM_REG_RISCV_CONFIG_REG(isa));
> +reg.id = RISCV_CONFIG_REG(env, isa);
>  reg.addr = (uint64_t)&env->misa_ext_mask;
>  ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
>  
> @@ -1094,8 +1094,7 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, 
> CPUState *cs)
>  uint64_t id;
>  int ret;
>  
> -id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> -  KVM_REG_RISCV_CONFIG_REG(mvendorid));
> +id = RISCV_CONFIG_REG(env, mvendorid);
>  /*
>   * cfg.mvendorid is an uint32 but a target_ulong will
>   * be written. Assign it to a target_ulong var to avoid
> @@ -1107,15 +1106,13 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, 
> CPUState *cs)
>  return ret;
>  }
>  
> -id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> -  KVM_REG_RISCV_CONFIG_REG(marchid));
> +id = RISCV_CONFIG_REG(env, marchid);
>  ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid);
>  if (ret != 0) {
>  return ret;
>  }
>  
> -id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> -  KVM_REG_RISCV_CONFIG_REG(mimpid));
> +id = RISCV_CONFIG_REG(env, mimpid);
>  ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid);
>  
>  return ret;
> -- 
> 2.41.0
>

Reviewed-by: Andrew Jones 



[PATCH for-9.0 4/5] target/riscv/kvm: add RISCV_CONFIG_REG()

2023-12-08 Thread Daniel Henrique Barboza
Create a RISCV_CONFIG_REG() macro, similar to what other regs use, to
hide away some of the boilerplate.

Signed-off-by: Daniel Henrique Barboza 
---
 target/riscv/kvm/kvm-cpu.c | 25 +++--
 1 file changed, 11 insertions(+), 14 deletions(-)

diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 476e5d4b3d..11797338ec 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -88,6 +88,10 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, uint64_t 
idx)
 #define RISCV_CSR_REG(env, name)  kvm_riscv_reg_id(env, KVM_REG_RISCV_CSR, \
  KVM_REG_RISCV_CSR_REG(name))
 
+#define RISCV_CONFIG_REG(env, name) \
+kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, \
+ KVM_REG_RISCV_CONFIG_REG(name))
+
 #define RISCV_TIMER_REG(name)  kvm_riscv_reg_id_u64(KVM_REG_RISCV_TIMER, \
  KVM_REG_RISCV_TIMER_REG(name))
 
@@ -756,24 +760,21 @@ static void kvm_riscv_init_machine_ids(RISCVCPU *cpu, 
KVMScratchCPU *kvmcpu)
 struct kvm_one_reg reg;
 int ret;
 
-reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
-  KVM_REG_RISCV_CONFIG_REG(mvendorid));
+reg.id = RISCV_CONFIG_REG(env, mvendorid);
 reg.addr = (uint64_t)&cpu->cfg.mvendorid;
 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
 if (ret != 0) {
 error_report("Unable to retrieve mvendorid from host, error %d", ret);
 }
 
-reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
-  KVM_REG_RISCV_CONFIG_REG(marchid));
+reg.id = RISCV_CONFIG_REG(env, marchid);
 reg.addr = (uint64_t)&cpu->cfg.marchid;
 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
 if (ret != 0) {
 error_report("Unable to retrieve marchid from host, error %d", ret);
 }
 
-reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
-  KVM_REG_RISCV_CONFIG_REG(mimpid));
+reg.id = RISCV_CONFIG_REG(env, mimpid);
 reg.addr = (uint64_t)&cpu->cfg.mimpid;
 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
 if (ret != 0) {
@@ -788,8 +789,7 @@ static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu,
 struct kvm_one_reg reg;
 int ret;
 
-reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
-  KVM_REG_RISCV_CONFIG_REG(isa));
+reg.id = RISCV_CONFIG_REG(env, isa);
 reg.addr = (uint64_t)&env->misa_ext_mask;
 ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
 
@@ -1094,8 +1094,7 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, 
CPUState *cs)
 uint64_t id;
 int ret;
 
-id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
-  KVM_REG_RISCV_CONFIG_REG(mvendorid));
+id = RISCV_CONFIG_REG(env, mvendorid);
 /*
  * cfg.mvendorid is an uint32 but a target_ulong will
  * be written. Assign it to a target_ulong var to avoid
@@ -1107,15 +1106,13 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, 
CPUState *cs)
 return ret;
 }
 
-id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
-  KVM_REG_RISCV_CONFIG_REG(marchid));
+id = RISCV_CONFIG_REG(env, marchid);
 ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid);
 if (ret != 0) {
 return ret;
 }
 
-id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
-  KVM_REG_RISCV_CONFIG_REG(mimpid));
+id = RISCV_CONFIG_REG(env, mimpid);
 ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid);
 
 return ret;
-- 
2.41.0