Re: [PATCH v2 07/21] target/ppc: Remove msr_ee macro

2022-05-02 Thread Richard Henderson

On 5/2/22 07:39, Víctor Colombo wrote:

msr_ee macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo


Reviewed-by: Richard Henderson 

r~



[PATCH v2 07/21] target/ppc: Remove msr_ee macro

2022-05-02 Thread Víctor Colombo
msr_ee macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.

Suggested-by: Richard Henderson 
Signed-off-by: Víctor Colombo 

---

v2: Remove M_MSR_EE and use FIELD_EX64 instead
Signed-off-by: Víctor Colombo 
---
 target/ppc/cpu.h |  2 +-
 target/ppc/cpu_init.c| 15 ++-
 target/ppc/excp_helper.c |  2 +-
 target/ppc/kvm.c |  3 ++-
 4 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index d4a0d7e082..51db67ff92 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -355,6 +355,7 @@ typedef enum {
 #define MSR_LE   0  /* Little-endian mode   1 hflags */
 
 FIELD(MSR, ILE, MSR_ILE, 1)
+FIELD(MSR, EE, MSR_EE, 1)
 FIELD(MSR, PR, MSR_PR, 1)
 FIELD(MSR, DS, MSR_DS, 1)
 FIELD(MSR, LE, MSR_LE, 1)
@@ -478,7 +479,6 @@ FIELD(MSR, LE, MSR_LE, 1)
 #define msr_gs   ((env->msr >> MSR_GS)   & 1)
 #define msr_pow  ((env->msr >> MSR_POW)  & 1)
 #define msr_ce   ((env->msr >> MSR_CE)   & 1)
-#define msr_ee   ((env->msr >> MSR_EE)   & 1)
 #define msr_fp   ((env->msr >> MSR_FP)   & 1)
 #define msr_me   ((env->msr >> MSR_ME)   & 1)
 #define msr_fe0  ((env->msr >> MSR_FE0)  & 1)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 0c6b83406e..10e7c41bc9 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -5949,7 +5949,8 @@ static bool cpu_has_work_POWER7(CPUState *cs)
 }
 return false;
 } else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+   (cs->interrupt_request & CPU_INTERRUPT_HARD);
 }
 }
 
@@ -6120,7 +6121,8 @@ static bool cpu_has_work_POWER8(CPUState *cs)
 }
 return false;
 } else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+   (cs->interrupt_request & CPU_INTERRUPT_HARD);
 }
 }
 
@@ -6337,7 +6339,8 @@ static bool cpu_has_work_POWER9(CPUState *cs)
 }
 return false;
 } else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+   (cs->interrupt_request & CPU_INTERRUPT_HARD);
 }
 }
 
@@ -6551,7 +6554,8 @@ static bool cpu_has_work_POWER10(CPUState *cs)
 }
 return false;
 } else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+   (cs->interrupt_request & CPU_INTERRUPT_HARD);
 }
 }
 
@@ -7119,7 +7123,8 @@ static bool ppc_cpu_has_work(CPUState *cs)
 PowerPCCPU *cpu = POWERPC_CPU(cs);
 CPUPPCState *env = >env;
 
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+   (cs->interrupt_request & CPU_INTERRUPT_HARD);
 }
 
 static void ppc_cpu_reset(DeviceState *dev)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 7e8e34ef06..4c206ba209 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1709,7 +1709,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)
  * clear when coming out of some power management states (in order
  * for them to become a 0x100).
  */
-async_deliver = (msr_ee != 0) || env->resume_as_sreset;
+async_deliver = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
 
 /* Hypervisor decrementer exception */
 if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index a3c31b4e48..8276326de9 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -1351,7 +1351,8 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu)
 CPUState *cs = CPU(cpu);
 CPUPPCState *env = >env;
 
-if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
+if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) &&
+FIELD_EX64(env->msr, MSR, EE)) {
 cs->halted = 1;
 cs->exception_index = EXCP_HLT;
 }
-- 
2.25.1