From: "Lucas Mateus Castro (alqotel)"
Moved XVCPSGNSP and XVCPSGNDP to decodetree and used gvec to translate
them.
xvcpsgnsp:
reptloopmaster patch
8 12500 0,00561400 0,00537900 (-4.2%)
25 40000,00562100 0,0040 (-28.8%)
100 10000,00696900 0,00416300 (-40.3%)
500 200 0,02211900 0,00840700 (-62.0%)
250040 0,09328600 0,02728300 (-70.8%)
800012 0,27295300 0,06867800 (-74.8%)
xvcpsgndp:
reptloopmaster patch
8 12500 0,00556300 0,00584200 (+5.0%)
25 40000,00482700 0,00431700 (-10.6%)
100 10000,00585800 0,00464400 (-20.7%)
500 200 0,01565300 0,00839700 (-46.4%)
250040 0,05766500 0,02430600 (-57.8%)
800012 0,19875300 0,07947100 (-60.0%)
Like the previous instructions there seemed to be a improvement on
translation time.
Signed-off-by: Lucas Mateus Castro (alqotel)
---
target/ppc/insn32.decode| 2 +
target/ppc/translate/vsx-impl.c.inc | 109 ++--
target/ppc/translate/vsx-ops.c.inc | 3 -
3 files changed, 55 insertions(+), 59 deletions(-)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 5b687078be..6549c4040e 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -762,6 +762,8 @@ XVNABSDP00 . 0 . 01001 .. @XX2
XVNABSSP00 . 0 . 110101001 .. @XX2
XVNEGDP 00 . 0 . 11001 .. @XX2
XVNEGSP 00 . 0 . 110111001 .. @XX2
+XVCPSGNDP 00 . . . ... @XX3
+XVCPSGNSP 00 . . . 1101 ... @XX3
## VSX Scalar Multiply-Add Instructions
diff --git a/target/ppc/translate/vsx-impl.c.inc
b/target/ppc/translate/vsx-impl.c.inc
index 3f9af811dc..4f17da514c 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -729,62 +729,6 @@ VSX_SCALAR_MOVE_QP(xsnabsqp, OP_NABS, SGN_MASK_DP)
VSX_SCALAR_MOVE_QP(xsnegqp, OP_NEG, SGN_MASK_DP)
VSX_SCALAR_MOVE_QP(xscpsgnqp, OP_CPSGN, SGN_MASK_DP)
-#define VSX_VECTOR_MOVE(name, op, sgn_mask) \
-static void glue(gen_, name)(DisasContext *ctx) \
-{\
-TCGv_i64 xbh, xbl, sgm; \
-if (unlikely(!ctx->vsx_enabled)) { \
-gen_exception(ctx, POWERPC_EXCP_VSXU); \
-return; \
-}\
-xbh = tcg_temp_new_i64();\
-xbl = tcg_temp_new_i64();\
-sgm = tcg_temp_new_i64();\
-get_cpu_vsr(xbh, xB(ctx->opcode), true); \
-get_cpu_vsr(xbl, xB(ctx->opcode), false);\
-tcg_gen_movi_i64(sgm, sgn_mask); \
-switch (op) {\
-case OP_ABS: { \
-tcg_gen_andc_i64(xbh, xbh, sgm); \
-tcg_gen_andc_i64(xbl, xbl, sgm); \
-break; \
-}\
-case OP_NABS: { \
-tcg_gen_or_i64(xbh, xbh, sgm); \
-tcg_gen_or_i64(xbl, xbl, sgm); \
-break; \
-}\
-case OP_NEG: { \
-tcg_gen_xor_i64(xbh, xbh, sgm); \
-tcg_gen_xor_i64(xbl, xbl, sgm); \
-break; \
-}\
-case OP_CPSGN: { \
-TCGv_i64 xah = tcg_temp_new_i64(); \
-TCGv_i64 xal = tcg_temp_new_i64(); \
-get_cpu_vsr(xah, xA(ctx->opcode), true); \
-get_cpu_vsr(xal, xA(ctx->opcode), false);\
-tcg_gen_and_i64(xah, xah, sgm); \
-tcg_gen_and_i64(xal, xal, sgm); \
-tcg_gen_andc_i64(xbh, xbh, sgm); \
-tcg_gen_andc_i64(xbl, xbl, sgm); \
-tcg_gen_or_i64(xbh, xbh, xah); \
-tcg_gen_or_i64(xbl, xbl, xal);
