Re: [PATCH v2 1/4] target/loongarch: ftint_xxx insns set the result high 32bit 0xffffffff

2022-09-28 Thread gaosong 


在 2022/9/28 下午11:14, Richard Henderson 写道:

On 9/26/22 23:48, Song Gao wrote:

we just set high 32bit 0x as the other float instructions do.

Signed-off-by: Song Gao
---
  target/loongarch/fpu_helper.c | 18 +-
  1 file changed, 9 insertions(+), 9 deletions(-)


But the result in these cases is an integer, not a (single-precision) 
float.

Is this really what hardware does?


The high 32bit value is not fixed  as the manual 3.1.3.1 said:
    ' When the floating-point register records a single-precision 
floating-point number or word integer, the data
    always appears in the [31:0] bits of the floating-point register, 
at this time the [63:32] bits of the

    floating-point register can be any value.'
I do this  just used for RISU test compare these instructions result value.
As the RISU patches not reviewed,  I can drop this patch.

Thanks.
Song Gao

Re: [PATCH v2 1/4] target/loongarch: ftint_xxx insns set the result high 32bit 0xffffffff

2022-09-28 Thread Richard Henderson 

On 9/26/22 23:48, Song Gao wrote:

we just set high 32bit 0x as the other float instructions do.

Signed-off-by: Song Gao
---
  target/loongarch/fpu_helper.c | 18 +-
  1 file changed, 9 insertions(+), 9 deletions(-)


But the result in these cases is an integer, not a (single-precision) float.
Is this really what hardware does?


r~

[PATCH v2 1/4] target/loongarch: ftint_xxx insns set the result high 32bit 0xffffffff

2022-09-27 Thread Song Gao 
we just set high 32bit 0x as the other float instructions do.

Signed-off-by: Song Gao 
---
 target/loongarch/fpu_helper.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/target/loongarch/fpu_helper.c b/target/loongarch/fpu_helper.c
index 4b9637210a..1a24667eaf 100644
--- a/target/loongarch/fpu_helper.c
+++ b/target/loongarch/fpu_helper.c
@@ -518,7 +518,7 @@ uint64_t helper_frint_s(CPULoongArchState *env, uint64_t fj)
 {
 uint64_t fd;
 
-fd = (uint64_t)(float32_round_to_int((uint32_t)fj, >fp_status));
+fd = nanbox_s(float32_round_to_int((uint32_t)fj, >fp_status));
 update_fcsr0(env, GETPC());
 return fd;
 }
@@ -574,7 +574,7 @@ uint64_t helper_ftintrm_w_d(CPULoongArchState *env, 
uint64_t fj)
 FloatRoundMode old_mode = get_float_rounding_mode(>fp_status);
 
 set_float_rounding_mode(float_round_down, >fp_status);
-fd = (uint64_t)float64_to_int32(fj, >fp_status);
+fd = nanbox_s(float64_to_int32(fj, >fp_status));
 set_float_rounding_mode(old_mode, >fp_status);
 
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
@@ -592,7 +592,7 @@ uint64_t helper_ftintrm_w_s(CPULoongArchState *env, 
uint64_t fj)
 FloatRoundMode old_mode = get_float_rounding_mode(>fp_status);
 
 set_float_rounding_mode(float_round_down, >fp_status);
-fd = (uint64_t)float32_to_int32((uint32_t)fj, >fp_status);
+fd = nanbox_s(float32_to_int32((uint32_t)fj, >fp_status));
 set_float_rounding_mode(old_mode, >fp_status);
 
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
@@ -646,7 +646,7 @@ uint64_t helper_ftintrp_w_d(CPULoongArchState *env, 
uint64_t fj)
 FloatRoundMode old_mode = get_float_rounding_mode(>fp_status);
 
 set_float_rounding_mode(float_round_up, >fp_status);
-fd = (uint64_t)float64_to_int32(fj, >fp_status);
+fd = nanbox_s(float64_to_int32(fj, >fp_status));
 set_float_rounding_mode(old_mode, >fp_status);
 
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
@@ -664,7 +664,7 @@ uint64_t helper_ftintrp_w_s(CPULoongArchState *env, 
uint64_t fj)
 FloatRoundMode old_mode = get_float_rounding_mode(>fp_status);
 
 set_float_rounding_mode(float_round_up, >fp_status);
-fd = (uint64_t)float32_to_int32((uint32_t)fj, >fp_status);
+fd = nanbox_s(float32_to_int32((uint32_t)fj, >fp_status));
 set_float_rounding_mode(old_mode, >fp_status);
 
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
@@ -715,7 +715,7 @@ uint64_t helper_ftintrz_w_d(CPULoongArchState *env, 
uint64_t fj)
 uint64_t fd;
 FloatRoundMode old_mode = get_float_rounding_mode(>fp_status);
 
-fd = (uint64_t)float64_to_int32_round_to_zero(fj, >fp_status);
+fd = nanbox_s(float64_to_int32_round_to_zero(fj, >fp_status));
 set_float_rounding_mode(old_mode, >fp_status);
 
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
@@ -786,7 +786,7 @@ uint64_t helper_ftintrne_w_d(CPULoongArchState *env, 
uint64_t fj)
 FloatRoundMode old_mode = get_float_rounding_mode(>fp_status);
 
 set_float_rounding_mode(float_round_nearest_even, >fp_status);
-fd = (uint64_t)float64_to_int32(fj, >fp_status);
+fd = nanbox_s(float64_to_int32(fj, >fp_status));
 set_float_rounding_mode(old_mode, >fp_status);
 
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
@@ -848,7 +848,7 @@ uint64_t helper_ftint_w_s(CPULoongArchState *env, uint64_t 
fj)
 {
 uint64_t fd;
 
-fd = (uint64_t)float32_to_int32((uint32_t)fj, >fp_status);
+fd = nanbox_s(float32_to_int32((uint32_t)fj, >fp_status));
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
 if (float32_is_any_nan((uint32_t)fj)) {
 fd = 0;
@@ -862,7 +862,7 @@ uint64_t helper_ftint_w_d(CPULoongArchState *env, uint64_t 
fj)
 {
 uint64_t fd;
 
-fd = (uint64_t)float64_to_int32(fj, >fp_status);
+fd = nanbox_s(float64_to_int32(fj, >fp_status));
 if (get_float_exception_flags(>fp_status) & (float_flag_invalid)) {
 if (float64_is_any_nan(fj)) {
 fd = 0;
-- 
2.31.1