Re: [PATCH v3 5/8] ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines

2024-01-22 Thread Cédric Le Goater 

On 12/1/23 13:16, Nicholas Piggin wrote:

Wire the ChipTOD model to powernv9 and powernv10 machines.

Suggested-by-by: Cédric Le Goater 
Signed-off-by: Nicholas Piggin 



Reviewed-by: Cédric Le Goater 

Thanks,

C.



---
  include/hw/ppc/pnv_chip.h |  3 +++
  hw/ppc/pnv.c  | 30 ++
  2 files changed, 33 insertions(+)

diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
index 0ab5c42308..bfc4772cf3 100644
--- a/include/hw/ppc/pnv_chip.h
+++ b/include/hw/ppc/pnv_chip.h
@@ -2,6 +2,7 @@
  #define PPC_PNV_CHIP_H
  
  #include "hw/pci-host/pnv_phb4.h"

+#include "hw/ppc/pnv_chiptod.h"
  #include "hw/ppc/pnv_core.h"
  #include "hw/ppc/pnv_homer.h"
  #include "hw/ppc/pnv_lpc.h"
@@ -78,6 +79,7 @@ struct Pnv9Chip {
  PnvXive  xive;
  Pnv9Psi  psi;
  PnvLpcController lpc;
+PnvChipTOD   chiptod;
  PnvOCC   occ;
  PnvSBE   sbe;
  PnvHomer homer;
@@ -110,6 +112,7 @@ struct Pnv10Chip {
  PnvXive2 xive;
  Pnv9Psi  psi;
  PnvLpcController lpc;
+PnvChipTOD   chiptod;
  PnvOCC   occ;
  PnvSBE   sbe;
  PnvHomer homer;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index b949398689..d3cb76 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1419,6 +1419,8 @@ static void pnv_chip_power9_instance_init(Object *obj)
  
  object_initialize_child(obj, "lpc", &chip9->lpc, TYPE_PNV9_LPC);
  
+object_initialize_child(obj, "chiptod", &chip9->chiptod, TYPE_PNV9_CHIPTOD);

+
  object_initialize_child(obj, "occ", &chip9->occ, TYPE_PNV9_OCC);
  
  object_initialize_child(obj, "sbe", &chip9->sbe, TYPE_PNV9_SBE);

@@ -1565,6 +1567,19 @@ static void pnv_chip_power9_realize(DeviceState *dev, 
Error **errp)
  chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
  (uint64_t) PNV9_LPCM_BASE(chip));
  
+/* ChipTOD */

+object_property_set_bool(OBJECT(&chip9->chiptod), "primary",
+ chip->chip_id == 0, &error_abort);
+object_property_set_bool(OBJECT(&chip9->chiptod), "secondary",
+ chip->chip_id == 1, &error_abort);
+object_property_set_link(OBJECT(&chip9->chiptod), "chip", OBJECT(chip),
+ &error_abort);
+if (!qdev_realize(DEVICE(&chip9->chiptod), NULL, errp)) {
+return;
+}
+pnv_xscom_add_subregion(chip, PNV9_XSCOM_CHIPTOD_BASE,
+&chip9->chiptod.xscom_regs);
+
  /* Create the simplified OCC model */
  if (!qdev_realize(DEVICE(&chip9->occ), NULL, errp)) {
  return;
@@ -1677,6 +1692,8 @@ static void pnv_chip_power10_instance_init(Object *obj)
"xive-fabric");
  object_initialize_child(obj, "psi", &chip10->psi, TYPE_PNV10_PSI);
  object_initialize_child(obj, "lpc", &chip10->lpc, TYPE_PNV10_LPC);
+object_initialize_child(obj, "chiptod", &chip10->chiptod,
+TYPE_PNV10_CHIPTOD);
  object_initialize_child(obj, "occ",  &chip10->occ, TYPE_PNV10_OCC);
  object_initialize_child(obj, "sbe",  &chip10->sbe, TYPE_PNV10_SBE);
  object_initialize_child(obj, "homer", &chip10->homer, TYPE_PNV10_HOMER);
@@ -1810,6 +1827,19 @@ static void pnv_chip_power10_realize(DeviceState *dev, 
Error **errp)
  chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
  (uint64_t) PNV10_LPCM_BASE(chip));
  
+/* ChipTOD */

+object_property_set_bool(OBJECT(&chip10->chiptod), "primary",
+ chip->chip_id == 0, &error_abort);
+object_property_set_bool(OBJECT(&chip10->chiptod), "secondary",
+ chip->chip_id == 1, &error_abort);
+object_property_set_link(OBJECT(&chip10->chiptod), "chip", OBJECT(chip),
+ &error_abort);
+if (!qdev_realize(DEVICE(&chip10->chiptod), NULL, errp)) {
+return;
+}
+pnv_xscom_add_subregion(chip, PNV10_XSCOM_CHIPTOD_BASE,
+&chip10->chiptod.xscom_regs);
+
  /* Create the simplified OCC model */
  if (!qdev_realize(DEVICE(&chip10->occ), NULL, errp)) {
  return;

[PATCH v3 5/8] ppc/pnv: Wire ChipTOD model to powernv9 and powernv10 machines

2023-12-01 Thread Nicholas Piggin 
Wire the ChipTOD model to powernv9 and powernv10 machines.

Suggested-by-by: Cédric Le Goater 
Signed-off-by: Nicholas Piggin 
---
 include/hw/ppc/pnv_chip.h |  3 +++
 hw/ppc/pnv.c  | 30 ++
 2 files changed, 33 insertions(+)

diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
index 0ab5c42308..bfc4772cf3 100644
--- a/include/hw/ppc/pnv_chip.h
+++ b/include/hw/ppc/pnv_chip.h
@@ -2,6 +2,7 @@
 #define PPC_PNV_CHIP_H
 
 #include "hw/pci-host/pnv_phb4.h"
+#include "hw/ppc/pnv_chiptod.h"
 #include "hw/ppc/pnv_core.h"
 #include "hw/ppc/pnv_homer.h"
 #include "hw/ppc/pnv_lpc.h"
@@ -78,6 +79,7 @@ struct Pnv9Chip {
 PnvXive  xive;
 Pnv9Psi  psi;
 PnvLpcController lpc;
+PnvChipTOD   chiptod;
 PnvOCC   occ;
 PnvSBE   sbe;
 PnvHomer homer;
@@ -110,6 +112,7 @@ struct Pnv10Chip {
 PnvXive2 xive;
 Pnv9Psi  psi;
 PnvLpcController lpc;
+PnvChipTOD   chiptod;
 PnvOCC   occ;
 PnvSBE   sbe;
 PnvHomer homer;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index b949398689..d3cb76 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1419,6 +1419,8 @@ static void pnv_chip_power9_instance_init(Object *obj)
 
 object_initialize_child(obj, "lpc", &chip9->lpc, TYPE_PNV9_LPC);
 
+object_initialize_child(obj, "chiptod", &chip9->chiptod, 
TYPE_PNV9_CHIPTOD);
+
 object_initialize_child(obj, "occ", &chip9->occ, TYPE_PNV9_OCC);
 
 object_initialize_child(obj, "sbe", &chip9->sbe, TYPE_PNV9_SBE);
@@ -1565,6 +1567,19 @@ static void pnv_chip_power9_realize(DeviceState *dev, 
Error **errp)
 chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
 (uint64_t) PNV9_LPCM_BASE(chip));
 
+/* ChipTOD */
+object_property_set_bool(OBJECT(&chip9->chiptod), "primary",
+ chip->chip_id == 0, &error_abort);
+object_property_set_bool(OBJECT(&chip9->chiptod), "secondary",
+ chip->chip_id == 1, &error_abort);
+object_property_set_link(OBJECT(&chip9->chiptod), "chip", OBJECT(chip),
+ &error_abort);
+if (!qdev_realize(DEVICE(&chip9->chiptod), NULL, errp)) {
+return;
+}
+pnv_xscom_add_subregion(chip, PNV9_XSCOM_CHIPTOD_BASE,
+&chip9->chiptod.xscom_regs);
+
 /* Create the simplified OCC model */
 if (!qdev_realize(DEVICE(&chip9->occ), NULL, errp)) {
 return;
@@ -1677,6 +1692,8 @@ static void pnv_chip_power10_instance_init(Object *obj)
   "xive-fabric");
 object_initialize_child(obj, "psi", &chip10->psi, TYPE_PNV10_PSI);
 object_initialize_child(obj, "lpc", &chip10->lpc, TYPE_PNV10_LPC);
+object_initialize_child(obj, "chiptod", &chip10->chiptod,
+TYPE_PNV10_CHIPTOD);
 object_initialize_child(obj, "occ",  &chip10->occ, TYPE_PNV10_OCC);
 object_initialize_child(obj, "sbe",  &chip10->sbe, TYPE_PNV10_SBE);
 object_initialize_child(obj, "homer", &chip10->homer, TYPE_PNV10_HOMER);
@@ -1810,6 +1827,19 @@ static void pnv_chip_power10_realize(DeviceState *dev, 
Error **errp)
 chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
 (uint64_t) PNV10_LPCM_BASE(chip));
 
+/* ChipTOD */
+object_property_set_bool(OBJECT(&chip10->chiptod), "primary",
+ chip->chip_id == 0, &error_abort);
+object_property_set_bool(OBJECT(&chip10->chiptod), "secondary",
+ chip->chip_id == 1, &error_abort);
+object_property_set_link(OBJECT(&chip10->chiptod), "chip", OBJECT(chip),
+ &error_abort);
+if (!qdev_realize(DEVICE(&chip10->chiptod), NULL, errp)) {
+return;
+}
+pnv_xscom_add_subregion(chip, PNV10_XSCOM_CHIPTOD_BASE,
+&chip10->chiptod.xscom_regs);
+
 /* Create the simplified OCC model */
 if (!qdev_realize(DEVICE(&chip10->occ), NULL, errp)) {
 return;
-- 
2.42.0