Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Wed, Nov 27, 2019 at 1:59 AM Philippe Mathieu-Daudé
wrote:
> On 11/24/19 6:02 AM, Michael Rolnik wrote:
> > Provide function disassembles executed instruction when `-d in_asm` is
> > provided
>
> Maybe "Implement the disassemble_info::print_insn() callback which print
> a disassembled instruction."
>
> > Signed-off-by: Michael Rolnik
> > ---
> > target/avr/cpu.h | 1 +
> > target/avr/cpu.c | 2 +-
> > target/avr/disas.c | 214 +
> > target/avr/translate.c | 11 +++
> > 4 files changed, 227 insertions(+), 1 deletion(-)
> > create mode 100644 target/avr/disas.c
> >
> > diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> > index ed9218af5f..574118beab 100644
> > --- a/target/avr/cpu.h
> > +++ b/target/avr/cpu.h
> > @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int
> int_req);
> > hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> > int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> > int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> > +int avr_print_insn(bfd_vma addr, disassemble_info *info);
> >
> > static inline int avr_feature(CPUAVRState *env, int feature)
> > {
> > diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> > index dae56d7845..52ec21dd16 100644
> > --- a/target/avr/cpu.c
> > +++ b/target/avr/cpu.c
> > @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
> > static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info
> *info)
> > {
> > info->mach = bfd_arch_avr;
> > -info->print_insn = NULL;
> > +info->print_insn = avr_print_insn;
> > }
> >
> > static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
> > diff --git a/target/avr/disas.c b/target/avr/disas.c
> > new file mode 100644
> > index 00..727fc463ce
> > --- /dev/null
> > +++ b/target/avr/disas.c
> > @@ -0,0 +1,214 @@
> > +/*
> > + * OpenRISC disassembler
>
> AVR?
>
> > + *
> > + * Copyright (c) 2018 Richard Henderson
>
> Copyright (c) 2019 Michael Rolnik ?
>
> > + *
> > + * This program is free software: you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation, either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program. If not, see >.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "disas/dis-asm.h"
> > +#include "qemu/bitops.h"
> > +#include "cpu.h"
> > +
> > +typedef struct {
> > +disassemble_info *info;
> > +uint16_t next_word;
> > +bool next_word_used;
> > +} DisasContext;
> > +
> > +static int to_A(DisasContext *ctx, int indx) { return 16 + (indx % 16);
> }
> > +static int to_B(DisasContext *ctx, int indx) { return 16 + (indx % 8); }
> > +static int to_C(DisasContext *ctx, int indx) { return 24 + (indx % 4) *
> 2; }
> > +static int to_D(DisasContext *ctx, int indx) { return (indx % 16) * 2; }
> > +
> > +static uint16_t next_word(DisasContext *ctx)
> > +{
> > +ctx->next_word_used = true;
> > +return ctx->next_word;
> > +}
> > +
> > +static int append_16(DisasContext *ctx, int x)
> > +{
> > +return x << 16 | next_word(ctx);
> > +}
> > +
> > +
> > +/* Include the auto-generated decoder. */
> > +static bool decode_insn(DisasContext *ctx, uint16_t insn);
> > +#include "decode_insn.inc.c"
> > +
> > +#define output(mnemonic, format, ...) \
> > +(pctx->info->fprintf_func(pctx->info->stream, "%-9s " format, \
> > +mnemonic, ##__VA_ARGS__))
> > +
> > +int avr_print_insn(bfd_vma addr, disassemble_info *info)
> > +{
> > +DisasContext ctx;
> > +DisasContext *pctx =
> > +bfd_byte buffer[4];
> > +uint16_t insn;
> > +int status;
> > +
> > +ctx.info = info;
> > +
> > +status = info->read_memory_func(addr, buffer, 4, info);
> > +if (status != 0) {
> > +info->memory_error_func(status, addr, info);
> > +return -1;
> > +}
> > +insn = bfd_getl16(buffer);
> > +ctx.next_word = bfd_getl16(buffer + 2);
> > +ctx.next_word_used = false;
> > +
> > +if (!decode_insn(, insn)) {
> > +output(".db", "0x%02x, 0x%02x", buffer[0], buffer[1]);
> > +}
> > +
> > +return ctx.next_word_used ? 4 : 2;
> > +}
> > +
> > +
> > +#define INSN(opcode, format, ...)
> \
> > +static bool trans_##opcode(DisasContext *pctx, arg_##opcode * a)
> \
> > +{
> \
> > +output(#opcode, format, ##__VA_ARGS__);
> \
> > +return true;
> \
> > +}
> > +
> > +#define INSN_MNEMONIC(opcode, mnemonic, format, ...)
> \
> >
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On 11/24/19 6:02 AM, Michael Rolnik wrote:
Provide function disassembles executed instruction when `-d in_asm` is
provided
Maybe "Implement the disassemble_info::print_insn() callback which print
a disassembled instruction."
Signed-off-by: Michael Rolnik
---
target/avr/cpu.h | 1 +
target/avr/cpu.c | 2 +-
target/avr/disas.c | 214 +
target/avr/translate.c | 11 +++
4 files changed, 227 insertions(+), 1 deletion(-)
create mode 100644 target/avr/disas.c
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index ed9218af5f..574118beab 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int int_req);
hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int avr_print_insn(bfd_vma addr, disassemble_info *info);
static inline int avr_feature(CPUAVRState *env, int feature)
{
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index dae56d7845..52ec21dd16 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
info->mach = bfd_arch_avr;
-info->print_insn = NULL;
+info->print_insn = avr_print_insn;
}
static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
diff --git a/target/avr/disas.c b/target/avr/disas.c
new file mode 100644
index 00..727fc463ce
--- /dev/null
+++ b/target/avr/disas.c
@@ -0,0 +1,214 @@
+/*
+ * OpenRISC disassembler
AVR?
+ *
+ * Copyright (c) 2018 Richard Henderson
Copyright (c) 2019 Michael Rolnik ?
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Sunday, November 24, 2019, Michael Rolnik wrote:
> Provide function disassembles executed instruction when `-d in_asm` is
> provided
>
> Signed-off-by: Michael Rolnik
> ---
Michael, hi.
It would be very helpful if you include an example in the commit message:
- how to start qemu for AVR with -d in_asm (preferably in the form of
instructions that will enable any reader to repeat the procedure)
- the first 20-30 outputed disassembler lines
As I said before, sorry if this might look like nitpicking,, it is not, I
am just trying to help the series look and be better. Those are just
missing bits and pieces that are shame to be omitted.
Sincerely yours,
Aleksandar
target/avr/cpu.h | 1 +
> target/avr/cpu.c | 2 +-
> target/avr/disas.c | 214 +
> target/avr/translate.c | 11 +++
> 4 files changed, 227 insertions(+), 1 deletion(-)
> create mode 100644 target/avr/disas.c
>
> diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> index ed9218af5f..574118beab 100644
> --- a/target/avr/cpu.h
> +++ b/target/avr/cpu.h
> @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int
> int_req);
> hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> +int avr_print_insn(bfd_vma addr, disassemble_info *info);
>
> static inline int avr_feature(CPUAVRState *env, int feature)
> {
> diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> index dae56d7845..52ec21dd16 100644
> --- a/target/avr/cpu.c
> +++ b/target/avr/cpu.c
> @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
> static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
> {
> info->mach = bfd_arch_avr;
> -info->print_insn = NULL;
> +info->print_insn = avr_print_insn;
> }
>
> static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
> diff --git a/target/avr/disas.c b/target/avr/disas.c
> new file mode 100644
> index 00..727fc463ce
> --- /dev/null
> +++ b/target/avr/disas.c
> @@ -0,0 +1,214 @@
> +/*
> + * OpenRISC disassembler
> + *
> + * Copyright (c) 2018 Richard Henderson
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation, either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Tuesday, November 26, 2019, Michael Rolnik wrote:
>
>
> On Tue, Nov 26, 2019 at 9:52 PM Aleksandar Markovic <
> aleksandar.m.m...@gmail.com> wrote:
>
>> On Sun, Nov 24, 2019 at 6:03 AM Michael Rolnik wrote:
>> >
>> > Provide function disassembles executed instruction when `-d in_asm` is
>> > provided
>> >
>> > Signed-off-by: Michael Rolnik
>> > ---
>> > target/avr/cpu.h | 1 +
>> > target/avr/cpu.c | 2 +-
>> > target/avr/disas.c | 214 +
>> > target/avr/translate.c | 11 +++
>> > 4 files changed, 227 insertions(+), 1 deletion(-)
>> > create mode 100644 target/avr/disas.c
>> >
>> > diff --git a/target/avr/cpu.h b/target/avr/cpu.h
>> > index ed9218af5f..574118beab 100644
>> > --- a/target/avr/cpu.h
>> > +++ b/target/avr/cpu.h
>> > @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int
>> int_req);
>> > hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
>> > int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
>> > int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
>> > +int avr_print_insn(bfd_vma addr, disassemble_info *info);
>> >
>> > static inline int avr_feature(CPUAVRState *env, int feature)
>> > {
>> > diff --git a/target/avr/cpu.c b/target/avr/cpu.c
>> > index dae56d7845..52ec21dd16 100644
>> > --- a/target/avr/cpu.c
>> > +++ b/target/avr/cpu.c
>> > @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
>> > static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info
>> *info)
>> > {
>> > info->mach = bfd_arch_avr;
>> > -info->print_insn = NULL;
>> > +info->print_insn = avr_print_insn;
>> > }
>> >
>> > static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
>> > diff --git a/target/avr/disas.c b/target/avr/disas.c
>> > new file mode 100644
>> > index 00..727fc463ce
>> > --- /dev/null
>> > +++ b/target/avr/disas.c
>> > @@ -0,0 +1,214 @@
>> > +/*
>> > + * OpenRISC disassembler
>> > + *
>> > + * Copyright (c) 2018 Richard Henderson
>> > + *
>> > + * This program is free software: you can redistribute it and/or modify
>> > + * it under the terms of the GNU General Public License as published by
>> > + * the Free Software Foundation, either version 2 of the License, or
>> > + * (at your option) any later version.
>> > + *
>> > + * This program is distributed in the hope that it will be useful,
>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> > + * GNU General Public License for more details.
>> > + *
>> > + * You should have received a copy of the GNU General Public License
>> > + * along with this program. If not, see > >.
>> > + */
>> > +
>> > +#include "qemu/osdep.h"
>> > +#include "disas/dis-asm.h"
>> > +#include "qemu/bitops.h"
>> > +#include "cpu.h"
>> > +
>> > +typedef struct {
>> > +disassemble_info *info;
>> > +uint16_t next_word;
>> > +bool next_word_used;
>> > +} DisasContext;
>> > +
>> > +static int to_A(DisasContext *ctx, int indx) { return 16 + (indx %
>> 16); }
>> > +static int to_B(DisasContext *ctx, int indx) { return 16 + (indx % 8);
>> }
>> > +static int to_C(DisasContext *ctx, int indx) { return 24 + (indx % 4)
>> * 2; }
>> > +static int to_D(DisasContext *ctx, int indx) { return (indx % 16) * 2;
>> }
>> > +
>>
>> Is there any better way for naming these four function than
>> meaningless to_A, to_B, to_C, to_D?
>
>
>> Aleksandar
>>
>
> if you look into insn.decode file you will see the following comment.
> # A = [16 .. 31]
> # B = [16 .. 23]
> # C = [24, 26, 28, 30]
> # D = [0, 2, 4, 6, 8, .. 30]
>
> I can call them if you prefer
> A is regs_16_to_31_by_one
> B is regs_16_to_23_by_one
> C is regs_24_to_30_by_two
> D is regs_00_to_30_by_two
>
>
I really like these new names.
>
>>
>> > +static uint16_t next_word(DisasContext *ctx)
>> > +{
>> > +ctx->next_word_used = true;
>> > +return ctx->next_word;
>> > +}
>> > +
>> > +static int append_16(DisasContext *ctx, int x)
>> > +{
>> > +return x << 16 | next_word(ctx);
>> > +}
>> > +
>> > +
>> > +/* Include the auto-generated decoder. */
>> > +static bool decode_insn(DisasContext *ctx, uint16_t insn);
>> > +#include "decode_insn.inc.c"
>> > +
>> > +#define output(mnemonic, format, ...) \
>> > +(pctx->info->fprintf_func(pctx->info->stream, "%-9s " format, \
>> > +mnemonic, ##__VA_ARGS__))
>> > +
>> > +int avr_print_insn(bfd_vma addr, disassemble_info *info)
>> > +{
>> > +DisasContext ctx;
>> > +DisasContext *pctx =
>> > +bfd_byte buffer[4];
>> > +uint16_t insn;
>> > +int status;
>> > +
>> > +ctx.info = info;
>> > +
>> > +status = info->read_memory_func(addr, buffer, 4, info);
>> > +if (status != 0) {
>> > +info->memory_error_func(status, addr, info);
>> > +return -1;
>> > +}
>> > +insn = bfd_getl16(buffer);
>> > +
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Tue, Nov 26, 2019 at 9:52 PM Aleksandar Markovic <
aleksandar.m.m...@gmail.com> wrote:
> On Sun, Nov 24, 2019 at 6:03 AM Michael Rolnik wrote:
> >
> > Provide function disassembles executed instruction when `-d in_asm` is
> > provided
> >
> > Signed-off-by: Michael Rolnik
> > ---
> > target/avr/cpu.h | 1 +
> > target/avr/cpu.c | 2 +-
> > target/avr/disas.c | 214 +
> > target/avr/translate.c | 11 +++
> > 4 files changed, 227 insertions(+), 1 deletion(-)
> > create mode 100644 target/avr/disas.c
> >
> > diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> > index ed9218af5f..574118beab 100644
> > --- a/target/avr/cpu.h
> > +++ b/target/avr/cpu.h
> > @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int
> int_req);
> > hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> > int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> > int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> > +int avr_print_insn(bfd_vma addr, disassemble_info *info);
> >
> > static inline int avr_feature(CPUAVRState *env, int feature)
> > {
> > diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> > index dae56d7845..52ec21dd16 100644
> > --- a/target/avr/cpu.c
> > +++ b/target/avr/cpu.c
> > @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
> > static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info
> *info)
> > {
> > info->mach = bfd_arch_avr;
> > -info->print_insn = NULL;
> > +info->print_insn = avr_print_insn;
> > }
> >
> > static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
> > diff --git a/target/avr/disas.c b/target/avr/disas.c
> > new file mode 100644
> > index 00..727fc463ce
> > --- /dev/null
> > +++ b/target/avr/disas.c
> > @@ -0,0 +1,214 @@
> > +/*
> > + * OpenRISC disassembler
> > + *
> > + * Copyright (c) 2018 Richard Henderson
> > + *
> > + * This program is free software: you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation, either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program. If not, see >.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "disas/dis-asm.h"
> > +#include "qemu/bitops.h"
> > +#include "cpu.h"
> > +
> > +typedef struct {
> > +disassemble_info *info;
> > +uint16_t next_word;
> > +bool next_word_used;
> > +} DisasContext;
> > +
> > +static int to_A(DisasContext *ctx, int indx) { return 16 + (indx % 16);
> }
> > +static int to_B(DisasContext *ctx, int indx) { return 16 + (indx % 8); }
> > +static int to_C(DisasContext *ctx, int indx) { return 24 + (indx % 4) *
> 2; }
> > +static int to_D(DisasContext *ctx, int indx) { return (indx % 16) * 2; }
> > +
>
> Is there any better way for naming these four function than
> meaningless to_A, to_B, to_C, to_D?
> Aleksandar
>
if you look into insn.decode file you will see the following comment.
# A = [16 .. 31]
# B = [16 .. 23]
# C = [24, 26, 28, 30]
# D = [0, 2, 4, 6, 8, .. 30]
I can call them if you prefer
A is regs_16_to_31_by_one
B is regs_16_to_23_by_one
C is regs_24_to_30_by_two
D is regs_00_to_30_by_two
>
> > +static uint16_t next_word(DisasContext *ctx)
> > +{
> > +ctx->next_word_used = true;
> > +return ctx->next_word;
> > +}
> > +
> > +static int append_16(DisasContext *ctx, int x)
> > +{
> > +return x << 16 | next_word(ctx);
> > +}
> > +
> > +
> > +/* Include the auto-generated decoder. */
> > +static bool decode_insn(DisasContext *ctx, uint16_t insn);
> > +#include "decode_insn.inc.c"
> > +
> > +#define output(mnemonic, format, ...) \
> > +(pctx->info->fprintf_func(pctx->info->stream, "%-9s " format, \
> > +mnemonic, ##__VA_ARGS__))
> > +
> > +int avr_print_insn(bfd_vma addr, disassemble_info *info)
> > +{
> > +DisasContext ctx;
> > +DisasContext *pctx =
> > +bfd_byte buffer[4];
> > +uint16_t insn;
> > +int status;
> > +
> > +ctx.info = info;
> > +
> > +status = info->read_memory_func(addr, buffer, 4, info);
> > +if (status != 0) {
> > +info->memory_error_func(status, addr, info);
> > +return -1;
> > +}
> > +insn = bfd_getl16(buffer);
> > +ctx.next_word = bfd_getl16(buffer + 2);
> > +ctx.next_word_used = false;
> > +
> > +if (!decode_insn(, insn)) {
> > +output(".db", "0x%02x, 0x%02x", buffer[0], buffer[1]);
> > +}
> > +
> > +return ctx.next_word_used ? 4 : 2;
> > +}
> > +
>
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Sun, Nov 24, 2019 at 6:03 AM Michael Rolnik wrote:
>
> Provide function disassembles executed instruction when `-d in_asm` is
> provided
>
> Signed-off-by: Michael Rolnik
> ---
> target/avr/cpu.h | 1 +
> target/avr/cpu.c | 2 +-
> target/avr/disas.c | 214 +
> target/avr/translate.c | 11 +++
> 4 files changed, 227 insertions(+), 1 deletion(-)
> create mode 100644 target/avr/disas.c
>
> diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> index ed9218af5f..574118beab 100644
> --- a/target/avr/cpu.h
> +++ b/target/avr/cpu.h
> @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int int_req);
> hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> +int avr_print_insn(bfd_vma addr, disassemble_info *info);
>
> static inline int avr_feature(CPUAVRState *env, int feature)
> {
> diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> index dae56d7845..52ec21dd16 100644
> --- a/target/avr/cpu.c
> +++ b/target/avr/cpu.c
> @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
> static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
> {
> info->mach = bfd_arch_avr;
> -info->print_insn = NULL;
> +info->print_insn = avr_print_insn;
> }
>
> static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
> diff --git a/target/avr/disas.c b/target/avr/disas.c
> new file mode 100644
> index 00..727fc463ce
> --- /dev/null
> +++ b/target/avr/disas.c
> @@ -0,0 +1,214 @@
> +/*
> + * OpenRISC disassembler
> + *
> + * Copyright (c) 2018 Richard Henderson
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation, either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Sunday, November 24, 2019, Michael Rolnik wrote:
> Provide function disassembles executed instruction when `-d in_asm` is
> provided
>
> Signed-off-by: Michael Rolnik
> ---
Richard, is this what you expected from Michael, or there are still some
caveats?
Thanks for the suggestion!
Aleksandar
target/avr/cpu.h | 1 +
> target/avr/cpu.c | 2 +-
> target/avr/disas.c | 214 +
> target/avr/translate.c | 11 +++
> 4 files changed, 227 insertions(+), 1 deletion(-)
> create mode 100644 target/avr/disas.c
>
> diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> index ed9218af5f..574118beab 100644
> --- a/target/avr/cpu.h
> +++ b/target/avr/cpu.h
> @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int
> int_req);
> hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> +int avr_print_insn(bfd_vma addr, disassemble_info *info);
>
> static inline int avr_feature(CPUAVRState *env, int feature)
> {
> diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> index dae56d7845..52ec21dd16 100644
> --- a/target/avr/cpu.c
> +++ b/target/avr/cpu.c
> @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
> static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
> {
> info->mach = bfd_arch_avr;
> -info->print_insn = NULL;
> +info->print_insn = avr_print_insn;
> }
>
> static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
> diff --git a/target/avr/disas.c b/target/avr/disas.c
> new file mode 100644
> index 00..727fc463ce
> --- /dev/null
> +++ b/target/avr/disas.c
> @@ -0,0 +1,214 @@
> +/*
> + * OpenRISC disassembler
> + *
> + * Copyright (c) 2018 Richard Henderson
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation, either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Sunday, November 24, 2019, Michael Rolnik wrote:
> Provide function disassembles executed instruction when `-d in_asm` is
> provided
>
> Signed-off-by: Michael Rolnik
> ---
You should add "Suggested-by:"s for Philippe, Richard, and myself in tge
commit message.
Aleksandar
target/avr/cpu.h | 1 +
> target/avr/cpu.c | 2 +-
> target/avr/disas.c | 214 +
> target/avr/translate.c | 11 +++
> 4 files changed, 227 insertions(+), 1 deletion(-)
> create mode 100644 target/avr/disas.c
>
> diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> index ed9218af5f..574118beab 100644
> --- a/target/avr/cpu.h
> +++ b/target/avr/cpu.h
> @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int
> int_req);
> hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> +int avr_print_insn(bfd_vma addr, disassemble_info *info);
>
> static inline int avr_feature(CPUAVRState *env, int feature)
> {
> diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> index dae56d7845..52ec21dd16 100644
> --- a/target/avr/cpu.c
> +++ b/target/avr/cpu.c
> @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
> static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
> {
> info->mach = bfd_arch_avr;
> -info->print_insn = NULL;
> +info->print_insn = avr_print_insn;
> }
>
> static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
> diff --git a/target/avr/disas.c b/target/avr/disas.c
> new file mode 100644
> index 00..727fc463ce
> --- /dev/null
> +++ b/target/avr/disas.c
> @@ -0,0 +1,214 @@
> +/*
> + * OpenRISC disassembler
> + *
> + * Copyright (c) 2018 Richard Henderson
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation, either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see
Re: [PATCH v36 10/17] target/avr: Add instruction disassembly function
On Sunday, November 24, 2019, Michael Rolnik wrote:
> Provide function disassembles executed instruction when `-d in_asm` is
> provided
>
> Signed-off-by: Michael Rolnik
> ---
> target/avr/cpu.h | 1 +
> target/avr/cpu.c | 2 +-
> target/avr/disas.c | 214 +
> target/avr/translate.c | 11 +++
> 4 files changed, 227 insertions(+), 1 deletion(-)
> create mode 100644 target/avr/disas.c
>
> diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> index ed9218af5f..574118beab 100644
> --- a/target/avr/cpu.h
> +++ b/target/avr/cpu.h
> @@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int
> int_req);
> hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
> int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> +int avr_print_insn(bfd_vma addr, disassemble_info *info);
>
> static inline int avr_feature(CPUAVRState *env, int feature)
> {
> diff --git a/target/avr/cpu.c b/target/avr/cpu.c
> index dae56d7845..52ec21dd16 100644
> --- a/target/avr/cpu.c
> +++ b/target/avr/cpu.c
> @@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
> static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
> {
> info->mach = bfd_arch_avr;
> -info->print_insn = NULL;
> +info->print_insn = avr_print_insn;
> }
>
> static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
> diff --git a/target/avr/disas.c b/target/avr/disas.c
> new file mode 100644
> index 00..727fc463ce
> --- /dev/null
> +++ b/target/avr/disas.c
> @@ -0,0 +1,214 @@
> +/*
> + * OpenRISC disassembler
> + *
> + * Copyright (c) 2018 Richard Henderson
> + *
s/OpenRISC/AVR
s/2018/2019
You can as well a add copyright line with your name and email after
Richards.
Aleksandar
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation, either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see
[PATCH v36 10/17] target/avr: Add instruction disassembly function
Provide function disassembles executed instruction when `-d in_asm` is
provided
Signed-off-by: Michael Rolnik
---
target/avr/cpu.h | 1 +
target/avr/cpu.c | 2 +-
target/avr/disas.c | 214 +
target/avr/translate.c | 11 +++
4 files changed, 227 insertions(+), 1 deletion(-)
create mode 100644 target/avr/disas.c
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index ed9218af5f..574118beab 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -157,6 +157,7 @@ bool avr_cpu_exec_interrupt(CPUState *cpu, int int_req);
hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int avr_print_insn(bfd_vma addr, disassemble_info *info);
static inline int avr_feature(CPUAVRState *env, int feature)
{
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index dae56d7845..52ec21dd16 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -83,7 +83,7 @@ static void avr_cpu_reset(CPUState *cs)
static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
info->mach = bfd_arch_avr;
-info->print_insn = NULL;
+info->print_insn = avr_print_insn;
}
static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
diff --git a/target/avr/disas.c b/target/avr/disas.c
new file mode 100644
index 00..727fc463ce
--- /dev/null
+++ b/target/avr/disas.c
@@ -0,0 +1,214 @@
+/*
+ * OpenRISC disassembler
+ *
+ * Copyright (c) 2018 Richard Henderson
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see
