Re: [PATCH v4 0/4] Support RISC-V IOPMP
On Mon, Jan 22, 2024 at 04:01:12PM +1000, Alistair Francis wrote: > On Thu, Dec 21, 2023 at 4:38 PM Ethan Chen wrote: > > > > On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote: > > > On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via > > > wrote: > > > > > > > > This series implements IOPMP specification v1.0.0-draft4 rapid-k model. > > > > The specification url: > > > > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf > > > > > > > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt > > > > platform. This DMA device is connected to the IOPMP and has the > > > > functionalities > > > > > > I don't think we want to add an Andes DMA device to the virt machine. > > > > > > I can't even find the spec for the ATCDMAC300, which isn't great > > > > > > Alistair > > > > Since the IOPMP does not take effect when there is no other device connects > > to > > IOPMP, I think it is necessary to have a DMA device for IOPMP demonstration. > > That is true, but that device shouldn't be a vendor specific device > for the virt machine. > > > > > Do you have any suggestions for supporting IOPMP on RISC-V virt machine? > > A RVI device would be fine. Otherwise something that has become a > defacto standard by being commonly used (the SiFive PLIC for example). > > I really don't think it should be some vendor IP, especially one that > doesn't have a public datasheet. > > You could add an Andes machine that can use your vendor IP. Otherwise > we can look at adding IOPMP and not connecting it, but that is a pain. In submitted patch v5, I removed vendor IP and made generic PCIe host bridge on RISC-V virt machine connect to IOPMP. DMA operation from PCI devices on the bridge will be check by IOPMP. > > What is the IOPMP spec group doing for testing? IOPMP TG is doing an implementation(RTL) testing. NVidia will provide SystemC stimulus from different ports to test or observe the object under testing. A test bench will be provided in the form of TLM-2.0 transaction level modeling. Thanks, Ethan Chen
Re: [PATCH v4 0/4] Support RISC-V IOPMP
On Thu, Dec 21, 2023 at 4:38 PM Ethan Chen wrote: > > On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote: > > On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via > > wrote: > > > > > > This series implements IOPMP specification v1.0.0-draft4 rapid-k model. > > > The specification url: > > > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf > > > > > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt > > > platform. This DMA device is connected to the IOPMP and has the > > > functionalities > > > > I don't think we want to add an Andes DMA device to the virt machine. > > > > I can't even find the spec for the ATCDMAC300, which isn't great > > > > Alistair > > Since the IOPMP does not take effect when there is no other device connects to > IOPMP, I think it is necessary to have a DMA device for IOPMP demonstration. That is true, but that device shouldn't be a vendor specific device for the virt machine. > > Do you have any suggestions for supporting IOPMP on RISC-V virt machine? A RVI device would be fine. Otherwise something that has become a defacto standard by being commonly used (the SiFive PLIC for example). I really don't think it should be some vendor IP, especially one that doesn't have a public datasheet. You could add an Andes machine that can use your vendor IP. Otherwise we can look at adding IOPMP and not connecting it, but that is a pain. What is the IOPMP spec group doing for testing? Alistair
Re: [PATCH v4 0/4] Support RISC-V IOPMP
On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote: > On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via wrote: > > > > This series implements IOPMP specification v1.0.0-draft4 rapid-k model. > > The specification url: > > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf > > > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt > > platform. This DMA device is connected to the IOPMP and has the > > functionalities > > I don't think we want to add an Andes DMA device to the virt machine. > > I can't even find the spec for the ATCDMAC300, which isn't great > AndeShape ATCDMAC110 data sheet is available on Andes website http://www.andestech.com/en/products-solutions/product-documentation/ ATCDMAC300 is compatible with ATCDMAC110. Thanks, Ethan Chen > > > required by IOPMP, including: > > - Support setup the connection to IOPMP > > - Support asynchronous I/O to handle stall transactions > > - Send transaction information > > > > IOPMP takes a transaction which partially match an entry as a partially hit > > error. The transaction size is depending on source device, destination > > device > > and bus. > > > > Source device can send a transaction_info to IOPMP. IOPMP will check > > partially > > hit by transaction_info. If source device does not send a transaction_info, > > IOPMP checks information in IOMMU and dose not check partially hit. > > > > Changes for v4: > > > > - Add descriptions of IOPMP and ATCDMAC300 > > - Refine coding style and comments > > - config XILINX_AXI does not include file stream.c but selects config > > STREAM > > instead. > > - ATCDMAC300: INT_STATUS is write 1 clear per bit > > Rename iopmp_address_sink to > > transcation_info_sink > > - IOPMP: Refine error message and remove unused variable > > - VIRT: Document new options > > atcdmac300 is only added when iopmp is enabled > > serial setting should not be changed > > > > Ethan Chen (4): > > hw/core: Add config stream > > Add RISC-V IOPMP support > > hw/dma: Add Andes ATCDMAC300 support > > hw/riscv/virt: Add IOPMP support > > > > docs/system/riscv/virt.rst| 11 + > > hw/Kconfig| 1 + > > hw/core/Kconfig | 3 + > > hw/core/meson.build | 2 +- > > hw/dma/Kconfig| 4 + > > hw/dma/atcdmac300.c | 566 ++ > > hw/dma/meson.build| 1 + > > hw/misc/Kconfig | 4 + > > hw/misc/meson.build | 1 + > > hw/misc/riscv_iopmp.c | 966 ++ > > hw/riscv/Kconfig | 2 + > > hw/riscv/virt.c | 65 ++ > > include/hw/dma/atcdmac300.h | 180 > > include/hw/misc/riscv_iopmp.h | 341 +++ > > .../hw/misc/riscv_iopmp_transaction_info.h| 28 + > > include/hw/riscv/virt.h | 10 +- > > 16 files changed, 2183 insertions(+), 2 deletions(-) > > create mode 100644 hw/dma/atcdmac300.c > > create mode 100644 hw/misc/riscv_iopmp.c > > create mode 100644 include/hw/dma/atcdmac300.h > > create mode 100644 include/hw/misc/riscv_iopmp.h > > create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h > > > > -- > > 2.34.1 > > > >
Re: [PATCH v4 0/4] Support RISC-V IOPMP
On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote: > On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via wrote: > > > > This series implements IOPMP specification v1.0.0-draft4 rapid-k model. > > The specification url: > > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf > > > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt > > platform. This DMA device is connected to the IOPMP and has the > > functionalities > > I don't think we want to add an Andes DMA device to the virt machine. > > I can't even find the spec for the ATCDMAC300, which isn't great > > Alistair Since the IOPMP does not take effect when there is no other device connects to IOPMP, I think it is necessary to have a DMA device for IOPMP demonstration. Do you have any suggestions for supporting IOPMP on RISC-V virt machine? Thanks, Ethan Chen > > > required by IOPMP, including: > > - Support setup the connection to IOPMP > > - Support asynchronous I/O to handle stall transactions > > - Send transaction information > > > > IOPMP takes a transaction which partially match an entry as a partially hit > > error. The transaction size is depending on source device, destination > > device > > and bus. > > > > Source device can send a transaction_info to IOPMP. IOPMP will check > > partially > > hit by transaction_info. If source device does not send a transaction_info, > > IOPMP checks information in IOMMU and dose not check partially hit. > > > > Changes for v4: > > > > - Add descriptions of IOPMP and ATCDMAC300 > > - Refine coding style and comments > > - config XILINX_AXI does not include file stream.c but selects config > > STREAM > > instead. > > - ATCDMAC300: INT_STATUS is write 1 clear per bit > > Rename iopmp_address_sink to > > transcation_info_sink > > - IOPMP: Refine error message and remove unused variable > > - VIRT: Document new options > > atcdmac300 is only added when iopmp is enabled > > serial setting should not be changed > > > > Ethan Chen (4): > > hw/core: Add config stream > > Add RISC-V IOPMP support > > hw/dma: Add Andes ATCDMAC300 support > > hw/riscv/virt: Add IOPMP support > > > > docs/system/riscv/virt.rst| 11 + > > hw/Kconfig| 1 + > > hw/core/Kconfig | 3 + > > hw/core/meson.build | 2 +- > > hw/dma/Kconfig| 4 + > > hw/dma/atcdmac300.c | 566 ++ > > hw/dma/meson.build| 1 + > > hw/misc/Kconfig | 4 + > > hw/misc/meson.build | 1 + > > hw/misc/riscv_iopmp.c | 966 ++ > > hw/riscv/Kconfig | 2 + > > hw/riscv/virt.c | 65 ++ > > include/hw/dma/atcdmac300.h | 180 > > include/hw/misc/riscv_iopmp.h | 341 +++ > > .../hw/misc/riscv_iopmp_transaction_info.h| 28 + > > include/hw/riscv/virt.h | 10 +- > > 16 files changed, 2183 insertions(+), 2 deletions(-) > > create mode 100644 hw/dma/atcdmac300.c > > create mode 100644 hw/misc/riscv_iopmp.c > > create mode 100644 include/hw/dma/atcdmac300.h > > create mode 100644 include/hw/misc/riscv_iopmp.h > > create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h > > > > -- > > 2.34.1 > > > >
Re: [PATCH v4 0/4] Support RISC-V IOPMP
On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via wrote: > > This series implements IOPMP specification v1.0.0-draft4 rapid-k model. > The specification url: > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt > platform. This DMA device is connected to the IOPMP and has the > functionalities I don't think we want to add an Andes DMA device to the virt machine. I can't even find the spec for the ATCDMAC300, which isn't great Alistair > required by IOPMP, including: > - Support setup the connection to IOPMP > - Support asynchronous I/O to handle stall transactions > - Send transaction information > > IOPMP takes a transaction which partially match an entry as a partially hit > error. The transaction size is depending on source device, destination device > and bus. > > Source device can send a transaction_info to IOPMP. IOPMP will check partially > hit by transaction_info. If source device does not send a transaction_info, > IOPMP checks information in IOMMU and dose not check partially hit. > > Changes for v4: > > - Add descriptions of IOPMP and ATCDMAC300 > - Refine coding style and comments > - config XILINX_AXI does not include file stream.c but selects config STREAM > instead. > - ATCDMAC300: INT_STATUS is write 1 clear per bit > Rename iopmp_address_sink to transcation_info_sink > - IOPMP: Refine error message and remove unused variable > - VIRT: Document new options > atcdmac300 is only added when iopmp is enabled > serial setting should not be changed > > Ethan Chen (4): > hw/core: Add config stream > Add RISC-V IOPMP support > hw/dma: Add Andes ATCDMAC300 support > hw/riscv/virt: Add IOPMP support > > docs/system/riscv/virt.rst| 11 + > hw/Kconfig| 1 + > hw/core/Kconfig | 3 + > hw/core/meson.build | 2 +- > hw/dma/Kconfig| 4 + > hw/dma/atcdmac300.c | 566 ++ > hw/dma/meson.build| 1 + > hw/misc/Kconfig | 4 + > hw/misc/meson.build | 1 + > hw/misc/riscv_iopmp.c | 966 ++ > hw/riscv/Kconfig | 2 + > hw/riscv/virt.c | 65 ++ > include/hw/dma/atcdmac300.h | 180 > include/hw/misc/riscv_iopmp.h | 341 +++ > .../hw/misc/riscv_iopmp_transaction_info.h| 28 + > include/hw/riscv/virt.h | 10 +- > 16 files changed, 2183 insertions(+), 2 deletions(-) > create mode 100644 hw/dma/atcdmac300.c > create mode 100644 hw/misc/riscv_iopmp.c > create mode 100644 include/hw/dma/atcdmac300.h > create mode 100644 include/hw/misc/riscv_iopmp.h > create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h > > -- > 2.34.1 > >
Re: [PATCH v4 0/4] Support RISC-V IOPMP
Ping again. On Tue, Dec 05, 2023 at 03:48:07PM +0800, Ethan Chen wrote: > Ping. > https://patchew.org/QEMU/20231122053251.440723-1-etha...@andestech.com/ > > On Wed, Nov 22, 2023 at 01:32:47PM +0800, Ethan Chen wrote: > > This series implements IOPMP specification v1.0.0-draft4 rapid-k model. > > The specification url: > > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf > > > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt > > platform. This DMA device is connected to the IOPMP and has the > > functionalities > > required by IOPMP, including: > > - Support setup the connection to IOPMP > > - Support asynchronous I/O to handle stall transactions > > - Send transaction information > > > > IOPMP takes a transaction which partially match an entry as a partially hit > > error. The transaction size is depending on source device, destination > > device > > and bus. > > > > Source device can send a transaction_info to IOPMP. IOPMP will check > > partially > > hit by transaction_info. If source device does not send a transaction_info, > > IOPMP checks information in IOMMU and dose not check partially hit. > > > > Changes for v4: > > > > - Add descriptions of IOPMP and ATCDMAC300 > > - Refine coding style and comments > > - config XILINX_AXI does not include file stream.c but selects config > > STREAM > > instead. > > - ATCDMAC300: INT_STATUS is write 1 clear per bit > > Rename iopmp_address_sink to transcation_info_sink > > - IOPMP: Refine error message and remove unused variable > > - VIRT: Document new options > > atcdmac300 is only added when iopmp is enabled > > serial setting should not be changed > > > > Ethan Chen (4): > > hw/core: Add config stream > > Add RISC-V IOPMP support > > hw/dma: Add Andes ATCDMAC300 support > > hw/riscv/virt: Add IOPMP support > > > > docs/system/riscv/virt.rst| 11 + > > hw/Kconfig| 1 + > > hw/core/Kconfig | 3 + > > hw/core/meson.build | 2 +- > > hw/dma/Kconfig| 4 + > > hw/dma/atcdmac300.c | 566 ++ > > hw/dma/meson.build| 1 + > > hw/misc/Kconfig | 4 + > > hw/misc/meson.build | 1 + > > hw/misc/riscv_iopmp.c | 966 ++ > > hw/riscv/Kconfig | 2 + > > hw/riscv/virt.c | 65 ++ > > include/hw/dma/atcdmac300.h | 180 > > include/hw/misc/riscv_iopmp.h | 341 +++ > > .../hw/misc/riscv_iopmp_transaction_info.h| 28 + > > include/hw/riscv/virt.h | 10 +- > > 16 files changed, 2183 insertions(+), 2 deletions(-) > > create mode 100644 hw/dma/atcdmac300.c > > create mode 100644 hw/misc/riscv_iopmp.c > > create mode 100644 include/hw/dma/atcdmac300.h > > create mode 100644 include/hw/misc/riscv_iopmp.h > > create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h > > > > -- > > 2.34.1 > >
Re: [PATCH v4 0/4] Support RISC-V IOPMP
Ping. https://patchew.org/QEMU/20231122053251.440723-1-etha...@andestech.com/ On Wed, Nov 22, 2023 at 01:32:47PM +0800, Ethan Chen wrote: > This series implements IOPMP specification v1.0.0-draft4 rapid-k model. > The specification url: > https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf > > When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt > platform. This DMA device is connected to the IOPMP and has the > functionalities > required by IOPMP, including: > - Support setup the connection to IOPMP > - Support asynchronous I/O to handle stall transactions > - Send transaction information > > IOPMP takes a transaction which partially match an entry as a partially hit > error. The transaction size is depending on source device, destination device > and bus. > > Source device can send a transaction_info to IOPMP. IOPMP will check partially > hit by transaction_info. If source device does not send a transaction_info, > IOPMP checks information in IOMMU and dose not check partially hit. > > Changes for v4: > > - Add descriptions of IOPMP and ATCDMAC300 > - Refine coding style and comments > - config XILINX_AXI does not include file stream.c but selects config STREAM > instead. > - ATCDMAC300: INT_STATUS is write 1 clear per bit > Rename iopmp_address_sink to transcation_info_sink > - IOPMP: Refine error message and remove unused variable > - VIRT: Document new options > atcdmac300 is only added when iopmp is enabled > serial setting should not be changed > > Ethan Chen (4): > hw/core: Add config stream > Add RISC-V IOPMP support > hw/dma: Add Andes ATCDMAC300 support > hw/riscv/virt: Add IOPMP support > > docs/system/riscv/virt.rst| 11 + > hw/Kconfig| 1 + > hw/core/Kconfig | 3 + > hw/core/meson.build | 2 +- > hw/dma/Kconfig| 4 + > hw/dma/atcdmac300.c | 566 ++ > hw/dma/meson.build| 1 + > hw/misc/Kconfig | 4 + > hw/misc/meson.build | 1 + > hw/misc/riscv_iopmp.c | 966 ++ > hw/riscv/Kconfig | 2 + > hw/riscv/virt.c | 65 ++ > include/hw/dma/atcdmac300.h | 180 > include/hw/misc/riscv_iopmp.h | 341 +++ > .../hw/misc/riscv_iopmp_transaction_info.h| 28 + > include/hw/riscv/virt.h | 10 +- > 16 files changed, 2183 insertions(+), 2 deletions(-) > create mode 100644 hw/dma/atcdmac300.c > create mode 100644 hw/misc/riscv_iopmp.c > create mode 100644 include/hw/dma/atcdmac300.h > create mode 100644 include/hw/misc/riscv_iopmp.h > create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h > > -- > 2.34.1 >
[PATCH v4 0/4] Support RISC-V IOPMP
This series implements IOPMP specification v1.0.0-draft4 rapid-k model. The specification url: https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt platform. This DMA device is connected to the IOPMP and has the functionalities required by IOPMP, including: - Support setup the connection to IOPMP - Support asynchronous I/O to handle stall transactions - Send transaction information IOPMP takes a transaction which partially match an entry as a partially hit error. The transaction size is depending on source device, destination device and bus. Source device can send a transaction_info to IOPMP. IOPMP will check partially hit by transaction_info. If source device does not send a transaction_info, IOPMP checks information in IOMMU and dose not check partially hit. Changes for v4: - Add descriptions of IOPMP and ATCDMAC300 - Refine coding style and comments - config XILINX_AXI does not include file stream.c but selects config STREAM instead. - ATCDMAC300: INT_STATUS is write 1 clear per bit Rename iopmp_address_sink to transcation_info_sink - IOPMP: Refine error message and remove unused variable - VIRT: Document new options atcdmac300 is only added when iopmp is enabled serial setting should not be changed Ethan Chen (4): hw/core: Add config stream Add RISC-V IOPMP support hw/dma: Add Andes ATCDMAC300 support hw/riscv/virt: Add IOPMP support docs/system/riscv/virt.rst| 11 + hw/Kconfig| 1 + hw/core/Kconfig | 3 + hw/core/meson.build | 2 +- hw/dma/Kconfig| 4 + hw/dma/atcdmac300.c | 566 ++ hw/dma/meson.build| 1 + hw/misc/Kconfig | 4 + hw/misc/meson.build | 1 + hw/misc/riscv_iopmp.c | 966 ++ hw/riscv/Kconfig | 2 + hw/riscv/virt.c | 65 ++ include/hw/dma/atcdmac300.h | 180 include/hw/misc/riscv_iopmp.h | 341 +++ .../hw/misc/riscv_iopmp_transaction_info.h| 28 + include/hw/riscv/virt.h | 10 +- 16 files changed, 2183 insertions(+), 2 deletions(-) create mode 100644 hw/dma/atcdmac300.c create mode 100644 hw/misc/riscv_iopmp.c create mode 100644 include/hw/dma/atcdmac300.h create mode 100644 include/hw/misc/riscv_iopmp.h create mode 100644 include/hw/misc/riscv_iopmp_transaction_info.h -- 2.34.1
