Re: [PATCH v4 3/5] target/s390x: Fix cc_calc_sla_64() missing overflows

2022-01-13 Thread David Hildenbrand
On 12.01.22 17:50, Ilya Leoshkevich wrote:
> An overflow occurs for SLAG when at least one shifted bit is not equal
> to sign bit. Therefore, we need to check that `shift + 1` bits are
> neither all 0s nor all 1s. The current code checks only `shift` bits,
> missing some overflows.
> 
> Fixes: cbe24bfa91d2 ("target-s390: Convert SHIFT, ROTATE SINGLE")
> Co-developed-by: David Hildenbrand 
> Signed-off-by: Ilya Leoshkevich 
> ---
>  target/s390x/tcg/cc_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/s390x/tcg/cc_helper.c b/target/s390x/tcg/cc_helper.c
> index c2c96c3a3c..c9b7b0e8c6 100644
> --- a/target/s390x/tcg/cc_helper.c
> +++ b/target/s390x/tcg/cc_helper.c
> @@ -297,7 +297,7 @@ static uint32_t cc_calc_sla_32(uint32_t src, int shift)
>  
>  static uint32_t cc_calc_sla_64(uint64_t src, int shift)
>  {
> -uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
> +uint64_t mask = -1ULL << (63 - shift);
>  uint64_t sign = 1ULL << 63;
>  uint64_t match;
>  int64_t r;

Reviewed-by: David Hildenbrand 

-- 
Thanks,

David / dhildenb




[PATCH v4 3/5] target/s390x: Fix cc_calc_sla_64() missing overflows

2022-01-12 Thread Ilya Leoshkevich
An overflow occurs for SLAG when at least one shifted bit is not equal
to sign bit. Therefore, we need to check that `shift + 1` bits are
neither all 0s nor all 1s. The current code checks only `shift` bits,
missing some overflows.

Fixes: cbe24bfa91d2 ("target-s390: Convert SHIFT, ROTATE SINGLE")
Co-developed-by: David Hildenbrand 
Signed-off-by: Ilya Leoshkevich 
---
 target/s390x/tcg/cc_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/s390x/tcg/cc_helper.c b/target/s390x/tcg/cc_helper.c
index c2c96c3a3c..c9b7b0e8c6 100644
--- a/target/s390x/tcg/cc_helper.c
+++ b/target/s390x/tcg/cc_helper.c
@@ -297,7 +297,7 @@ static uint32_t cc_calc_sla_32(uint32_t src, int shift)
 
 static uint32_t cc_calc_sla_64(uint64_t src, int shift)
 {
-uint64_t mask = ((1ULL << shift) - 1ULL) << (64 - shift);
+uint64_t mask = -1ULL << (63 - shift);
 uint64_t sign = 1ULL << 63;
 uint64_t match;
 int64_t r;
-- 
2.31.1