Re: [PULL 0/4] target-arm queue

[Stefan Hajnoczi]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any 
user-visible changes.


signature.asc
Description: PGP signature

[PULL 0/4] target-arm queue

[Peter Maydell]

Hi; here are a handful of small bug fixes for Arm guests for rc0.

thanks
-- PMM

The following changes since commit 69680740eafa1838527c90155a7432d51b8ff203:

  Merge tag 'qdev-array-prop' of https://repo.or.cz/qemu/kevin into staging 
(2023-11-11 11:23:25 +0800)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20231113

for you to fetch changes up to f6e8d1ef05a126de796ae03dd81e048e3ff48ff1:

  target/arm/tcg: enable PMU feature for Cortex-A8 and A9 (2023-11-13 16:31:41 
+)


target-arm queue:
 * hw/arm/virt: fix GIC maintenance IRQ registration
 * target/arm: HVC at EL3 should go to EL3, not EL2
 * target/arm: Correct MTE tag checking for reverse-copy MOPS
 * target/arm/tcg: enable PMU feature for Cortex-A8 and A9


Jean-Philippe Brucker (1):
  hw/arm/virt: fix GIC maintenance IRQ registration

Nikita Ostrenkov (1):
  target/arm/tcg: enable PMU feature for Cortex-A8 and A9

Peter Maydell (2):
  target/arm: HVC at EL3 should go to EL3, not EL2
  target/arm: Correct MTE tag checking for reverse-copy MOPS

 hw/arm/virt.c  |  6 --
 target/arm/tcg/cpu32.c |  2 ++
 target/arm/tcg/mte_helper.c| 12 ++--
 target/arm/tcg/translate-a64.c |  4 +++-
 4 files changed, 19 insertions(+), 5 deletions(-)

Re: [PULL 0/4] target-arm queue

[Peter Maydell]

On Mon, 3 Apr 2023 at 17:01, Peter Maydell  wrote:
>
> The following changes since commit efcd0ec14b0fe9ee0ee70277763b2d538d19238d:
>
>   Merge tag 'misc-fixes-20230330' of https://github.com/philmd/qemu into 
> staging (2023-03-30 14:22:29 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20230403
>
> for you to fetch changes up to a0eaa126af3c5a43937a22c58cfb9bb36e4a5001:
>
>   hw/ssi: Fix Linux driver init issue with xilinx_spi (2023-04-03 16:12:30 
> +0100)
>
> 
>  * target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()
>  * hw/arm: do not free machine->fdt in arm_load_dtb()
>  * target/arm: Fix generated code for cpreg reads when HSTR is active
>  * hw/ssi: Fix Linux driver init issue with xilinx_spi
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0
for any user-visible changes.

-- PMM

[PULL 0/4] target-arm queue

[Peter Maydell]

The following changes since commit efcd0ec14b0fe9ee0ee70277763b2d538d19238d:

  Merge tag 'misc-fixes-20230330' of https://github.com/philmd/qemu into 
staging (2023-03-30 14:22:29 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20230403

for you to fetch changes up to a0eaa126af3c5a43937a22c58cfb9bb36e4a5001:

  hw/ssi: Fix Linux driver init issue with xilinx_spi (2023-04-03 16:12:30 
+0100)


 * target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()
 * hw/arm: do not free machine->fdt in arm_load_dtb()
 * target/arm: Fix generated code for cpreg reads when HSTR is active
 * hw/ssi: Fix Linux driver init issue with xilinx_spi


Chris Rauer (1):
  hw/ssi: Fix Linux driver init issue with xilinx_spi

Markus Armbruster (1):
  hw/arm: do not free machine->fdt in arm_load_dtb()

Peter Maydell (1):
  target/arm: Fix generated code for cpreg reads when HSTR is active

Philippe Mathieu-Daudé (1):
  target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()

 target/arm/internals.h| 15 ++-
 hw/arm/boot.c |  5 -
 hw/ssi/xilinx_spi.c   |  1 +
 target/arm/gdbstub64.c|  7 +--
 target/arm/tcg/pauth_helper.c | 18 +-
 target/arm/tcg/translate.c|  6 ++
 6 files changed, 27 insertions(+), 25 deletions(-)

Re: [PULL 0/4] target-arm queue

[Richard Henderson]

On 11/15/21 9:19 PM, Peter Maydell wrote:

Hi; some minor changes for 6.2, which I think can be classified
as bug fixes and are OK for this point in the release cycle.
(Wouldn't be the end of the world if they slipped to 7.0.)

-- PMM

The following changes since commit 42f6c9179be4401974dd3a75ee72defd16b5092d:

   Merge tag 'pull-ppc-2022' of https://github.com/legoater/qemu into 
staging (2021-11-12 12:28:25 +0100)

are available in the Git repository at:

   https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-2025-1

for you to fetch changes up to 1adf528ec3bdf62ea3b580b7ad562534a3676ff5:

   hw/rtc/pl031: Send RTC_CHANGE QMP event (2021-11-15 18:53:00 +)


target-arm queue:
  * Support multiple redistributor regions for TCG GICv3
  * Send RTC_CHANGE QMP event from pl031


Eric Auger (1):
   hw/rtc/pl031: Send RTC_CHANGE QMP event

Peter Maydell (3):
   hw/intc/arm_gicv3: Move checking of redist-region-count to 
arm_gicv3_common_realize
   hw/intc/arm_gicv3: Set GICR_TYPER.Last correctly when nb_redist_regions 
> 1
   hw/intc/arm_gicv3: Support multiple redistributor regions

  include/hw/intc/arm_gicv3_common.h | 14 --
  hw/intc/arm_gicv3.c| 12 +---
  hw/intc/arm_gicv3_common.c | 56 --
  hw/intc/arm_gicv3_kvm.c| 10 ++-
  hw/intc/arm_gicv3_redist.c | 40 +++
  hw/rtc/pl031.c | 10 ++-
  hw/rtc/meson.build |  2 +-
  7 files changed, 83 insertions(+), 61 deletions(-)


Applied, thanks.


r~

[PULL 0/4] target-arm queue

[Peter Maydell]

Hi; some minor changes for 6.2, which I think can be classified
as bug fixes and are OK for this point in the release cycle.
(Wouldn't be the end of the world if they slipped to 7.0.)

-- PMM

The following changes since commit 42f6c9179be4401974dd3a75ee72defd16b5092d:

  Merge tag 'pull-ppc-2022' of https://github.com/legoater/qemu into 
staging (2021-11-12 12:28:25 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-2025-1

for you to fetch changes up to 1adf528ec3bdf62ea3b580b7ad562534a3676ff5:

  hw/rtc/pl031: Send RTC_CHANGE QMP event (2021-11-15 18:53:00 +)


target-arm queue:
 * Support multiple redistributor regions for TCG GICv3
 * Send RTC_CHANGE QMP event from pl031


Eric Auger (1):
  hw/rtc/pl031: Send RTC_CHANGE QMP event

Peter Maydell (3):
  hw/intc/arm_gicv3: Move checking of redist-region-count to 
arm_gicv3_common_realize
  hw/intc/arm_gicv3: Set GICR_TYPER.Last correctly when nb_redist_regions > 
1
  hw/intc/arm_gicv3: Support multiple redistributor regions

 include/hw/intc/arm_gicv3_common.h | 14 --
 hw/intc/arm_gicv3.c| 12 +---
 hw/intc/arm_gicv3_common.c | 56 --
 hw/intc/arm_gicv3_kvm.c| 10 ++-
 hw/intc/arm_gicv3_redist.c | 40 +++
 hw/rtc/pl031.c | 10 ++-
 hw/rtc/meson.build |  2 +-
 7 files changed, 83 insertions(+), 61 deletions(-)

Re: [PULL 0/4] target-arm queue

[Peter Maydell]

On Tue, 26 Nov 2019 at 14:12, Peter Maydell  wrote:
>
> Arm patches for rc3 : just a handful of bug fixes.
>
> thanks
> -- PMM
>
>
> The following changes since commit 4ecc984210ca1bf508a96a550ec8a93a5f833f6c:
>
>   Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-rc3' 
> into staging (2019-11-26 12:36:40 +)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20191126
>
> for you to fetch changes up to 6a4ef4e5d1084ce41fafa7d470a644b0fd3d9317:
>
>   target/arm: Honor HCR_EL2.TID3 trapping requirements (2019-11-26 13:55:37 
> +)
>
> 
> target-arm queue:
>  * handle FTYPE flag correctly in v7M exception return
>for v7M CPUs with an FPU (v8M CPUs were already correct)
>  * versal: Add the CRP as unimplemented
>  * Fix ISR_EL1 tracking when executing at EL2
>  * Honor HCR_EL2.TID3 trapping requirements
>

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.2
for any user-visible changes.

-- PMM

[PULL 0/4] target-arm queue

[Peter Maydell]

Arm patches for rc3 : just a handful of bug fixes.

thanks
-- PMM


The following changes since commit 4ecc984210ca1bf508a96a550ec8a93a5f833f6c:

  Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-rc3' 
into staging (2019-11-26 12:36:40 +)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20191126

for you to fetch changes up to 6a4ef4e5d1084ce41fafa7d470a644b0fd3d9317:

  target/arm: Honor HCR_EL2.TID3 trapping requirements (2019-11-26 13:55:37 
+)


target-arm queue:
 * handle FTYPE flag correctly in v7M exception return
   for v7M CPUs with an FPU (v8M CPUs were already correct)
 * versal: Add the CRP as unimplemented
 * Fix ISR_EL1 tracking when executing at EL2
 * Honor HCR_EL2.TID3 trapping requirements


Edgar E. Iglesias (1):
  hw/arm: versal: Add the CRP as unimplemented

Jean-Hugues Deschênes (1):
  target/arm: Fix handling of cortex-m FTYPE flag in EXCRET

Marc Zyngier (2):
  target/arm: Fix ISR_EL1 tracking when executing at EL2
  target/arm: Honor HCR_EL2.TID3 trapping requirements

 include/hw/arm/xlnx-versal.h |  3 ++
 hw/arm/xlnx-versal.c |  2 ++
 target/arm/helper.c  | 83 ++--
 target/arm/m_helper.c|  7 ++--
 4 files changed, 89 insertions(+), 6 deletions(-)

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/20190708132237.7911-1-peter.mayd...@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190708132237.7911-1-peter.mayd...@linaro.org
Type: series
Subject: [Qemu-devel] [PULL 0/4] target-arm queue

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 t [tag update]
patchew/20190708132237.7911-1-peter.mayd...@linaro.org -> 
patchew/20190708132237.7911-1-peter.mayd...@linaro.org
Switched to a new branch 'test'

=== OUTPUT BEGIN ===
checkpatch.pl: no revisions returned for revlist '1'
=== OUTPUT END ===

Test command exited with code: 255


The full log is available at
http://patchew.org/logs/20190708132237.7911-1-peter.mayd...@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

On Mon, 8 Jul 2019 at 14:22, Peter Maydell  wrote:
>
> A last handful of patches before the rc0. These are all bugfixes
> so they could equally well go into rc1, but since my pullreq
> queue is otherwise empty I might as well push them out. The
> FPSCR bugfix is definitely one I'd like in rc0; the rest are
> not really user-visible I think.
>
> thanks
> -- PMM
>
> The following changes since commit c4107e8208d0222f9b328691b519aaee4101db87:
>
>   Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into 
> staging (2019-07-08 10:26:18 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20190708
>
> for you to fetch changes up to 85795187f416326f87177cabc39fae1911f04c50:
>
>   target/arm/vfp_helper: Call set_fpscr_to_host before updating to FPSCR 
> (2019-07-08 14:11:31 +0100)
>
> 
> target-arm queue:
>  * tests/migration-test: Fix read off end of aarch64_kernel array
>  * Fix sve_zcr_len_for_el off-by-one error
>  * hw/arm/sbsa-ref: Silence Coverity nit
>  * vfp_helper: Call set_fpscr_to_host before updating to FPSCR


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM

[Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

A last handful of patches before the rc0. These are all bugfixes
so they could equally well go into rc1, but since my pullreq
queue is otherwise empty I might as well push them out. The
FPSCR bugfix is definitely one I'd like in rc0; the rest are
not really user-visible I think.

thanks
-- PMM

The following changes since commit c4107e8208d0222f9b328691b519aaee4101db87:

  Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging 
(2019-07-08 10:26:18 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20190708

for you to fetch changes up to 85795187f416326f87177cabc39fae1911f04c50:

  target/arm/vfp_helper: Call set_fpscr_to_host before updating to FPSCR 
(2019-07-08 14:11:31 +0100)


target-arm queue:
 * tests/migration-test: Fix read off end of aarch64_kernel array
 * Fix sve_zcr_len_for_el off-by-one error
 * hw/arm/sbsa-ref: Silence Coverity nit
 * vfp_helper: Call set_fpscr_to_host before updating to FPSCR


Peter Maydell (2):
  tests/migration-test: Fix read off end of aarch64_kernel array
  hw/arm/sbsa-ref: Remove unnecessary check for secure_sysmem == NULL

Philippe Mathieu-Daudé (1):
  target/arm/vfp_helper: Call set_fpscr_to_host before updating to FPSCR

Richard Henderson (1):
  target/arm: Fix sve_zcr_len_for_el

 hw/arm/sbsa-ref.c   |  8 ++--
 target/arm/helper.c |  4 ++--
 target/arm/vfp_helper.c |  4 ++--
 tests/migration-test.c  | 22 +++---
 4 files changed, 13 insertions(+), 25 deletions(-)

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

On 24 July 2017 at 18:06, Peter Maydell  wrote:
> ARM queue, mostly bug fixes to go into rc0.
> The integratorcp and fsl_imx* changes are migration
> compat breakers but that's ok for these boards.
>
> thanks
> -- PMM
>
>
> The following changes since commit ce1d20aac8533357650774c2c240e30de87dc122:
>
>   Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2017-07-24' into 
> staging (2017-07-24 16:20:47 +0100)
>
> are available in the git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20170724
>
> for you to fetch changes up to b2d1b0507d1b80f23da12dd8aab56944fe380a09:
>
>   integratorcp: Don't migrate flash using vmstate_register_ram_global() 
> (2017-07-24 17:59:28 +0100)
>
> 
> target-arm queue:
>  * fix a TCG temporary leak in aarch64 rev16
>  * fsl_imx*: migrate the ROM contents
>  * integratorcp: don't use vmstate_register_ram_global for flash
>  * mps2: Correctly set parent bus for SCC device
>
> 

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

ARM queue, mostly bug fixes to go into rc0.
The integratorcp and fsl_imx* changes are migration
compat breakers but that's ok for these boards.

thanks
-- PMM


The following changes since commit ce1d20aac8533357650774c2c240e30de87dc122:

  Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2017-07-24' into 
staging (2017-07-24 16:20:47 +0100)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20170724

for you to fetch changes up to b2d1b0507d1b80f23da12dd8aab56944fe380a09:

  integratorcp: Don't migrate flash using vmstate_register_ram_global() 
(2017-07-24 17:59:28 +0100)


target-arm queue:
 * fix a TCG temporary leak in aarch64 rev16
 * fsl_imx*: migrate the ROM contents
 * integratorcp: don't use vmstate_register_ram_global for flash
 * mps2: Correctly set parent bus for SCC device


Emilio G. Cota (1):
  target/arm: fix TCG temp leak in aarch64 rev16

Peter Maydell (3):
  fsl_imx*: Migrate ROM contents
  mps2: Correctly set parent bus for SCC device
  integratorcp: Don't migrate flash using vmstate_register_ram_global()

 hw/arm/fsl-imx25.c | 4 ++--
 hw/arm/fsl-imx31.c | 4 ++--
 hw/arm/fsl-imx6.c  | 4 ++--
 hw/arm/integratorcp.c  | 3 +--
 hw/arm/mps2.c  | 2 +-
 target/arm/translate-a64.c | 1 +
 6 files changed, 9 insertions(+), 9 deletions(-)

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

On 11 July 2017 at 11:29, Peter Maydell  wrote:
> A surprisingly short target-arm queue, but no point in holding
> onto these waiting for more code to arrive :-)
>
> thanks
> -- PMM
>
> The following changes since commit 3d0bf8dfdfebd7f2ae41b6f220444b8047d6b1ee:
>
>   Merge remote-tracking branch 
> 'remotes/dgilbert/tags/pull-migration-20170710a' into staging (2017-07-10 
> 18:13:03 +0100)
>
> are available in the git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20170711
>
> for you to fetch changes up to 792dac309c8660306557ba058b8b5a6a75ab3c1f:
>
>   target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode 
> (2017-07-11 11:21:26 +0100)
>
> 
> target-arm queue:
>  * v7M: ignore writes to CONTROL.SPSEL from Thread mode
>  * KVM: Enable in-kernel timers with user space gic
>  * aspeed: Register all watchdogs
>  * hw/misc: Add Exynos4210 Pseudo Random Number Generator
>

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

A surprisingly short target-arm queue, but no point in holding
onto these waiting for more code to arrive :-)

thanks
-- PMM

The following changes since commit 3d0bf8dfdfebd7f2ae41b6f220444b8047d6b1ee:

  Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20170710a' 
into staging (2017-07-10 18:13:03 +0100)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20170711

for you to fetch changes up to 792dac309c8660306557ba058b8b5a6a75ab3c1f:

  target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode (2017-07-11 
11:21:26 +0100)


target-arm queue:
 * v7M: ignore writes to CONTROL.SPSEL from Thread mode
 * KVM: Enable in-kernel timers with user space gic
 * aspeed: Register all watchdogs
 * hw/misc: Add Exynos4210 Pseudo Random Number Generator


Alexander Graf (1):
  ARM: KVM: Enable in-kernel timers with user space gic

Joel Stanley (1):
  aspeed: Register all watchdogs

Krzysztof Kozlowski (1):
  hw/misc: Add Exynos4210 Pseudo Random Number Generator

Peter Maydell (1):
  target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode

 hw/misc/Makefile.objs   |   2 +-
 include/hw/arm/aspeed_soc.h |   4 +-
 include/sysemu/kvm.h|  11 ++
 target/arm/cpu.h|   3 +
 accel/kvm/kvm-all.c |   5 +
 accel/stubs/kvm-stub.c  |   5 +
 hw/arm/aspeed_soc.c |  25 ++--
 hw/arm/exynos4210.c |   4 +
 hw/intc/arm_gic.c   |   7 ++
 hw/misc/exynos4210_rng.c| 277 
 target/arm/helper.c |  13 ++-
 target/arm/kvm.c|  51 
 12 files changed, 394 insertions(+), 13 deletions(-)
 create mode 100644 hw/misc/exynos4210_rng.c

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[Stefan Hajnoczi]

On Mon, Nov 07, 2016 at 10:47:29AM +, Peter Maydell wrote:
> Hi; here's the last target-arm pull request before I
> go off on holiday -- four fairly minor bug fixes.
> Hopefully it merges without problems, because I won't
> be around tomorrow to do a respin :-)
> 
> thanks
> -- PMM
> 
> The following changes since commit 9226682a401f34b10fd79dfe17ba334da0800747:
> 
>   Merge remote-tracking branch 'sstabellini/tags/xen-20161102-tag' into 
> staging (2016-11-04 09:26:24 +)
> 
> are available in the git repository at:
> 
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20161107
> 
> for you to fetch changes up to 9706e0162d2405218fd7376ffdf13baed8569a4b:
> 
>   hw/i2c/bitbang_i2c: Handle NACKs from devices (2016-11-07 10:01:15 +)
> 
> 
> target-arm queue:
>  * bitbang_i2c: Handle NACKs from devices
>  * Fix corruption of CPSR when SCTLR.EE is set
>  * nvic: set pending status for not active interrupts
>  * char: cadence: check baud rate generator and divider values
> 
> 
> Julian Brown (1):
>   Fix corruption of CPSR when SCTLR.EE is set
> 
> Marcin Krzeminski (1):
>   nvic: set pending status for not active interrupts
> 
> Peter Maydell (1):
>   hw/i2c/bitbang_i2c: Handle NACKs from devices
> 
> Prasad J Pandit (1):
>   char: cadence: check baud rate generator and divider values
> 
>  hw/char/cadence_uart.c | 15 +++
>  hw/i2c/bitbang_i2c.c   | 19 +++
>  hw/intc/arm_gic.c  | 22 --
>  target-arm/helper.c|  2 +-
>  4 files changed, 51 insertions(+), 7 deletions(-)

Thanks, applied to my staging tree:
https://github.com/stefanha/qemu/commits/staging

Stefan


signature.asc
Description: PGP signature

[Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

Hi; here's the last target-arm pull request before I
go off on holiday -- four fairly minor bug fixes.
Hopefully it merges without problems, because I won't
be around tomorrow to do a respin :-)

thanks
-- PMM

The following changes since commit 9226682a401f34b10fd79dfe17ba334da0800747:

  Merge remote-tracking branch 'sstabellini/tags/xen-20161102-tag' into staging 
(2016-11-04 09:26:24 +)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20161107

for you to fetch changes up to 9706e0162d2405218fd7376ffdf13baed8569a4b:

  hw/i2c/bitbang_i2c: Handle NACKs from devices (2016-11-07 10:01:15 +)


target-arm queue:
 * bitbang_i2c: Handle NACKs from devices
 * Fix corruption of CPSR when SCTLR.EE is set
 * nvic: set pending status for not active interrupts
 * char: cadence: check baud rate generator and divider values


Julian Brown (1):
  Fix corruption of CPSR when SCTLR.EE is set

Marcin Krzeminski (1):
  nvic: set pending status for not active interrupts

Peter Maydell (1):
  hw/i2c/bitbang_i2c: Handle NACKs from devices

Prasad J Pandit (1):
  char: cadence: check baud rate generator and divider values

 hw/char/cadence_uart.c | 15 +++
 hw/i2c/bitbang_i2c.c   | 19 +++
 hw/intc/arm_gic.c  | 22 --
 target-arm/helper.c|  2 +-
 4 files changed, 51 insertions(+), 7 deletions(-)

[Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

A handful of minor ARM bugfixes...

thanks
-- PMM

The following changes since commit 229c0372cf3ca201c41d2bb121627e6752e776ad:

  Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into 
staging (2015-11-24 10:27:19 +)

are available in the git repository at:


  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20151124

for you to fetch changes up to e14f0eb12f920fd96b9f79d15cedd437648e8667:

  target-arm/translate-a64.c: Correct unallocated checks for ldst_excl 
(2015-11-24 14:12:15 +)


target-arm queue:
 * fix minimum RAM check warning on xlnx-ep108
 * remove unused define from aarch64-linux-user.mak config
 * don't mask out bits [47:40] in ARMv8 LPAE descriptors
 * correct unallocated instruction checks for ldst_excl


Alistair Francis (1):
  xlnx-ep108: Fix minimum RAM check

Peter Maydell (3):
  default-configs/aarch64-linux-user.mak: Remove unused define
  target-arm: Don't mask out bits [47:40] in LPAE descriptors for v8
  target-arm/translate-a64.c: Correct unallocated checks for ldst_excl

 default-configs/aarch64-linux-user.mak |  2 --
 hw/arm/xlnx-ep108.c|  2 +-
 target-arm/helper.c| 12 +++-
 target-arm/translate-a64.c | 15 ++-
 4 files changed, 14 insertions(+), 17 deletions(-)

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

On 24 November 2015 at 14:18, Peter Maydell  wrote:
> A handful of minor ARM bugfixes...
>
> thanks
> -- PMM
>
> The following changes since commit 229c0372cf3ca201c41d2bb121627e6752e776ad:
>
>   Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' 
> into staging (2015-11-24 10:27:19 +)
>
> are available in the git repository at:
>
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20151124
>
> for you to fetch changes up to e14f0eb12f920fd96b9f79d15cedd437648e8667:
>
>   target-arm/translate-a64.c: Correct unallocated checks for ldst_excl 
> (2015-11-24 14:12:15 +)
>
> 
> target-arm queue:
>  * fix minimum RAM check warning on xlnx-ep108
>  * remove unused define from aarch64-linux-user.mak config
>  * don't mask out bits [47:40] in ARMv8 LPAE descriptors
>  * correct unallocated instruction checks for ldst_excl
>
> 
> Alistair Francis (1):
>   xlnx-ep108: Fix minimum RAM check
>
> Peter Maydell (3):
>   default-configs/aarch64-linux-user.mak: Remove unused define
>   target-arm: Don't mask out bits [47:40] in LPAE descriptors for v8
>   target-arm/translate-a64.c: Correct unallocated checks for ldst_excl

Applied, thanks.

-- PMM

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[Blue Swirl]

Thanks, pulled.

On Fri, Apr 19, 2013 at 3:06 PM, Peter Maydell peter.mayd...@linaro.org wrote:
 target-arm pullreq, containing a fix for a dumb SRS bug I
 introduced, and the update to migration to use vmstate
 (both of which have been on the list since before freeze).
 Please pull.

 thanks
 -- PMM

 The following changes since commit 09dada400328d75daf79e3eca1e48e024fec148d:

   configure: remove duplicate test (2013-04-18 14:12:31 +0200)

 are available in the git repository at:

   git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.next

 for you to fetch changes up to e91f229a253f489f6d12b946ad7bdcdc158c5b67:

   target-arm: Correctly restore FPSCR (2013-04-19 12:24:19 +0100)

 
 Juan Quintela (1):
   target-arm: port ARM CPU save/load to use VMState

 Peter Chubb (1):
   target-arm: Reinsert missing return statement in ARM mode SRS decode

 Peter Maydell (2):
   target-arm: Add some missing CPU state fields to VMState
   target-arm: Correctly restore FPSCR

  target-arm/cpu-qom.h   |4 +
  target-arm/cpu.c   |1 +
  target-arm/cpu.h   |2 -
  target-arm/machine.c   |  430 
 
  target-arm/translate.c |1 +
  5 files changed, 222 insertions(+), 216 deletions(-)

[Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

target-arm pullreq, containing a fix for a dumb SRS bug I
introduced, and the update to migration to use vmstate
(both of which have been on the list since before freeze).
Please pull.

thanks
-- PMM

The following changes since commit 09dada400328d75daf79e3eca1e48e024fec148d:

  configure: remove duplicate test (2013-04-18 14:12:31 +0200)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.next

for you to fetch changes up to e91f229a253f489f6d12b946ad7bdcdc158c5b67:

  target-arm: Correctly restore FPSCR (2013-04-19 12:24:19 +0100)


Juan Quintela (1):
  target-arm: port ARM CPU save/load to use VMState

Peter Chubb (1):
  target-arm: Reinsert missing return statement in ARM mode SRS decode

Peter Maydell (2):
  target-arm: Add some missing CPU state fields to VMState
  target-arm: Correctly restore FPSCR

 target-arm/cpu-qom.h   |4 +
 target-arm/cpu.c   |1 +
 target-arm/cpu.h   |2 -
 target-arm/machine.c   |  430 
 target-arm/translate.c |1 +
 5 files changed, 222 insertions(+), 216 deletions(-)

Re: [Qemu-devel] [PULL 0/4] target-arm queue

[Blue Swirl]

On Wed, Oct 24, 2012 at 1:02 PM, Peter Maydell peter.mayd...@linaro.org wrote:
 Hi; this is a pullreq for the current target-arm queue. Some
 minor tweaks and the patch which handles get/put_user() failure
 in the semihosting code. Please pull.

Thanks, pulled.


 thanks
 -- PMM

 The following changes since commit a8170e5e97ad17ca169c64ba87ae2f53850dab4c:

   Rename target_phys_addr_t to hwaddr (2012-10-23 08:58:25 -0500)

 are available in the git repository at:

   git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream

 for you to fetch changes up to 8b279a60dc3ca53923701dfec6e54bea9d13cfb7:

   target-arm: Remove out of date FIXME regarding saturating arithmetic 
 (2012-10-24 13:33:29 +0100)

 
 Peter Maydell (4):
   arm-semi.c: Handle get/put_user() failure accessing arguments
   target-arm: Use TCG operation for Neon 64 bit negation
   target-arm: Implement abs_i32 inline rather than as a helper
   target-arm: Remove out of date FIXME regarding saturating arithmetic

  target-arm/arm-semi.c|  167 
 +-
  target-arm/helper.c  |5 --
  target-arm/helper.h  |2 -
  target-arm/neon_helper.c |6 --
  target-arm/op_helper.c   |2 -
  target-arm/translate.c   |   15 -
  6 files changed, 118 insertions(+), 79 deletions(-)

[Qemu-devel] [PULL 0/4] target-arm queue

[Peter Maydell]

Hi; this is a pullreq for the current target-arm queue. Some
minor tweaks and the patch which handles get/put_user() failure
in the semihosting code. Please pull.

thanks
-- PMM

The following changes since commit a8170e5e97ad17ca169c64ba87ae2f53850dab4c:

  Rename target_phys_addr_t to hwaddr (2012-10-23 08:58:25 -0500)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream

for you to fetch changes up to 8b279a60dc3ca53923701dfec6e54bea9d13cfb7:

  target-arm: Remove out of date FIXME regarding saturating arithmetic 
(2012-10-24 13:33:29 +0100)


Peter Maydell (4):
  arm-semi.c: Handle get/put_user() failure accessing arguments
  target-arm: Use TCG operation for Neon 64 bit negation
  target-arm: Implement abs_i32 inline rather than as a helper
  target-arm: Remove out of date FIXME regarding saturating arithmetic

 target-arm/arm-semi.c|  167 +-
 target-arm/helper.c  |5 --
 target-arm/helper.h  |2 -
 target-arm/neon_helper.c |6 --
 target-arm/op_helper.c   |2 -
 target-arm/translate.c   |   15 -
 6 files changed, 118 insertions(+), 79 deletions(-)