Re: [PULL 3/3] target/loongarch: Fix qemu-loongarch64 hang when executing 'll.d $t0, $t0, 0'

2024-03-21 Thread gaosong

在 2024/3/22 上午1:13, Michael Tokarev 写道:

20.03.2024 05:40, Song Gao :

On gen_ll, if a->imm is zero, make_address_x return src1,
but the load to destination may clobber src1. We use a new
destination to fix this problem.

Fixes: c5af6628f4be (target/loongarch: Extract make_address_i() helper)
Reviewed-by: Richard Henderson 
Suggested-by: Richard Henderson 
Signed-off-by: Song Gao 
Message-Id: <20240320013955.1561311-1-gaos...@loongson.cn>


Is it a stable-8.2 material?


Yes.

Thanks.
Song Gao

Thanks,

/mjt





Re: [PULL 3/3] target/loongarch: Fix qemu-loongarch64 hang when executing 'll.d $t0, $t0, 0'

2024-03-21 Thread Michael Tokarev

20.03.2024 05:40, Song Gao :

On gen_ll, if a->imm is zero, make_address_x return src1,
but the load to destination may clobber src1. We use a new
destination to fix this problem.

Fixes: c5af6628f4be (target/loongarch: Extract make_address_i() helper)
Reviewed-by: Richard Henderson 
Suggested-by: Richard Henderson 
Signed-off-by: Song Gao 
Message-Id: <20240320013955.1561311-1-gaos...@loongson.cn>


Is it a stable-8.2 material?

Thanks,

/mjt



[PULL 3/3] target/loongarch: Fix qemu-loongarch64 hang when executing 'll.d $t0, $t0, 0'

2024-03-19 Thread Song Gao
On gen_ll, if a->imm is zero, make_address_x return src1,
but the load to destination may clobber src1. We use a new
destination to fix this problem.

Fixes: c5af6628f4be (target/loongarch: Extract make_address_i() helper)
Reviewed-by: Richard Henderson 
Suggested-by: Richard Henderson 
Signed-off-by: Song Gao 
Message-Id: <20240320013955.1561311-1-gaos...@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_atomic.c.inc | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_atomic.c.inc 
b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc
index 80c2e286fd..974bc2a70f 100644
--- a/target/loongarch/tcg/insn_trans/trans_atomic.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc
@@ -5,14 +5,14 @@
 
 static bool gen_ll(DisasContext *ctx, arg_rr_i *a, MemOp mop)
 {
-TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
+TCGv t1 = tcg_temp_new();
 TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
 TCGv t0 = make_address_i(ctx, src1, a->imm);
 
-tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, mop);
+tcg_gen_qemu_ld_i64(t1, t0, ctx->mem_idx, mop);
 tcg_gen_st_tl(t0, tcg_env, offsetof(CPULoongArchState, lladdr));
-tcg_gen_st_tl(dest, tcg_env, offsetof(CPULoongArchState, llval));
-gen_set_gpr(a->rd, dest, EXT_NONE);
+tcg_gen_st_tl(t1, tcg_env, offsetof(CPULoongArchState, llval));
+gen_set_gpr(a->rd, t1, EXT_NONE);
 
 return true;
 }
-- 
2.25.1