Re: [Qemu-devel] [PATCH] m48t59: Fix a wrong opaque passed to nvram read and write routines
On Sun, Jan 02, 2011 at 07:44:49PM +0100, Hervé Poussineau wrote: This unregresses Sun4m and PPC prep/ref405ep machines Signed-off-by: Hervé Poussineau hpous...@reactos.org --- hw/m48t59.c | 11 ++- 1 files changed, 6 insertions(+), 5 deletions(-) Thanks, applied. diff --git a/hw/m48t59.c b/hw/m48t59.c index 6991e2e..2020487 100644 --- a/hw/m48t59.c +++ b/hw/m48t59.c @@ -642,6 +642,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, DeviceState *dev; SysBusDevice *s; M48t59SysBusState *d; +M48t59State *state; dev = qdev_create(NULL, m48t59); qdev_prop_set_uint32(dev, type, type); @@ -649,18 +650,18 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, qdev_prop_set_uint32(dev, io_base, io_base); qdev_init_nofail(dev); s = sysbus_from_qdev(dev); +d = FROM_SYSBUS(M48t59SysBusState, s); +state = d-state; sysbus_connect_irq(s, 0, IRQ); if (io_base != 0) { -register_ioport_read(io_base, 0x04, 1, NVRAM_readb, s); -register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s); +register_ioport_read(io_base, 0x04, 1, NVRAM_readb, state); +register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, state); } if (mem_base != 0) { sysbus_mmio_map(s, 0, mem_base); } -d = FROM_SYSBUS(M48t59SysBusState, s); - -return d-state; +return state; } M48t59State *m48t59_init_isa(uint32_t io_base, uint16_t size, int type) -- 1.7.2.3 -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] [PATCH] m48t59: Fix a wrong opaque passed to nvram read and write routines
Hi, Am 02.01.2011 um 19:44 schrieb Hervé Poussineau: This unregresses Sun4m and PPC prep/ref405ep machines Signed-off-by: Hervé Poussineau hpous...@reactos.org Were there any visible symptoms of the regression? Or did you just spot this while reading the code? Patch itself looks sensible. Still need to test. Regards, Andreas P.S. Is to unregress actually a word?
[Qemu-devel] [PATCH] m48t59: Fix a wrong opaque passed to nvram read and write routines
This unregresses Sun4m and PPC prep/ref405ep machines Signed-off-by: Hervé Poussineau hpous...@reactos.org --- hw/m48t59.c | 11 ++- 1 files changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/m48t59.c b/hw/m48t59.c index 6991e2e..2020487 100644 --- a/hw/m48t59.c +++ b/hw/m48t59.c @@ -642,6 +642,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, DeviceState *dev; SysBusDevice *s; M48t59SysBusState *d; +M48t59State *state; dev = qdev_create(NULL, m48t59); qdev_prop_set_uint32(dev, type, type); @@ -649,18 +650,18 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base, qdev_prop_set_uint32(dev, io_base, io_base); qdev_init_nofail(dev); s = sysbus_from_qdev(dev); +d = FROM_SYSBUS(M48t59SysBusState, s); +state = d-state; sysbus_connect_irq(s, 0, IRQ); if (io_base != 0) { -register_ioport_read(io_base, 0x04, 1, NVRAM_readb, s); -register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s); +register_ioport_read(io_base, 0x04, 1, NVRAM_readb, state); +register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, state); } if (mem_base != 0) { sysbus_mmio_map(s, 0, mem_base); } -d = FROM_SYSBUS(M48t59SysBusState, s); - -return d-state; +return state; } M48t59State *m48t59_init_isa(uint32_t io_base, uint16_t size, int type) -- 1.7.2.3