On Fri, Jun 17, 2016 at 04:07:20PM +0530, Aneesh Kumar K.V wrote:
> Support for 0 value for memeory coherence is optional and with ppc64
> we can always enable memory coherence. Linux kernel did that during
> the development of 4.7 kernel. But that resulted in failure in Qemu
> in H_ENTER hcall due to below check. The mentioned change was reverted
> in the kernel and kernel right now enable memory coherence only if
> cache inhibited is not set. Nevertheless update qemu WIMG flag check
> to cover the case where we enable memory coherence along with cache
> inhibited flag.
>
> In order to handle older and newer kernel version consider both Cache
> inhibitted and (cache inhibitted | memory conference) as valid values
> for wimg flags.
>
> Signed-off-by: Aneesh Kumar K.V
Applied to ppc-for-2.7
> ---
> hw/ppc/spapr_hcall.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 2ba5cbdb194a..e011ed4b664b 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -102,11 +102,15 @@ static target_ulong h_enter(PowerPCCPU *cpu,
> sPAPRMachineState *spapr,
> return H_PARAMETER;
> }
> } else {
> +target_ulong wimg_flags;
> /* Looks like an IO address */
> /* FIXME: What WIMG combinations could be sensible for IO?
> * For now we allow WIMG=010x, but are there others? */
> /* FIXME: Should we check against registered IO addresses? */
> -if ((ptel & (HPTE64_R_W | HPTE64_R_I | HPTE64_R_M)) != HPTE64_R_I) {
> +wimg_flags = (ptel & (HPTE64_R_W | HPTE64_R_I | HPTE64_R_M));
> +
> +if (wimg_flags != HPTE64_R_I &&
> +wimg_flags != (HPTE64_R_I | HPTE64_R_M)) {
> return H_PARAMETER;
> }
> }
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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